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Minor optimization to PR #60

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Sebastien Lorquet 2016-03-29 07:13:24 -06:00 • committed by Gregory Nutt
parent 446618a644
commit 8fdef878ba
1 changed files with 3 additions and 6 deletions
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9
arch/arm/src/stm32l4/stm32l4_lse.c
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@ -62,7 +62,7 @@
void stm32l4_rcc_enablelse(void)
{
bool bkpenabled;
bool writable;
uint32_t regval;
/* The LSE is in the RTC domain and write access is denied to this domain
@ -70,7 +70,7 @@ void stm32l4_rcc_enablelse(void)
* register before to configuring the LSE.
*/
bkpenabled = stm32l4_pwr_enablebkp(true);
writable = stm32l4_pwr_enablebkp(true);
/* Enable the External Low-Speed (LSE) oscillator by setting the LSEON bit
* the RCC BDCR register.
@ -89,8 +89,5 @@ void stm32l4_rcc_enablelse(void)
/* Disable backup domain access if it was disabled on entry */
if (!bkpenabled)
{
(void)stm32l4_pwr_enablebkp(false);
}
(void)stm32l4_pwr_enablebkp(writable);
}