From d483f7939f6eff0aef89e343499434d6abdd79e2 Mon Sep 17 00:00:00 2001 From: v01d Date: Sat, 6 Aug 2016 22:23:59 -0300 Subject: [PATCH 001/214] I2C0 support for kinetis/teensy-3.x (to be tested) --- arch/arm/src/kinetis/Make.defs | 4 + arch/arm/src/kinetis/kinetis_i2c.c | 681 +++++++++++++++++++++++++++++ arch/arm/src/kinetis/kinetis_i2c.h | 52 +++ configs/teensy-3.x/include/board.h | 14 + configs/teensy-3.x/nsh/defconfig | 44 +- configs/teensy-3.x/src/Makefile | 2 +- configs/teensy-3.x/src/k20_i2c.c | 46 ++ configs/teensy-3.x/src/teensy-3x.h | 10 + 8 files changed, 840 insertions(+), 13 deletions(-) create mode 100644 arch/arm/src/kinetis/kinetis_i2c.c create mode 100644 arch/arm/src/kinetis/kinetis_i2c.h create mode 100644 configs/teensy-3.x/src/k20_i2c.c diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs index 9d4ea5083ab..4bbc493d90b 100644 --- a/arch/arm/src/kinetis/Make.defs +++ b/arch/arm/src/kinetis/Make.defs @@ -131,6 +131,10 @@ ifeq ($(CONFIG_PWM),y) CHIP_CSRCS += kinetis_pwm.c endif +ifeq ($(CONFIG_I2C),y) +CHIP_CSRCS += kinetis_i2c.c +endif + ifeq ($(CONFIG_NET),y) ifeq ($(CONFIG_KINETIS_ENET),y) CHIP_CSRCS += kinetis_enet.c diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c new file mode 100644 index 00000000000..750cee6dd2f --- /dev/null +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -0,0 +1,681 @@ +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "up_internal.h" + +#include "kinetis_config.h" +#include "chip.h" +#include "chip/kinetis_i2c.h" +#include "chip/kinetis_sim.h" +#include "chip/kinetis_pinmux.h" +#include "kinetis.h" +#include "kinetis_i2c.h" + + +#if defined(CONFIG_KINETIS_I2C0) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define I2C_TIMEOUT (20*1000/CONFIG_USEC_PER_TICK) /* 20 mS */ + +#define I2C_DEFAULT_FREQUENCY 400000 + +#define STATE_OK 0 +#define STATE_ABORTED 1 + +/* + * TODO: + * - revisar tamanio de todos los registros (getreg/putreg) + */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +struct kinetis_i2cdev_s +{ + struct i2c_master_s dev; /* Generic I2C device */ + unsigned int base; /* Base address of registers */ + uint16_t irqid; /* IRQ for this device */ + uint32_t baseFreq; /* branch frequency */ + + sem_t mutex; /* Only one thread can access at a time */ + sem_t wait; /* Place to wait for state machine completion */ + volatile uint8_t state; /* State of state machine */ + WDOG_ID timeout; /* watchdog to timeout when bus hung */ + uint32_t frequency; /* Current I2C frequency */ + + struct i2c_msg_s *msgs; /* remaining transfers - first one is in progress */ + unsigned int nmsg; /* number of transfer remaining */ + + uint16_t wrcnt; /* number of bytes sent to tx fifo */ + uint16_t rdcnt; /* number of bytes read from rx fifo */ +}; + +static struct kinetis_i2cdev_s g_i2c_dev; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv); +static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv); +static int kinetis_i2c_interrupt(int irq, FAR void *context); +static void kinetis_i2c_timeout(int argc, uint32_t arg, ...); +static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, + uint32_t frequency); +static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, + FAR struct i2c_msg_s *msgs, int count); +#ifdef CONFIG_I2C_RESET +static int kinetis_i2c_reset(FAR struct i2c_master_s * dev); +#endif + +/**************************************************************************** + * I2C device operations + ****************************************************************************/ + +struct i2c_ops_s kinetis_i2c_ops = +{ + .transfer = kinetis_i2c_transfer +#ifdef CONFIG_I2C_RESET + , .reset = kinetis_i2c_reset +#endif +}; + +/**************************************************************************** + * Name: kinetis_i2c_setfrequency + * + * Description: + * Set the frequency for the next transfer + * + ****************************************************************************/ + +static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, + uint32_t frequency) +{ + if (frequency == priv->frequency) return; + + /* TODO: use apropriate definitions */ + + #if BOARD_BUS_FREQ == 120000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV1152; // 104 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV288; // 416 kHz + } else { + I2C0_F = I2C_F_DIV128; // 0.94 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 108000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV1024; // 105 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV256; // 422 kHz + } else { + I2C0_F = I2C_F_DIV112; // 0.96 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 96000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV960; // 100 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV240; // 400 kHz + } else { + I2C0_F = I2C_F_DIV96; // 1.0 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 90000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV896; // 100 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV224; // 402 kHz + } else { + I2C0_F = I2C_F_DIV88; // 1.02 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 80000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV768; // 104 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV192; // 416 kHz + } else { + I2C0_F = I2C_F_DIV80; // 1.0 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 72000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV640; // 112 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV192; // 375 kHz + } else { + I2C0_F = I2C_F_DIV72; // 1.0 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 64000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV640; // 100 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV160; // 400 kHz + } else { + I2C0_F = I2C_F_DIV64; // 1.0 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 60000000 + if (frequency < 400000) { + I2C0_F = 0x2C; // 104 kHz + } else if (frequency < 1000000) { + I2C0_F = 0x1C; // 416 kHz + } else { + I2C0_F = 0x12; // 938 kHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 56000000 + if (frequency < 400000) { + I2C0_F = 0x2B; // 109 kHz + } else if (frequency < 1000000) { + I2C0_F = 0x1C; // 389 kHz + } else { + I2C0_F = 0x0E; // 1 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 54000000 + if (frequency < 400000) { + I2C0_F = I2C_F_DIV512; // 105 kHz + } else if (frequency < 1000000) { + I2C0_F = I2C_F_DIV128; // 422 kHz + } else { + I2C0_F = I2C_F_DIV56; // 0.96 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 48000000 + if (frequency < 400000) { + I2C0_F = 0x27; // 100 kHz + } else if (frequency < 1000000) { + I2C0_F = 0x1A; // 400 kHz + } else { + I2C0_F = 0x0D; // 1 MHz + } + I2C0_FLT = 4; + #elif BOARD_BUS_FREQ == 40000000 + if (frequency < 400000) { + I2C0_F = 0x29; // 104 kHz + } else if (frequency < 1000000) { + I2C0_F = 0x19; // 416 kHz + } else { + I2C0_F = 0x0B; // 1 MHz + } + I2C0_FLT = 3; + #elif BOARD_BUS_FREQ == 36000000 + if (frequency < 400000) { + putreg8(0x28, KINETIS_I2C0_F); // 113 kHz + } else if (frequency < 1000000) { + putreg8(0x19, KINETIS_I2C0_F); // 375 kHz + } else { + putreg8(0x0A, KINETIS_I2C0_F); // 1 MHz + } + putreg8(3, KINETIS_I2C0_FLT); + #elif BOARD_BUS_FREQ == 24000000 + if (frequency < 400000) { + I2C0_F = 0x1F; // 100 kHz + } else if (frequency < 1000000) { + I2C0_F = 0x12; // 375 kHz + } else { + I2C0_F = 0x02; // 1 MHz + } + I2C0_FLT = 2; + #elif BOARD_BUS_FREQ == 16000000 + if (frequency < 400000) { + I2C0_F = 0x20; // 100 kHz + } else if (frequency < 1000000) { + I2C0_F = 0x07; // 400 kHz + } else { + I2C0_F = 0x00; // 800 MHz + } + I2C0_FLT = 1; + #elif BOARD_BUS_FREQ == 8000000 + if (frequency < 400000) { + I2C0_F = 0x14; // 100 kHz + } else { + I2C0_F = 0x00; // 400 kHz + } + I2C0_FLT = 1; + #elif BOARD_BUS_FREQ == 4000000 + if (frequency < 400000) { + I2C0_F = 0x07; // 100 kHz + } else { + I2C0_F = 0x00; // 200 kHz + } + I2C0_FLT = 1; + #elif BOARD_BUS_FREQ == 2000000 + I2C0_F = 0x00; // 100 kHz + I2C0_FLT = 1; + #else + #error "F_BUS must be 120, 108, 96, 9, 80, 72, 64, 60, 56, 54, 48, 40, 36, 24, 16, 8, 4 or 2 MHz" + #endif + + priv->frequency = frequency; +} + +/**************************************************************************** + * Name: kinetis_i2c_start + * + * Description: + * Initiate I2C transfer (START/RSTART + address) + * + ****************************************************************************/ + +static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) +{ + struct i2c_msg_s *msg; + + msg = priv->msgs; + + /* now take control of the bus */ + if (getreg8(KINETIS_I2C0_C1) & I2C_C1_MST) + { + /* we are already the bus master, so send a repeated start */ + putreg8(I2C_C1_IICEN | I2C_C1_MST | I2C_C1_RSTA | I2C_C1_TX, KINETIS_I2C0_C1); + } + else + { + /* we are not currently the bus master, so wait for bus ready */ + while (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY); + + /* become the bus master in transmit mode (send start) */ + putreg8(I2C_C1_IICEN | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); + } + + /* wait until start condition establishes control of the bus */ + while (1) { + if (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY) break; + } + + /* initiate actual transfer (send address) */ + putreg8((I2C_M_READ & msg->flags) == I2C_M_READ ? + I2C_READADDR8(msg->addr) : + I2C_WRITEADDR8(msg->addr), KINETIS_I2C0_D); + + return 0; +} + +/**************************************************************************** + * Name: kinetis_i2c_stop + * + * Description: + * Perform a I2C transfer stop + * + ****************************************************************************/ + +static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv) +{ + putreg8(I2C_C1_IICEN | I2C_C1_IICIE, KINETIS_I2C0_C1); + sem_post(&priv->wait); +} + +/**************************************************************************** + * Name: kinetis_i2c_timeout + * + * Description: + * Watchdog timer for timeout of I2C operation + * + ****************************************************************************/ + +static void kinetis_i2c_timeout(int argc, uint32_t arg, ...) +{ + struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)arg; + + irqstate_t flags = enter_critical_section(); + priv->state = STATE_ABORTED; + sem_post(&priv->wait); + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: kinetis_i2c_nextmsg + * + * Description: + * Setup for the next message. + * + ****************************************************************************/ + +void kinetis_i2c_nextmsg(struct kinetis_i2cdev_s *priv) +{ + priv->nmsg--; + + if (priv->nmsg > 0) + { + priv->msgs++; + sem_post(&priv->wait); + } + else + { + kinetis_i2c_stop(priv); + } +} + +/**************************************************************************** + * Name: kinetis_i2c_interrupt + * + * Description: + * The I2C Interrupt Handler + * + ****************************************************************************/ + +static int kinetis_i2c_interrupt(int irq, FAR void *context) +{ + struct kinetis_i2cdev_s *priv; + struct i2c_msg_s *msg; + uint32_t state; + int regval, dummy; + UNUSED(dummy); + + if (irq == KINETIS_IRQ_I2C0) + { + priv = &g_i2c_dev; + } + else + { + PANIC(); + } + + /* get current state */ + state = getreg8(KINETIS_I2C0_S); + msg = priv->msgs; + + /* arbitration lost */ + if (state & I2C_S_ARBL) + { + putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); + priv->state = STATE_ABORTED; + kinetis_i2c_stop(priv); + } + else + { + /* clear interrupt */ + putreg8(I2C_S_IICIF, KINETIS_I2C0_S); + + regval = getreg8(KINETIS_I2C0_C1); + + /* TX mode */ + if (regval & I2C_C1_TX) + { + /* last write was not acknowledged */ + if (state & I2C_S_RXAK) + { + priv->state = STATE_ABORTED; /* set error flag */ + kinetis_i2c_stop(priv); /* send STOP */ + } + else + { + /* actually intending to write */ + if ((I2C_M_READ & msg->flags) == 0) + { + /* wrote everything */ + if (priv->wrcnt == msg->length) + { + kinetis_i2c_nextmsg(priv); /* continue with next message */ + } + else + { + putreg8(msg->buffer[priv->wrcnt], KINETIS_I2C0_D); /* Put next byte */ + priv->wrcnt++; + } + } + /* actually intending to read (address was just sent) */ + else + { + regval &= ~I2C_C1_TX; + putreg8(regval, KINETIS_I2C0_C1); /* go to RX mode */ + + dummy = getreg8(KINETIS_I2C0_D); /* dummy read to initiate reception */ + } + } + } + /* RX: mode */ + else + { + /* if last receiving byte */ + if (priv->rdcnt == (msg->length - 1)) + { + /* go to TX mode before last read, otherwise a new read is triggered */ + regval |= I2C_C1_TX; + putreg8(regval, KINETIS_I2C0_C1); + + msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + priv->rdcnt++; + + kinetis_i2c_nextmsg(priv); + } + /* second to last receiving byte */ + else if (priv->rdcnt == (msg->length - 2)) + { + /* Do not ACK any more */ + regval = getreg8(KINETIS_I2C0_C1); + regval |= I2C_C1_TXAK; + putreg8(regval, KINETIS_I2C0_C1); + + msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + priv->rdcnt++; + } + else + { + msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + priv->rdcnt++; + } + } + } + + return OK; +} + +/**************************************************************************** + * Name: kinetis_i2c_transfer + * + * Description: + * Perform a sequence of I2C transfers + * + ****************************************************************************/ + +static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, + FAR struct i2c_msg_s *msgs, int count) +{ + struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; + + DEBUGASSERT(dev != NULL); + + /* Get exclusive access to the I2C bus */ + + sem_wait(&priv->mutex); + + /* Set up for the transfer */ + + priv->wrcnt = 0; + priv->rdcnt = 0; + priv->msgs = msgs; + priv->nmsg = count; + priv->state = STATE_OK; + + /* Configure the I2C frequency. + * REVISIT: Note that the frequency is set only on the first message. + * This could be extended to support different transfer frequencies for + * each message segment. + */ + + kinetis_i2c_setfrequency(priv, msgs->frequency); + + /* clear the status flags */ + putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); + + /* Process every message */ + while (priv->nmsg && priv->state == STATE_OK) + { + /* Initiate the transfer */ + kinetis_i2c_start(priv); + + /* wait for transfer complete */ + wd_start(priv->timeout, I2C_TIMEOUT, kinetis_i2c_timeout, 1, (uint32_t)priv); + sem_wait(&priv->wait); + + wd_cancel(priv->timeout); + + /* Process next message */ + kinetis_i2c_nextmsg(priv); + } + + /* release access to I2C bus */ + sem_post(&priv->mutex); + + if (priv->state != STATE_OK) + return -1; + else + return 0; /* TODO: correct? */ +} + +/************************************************************************************ + * Name: kinetis_i2c_reset + * + * Description: + * Perform an I2C bus reset in an attempt to break loose stuck I2C devices. + * + * Input Parameters: + * dev - Device-specific state data + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ************************************************************************************/ + +#ifdef CONFIG_I2C_RESET +static int kinetis_i2c_reset(FAR struct i2c_master_s * dev) +{ + return OK; +} +#endif /* CONFIG_I2C_RESET */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: kinetis_i2cbus_initialize + * + * Description: + * Initialise an I2C device + * + ****************************************************************************/ + +struct i2c_master_s *kinetis_i2cbus_initialize(int port) +{ + struct kinetis_i2cdev_s *priv; + + if (port > 1) + { + i2cerr("ERROR: Kinetis I2C Only suppors ports 0 and 1\n"); + return NULL; + } + + irqstate_t flags; + uint32_t regval; + + flags = enter_critical_section(); + + if (port == 0) + { + priv = &g_i2c_dev; + priv->base = KINETIS_I2C0_BASE; + priv->irqid = KINETIS_IRQ_I2C0; + priv->baseFreq = BOARD_BUS_FREQ; + + /* Enable clock */ + regval = getreg32(KINETIS_SIM_SCGC4); + regval |= SIM_SCGC4_I2C0; + putreg32(regval, KINETIS_SIM_SCGC4); + + kinetis_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY); + + /* Disable while configuring */ + putreg8(0, KINETIS_I2C0_C1); + + /* Configure pins */ + kinetis_pinconfig(PIN_I2C0_SCL); + kinetis_pinconfig(PIN_I2C0_SDA); + + /* Enable (with interrupts) */ + putreg8(I2C_C1_IICEN | I2C_C1_IICIE, KINETIS_I2C0_C1); + + /* High-drive select (TODO: why)? */ + regval = getreg8(KINETIS_I2C0_C2); + regval |= I2C_C2_HDRS; + putreg8(regval, KINETIS_I2C0_C2); + } + else + { + return NULL; + } + + leave_critical_section(flags); + + sem_init(&priv->mutex, 0, 1); + sem_init(&priv->wait, 0, 0); + + /* Allocate a watchdog timer */ + + priv->timeout = wd_create(); + DEBUGASSERT(priv->timeout != 0); + + /* Attach Interrupt Handler */ + + irq_attach(priv->irqid, kinetis_i2c_interrupt); + + /* Enable Interrupt Handler */ + + up_enable_irq(priv->irqid); + + /* Install our operations */ + + priv->dev.ops = &kinetis_i2c_ops; + return &priv->dev; +} + +/**************************************************************************** + * Name: kinetis_i2cbus_uninitialize + * + * Description: + * Uninitialise an I2C device + * + ****************************************************************************/ + +int kinetis_i2cbus_uninitialize(FAR struct i2c_master_s * dev) +{ + struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *) dev; + + putreg8(0, KINETIS_I2C0_C1); + + up_disable_irq(priv->irqid); + irq_detach(priv->irqid); + return OK; +} + +#endif /* CONFIG_KINETIS_I2C0 */ diff --git a/arch/arm/src/kinetis/kinetis_i2c.h b/arch/arm/src/kinetis/kinetis_i2c.h new file mode 100644 index 00000000000..b42e248882a --- /dev/null +++ b/arch/arm/src/kinetis/kinetis_i2c.h @@ -0,0 +1,52 @@ +#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H +#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include "chip/kinetis_i2c.h" + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: kinetis_i2cbus_initialize + * + * Description: + * Initialize the selected I2C port. And return a unique instance of struct + * struct i2c_master_s. This function may be called to obtain multiple + * instances of the interface, each of which may be set up with a + * different frequency and slave address. + * + * Input Parameter: + * Port number (for hardware that has multiple I2C interfaces) + * + * Returned Value: + * Valid I2C device structure reference on succcess; a NULL on failure + * + ****************************************************************************/ + +FAR struct i2c_master_s *kinetis_i2cbus_initialize(int port); + +/**************************************************************************** + * Name: kinetis_i2cbus_uninitialize + * + * Description: + * De-initialize the selected I2C port, and power down the device. + * + * Input Parameter: + * Device structure as returned by the lpc43_i2cbus_initialize() + * + * Returned Value: + * OK on success, ERROR when internal reference count mismatch or dev + * points to invalid hardware device. + * + ****************************************************************************/ + +int kinetis_i2cbus_uninitialize(FAR struct i2c_master_s *dev); + +#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H */ diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h index e7342683519..869bbe255fa 100644 --- a/configs/teensy-3.x/include/board.h +++ b/configs/teensy-3.x/include/board.h @@ -232,6 +232,20 @@ # define PIN_UART0_TX PIN_UART1_TX_1 #endif +#ifdef CONFIG_KINETIS_I2C0 +#ifndef CONFIG_TEENSY_3X_I2C_ALT_PINS +# define PIN_I2C0_SCL (PIN_I2C0_SCL_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) +# define PIN_I2C0_SDA (PIN_I2C0_SDA_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) +#else +# define PIN_I2C0_SCL (PIN_I2C0_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) +# define PIN_I2C0_SDA (PIN_I2C0_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) +#endif +#endif + +#ifdef CONFIG_KINETIS_I2C1 +#error I2C1 not currently supported +#endif + /************************************************************************************ * Public Data ************************************************************************************/ diff --git a/configs/teensy-3.x/nsh/defconfig b/configs/teensy-3.x/nsh/defconfig index 5fa77642ca7..eb554e3e851 100644 --- a/configs/teensy-3.x/nsh/defconfig +++ b/configs/teensy-3.x/nsh/defconfig @@ -8,19 +8,19 @@ # # CONFIG_EXPERIMENTAL is not set # CONFIG_DEFAULT_SMALL is not set -# CONFIG_HOST_LINUX is not set +CONFIG_HOST_LINUX=y # CONFIG_HOST_OSX is not set -CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_WINDOWS is not set # CONFIG_HOST_OTHER is not set # CONFIG_WINDOWS_NATIVE is not set -CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_CYGWIN is not set # CONFIG_WINDOWS_MSYS is not set # CONFIG_WINDOWS_OTHER is not set # # Build Configuration # -# CONFIG_APPS_DIR="../apps" +CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set @@ -140,13 +140,16 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set # CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set # CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set -# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set -CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set @@ -176,9 +179,17 @@ CONFIG_ARCH_CHIP_MK20DX256VLH7=y # CONFIG_ARCH_CHIP_MK60N512VMD100 is not set # CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set # CONFIG_ARCH_CHIP_MK60X256VMD100 is not set +# CONFIG_ARCH_CHIP_MK64FN1M0VLL12 is not set +# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set +# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set +# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set +# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set +# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set +# CONFIG_ARCH_CHIP_MK64FN1M0VMD12 is not set CONFIG_ARCH_FAMILY_K20=y # CONFIG_ARCH_FAMILY_K40 is not set # CONFIG_ARCH_FAMILY_K60 is not set +# CONFIG_ARCH_FAMILY_K64 is not set # # Kinetis Peripheral Support @@ -304,12 +315,12 @@ CONFIG_ARCH_BOARD="teensy-3.x" # CONFIG_ARCH_HAVE_LEDS=y CONFIG_ARCH_LEDS=y -CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # # CONFIG_TEENSY_3X_OVERCLOCK is not set +# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -328,6 +339,7 @@ CONFIG_DISABLE_OS_API=y CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set # CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set # CONFIG_JULIAN_TIME is not set CONFIG_START_YEAR=2011 CONFIG_START_MONTH=12 @@ -420,6 +432,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -457,7 +470,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# # CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -530,8 +548,10 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set +# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -546,6 +566,7 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -658,6 +679,7 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -683,7 +705,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set @@ -700,16 +721,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set @@ -816,7 +836,6 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set -# CONFIG_NSH_DISABLE_MKFIFO is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set @@ -838,6 +857,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 # # Configure Command Options @@ -878,7 +898,7 @@ CONFIG_NSH_CONSOLE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_LIB_HEX2BIN is not set +# CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/teensy-3.x/src/Makefile b/configs/teensy-3.x/src/Makefile index 3483e6deb2a..fdb261c551e 100644 --- a/configs/teensy-3.x/src/Makefile +++ b/configs/teensy-3.x/src/Makefile @@ -36,7 +36,7 @@ -include $(TOPDIR)/Make.defs ASRCS = -CSRCS = k20_boot.c k20_spi.c +CSRCS = k20_boot.c k20_spi.c k20_i2c.c ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += k20_autoleds.c diff --git a/configs/teensy-3.x/src/k20_i2c.c b/configs/teensy-3.x/src/k20_i2c.c new file mode 100644 index 00000000000..3f4e4ffa7cf --- /dev/null +++ b/configs/teensy-3.x/src/k20_i2c.c @@ -0,0 +1,46 @@ +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "kinetis.h" +#include "teensy-3x.h" +#include "kinetis_i2c.h" + +#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_i2cdev_initialize + * + * Description: + * Called to configure I2C + * + ************************************************************************************/ + +void weak_function kinetis_i2cdev_initialize(void) +{ +#if defined(CONFIG_KINETIS_I2C0) + kinetis_i2cbus_initialize(0); +#endif + +#if defined(CONFIG_KINETIS_I2C1) + kinetis_i2cbus_initialize(1); +#endif +} + + +#endif /* CONFIG_KINETIS_I2C0 || CONFIG_KINETIS_I2C1 */ diff --git a/configs/teensy-3.x/src/teensy-3x.h b/configs/teensy-3.x/src/teensy-3x.h index 0e0b16b2599..5124a29f754 100644 --- a/configs/teensy-3.x/src/teensy-3x.h +++ b/configs/teensy-3.x/src/teensy-3x.h @@ -92,6 +92,16 @@ extern void weak_function kinetis_spidev_initialize(void); +/************************************************************************************ + * Name: kinetis_i2cdev_initialize + * + * Description: + * Called to configure I2C + * + ************************************************************************************/ + +extern void weak_function kinetis_i2cdev_initialize(void); + /************************************************************************************ * Name: kinetis_usbinitialize * From 581bbc672adf7c8aee3219222d34f804e0c286de Mon Sep 17 00:00:00 2001 From: v01d Date: Sun, 7 Aug 2016 00:19:47 -0300 Subject: [PATCH 002/214] undo accidental change on teensy 3.x defconfig --- configs/teensy-3.x/nsh/defconfig | 44 +++++++++----------------------- 1 file changed, 12 insertions(+), 32 deletions(-) diff --git a/configs/teensy-3.x/nsh/defconfig b/configs/teensy-3.x/nsh/defconfig index eb554e3e851..5fa77642ca7 100644 --- a/configs/teensy-3.x/nsh/defconfig +++ b/configs/teensy-3.x/nsh/defconfig @@ -8,19 +8,19 @@ # # CONFIG_EXPERIMENTAL is not set # CONFIG_DEFAULT_SMALL is not set -CONFIG_HOST_LINUX=y +# CONFIG_HOST_LINUX is not set # CONFIG_HOST_OSX is not set -# CONFIG_HOST_WINDOWS is not set +CONFIG_HOST_WINDOWS=y # CONFIG_HOST_OTHER is not set # CONFIG_WINDOWS_NATIVE is not set -# CONFIG_WINDOWS_CYGWIN is not set +CONFIG_WINDOWS_CYGWIN=y # CONFIG_WINDOWS_MSYS is not set # CONFIG_WINDOWS_OTHER is not set # # Build Configuration # -CONFIG_APPS_DIR="../apps" +# CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set @@ -140,16 +140,13 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set # CONFIG_ARMV7M_TOOLCHAIN_IARW is not set -# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set # CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set -CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y -# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set # CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set @@ -179,17 +176,9 @@ CONFIG_ARCH_CHIP_MK20DX256VLH7=y # CONFIG_ARCH_CHIP_MK60N512VMD100 is not set # CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set # CONFIG_ARCH_CHIP_MK60X256VMD100 is not set -# CONFIG_ARCH_CHIP_MK64FN1M0VLL12 is not set -# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set -# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set -# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set -# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set -# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set -# CONFIG_ARCH_CHIP_MK64FN1M0VMD12 is not set CONFIG_ARCH_FAMILY_K20=y # CONFIG_ARCH_FAMILY_K40 is not set # CONFIG_ARCH_FAMILY_K60 is not set -# CONFIG_ARCH_FAMILY_K64 is not set # # Kinetis Peripheral Support @@ -315,12 +304,12 @@ CONFIG_ARCH_BOARD="teensy-3.x" # CONFIG_ARCH_HAVE_LEDS=y CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # # CONFIG_TEENSY_3X_OVERCLOCK is not set -# CONFIG_BOARD_CRASHDUMP is not set # CONFIG_LIB_BOARDCTL is not set # @@ -339,7 +328,6 @@ CONFIG_DISABLE_OS_API=y CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set # CONFIG_CLOCK_MONOTONIC is not set -# CONFIG_ARCH_HAVE_TIMEKEEPING is not set # CONFIG_JULIAN_TIME is not set CONFIG_START_YEAR=2011 CONFIG_START_MONTH=12 @@ -432,7 +420,6 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048 CONFIG_DISABLE_POLL=y CONFIG_DEV_NULL=y # CONFIG_DEV_ZERO is not set -# CONFIG_DEV_URANDOM is not set # CONFIG_DEV_LOOP is not set # @@ -470,12 +457,7 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set - -# -# IO Expander/GPIO Support -# # CONFIG_IOEXPANDER is not set -# CONFIG_DEV_GPIO is not set # # LCD Driver Support @@ -548,10 +530,8 @@ CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set # CONFIG_UART0_DMA is not set -# CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set -# CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set # @@ -566,7 +546,6 @@ CONFIG_SYSLOG_SERIAL_CONSOLE=y CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set -# CONFIG_SYSLOG_CHARDEV is not set # # Networking Support @@ -679,7 +658,6 @@ CONFIG_ARCH_HAVE_TLS=y # CONFIG_LIB_CRC64_FAST is not set # CONFIG_LIB_KBDCODEC is not set # CONFIG_LIB_SLCDCODEC is not set -# CONFIG_LIB_HEX2BIN is not set # # Basic CXX Support @@ -705,6 +683,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set @@ -721,15 +700,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set @@ -836,6 +816,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set @@ -857,7 +838,6 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set -CONFIG_NSH_MMCSDMINOR=0 # # Configure Command Options @@ -898,7 +878,7 @@ CONFIG_NSH_CONSOLE=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_FREE is not set -# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_LIB_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set From f715e9b7879dc91762502582f31f4f14c7c35d36 Mon Sep 17 00:00:00 2001 From: v01d Date: Tue, 9 Aug 2016 14:01:27 -0300 Subject: [PATCH 003/214] RTC working, I2C in progress --- arch/arm/src/kinetis/Make.defs | 4 + arch/arm/src/kinetis/chip/kinetis_rtc.h | 8 +- arch/arm/src/kinetis/kinetis_alarm.h | 78 ++++++ arch/arm/src/kinetis/kinetis_i2c.c | 38 ++- arch/arm/src/kinetis/kinetis_rtc.c | 323 ++++++++++++++++++++++++ configs/teensy-3.x/include/board.h | 8 +- configs/teensy-3.x/src/k20_boot.c | 10 + configs/teensy-3.x/src/k20_i2c.c | 36 ++- configs/teensy-3.x/src/teensy-3x.h | 2 +- 9 files changed, 482 insertions(+), 25 deletions(-) create mode 100644 arch/arm/src/kinetis/kinetis_alarm.h create mode 100644 arch/arm/src/kinetis/kinetis_rtc.c diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs index 4bbc493d90b..29eec9505af 100644 --- a/arch/arm/src/kinetis/Make.defs +++ b/arch/arm/src/kinetis/Make.defs @@ -135,6 +135,10 @@ ifeq ($(CONFIG_I2C),y) CHIP_CSRCS += kinetis_i2c.c endif +ifeq ($(CONFIG_RTC),y) +CHIP_CSRCS += kinetis_rtc.c +endif + ifeq ($(CONFIG_NET),y) ifeq ($(CONFIG_KINETIS_ENET),y) CHIP_CSRCS += kinetis_enet.c diff --git a/arch/arm/src/kinetis/chip/kinetis_rtc.h b/arch/arm/src/kinetis/chip/kinetis_rtc.h index d00c02a6974..948c6ce8771 100644 --- a/arch/arm/src/kinetis/chip/kinetis_rtc.h +++ b/arch/arm/src/kinetis/chip/kinetis_rtc.h @@ -59,7 +59,7 @@ #define KINETIS_RTC_CR_OFFSET 0x0010 /* RTC Control Register */ #define KINETIS_RTC_SR_OFFSET 0x0014 /* RTC Status Register */ #define KINETIS_RTC_LR_OFFSET 0x0018 /* RTC Lock Register */ -#if defined(KINETIS_K40) || defined(KINETIS_K64) +#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K64) # define KINETIS_RTC_IER_OFFSET 0x001c /* RTC Interrupt Enable Register (K40) */ #endif #ifdef KINETIS_K60 @@ -77,7 +77,7 @@ #define KINETIS_RTC_CR (KINETIS_RTC_BASE+KINETIS_RTC_CR_OFFSET) #define KINETIS_RTC_SR (KINETIS_RTC_BASE+KINETIS_RTC_SR_OFFSET) #define KINETIS_RTC_LR (KINETIS_RTC_BASE+KINETIS_RTC_LR_OFFSET) -#if defined(KINETIS_K40) || defined(KINETIS_K64) +#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K64) # define KINETIS_RTC_IER (KINETIS_RTC_BASE+KINETIS_RTC_IER_OFFSET) #endif #ifdef KINETIS_K60 @@ -135,13 +135,13 @@ #define RTC_LR_TCL (1 << 3) /* Bit 3: Time Compensation Lock */ #define RTC_LR_CRL (1 << 4) /* Bit 4: Control Register Lock */ #define RTC_LR_SRL (1 << 5) /* Bit 5: Status Register Lock */ -#ifdef KINETIS_K40 +#if defined(KINETIS_K20) || defined(KINETIS_K40) # define RTC_LR_LRL (1 << 6) /* Bit 6: Lock Register Lock (K40) */ #endif /* Bits 7-31: Reserved */ /* RTC Interrupt Enable Register (32-bits, K40) */ -#if defined(KINETIS_K40) || defined(KINETIS_K64) +#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K64) # define RTC_IER_TIIE (1 << 0) /* Bit 0: Time Invalid Interrupt Enable */ # define RTC_IER_TOIE (1 << 1) /* Bit 1: Time Overflow Interrupt Enable */ # define RTC_IER_TAIE (1 << 2) /* Bit 2: Time Alarm Interrupt Enable */ diff --git a/arch/arm/src/kinetis/kinetis_alarm.h b/arch/arm/src/kinetis/kinetis_alarm.h new file mode 100644 index 00000000000..ee135a5eb2f --- /dev/null +++ b/arch/arm/src/kinetis/kinetis_alarm.h @@ -0,0 +1,78 @@ +#ifndef __ARCH_ARM_SRC_KINETIS_ALARM_H +#define __ARCH_ARM_SRC_KINETIS_ALARM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip.h" + +#ifdef CONFIG_RTC_ALARM + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* The form of an alarm callback */ + +typedef CODE void (*alarmcb_t)(void); + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: kinetis_rtc_setalarm + * + * Description: + * Set up an alarm. + * + * Input Parameters: + * tp - the time to set the alarm + * callback - the function to call when the alarm expires. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +struct timespec; +int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback); + +/**************************************************************************** + * Name: kinetis_rtc_cancelalarm + * + * Description: + * Cancel a pending alarm alarm + * + * Input Parameters: + * none + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int kinetis_rtc_cancelalarm(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* CONFIG_RTC_ALARM */ +#endif /* __ARCH_ARM_SRC_KINETIS_ALARM_H */ diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 750cee6dd2f..8bfc75b928a 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -42,8 +42,10 @@ #define I2C_DEFAULT_FREQUENCY 400000 -#define STATE_OK 0 -#define STATE_ABORTED 1 +#define STATE_OK 0 +#define STATE_ARBITRATION_ERROR 1 +#define STATE_TIMEOUT 2 +#define STATE_NAK 3 /* * TODO: @@ -289,14 +291,23 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) { struct i2c_msg_s *msg; + irqstate_t flags; msg = priv->msgs; + i2cinfo("start"); + + flags = enter_critical_section(); + /* now take control of the bus */ if (getreg8(KINETIS_I2C0_C1) & I2C_C1_MST) { /* we are already the bus master, so send a repeated start */ - putreg8(I2C_C1_IICEN | I2C_C1_MST | I2C_C1_RSTA | I2C_C1_TX, KINETIS_I2C0_C1); + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_RSTA | I2C_C1_TX, KINETIS_I2C0_C1); +#if 0 + putreg8(I2C_C1_IICEN | I2C_C1_IICIE, KINETIS_I2C0_C1); /* DEBUG: stop + start */ + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); +#endif } else { @@ -304,7 +315,7 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) while (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY); /* become the bus master in transmit mode (send start) */ - putreg8(I2C_C1_IICEN | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); } /* wait until start condition establishes control of the bus */ @@ -317,7 +328,9 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr), KINETIS_I2C0_D); - return 0; + leave_critical_section(flags); + + return OK; } /**************************************************************************** @@ -347,7 +360,7 @@ static void kinetis_i2c_timeout(int argc, uint32_t arg, ...) struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)arg; irqstate_t flags = enter_critical_section(); - priv->state = STATE_ABORTED; + priv->state = STATE_TIMEOUT; sem_post(&priv->wait); leave_critical_section(flags); } @@ -393,22 +406,22 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) if (irq == KINETIS_IRQ_I2C0) { - priv = &g_i2c_dev; + priv = &g_i2c_dev; } else { - PANIC(); + PANIC(); } /* get current state */ state = getreg8(KINETIS_I2C0_S); - msg = priv->msgs; + msg = priv->msgs; /* arbitration lost */ if (state & I2C_S_ARBL) { putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); - priv->state = STATE_ABORTED; + priv->state = STATE_ARBITRATION_ERROR; kinetis_i2c_stop(priv); } else @@ -424,7 +437,7 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) /* last write was not acknowledged */ if (state & I2C_S_RXAK) { - priv->state = STATE_ABORTED; /* set error flag */ + priv->state = STATE_NAK; /* set error flag */ kinetis_i2c_stop(priv); /* send STOP */ } else @@ -541,7 +554,8 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, wd_cancel(priv->timeout); /* Process next message */ - kinetis_i2c_nextmsg(priv); + if (priv->state == STATE_OK) + kinetis_i2c_nextmsg(priv); } /* release access to I2C bus */ diff --git a/arch/arm/src/kinetis/kinetis_rtc.c b/arch/arm/src/kinetis/kinetis_rtc.c new file mode 100644 index 00000000000..3d0af29c60d --- /dev/null +++ b/arch/arm/src/kinetis/kinetis_rtc.c @@ -0,0 +1,323 @@ +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" + +#include "kinetis_config.h" +#include "chip.h" +#include "chip/kinetis_rtc.h" +#include "chip/kinetis_sim.h" +#include "kinetis.h" +#include "kinetis_alarm.h" + +#if defined(CONFIG_RTC) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +static alarmcb_t g_alarmcb; +#endif + +/************************************************************************************ + * Private Declarations + ************************************************************************************/ + +static int kinetis_rtc_interrupt(int irq, void *context); + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +volatile bool g_rtc_enabled = false; + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: up_rtc_initialize + * + * Description: + * Initialize the hardware RTC per the selected configuration. This function is + * called once during the OS initialization sequence + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ************************************************************************************/ + +int up_rtc_initialize(void) +{ + int regval; + + /* enable RTC module */ + regval = getreg32(KINETIS_SIM_SCGC6); + regval |= SIM_SCGC6_RTC; + putreg32(regval, KINETIS_SIM_SCGC6); + + /* disable counters (just in case) */ + putreg32(0, KINETIS_RTC_SR); + + /* enable oscilator */ + putreg32(RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE, KINETIS_RTC_CR); /* capacitance values from teensyduino */ + /* TODO: delay some time (1024 cycles? would be 30ms) */ + + /* disable interrupts */ + putreg32(0, KINETIS_RTC_IER); + + /* reset flags requires writing the seconds register, the following line avoids altering any stored time value */ + putreg32(getreg32(KINETIS_RTC_TSR), KINETIS_RTC_TSR); + +#if defined(CONFIG_RTC_ALARM) + /* enable alarm interrupts */ + irq_attach(KINETIS_IRQ_RTC, kinetis_rtc_interrupt); + up_enable_irq(KINETIS_IRQ_RTC); +#endif + + /* enable counters */ + putreg32(RTC_SR_TCE, KINETIS_RTC_SR); + + /* mark RTC enabled */ + g_rtc_enabled = true; + + return OK; +} + +/************************************************************************************ + * Name: up_rtc_time + * + * Description: + * Get the current time in seconds. This is similar to the standard time() + * function. This interface is only required if the low-resolution RTC/counter + * hardware implementation selected. It is only used by the RTOS during + * initialization to set up the system time when CONFIG_RTC is set but neither + * CONFIG_RTC_HIRES nor CONFIG_RTC_DATETIME are set. + * + * Input Parameters: + * None + * + * Returned Value: + * The current time in seconds + * + ************************************************************************************/ + +#ifndef CONFIG_RTC_HIRES +time_t up_rtc_time(void) +{ + return getreg32(KINETIS_RTC_TSR); +} +#endif + +/************************************************************************************ + * Name: up_rtc_gettime + * + * Description: + * Get the current time from the high resolution RTC clock/counter. This interface + * is only supported by the high-resolution RTC/counter hardware implementation. + * It is used to replace the system timer. + * + * Input Parameters: + * tp - The location to return the high resolution time value. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ************************************************************************************/ + +#ifdef CONFIG_RTC_HIRES +int up_rtc_gettime(FAR struct timespec *tp) +{ + irqstate_t flags; + uint32_t seconds, prescaler, prescaler2; + + /* + * get prescaler and seconds register. this is in a loop which + * ensures that registers will be re-read if during the reads the + * prescaler has wrapped-around + */ + + flags = enter_critical_section(); + do + { + prescaler = getreg32(KINETIS_RTC_TPR); + seconds = getreg32(KINETIS_RTC_TSR); + prescaler2 = getreg32(KINETIS_RTC_TPR); + } + while (prescaler > prescaler2); + leave_critical_section(flags); + + /* build seconds + nanoseconds from seconds and prescaler register */ + tp->tv_sec = seconds; + tp->tv_nsec = prescaler * (1000000000 / CONFIG_RTC_FREQUENCY); + return OK; +} +#endif + +/************************************************************************************ + * Name: up_rtc_settime + * + * Description: + * Set the RTC to the provided time. All RTC implementations must be able to + * set their time based on a standard timespec. + * + * Input Parameters: + * tp - the time to use + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ************************************************************************************/ + +int up_rtc_settime(FAR const struct timespec *tp) +{ + irqstate_t flags; + uint32_t seconds, prescaler; + + seconds = tp->tv_sec; + prescaler = tp->tv_nsec * (CONFIG_RTC_FREQUENCY / 1000000000); + + flags = enter_critical_section(); + + putreg32(0, KINETIS_RTC_SR); /* disable counter */ + + putreg32(prescaler, KINETIS_RTC_TPR); /* always write prescaler first */ + putreg32(seconds, KINETIS_RTC_TSR); + + putreg32(RTC_SR_TCE, KINETIS_RTC_SR); /* re-enable counter */ + + leave_critical_section(flags); + + return OK; +} + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_rtc_setalarm + * + * Description: + * Set up an alarm. + * + * Input Parameters: + * tp - the time to set the alarm + * callback - the function to call when the alarm expires. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ************************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) +{ + /* Is there already something waiting on the ALARM? */ + if (g_alarmcb == NULL) + { + /* No.. Save the callback function pointer */ + + g_alarmcb = callback; + + /* Enable and set RTC alarm */ + + putreg32(tp->tv_sec, KINETIS_RTC_TAR); /* set alarm (also resets flags) */ + putreg32(RTC_IER_TAIE, KINETIS_RTC_IER); /* enable alarm interrupt */ + + return OK; + } + else + return -EBUSY; +} +#endif + +/************************************************************************************ + * Name: kinetis_rtc_cancelalarm + * + * Description: + * Cancel a pending alarm alarm + * + * Input Parameters: + * none + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ************************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +int kinetis_rtc_cancelalarm(void) +{ + if (g_alarmcb != NULL) + { + /* Cancel the global callback function */ + + g_alarmcb = NULL; + + /* Unset the alarm */ + + putreg32(0, KINETIS_RTC_IER); /* disable alarm interrupt */ + + return OK; + } + else + return -ENODATA; +} +#endif + +/************************************************************************************ + * Name: kinetis_rtc_interrupt + * + * Description: + * RTC interrupt service routine + * + * Input Parameters: + * irq - The IRQ number that generated the interrupt + * context - Architecture specific register save information. + * + * Returned Value: + * Zero (OK) on success; A negated errno value on failure. + * + ************************************************************************************/ + +#if defined(CONFIG_RTC_ALARM) +static int kinetis_rtc_interrupt(int irq, void *context) +{ + if (g_alarmcb != NULL) + { + /* Alarm callback */ + g_alarmcb(); + g_alarmcb = NULL; + } + + /* Clear pending flags, disable alarm */ + putreg32(0, KINETIS_RTC_TAR); /* unset alarm (resets flags) */ + putreg32(0, KINETIS_RTC_IER); /* disable alarm interrupt */ + + return 0; +} +#endif + +#endif // KINETIS_RTC diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h index 869bbe255fa..d0c5c0002ba 100644 --- a/configs/teensy-3.x/include/board.h +++ b/configs/teensy-3.x/include/board.h @@ -190,7 +190,7 @@ #define LED_STACKCREATED 1 /* STATUS LED=ON */ #define LED_INIRQ 2 /* STATUS LED=no change */ #define LED_SIGNAL 2 /* STATUS LED=no change */ -#define LED_ASSERTION 2 /* STATUS LED=no change */ +#define LED_ASSERTION 3 /* STATUS LED=no change */ #define LED_PANIC 3 /* STATUS LED=flashing */ /* Button definitions ***************************************************************/ @@ -233,12 +233,12 @@ #endif #ifdef CONFIG_KINETIS_I2C0 -#ifndef CONFIG_TEENSY_3X_I2C_ALT_PINS +#ifdef CONFIG_TEENSY_3X_I2C_ALT_PINS # define PIN_I2C0_SCL (PIN_I2C0_SCL_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) # define PIN_I2C0_SDA (PIN_I2C0_SDA_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) #else -# define PIN_I2C0_SCL (PIN_I2C0_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) -# define PIN_I2C0_SDA (PIN_I2C0_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) +# define PIN_I2C0_SCL (PIN_I2C0_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW /*| PIN_ALT2_HIGHDRIVE*/) +# define PIN_I2C0_SDA (PIN_I2C0_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW /*| PIN_ALT2_HIGHDRIVE*/) #endif #endif diff --git a/configs/teensy-3.x/src/k20_boot.c b/configs/teensy-3.x/src/k20_boot.c index 6bd0282ddf4..cfb62f9b260 100644 --- a/configs/teensy-3.x/src/k20_boot.c +++ b/configs/teensy-3.x/src/k20_boot.c @@ -88,3 +88,13 @@ void kinetis_boardinitialize(void) board_autoled_initialize(); #endif } + +#if defined(CONFIG_BOARD_INITIALIZE) +void board_initialize(void) +{ +#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) + //if (kinetis_i2cdev_initialize) + kinetis_i2cdev_initialize(); +#endif +} +#endif diff --git a/configs/teensy-3.x/src/k20_i2c.c b/configs/teensy-3.x/src/k20_i2c.c index 3f4e4ffa7cf..be546056fc0 100644 --- a/configs/teensy-3.x/src/k20_i2c.c +++ b/configs/teensy-3.x/src/k20_i2c.c @@ -2,6 +2,24 @@ * Included Files ************************************************************************************/ +#if 0 +#include + +#include +#include +#include + +#include +#include +#include + +#include "up_arch.h" +#include "chip.h" +#include "kinetis.h" +#include "teensy-3x.h" +#include "kinetis_i2c.h" +#endif + #include #include @@ -14,8 +32,9 @@ #include "up_arch.h" #include "chip.h" #include "kinetis.h" -#include "teensy-3x.h" #include "kinetis_i2c.h" +#include "teensy-3x.h" + #if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) @@ -31,14 +50,23 @@ * ************************************************************************************/ -void weak_function kinetis_i2cdev_initialize(void) +void kinetis_i2cdev_initialize(void) { + FAR struct i2c_master_s *i2c; + #if defined(CONFIG_KINETIS_I2C0) - kinetis_i2cbus_initialize(0); + i2c = kinetis_i2cbus_initialize(0); +#if defined(CONFIG_I2C_DRIVER) + i2c_register(i2c, 0); +#endif #endif + #if defined(CONFIG_KINETIS_I2C1) - kinetis_i2cbus_initialize(1); + i2c = kinetis_i2cbus_initialize(1); +#if defined(CONFIG_I2C_DRIVER) + i2c_register(i2c, 1); +#endif #endif } diff --git a/configs/teensy-3.x/src/teensy-3x.h b/configs/teensy-3.x/src/teensy-3x.h index 5124a29f754..a50f5b0606e 100644 --- a/configs/teensy-3.x/src/teensy-3x.h +++ b/configs/teensy-3.x/src/teensy-3x.h @@ -100,7 +100,7 @@ extern void weak_function kinetis_spidev_initialize(void); * ************************************************************************************/ -extern void weak_function kinetis_i2cdev_initialize(void); +void kinetis_i2cdev_initialize(void); /************************************************************************************ * Name: kinetis_usbinitialize From 5ea77118aaae09c29cea6e7fd543bf409d317fbc Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 10 Aug 2016 07:37:25 -0600 Subject: [PATCH 004/214] Explicitly initialize the group tg_exitsem with sem_init(). The existing logic worked because the correct initialization value is all zero, but it is better to initialize the semaphore explicitly. Noted by Jouko Holopainen. --- sched/group/group_create.c | 8 +++++++- sched/signal/sig_nanosleep.c | 5 +++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/sched/group/group_create.c b/sched/group/group_create.c index 3b3cb6be08e..2aecb9c12b4 100644 --- a/sched/group/group_create.c +++ b/sched/group/group_create.c @@ -241,12 +241,18 @@ int group_allocate(FAR struct task_tcb_s *tcb, uint8_t ttype) return ret; } +#ifndef CONFIG_DISABLE_PTHREAD /* Initialize the pthread join semaphore */ -#ifndef CONFIG_DISABLE_PTHREAD (void)sem_init(&group->tg_joinsem, 0, 1); #endif +#if defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_SCHED_HAVE_PARENT) + /* Initialize the exit/wait semaphores */ + + (void)sem_init(&group->tg_exitsem, 0, 0); +#endif + return OK; } diff --git a/sched/signal/sig_nanosleep.c b/sched/signal/sig_nanosleep.c index 0ac8e7fadb7..4a492f0c853 100644 --- a/sched/signal/sig_nanosleep.c +++ b/sched/signal/sig_nanosleep.c @@ -167,6 +167,11 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp) systime_t remaining; int ticks; + /* REVISIT: The conversion from time to ticks and back could + * be avoided. clock_timespec_subtract() would be used instead + * to get the time difference. + */ + /* First get the number of clock ticks that we were requested to * wait. */ From 81df56086aebfe580635e9d4bc34ce28926bcf9a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Thu, 11 Aug 2016 10:42:20 +0200 Subject: [PATCH 005/214] Fix bad pllmul values for stm32f1xx connectivity line. stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values --- arch/arm/src/stm32/chip/stm32f10xxx_rcc.h | 25 +++++++++++++++-------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h index 35b2ad8156c..2828e85b2f3 100644 --- a/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h +++ b/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h @@ -148,21 +148,28 @@ #define RCC_CFGR_PLLXTPRE (1 << 17) /* Bit 17: HSE divider for PLL entry */ #define RCC_CFGR_PLLMUL_SHIFT (18) /* Bits 21-18: PLL Multiplication Factor */ #define RCC_CFGR_PLLMUL_MASK (0x0f << RCC_CFGR_PLLMUL_SHIFT) -# define RCC_CFGR_PLLMUL_CLKx2 (0 << RCC_CFGR_PLLMUL_SHIFT) /* 0000: PLL input clock x 2 */ -# define RCC_CFGR_PLLMUL_CLKx3 (1 << RCC_CFGR_PLLMUL_SHIFT) /* 0001: PLL input clock x 3 */ +#ifndef CONFIG_STM32_CONNECTIVITYLINE +# define RCC_CFGR_PLLMUL_CLKx2 (0 << RCC_CFGR_PLLMUL_SHIFT) /* 0000: PLL input clock x 2 */ +# define RCC_CFGR_PLLMUL_CLKx3 (1 << RCC_CFGR_PLLMUL_SHIFT) /* 0001: PLL input clock x 3 */ +#endif # define RCC_CFGR_PLLMUL_CLKx4 (2 << RCC_CFGR_PLLMUL_SHIFT) /* 0010: PLL input clock x 4 */ # define RCC_CFGR_PLLMUL_CLKx5 (3 << RCC_CFGR_PLLMUL_SHIFT) /* 0011: PLL input clock x 5 */ # define RCC_CFGR_PLLMUL_CLKx6 (4 << RCC_CFGR_PLLMUL_SHIFT) /* 0100: PLL input clock x 6 */ # define RCC_CFGR_PLLMUL_CLKx7 (5 << RCC_CFGR_PLLMUL_SHIFT) /* 0101: PLL input clock x 7 */ # define RCC_CFGR_PLLMUL_CLKx8 (6 << RCC_CFGR_PLLMUL_SHIFT) /* 0110: PLL input clock x 8 */ # define RCC_CFGR_PLLMUL_CLKx9 (7 << RCC_CFGR_PLLMUL_SHIFT) /* 0111: PLL input clock x 9 */ -# define RCC_CFGR_PLLMUL_CLKx10 (8 << RCC_CFGR_PLLMUL_SHIFT) /* 1000: PLL input clock x 10 */ -# define RCC_CFGR_PLLMUL_CLKx11 (9 << RCC_CFGR_PLLMUL_SHIFT) /* 1001: PLL input clock x 11 */ -# define RCC_CFGR_PLLMUL_CLKx12 (10 << RCC_CFGR_PLLMUL_SHIFT) /* 1010: PLL input clock x 12 */ -# define RCC_CFGR_PLLMUL_CLKx13 (11 << RCC_CFGR_PLLMUL_SHIFT) /* 1011: PLL input clock x 13 */ -# define RCC_CFGR_PLLMUL_CLKx14 (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */ -# define RCC_CFGR_PLLMUL_CLKx15 (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */ -# define RCC_CFGR_PLLMUL_CLKx16 (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */ +#ifndef CONFIG_STM32_CONNECTIVITYLINE +# define RCC_CFGR_PLLMUL_CLKx10 (8 << RCC_CFGR_PLLMUL_SHIFT) /* 1000: PLL input clock x 10 */ +# define RCC_CFGR_PLLMUL_CLKx11 (9 << RCC_CFGR_PLLMUL_SHIFT) /* 1001: PLL input clock x 11 */ +# define RCC_CFGR_PLLMUL_CLKx12 (10 << RCC_CFGR_PLLMUL_SHIFT) /* 1010: PLL input clock x 12 */ +# define RCC_CFGR_PLLMUL_CLKx13 (11 << RCC_CFGR_PLLMUL_SHIFT) /* 1011: PLL input clock x 13 */ +# define RCC_CFGR_PLLMUL_CLKx14 (12 << RCC_CFGR_PLLMUL_SHIFT) /* 1100: PLL input clock x 14 */ +# define RCC_CFGR_PLLMUL_CLKx15 (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1101: PLL input clock x 15 */ +# define RCC_CFGR_PLLMUL_CLKx16 (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */ +#else +# define RCC_CFGR_PLLMUL_CLKx65 (13 << RCC_CFGR_PLLMUL_SHIFT) /* 1011: PLL input clock x 6.5 */ +#endif + #ifndef CONFIG_STM32_VALUELINE # define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB FS prescaler */ #endif From 0e35bad987ef72ed64c319e5dbb6fbe39cf78850 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 07:06:08 -0600 Subject: [PATCH 006/214] Update some comments --- arch/arm/src/sam34/sam_gpio.c | 1 + libc/stdio/lib_sscanf.c | 22 +++------------------- 2 files changed, 4 insertions(+), 19 deletions(-) diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c index 38cf99f38e0..5fda366fe00 100644 --- a/arch/arm/src/sam34/sam_gpio.c +++ b/arch/arm/src/sam34/sam_gpio.c @@ -118,6 +118,7 @@ static inline int sam_gpiopin(gpio_pinset_t cfgset) * - If glitch filtering is enabled * - If necessary to read the input value on an open drain output (this * may be done in TWI logic to detect hangs on the I2C bus). + * - If necessary to read the input value on peripheral pins. * ****************************************************************************/ diff --git a/libc/stdio/lib_sscanf.c b/libc/stdio/lib_sscanf.c index cc671453066..ae8774cc57e 100644 --- a/libc/stdio/lib_sscanf.c +++ b/libc/stdio/lib_sscanf.c @@ -1,7 +1,7 @@ /**************************************************************************** * libc/stdio/lib_sscanf.c * - * Copyright (C) 2007, 2008, 2011-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2008, 2011-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -64,14 +64,6 @@ # define MAX(a,b) (((a) > (b)) ? (a) : (b)) #endif -/**************************************************************************** - * Private Type Declarations - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - /**************************************************************************** * Public Function Prototypes ****************************************************************************/ @@ -79,15 +71,7 @@ int vsscanf(FAR const char *buf, FAR const char *fmt, va_list ap); /**************************************************************************** - * Public Constant Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Constant Data + * Private Data ****************************************************************************/ static const char spaces[] = " \t\n\r\f\v"; @@ -151,7 +135,7 @@ static int findwidth(FAR const char *buf, FAR const char *fmt) } /**************************************************************************** - * Private Data + * Public Functions ****************************************************************************/ /**************************************************************************** From ed5ddb3bf64e32d1bd598f5f4b02a77a425c7dca Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 12:51:20 -0600 Subject: [PATCH 007/214] Cosmetic, remove a blank line. --- configs/sim/src/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/sim/src/Makefile b/configs/sim/src/Makefile index e56c82ae364..16ceb489e9b 100644 --- a/configs/sim/src/Makefile +++ b/configs/sim/src/Makefile @@ -72,5 +72,4 @@ else endif endif - include $(TOPDIR)/configs/Board.mk From 9de2c2865667e2c4a7d8bd9c212366a28a39bf85 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 13:34:49 -0600 Subject: [PATCH 008/214] Add oneshot timer lower half interface --- include/nuttx/timers/oneshot.h | 204 +++++++++++++++++++++++++++++++++ 1 file changed, 204 insertions(+) create mode 100644 include/nuttx/timers/oneshot.h diff --git a/include/nuttx/timers/oneshot.h b/include/nuttx/timers/oneshot.h new file mode 100644 index 00000000000..8b5e22207a4 --- /dev/null +++ b/include/nuttx/timers/oneshot.h @@ -0,0 +1,204 @@ +/**************************************************************************** + * include/nuttx/timers/oneshot.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_TIMERS_ONESHOT_H +#define __INCLUDE_NUTTX_TIMERS_ONESHOT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Method access helper macros **********************************************/ + +/**************************************************************************** + * Name: ONESHOT_MAX_DELAY + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * usec The user-provided location in which to return the maxumum delay + * in microseconds. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +#define ONESHOT_MAX_DELAY(l,u) ((l)->ops->max_delay(l,u)) + +/**************************************************************************** + * Name: ONESHOT_START + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +#define ONESHOT_START(l,h,a,t) ((l)->ops->start(l,h,a,t)) + +/**************************************************************************** + * Name: ONESHOT_CANCEL + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +#define ONESHOT_CANCEL(l,t) ((l)->ops->cancel(l,t)) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* This describes the callback function that will be invoked when the oneshot + * timer expires. The oneshot fires, the client will receive: + * + * lower - An instance of the lower half driver + * arg - The opaque argument provided when the interrupt was registered + */ + +typedef void (*oneshot_callback_t)(FAR struct oneshot_dev_s *lower, + void *arg); + +/* The one short operations supported by the lower half driver */ + +struct oneshot_operations_s +{ + CODE int (*max_delay)(FAR struct oneshot_s *lower, uint64_t *usec); + CODE int (*start)(FAR struct oneshot_dev_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); + CODE int (*cancel)(struct oneshot_dev_s *lower, FAR struct timespec *ts); +}; + +/* This structure describes the state of the oneshot timer driver */ + +struct oneshot_dev_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. + */ + + FAR const struct oneshot_operations_s *ops; + + /* Private lower half data may follow */ +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +FAR struct oneshot_dev_s *oneshot_initialize(int chan, uint16_t resolution); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_TIMERS_ONESHOT_H */ From 1bb93021df3231ae73fdca13e6b34d5621883991 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 14:07:43 -0600 Subject: [PATCH 009/214] STM32: Add a experimental oneshot, lower-half driver for STM32 --- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 325 +++++++++++++++++++ include/nuttx/timers/oneshot.h | 21 +- 2 files changed, 338 insertions(+), 8 deletions(-) create mode 100644 arch/arm/src/stm32/stm32_oneshot_lowerhalf.c diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c new file mode 100644 index 00000000000..7a6f65352cd --- /dev/null +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -0,0 +1,325 @@ +/**************************************************************************** + * arch/arm/src/stm32/stm32_waste.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "stm32_oneshot.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of the oneshot timer lower-half driver */ + +struct stm32_oneshot_lowerhalf_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. + */ + + struct stm32_oneshot_lowerhalf_s lh; + + /* Private lower half data follows */ + + struct stm32_oneshot_s oneshot; /* STM32-specific oneshot state */ + oneshot_callback_t callback; /* internal handler that receives callback */ + FAR void *arg; /* Argument that is passed to the handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void stm32_oneshot_handler(void *arg); + +static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec); +static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); +static int stm32_cancel(struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Lower half operations */ + +static const struct oneshot_operations_s g_oneshot_ops = +{ + .max_delay = stm32_max_delay, + .start = stm32_start, + .cancel = stm32_cancel, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_oneshot_handler + * + * Description: + * Timer expiration handler + * + * Input Parameters: + * arg - Should be the same argument provided when stm32_oneshot_start() + * was called. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void stm32_oneshot_handler(void *arg) +{ + FAR struct stm32_oneshot_lowerhalf_s *priv = + (FAR struct stm32_oneshot_lowerhalf_s *)lower; + oneshot_handler_t callback; + FAR void *arg; + + DEBUGASSERT(priv != NULL); + + /* Perhaps the callback was nullified in a race condition with + * stm32_cancel? + */ + + if (priv->callback) + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ + + callback = priv->callback; + arg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; + + /* Then perform the callback */ + + callback(&priv->lh, arg); + } +} + +/**************************************************************************** + * Name: stm32_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * usec The user-provided location in which to return the maxumum delay + * in microseconds. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec) +{ + FAR struct stm32_oneshot_lowerhalf_s *priv = + (FAR struct stm32_oneshot_lowerhalf_s *)lower; + + DEBUGASSERT(priv != NULL); + return stm32_oneshot_max_delay(&priv->oneshot, usec); +} + +/**************************************************************************** + * Name: stm32_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts) +{ + FAR struct stm32_oneshot_lowerhalf_s *priv = + (FAR struct stm32_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Save the callback information and start the timer */ + + flags = enter_critical_section(); + priv->callback = callback; + priv->arg = arg; + ret = stm32_oneshot_start(&priv->lh, stm32_oneshot_handler, + priv, ts); + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: stm32_oneshot_start failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Name: stm32_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +static int stm32_cancel(struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); +{ + FAR struct stm32_oneshot_lowerhalf_s *priv = + (FAR struct stm32_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Cancel the timer */ + + flags = enter_critical_section(); + ret = stm32_oneshot_cancel(&priv->oneshot, ts); + priv->callback = NULL; + priv->arg = NULL; + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: stm32_oneshot_cancel failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution) +{ + FAR struct stm32_oneshot_lowerhalf_s *priv; + int ret; + + /* Allocate an instance of the lower half driver */ + + priv = (FAR struct stm32_oneshot_lowerhalf_s *) + kmm_zalloc(sizeof(struct stm32_oneshot_lowerhalf_s)); + + if (priv == NULL) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + return NULL; + } + + ret = stm32_oneshot_initialize(&priv->oneshot, chan, resolution); + if (ret < 0) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + kmm_free(priv); + return NULL; + } + + return &priv->lh; +} \ No newline at end of file diff --git a/include/nuttx/timers/oneshot.h b/include/nuttx/timers/oneshot.h index 8b5e22207a4..b4e17a05900 100644 --- a/include/nuttx/timers/oneshot.h +++ b/include/nuttx/timers/oneshot.h @@ -131,23 +131,27 @@ * arg - The opaque argument provided when the interrupt was registered */ -typedef void (*oneshot_callback_t)(FAR struct oneshot_dev_s *lower, - void *arg); +struct oneshot_lowerhalf_s; +typedef void (*oneshot_callback_t)(FAR struct oneshot_lowerhalf_s *lower, + FAR void *arg); /* The one short operations supported by the lower half driver */ +struct timespec; struct oneshot_operations_s { - CODE int (*max_delay)(FAR struct oneshot_s *lower, uint64_t *usec); - CODE int (*start)(FAR struct oneshot_dev_s *lower, + CODE int (*max_delay)(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec); + CODE int (*start)(FAR struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, FAR void *arg, FAR const struct timespec *ts); - CODE int (*cancel)(struct oneshot_dev_s *lower, FAR struct timespec *ts); + CODE int (*cancel)(struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); }; -/* This structure describes the state of the oneshot timer driver */ +/* This structure describes the state of the oneshot timer lower-half driver */ -struct oneshot_dev_s +struct oneshot_lowerhalf_s { /* This is the part of the lower half driver that is visible to the upper- * half client of the driver. @@ -194,7 +198,8 @@ extern "C" * ****************************************************************************/ -FAR struct oneshot_dev_s *oneshot_initialize(int chan, uint16_t resolution); +FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution); #undef EXTERN #ifdef __cplusplus From eb3a5651532191bf4d7a530d999566ca18a575c9 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 14:53:39 -0600 Subject: [PATCH 010/214] STM32: Add oneshot lower half to build system. Fix some build problems. --- arch/arm/src/stm32/Make.defs | 4 ++-- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 19 ++++++++++--------- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs index aef4ef08155..f08a904d67e 100644 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -1,7 +1,7 @@ ############################################################################ # arch/arm/src/stm32/Make.defs # -# Copyright (C) 2009, 2011-2015 Gregory Nutt. All rights reserved. +# Copyright (C) 2009, 2011-2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without @@ -125,7 +125,7 @@ CHIP_CSRCS += stm32_tickless.c endif ifeq ($(CONFIG_STM32_ONESHOT),y) -CHIP_CSRCS += stm32_oneshot.c +CHIP_CSRCS += stm32_oneshot.c stm32_oneshot_lowerhalf.c endif ifeq ($(CONFIG_STM32_FREERUN),y) diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index 7a6f65352cd..13f763c2d78 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -45,6 +45,7 @@ #include #include +#include #include #include "stm32_oneshot.h" @@ -61,7 +62,7 @@ struct stm32_oneshot_lowerhalf_s * half client of the driver. */ - struct stm32_oneshot_lowerhalf_s lh; + struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */ /* Private lower half data follows */ @@ -119,9 +120,9 @@ static const struct oneshot_operations_s g_oneshot_ops = static void stm32_oneshot_handler(void *arg) { FAR struct stm32_oneshot_lowerhalf_s *priv = - (FAR struct stm32_oneshot_lowerhalf_s *)lower; - oneshot_handler_t callback; - FAR void *arg; + (FAR struct stm32_oneshot_lowerhalf_s *)arg; + oneshot_callback_t callback; + FAR void *cbarg; DEBUGASSERT(priv != NULL); @@ -136,13 +137,13 @@ static void stm32_oneshot_handler(void *arg) */ callback = priv->callback; - arg = priv->arg; + cbarg = priv->arg; priv->callback = NULL; priv->arg = NULL; /* Then perform the callback */ - callback(&priv->lh, arg); + callback(&priv->lh, cbarg); } } @@ -211,8 +212,8 @@ static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, flags = enter_critical_section(); priv->callback = callback; priv->arg = arg; - ret = stm32_oneshot_start(&priv->lh, stm32_oneshot_handler, - priv, ts); + ret = stm32_oneshot_start(&priv->oneshot, + stm32_oneshot_handler, priv, ts); leave_critical_section(flags); if (ret < 0) @@ -248,7 +249,7 @@ static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, ****************************************************************************/ static int stm32_cancel(struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); + FAR struct timespec *ts) { FAR struct stm32_oneshot_lowerhalf_s *priv = (FAR struct stm32_oneshot_lowerhalf_s *)lower; From fb349508fdf54ddac6ec9e88ddf58e5c00809d07 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 14:57:17 -0600 Subject: [PATCH 011/214] STM32 oneshot lower-half: Missed some data initialization. --- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index 13f763c2d78..b53f610b23e 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -59,7 +59,9 @@ struct stm32_oneshot_lowerhalf_s { /* This is the part of the lower half driver that is visible to the upper- - * half client of the driver. + * half client of the driver. This must be the first thing in this + * structure so that pointers to struct oneshot_lowerhalf_s are cast + * compatible to struct stm32_oneshot_lowerhalf_s and vice versa. */ struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */ @@ -314,6 +316,12 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, return NULL; } + /* Initialize the lower-half driver structure */ + + priv->lh.ops = &g_oneshot_ops; + + /* Initialize the contained STM32 oneshot timer */ + ret = stm32_oneshot_initialize(&priv->oneshot, chan, resolution); if (ret < 0) { From d0ce5b1d1e1f535699274ef6c254838c9e1f0a5f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 15:15:37 -0600 Subject: [PATCH 012/214] Cosmetic changes to comments and function prototypes --- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index b53f610b23e..9a0afa540be 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32/stm32_waste.c + * arch/arm/src/stm32/stm32_oneshot_lowerhalf.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt @@ -84,7 +84,7 @@ static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower, static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, FAR void *arg, FAR const struct timespec *ts); -static int stm32_cancel(struct oneshot_lowerhalf_s *lower, +static int stm32_cancel(FAR struct oneshot_lowerhalf_s *lower, FAR struct timespec *ts); /**************************************************************************** @@ -250,7 +250,7 @@ static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int stm32_cancel(struct oneshot_lowerhalf_s *lower, +static int stm32_cancel(FAR struct oneshot_lowerhalf_s *lower, FAR struct timespec *ts) { FAR struct stm32_oneshot_lowerhalf_s *priv = From b4d4a74059794c0caa96822e560e4048c1cf5b73 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 16:27:01 -0600 Subject: [PATCH 013/214] SAMV7: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. --- arch/arm/src/samv7/Kconfig | 1 - arch/arm/src/samv7/Make.defs | 2 +- arch/arm/src/samv7/sam_freerun.c | 4 +- arch/arm/src/samv7/sam_oneshot.c | 58 ++-- arch/arm/src/samv7/sam_oneshot.h | 23 +- arch/arm/src/samv7/sam_oneshot_lowerhalf.c | 334 +++++++++++++++++++++ 6 files changed, 379 insertions(+), 43 deletions(-) create mode 100644 arch/arm/src/samv7/sam_oneshot_lowerhalf.c diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig index 9507e0c59c8..ebdb78fb269 100644 --- a/arch/arm/src/samv7/Kconfig +++ b/arch/arm/src/samv7/Kconfig @@ -1600,7 +1600,6 @@ endif # SAMV7_TC3 config SAMV7_ONESHOT bool "TC one-shot wrapper" - depends on SAMV7_FREERUN default n if !SCHED_TICKLESS default y if SCHED_TICKLESS ---help--- diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs index fbd88a6e7f4..66c51a9acb9 100644 --- a/arch/arm/src/samv7/Make.defs +++ b/arch/arm/src/samv7/Make.defs @@ -181,7 +181,7 @@ endif ifeq ($(CONFIG_SAMV7_HAVE_TC),y) CHIP_CSRCS += sam_tc.c ifeq ($(CONFIG_SAMV7_ONESHOT),y) -CHIP_CSRCS += sam_oneshot.c +CHIP_CSRCS += sam_oneshot.c sam_oneshot_lowerhalf.c endif ifeq ($(CONFIG_SAMV7_FREERUN),y) CHIP_CSRCS += sam_freerun.c diff --git a/arch/arm/src/samv7/sam_freerun.c b/arch/arm/src/samv7/sam_freerun.c index b3fbfbf6dfc..4db95112182 100644 --- a/arch/arm/src/samv7/sam_freerun.c +++ b/arch/arm/src/samv7/sam_freerun.c @@ -61,7 +61,7 @@ #include "sam_freerun.h" -#ifdef CONFIG_SAMV7_ONESHOT +#ifdef CONFIG_SAMV7_FREERUN /**************************************************************************** * Private Functions @@ -319,4 +319,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun) return OK; } -#endif /* CONFIG_SAMV7_ONESHOT */ +#endif /* CONFIG_SAMV7_FREERUN */ diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c index 4ee2467a61e..bc9c23b515e 100644 --- a/arch/arm/src/samv7/sam_oneshot.c +++ b/arch/arm/src/samv7/sam_oneshot.c @@ -64,22 +64,6 @@ #ifdef CONFIG_SAMV7_ONESHOT -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -129,7 +113,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) oneshot->handler = NULL; oneshot_arg = (void *)oneshot->arg; oneshot->arg = NULL; +#ifdef CONFIG_SAMV7_FREERUN oneshot->start_count = 0; +#endif oneshot_handler(oneshot_arg); } @@ -230,7 +216,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, oneshot->running = false; oneshot->handler = NULL; oneshot->arg = NULL; +#ifdef CONFIG_SAMV7_FREERUN oneshot->start_count = 0; +#endif + return OK; } @@ -254,8 +243,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - oneshot_handler_t handler, void *arg, const struct timespec *ts) +int sam_oneshot_start(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, + const struct timespec *ts) { uint64_t usec; uint64_t regval; @@ -285,7 +276,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer usec = (uint64_t)ts->tv_sec * USEC_PER_SEC + (uint64_t)(ts->tv_nsec / NSEC_PER_USEC); - /* Get the timer counter frequency and determine the number of counts need to achieve the requested delay. + /* Get the timer counter frequency and determine the number of counts + * needed to achieve the requested delay. * * frequency = ticks / second * ticks = seconds * frequency @@ -312,6 +304,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer sam_tc_start(oneshot->tch); +#ifdef CONFIG_SAMV7_FREERUN /* The function sam_tc_start() starts the timer/counter by setting the * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register. * The first one enables the timer/counter the latter performs an @@ -325,12 +318,16 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * the counter value of the freerun timer/counter is stored at each start * of the oneshot timer/counter. * - * The function up_timer_gettime() could also be used for this but it takes - * too long. If up_timer_gettime() is called within this function the problem - * vanishes at least if compiled with no optimisation. + * The function up_timer_gettime() could also be used for this but it + * takes too long. If up_timer_gettime() is called within this function + * the problem vanishes at least if compiled with no optimisation. */ - oneshot->start_count = sam_tc_getcounter(freerun->tch); + if (freerun != NULL) + { + oneshot->start_count = sam_tc_getcounter(freerun->tch); + } +#endif /* Enable interrupts. We should get the callback when the interrupt * occurs. @@ -347,8 +344,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * Description: * Cancel the oneshot timer and return the time remaining on the timer. * - * NOTE: This function may execute at a high rate with no timer running (as - * when pre-emption is enabled and disabled). + * NOTE: This function may execute at a high rate with no timer running + * (as when pre-emption is enabled and disabled). * * Input Parameters: * oneshot Caller allocated instance of the oneshot state structure. This @@ -366,8 +363,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - struct timespec *ts) +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, struct timespec *ts) { irqstate_t flags; uint64_t usec; @@ -408,16 +405,19 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free count = sam_tc_getcounter(oneshot->tch); rc = sam_tc_getregister(oneshot->tch, TC_REGC); +#ifdef CONFIG_SAMV7_FREERUN /* In the case the timer/counter was canceled very short after its start, * the counter register can hold the wrong value (the value of the last * run). To prevent this the counter value is set to zero if not at * least on tick passed since the start of the timer/counter. */ - if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count) + if (count > 0 && freerun != NULL && + sam_tc_getcounter(freerun->tch) == oneshot->start_count) { count = 0; } +#endif /* Now we can disable the interrupt and stop the timer. */ @@ -510,13 +510,11 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free * ****************************************************************************/ -#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec) { DEBUGASSERT(oneshot && usec); *usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch); return OK; } -#endif #endif /* CONFIG_SAMV7_ONESHOT */ diff --git a/arch/arm/src/samv7/sam_oneshot.h b/arch/arm/src/samv7/sam_oneshot.h index 6c4e42337f1..276698c7dda 100644 --- a/arch/arm/src/samv7/sam_oneshot.h +++ b/arch/arm/src/samv7/sam_oneshot.h @@ -46,7 +46,6 @@ #include #include "sam_tc.h" -#include "sam_freerun.h" #ifdef CONFIG_SAMV7_ONESHOT @@ -83,11 +82,13 @@ struct sam_oneshot_s volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void *arg; /* The argument that will accompany * the callback */ +#ifdef CONFIG_SAMV7_FREERUN volatile uint32_t start_count; /* Stores the value of the freerun counter, * at each start of the onshot timer. Is neccesary * to find out if the onshot counter was updated * correctly at the time of the call to * sam_oneshot_cancel or not. */ +#endif }; /**************************************************************************** @@ -149,9 +150,7 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * ****************************************************************************/ -#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); -#endif /**************************************************************************** * Name: sam_oneshot_start @@ -165,7 +164,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * sam_oneshot_initialize(); * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * sam_freerun_initialize(); + * sam_freerun_initialize(). May be NULL if there is no matching + * free-running timer. * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -176,8 +176,11 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - oneshot_handler_t handler, void *arg, const struct timespec *ts); +struct sam_freerun_s; +int sam_oneshot_start(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, + const struct timespec *ts); /**************************************************************************** * Name: sam_oneshot_cancel @@ -194,7 +197,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * sam_oneshot_initialize(); * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * sam_freerun_initialize(); + * sam_freerun_initialize(). May be NULL if there is no matching + * free-running timer. * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. @@ -206,8 +210,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - struct timespec *ts); +struct sam_freerun_s; +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, struct timespec *ts); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c new file mode 100644 index 00000000000..e980f4c18d3 --- /dev/null +++ b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c @@ -0,0 +1,334 @@ +/**************************************************************************** + * arch/arm/src/sam/sam_oneshot_lowerhalf.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_oneshot.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of the oneshot timer lower-half driver */ + +struct sam_oneshot_lowerhalf_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. This must be the first thing in this + * structure so that pointers to struct oneshot_lowerhalf_s are cast + * compatible to struct sam_oneshot_lowerhalf_s and vice versa. + */ + + struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */ + + /* Private lower half data follows */ + + struct sam_oneshot_s oneshot; /* SAMV7-specific oneshot state */ + oneshot_callback_t callback; /* internal handler that receives callback */ + FAR void *arg; /* Argument that is passed to the handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void sam_oneshot_handler(void *arg); + +static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec); +static int sam_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); +static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Lower half operations */ + +static const struct oneshot_operations_s g_oneshot_ops = +{ + .max_delay = sam_max_delay, + .start = sam_start, + .cancel = sam_cancel, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_oneshot_handler + * + * Description: + * Timer expiration handler + * + * Input Parameters: + * arg - Should be the same argument provided when sam_oneshot_start() + * was called. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void sam_oneshot_handler(void *arg) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)arg; + oneshot_callback_t callback; + FAR void *cbarg; + + DEBUGASSERT(priv != NULL); + + /* Perhaps the callback was nullified in a race condition with + * sam_cancel? + */ + + if (priv->callback) + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ + + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; + + /* Then perform the callback */ + + callback(&priv->lh, cbarg); + } +} + +/**************************************************************************** + * Name: sam_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * usec The user-provided location in which to return the maxumum delay + * in microseconds. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + + DEBUGASSERT(priv != NULL); + return sam_oneshot_max_delay(&priv->oneshot, usec); +} + +/**************************************************************************** + * Name: sam_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sam_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Save the callback information and start the timer */ + + flags = enter_critical_section(); + priv->callback = callback; + priv->arg = arg; + ret = sam_oneshot_start(&priv->oneshot, NULL, + sam_oneshot_handler, priv, ts); + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Name: sam_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Cancel the timer */ + + flags = enter_critical_section(); + ret = sam_oneshot_cancel(&priv->oneshot, NULL, ts); + priv->callback = NULL; + priv->arg = NULL; + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution) +{ + FAR struct sam_oneshot_lowerhalf_s *priv; + int ret; + + /* Allocate an instance of the lower half driver */ + + priv = (FAR struct sam_oneshot_lowerhalf_s *) + kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s)); + + if (priv == NULL) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + return NULL; + } + + /* Initialize the lower-half driver structure */ + + priv->lh.ops = &g_oneshot_ops; + + /* Initialize the contained SAM oneshot timer */ + + ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution); + if (ret < 0) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + kmm_free(priv); + return NULL; + } + + return &priv->lh; +} \ No newline at end of file From fa6866b046b57037e94a617fefcea3b998b18a70 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 16:47:17 -0600 Subject: [PATCH 014/214] SAMA5: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. --- arch/arm/src/sama5/Kconfig | 1 - arch/arm/src/sama5/Make.defs | 4 +- arch/arm/src/sama5/sam_freerun.c | 21 +- arch/arm/src/sama5/sam_oneshot.c | 43 ++- arch/arm/src/sama5/sam_oneshot.h | 15 +- arch/arm/src/sama5/sam_oneshot_lowerhalf.c | 335 +++++++++++++++++++ arch/arm/src/samv7/sam_oneshot_lowerhalf.c | 10 +- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 2 +- 8 files changed, 377 insertions(+), 54 deletions(-) create mode 100644 arch/arm/src/sama5/sam_oneshot_lowerhalf.c diff --git a/arch/arm/src/sama5/Kconfig b/arch/arm/src/sama5/Kconfig index 11aa7179f1f..121ee991ecc 100644 --- a/arch/arm/src/sama5/Kconfig +++ b/arch/arm/src/sama5/Kconfig @@ -3866,7 +3866,6 @@ endif # SAMA5_TC2 config SAMA5_ONESHOT bool "TC one-shot wrapper" - depends on SAMA5_FREERUN default n if !SCHED_TICKLESS default y if SCHED_TICKLESS ---help--- diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs index cfe0d0a3dea..ff812107305 100644 --- a/arch/arm/src/sama5/Make.defs +++ b/arch/arm/src/sama5/Make.defs @@ -1,7 +1,7 @@ ############################################################################ # arch/arm/sama5/Make.defs # -# Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. +# Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without @@ -292,7 +292,7 @@ endif ifeq ($(CONFIG_SAMA5_HAVE_TC),y) CHIP_CSRCS += sam_tc.c ifeq ($(CONFIG_SAMA5_ONESHOT),y) -CHIP_CSRCS += sam_oneshot.c +CHIP_CSRCS += sam_oneshot.c sam_oneshot_lowerhalf.c endif ifeq ($(CONFIG_SAMA5_FREERUN),y) CHIP_CSRCS += sam_freerun.c diff --git a/arch/arm/src/sama5/sam_freerun.c b/arch/arm/src/sama5/sam_freerun.c index 8870988ce60..088cb10a6e8 100644 --- a/arch/arm/src/sama5/sam_freerun.c +++ b/arch/arm/src/sama5/sam_freerun.c @@ -60,27 +60,12 @@ #include "sam_freerun.h" -#ifdef CONFIG_SAMA5_ONESHOT - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ +#ifdef CONFIG_SAMA5_FREERUN /**************************************************************************** * Private Functions ****************************************************************************/ + /**************************************************************************** * Name: sam_freerun_handler * @@ -333,4 +318,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun) return OK; } -#endif /* CONFIG_SAMA5_ONESHOT */ +#endif /* CONFIG_SAMA5_FREERUN */ diff --git a/arch/arm/src/sama5/sam_oneshot.c b/arch/arm/src/sama5/sam_oneshot.c index 5f011ea2874..d9917071e1d 100644 --- a/arch/arm/src/sama5/sam_oneshot.c +++ b/arch/arm/src/sama5/sam_oneshot.c @@ -63,22 +63,6 @@ #ifdef CONFIG_SAMA5_ONESHOT -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -128,7 +112,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) oneshot->handler = NULL; oneshot_arg = (void *)oneshot->arg; oneshot->arg = NULL; +#ifdef CONFIG_SAMA5_FREERUN oneshot->start_count = 0; +#endif oneshot_handler(oneshot_arg); } @@ -229,7 +215,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, oneshot->running = false; oneshot->handler = NULL; oneshot->arg = NULL; +#ifdef CONFIG_SAMA5_FREERUN oneshot->start_count = 0; +#endif + return OK; } @@ -253,8 +242,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - oneshot_handler_t handler, void *arg, const struct timespec *ts) +int sam_oneshot_start(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, + const struct timespec *ts) { uint64_t usec; uint64_t regval; @@ -311,6 +302,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer sam_tc_start(oneshot->tch); +#ifdef CONFIG_SAMA5_FREERUN /* The function sam_tc_start() starts the timer/counter by setting the * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register. * The first one enables the timer/counter the latter performs an @@ -329,7 +321,11 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * vanishes at least if compiled with no optimisation. */ - oneshot->start_count = sam_tc_getcounter(freerun->tch); + if (freerun != NULL) + { + oneshot->start_count = sam_tc_getcounter(freerun->tch); + } +#endif /* Enable interrupts. We should get the callback when the interrupt * occurs. @@ -365,8 +361,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - struct timespec *ts) +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, struct timespec *ts) { irqstate_t flags; uint64_t usec; @@ -407,16 +403,19 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free count = sam_tc_getcounter(oneshot->tch); rc = sam_tc_getregister(oneshot->tch, TC_REGC); +#ifdef CONFIG_SAMA5_FREERUN /* In the case the timer/counter was canceled very short after its start, * the counter register can hold the wrong value (the value of the last * run). To prevent this the counter value is set to zero if not at * least on tick passed since the start of the timer/counter. */ - if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count) + if (count > 0 && freerun != NULL && + sam_tc_getcounter(freerun->tch) == oneshot->start_count) { count = 0; } +#endif /* Now we can disable the interrupt and stop the timer. */ diff --git a/arch/arm/src/sama5/sam_oneshot.h b/arch/arm/src/sama5/sam_oneshot.h index 0443fcd693d..4886ad5fbaa 100644 --- a/arch/arm/src/sama5/sam_oneshot.h +++ b/arch/arm/src/sama5/sam_oneshot.h @@ -46,7 +46,6 @@ #include #include "sam_tc.h" -#include "sam_freerun.h" #ifdef CONFIG_SAMA5_ONESHOT @@ -83,11 +82,13 @@ struct sam_oneshot_s volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void *arg; /* The argument that will accompany * the callback */ +#ifdef CONFIG_SAMA5_FREERUN volatile uint32_t start_count; /* Stores the value of the freerun counter, * at each start of the onshot timer. Is neccesary * to find out if the onshot counter was updated * correctly at the time of the call to * sam_oneshot_cancel or not. */ +#endif }; /**************************************************************************** @@ -153,8 +154,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - oneshot_handler_t handler, void *arg, const struct timespec *ts); +struct sam_freerun_s; +int sam_oneshot_start(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, + const struct timespec *ts); /**************************************************************************** * Name: sam_oneshot_cancel @@ -183,8 +187,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - struct timespec *ts); +struct sam_freerun_s; +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, struct timespec *ts); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c new file mode 100644 index 00000000000..3e7506c4bd9 --- /dev/null +++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c @@ -0,0 +1,335 @@ +/**************************************************************************** + * arch/arm/src/sam/sam_oneshot_lowerhalf.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_oneshot.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of the oneshot timer lower-half driver */ + +struct sam_oneshot_lowerhalf_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. This must be the first thing in this + * structure so that pointers to struct oneshot_lowerhalf_s are cast + * compatible to struct sam_oneshot_lowerhalf_s and vice versa. + */ + + struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */ + + /* Private lower half data follows */ + + struct sam_oneshot_s oneshot; /* STM32-specific oneshot state */ + oneshot_callback_t callback; /* internal handler that receives callback */ + FAR void *arg; /* Argument that is passed to the handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void sam_oneshot_handler(void *arg); + +static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec); +static int sam_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); +static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Lower half operations */ + +static const struct oneshot_operations_s g_oneshot_ops = +{ + .max_delay = sam_max_delay, + .start = sam_start, + .cancel = sam_cancel, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_oneshot_handler + * + * Description: + * Timer expiration handler + * + * Input Parameters: + * arg - Should be the same argument provided when sam_oneshot_start() + * was called. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void sam_oneshot_handler(void *arg) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)arg; + oneshot_callback_t callback; + FAR void *cbarg; + + DEBUGASSERT(priv != NULL); + + /* Perhaps the callback was nullified in a race condition with + * sam_cancel? + */ + + if (priv->callback) + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ + + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; + + /* Then perform the callback */ + + callback(&priv->lh, cbarg); + } +} + +/**************************************************************************** + * Name: sam_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * usec The user-provided location in which to return the maxumum delay + * in microseconds. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec) +{ + DEBUGASSERT(priv != NULL && usec != NULL); + +#warning Missing logic + *usec = UINT64_MAX; + return -ENOSYS; +} + +/**************************************************************************** + * Name: sam_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sam_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Save the callback information and start the timer */ + + flags = enter_critical_section(); + priv->callback = callback; + priv->arg = arg; + ret = sam_oneshot_start(&priv->oneshot, NULL, + sam_oneshot_handler, priv, ts); + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Name: sam_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Cancel the timer */ + + flags = enter_critical_section(); + ret = sam_oneshot_cancel(&priv->oneshot, NULL, ts); + priv->callback = NULL; + priv->arg = NULL; + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution) +{ + FAR struct sam_oneshot_lowerhalf_s *priv; + int ret; + + /* Allocate an instance of the lower half driver */ + + priv = (FAR struct sam_oneshot_lowerhalf_s *) + kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s)); + + if (priv == NULL) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + return NULL; + } + + /* Initialize the lower-half driver structure */ + + priv->lh.ops = &g_oneshot_ops; + + /* Initialize the contained STM32 oneshot timer */ + + ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution); + if (ret < 0) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + kmm_free(priv); + return NULL; + } + + return &priv->lh; +} \ No newline at end of file diff --git a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c index e980f4c18d3..0d5b4e75c5a 100644 --- a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c @@ -80,12 +80,12 @@ struct sam_oneshot_lowerhalf_s static void sam_oneshot_handler(void *arg); static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec); + FAR uint64_t *usec); static int sam_start(FAR struct oneshot_lowerhalf_s *lower, - oneshot_callback_t callback, FAR void *arg, - FAR const struct timespec *ts); + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); + FAR struct timespec *ts); /**************************************************************************** * Private Data @@ -174,7 +174,7 @@ static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, FAR struct sam_oneshot_lowerhalf_s *priv = (FAR struct sam_oneshot_lowerhalf_s *)lower; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv != NULL && usec != NULL); return sam_oneshot_max_delay(&priv->oneshot, usec); } diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index 9a0afa540be..c7d13e703a6 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -174,7 +174,7 @@ static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower, FAR struct stm32_oneshot_lowerhalf_s *priv = (FAR struct stm32_oneshot_lowerhalf_s *)lower; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv != NULL && usec != NULL); return stm32_oneshot_max_delay(&priv->oneshot, usec); } From a5a776e2234f23e58ee32f420c4cbe7635ed705f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 17:04:19 -0600 Subject: [PATCH 015/214] SAM4CM: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. --- arch/arm/src/sam34/Make.defs | 2 +- arch/arm/src/sam34/sam4cm_freerun.c | 4 +- arch/arm/src/sam34/sam4cm_oneshot.c | 27 +- arch/arm/src/sam34/sam4cm_oneshot.h | 29 +- arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c | 334 ++++++++++++++++++ arch/arm/src/sam34/sam_wdt.c | 4 +- arch/arm/src/sam34/sam_wdt.h | 2 +- arch/arm/src/sama5/sam_oneshot.h | 6 +- arch/arm/src/sama5/sam_oneshot_lowerhalf.c | 4 +- 9 files changed, 389 insertions(+), 23 deletions(-) create mode 100644 arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs index 48c751799ce..dab10fb45e1 100644 --- a/arch/arm/src/sam34/Make.defs +++ b/arch/arm/src/sam34/Make.defs @@ -199,7 +199,7 @@ ifeq ($(CONFIG_ARCH_CHIP_SAM4CM),y) ifeq ($(CONFIG_SAM34_TC),y) CHIP_CSRCS += sam4cm_tc.c ifeq ($(CONFIG_SAM34_ONESHOT),y) -CHIP_CSRCS += sam4cm_oneshot.c +CHIP_CSRCS += sam4cm_oneshot.c sam4cm_oneshot_lowerhalf.c endif ifeq ($(CONFIG_SAM34_FREERUN),y) CHIP_CSRCS += sam4cm_freerun.c diff --git a/arch/arm/src/sam34/sam4cm_freerun.c b/arch/arm/src/sam34/sam4cm_freerun.c index a26578e99ac..4b09e1d5e66 100644 --- a/arch/arm/src/sam34/sam4cm_freerun.c +++ b/arch/arm/src/sam34/sam4cm_freerun.c @@ -59,7 +59,7 @@ #include "sam4cm_freerun.h" -#ifdef CONFIG_SAM34_ONESHOT +#ifdef CONFIG_SAM34_FREERUN /**************************************************************************** * Private Functions @@ -316,4 +316,4 @@ int sam_freerun_uninitialize(struct sam_freerun_s *freerun) return OK; } -#endif /* CONFIG_SAM34_ONESHOT */ +#endif /* CONFIG_SAM34_FREERUN */ diff --git a/arch/arm/src/sam34/sam4cm_oneshot.c b/arch/arm/src/sam34/sam4cm_oneshot.c index a7505b5a72e..0bf92d1fea0 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot.c +++ b/arch/arm/src/sam34/sam4cm_oneshot.c @@ -111,7 +111,9 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) oneshot->handler = NULL; oneshot_arg = (void *)oneshot->arg; oneshot->arg = NULL; +#ifdef CONFIG_SAM34_FREERUN oneshot->start_count = 0; +#endif oneshot_handler(oneshot_arg); } @@ -212,7 +214,10 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, oneshot->running = false; oneshot->handler = NULL; oneshot->arg = NULL; +#ifdef CONFIG_SAM34_FREERUN oneshot->start_count = 0; +#endif + return OK; } @@ -251,8 +256,10 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec) * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - oneshot_handler_t handler, void *arg, const struct timespec *ts) +int sam_oneshot_start(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, + const struct timespec *ts) { uint64_t usec; uint64_t regval; @@ -309,6 +316,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer sam_tc_start(oneshot->tch); +#ifdef CONFIG_SAM34_FREERUN /* The function sam_tc_start() starts the timer/counter by setting the * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register. * The first one enables the timer/counter the latter performs an @@ -327,7 +335,11 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * vanishes at least if compiled with no optimisation. */ - oneshot->start_count = sam_tc_getcounter(freerun->tch); + if (freerun != NULL) + { + oneshot->start_count = sam_tc_getcounter(freerun->tch); + } +#endif /* Enable interrupts. We should get the callback when the interrupt * occurs. @@ -363,8 +375,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - struct timespec *ts) +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, struct timespec *ts) { irqstate_t flags; uint64_t usec; @@ -405,16 +417,19 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *free count = sam_tc_getcounter(oneshot->tch); rc = sam_tc_getregister(oneshot->tch, TC_REGC); +#ifdef CONFIG_SAM34_FREERUN /* In the case the timer/counter was canceled very short after its start, * the counter register can hold the wrong value (the value of the last * run). To prevent this the counter value is set to zero if not at * least on tick passed since the start of the timer/counter. */ - if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count) + if (count > 0 && freerun != NULL && + sam_tc_getcounter(freerun->tch) == oneshot->start_count) { count = 0; } +#endif /* Now we can disable the interrupt and stop the timer. */ diff --git a/arch/arm/src/sam34/sam4cm_oneshot.h b/arch/arm/src/sam34/sam4cm_oneshot.h index d7dc7a18ee0..d46b67b4211 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot.h +++ b/arch/arm/src/sam34/sam4cm_oneshot.h @@ -46,7 +46,6 @@ #include #include "sam4cm_tc.h" -#include "sam4cm_freerun.h" #ifdef CONFIG_SAM34_ONESHOT @@ -83,11 +82,13 @@ struct sam_oneshot_s volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void *arg; /* The argument that will accompany * the callback */ +#ifdef CONFIG_SAM34_FREERUN volatile uint32_t start_count; /* Stores the value of the freerun counter, * at each start of the onshot timer. Is neccesary * to find out if the onshot counter was updated * correctly at the time of the call to * sam_oneshot_cancel or not. */ +#endif }; /**************************************************************************** @@ -130,6 +131,14 @@ extern "C" int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, uint16_t resolution); +/**************************************************************************** + * Name: sam_oneshot_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + ****************************************************************************/ + int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); /**************************************************************************** @@ -144,7 +153,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * sam_oneshot_initialize(); * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * sam_freerun_initialize(); + * sam_freerun_initialize(). May be NULL if there is no matching + * free-running timer. * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -155,8 +165,11 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - oneshot_handler_t handler, void *arg, const struct timespec *ts); +struct sam_freerun_s; +int sam_oneshot_start(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, + const struct timespec *ts); /**************************************************************************** * Name: sam_oneshot_cancel @@ -173,7 +186,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * sam_oneshot_initialize(); * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * sam_freerun_initialize(); + * sam_freerun_initialize(). May be NULL if there is no matching + * free-running timer. * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. @@ -185,8 +199,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freer * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, - struct timespec *ts); +struct sam_freerun_s; +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, + struct sam_freerun_s *freerun, struct timespec *ts); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c new file mode 100644 index 00000000000..9221a5a397c --- /dev/null +++ b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c @@ -0,0 +1,334 @@ +/**************************************************************************** + * arch/arm/src/sam/sam_oneshot_lowerhalf.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sam_oneshot.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of the oneshot timer lower-half driver */ + +struct sam_oneshot_lowerhalf_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. This must be the first thing in this + * structure so that pointers to struct oneshot_lowerhalf_s are cast + * compatible to struct sam_oneshot_lowerhalf_s and vice versa. + */ + + struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */ + + /* Private lower half data follows */ + + struct sam_oneshot_s oneshot; /* SAM-specific oneshot state */ + oneshot_callback_t callback; /* internal handler that receives callback */ + FAR void *arg; /* Argument that is passed to the handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void sam_oneshot_handler(void *arg); + +static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec); +static int sam_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); +static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Lower half operations */ + +static const struct oneshot_operations_s g_oneshot_ops = +{ + .max_delay = sam_max_delay, + .start = sam_start, + .cancel = sam_cancel, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_oneshot_handler + * + * Description: + * Timer expiration handler + * + * Input Parameters: + * arg - Should be the same argument provided when sam_oneshot_start() + * was called. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void sam_oneshot_handler(void *arg) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)arg; + oneshot_callback_t callback; + FAR void *cbarg; + + DEBUGASSERT(priv != NULL); + + /* Perhaps the callback was nullified in a race condition with + * sam_cancel? + */ + + if (priv->callback) + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ + + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; + + /* Then perform the callback */ + + callback(&priv->lh, cbarg); + } +} + +/**************************************************************************** + * Name: sam_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * usec The user-provided location in which to return the maxumum delay + * in microseconds. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + + DEBUGASSERT(priv != NULL && usec != NULL); + return sam_oneshot_max_delay(&priv->oneshot, usec); +} + +/**************************************************************************** + * Name: sam_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sam_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Save the callback information and start the timer */ + + flags = enter_critical_section(); + priv->callback = callback; + priv->arg = arg; + ret = sam_oneshot_start(&priv->oneshot, NULL, + sam_oneshot_handler, priv, ts); + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: sam_oneshot_start failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Name: sam_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +static int sam_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts) +{ + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Cancel the timer */ + + flags = enter_critical_section(); + ret = sam_oneshot_cancel(&priv->oneshot, NULL, ts); + priv->callback = NULL; + priv->arg = NULL; + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: sam_oneshot_cancel failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution) +{ + FAR struct sam_oneshot_lowerhalf_s *priv; + int ret; + + /* Allocate an instance of the lower half driver */ + + priv = (FAR struct sam_oneshot_lowerhalf_s *) + kmm_zalloc(sizeof(struct sam_oneshot_lowerhalf_s)); + + if (priv == NULL) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + return NULL; + } + + /* Initialize the lower-half driver structure */ + + priv->lh.ops = &g_oneshot_ops; + + /* Initialize the contained SAM oneshot timer */ + + ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution); + if (ret < 0) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + kmm_free(priv); + return NULL; + } + + return &priv->lh; +} \ No newline at end of file diff --git a/arch/arm/src/sam34/sam_wdt.c b/arch/arm/src/sam34/sam_wdt.c index cf3d70b1613..62075d9a765 100644 --- a/arch/arm/src/sam34/sam_wdt.c +++ b/arch/arm/src/sam34/sam_wdt.c @@ -554,7 +554,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower, regval |= WWDG_CFR_EWI; sam34_putreg(regval, SAM_WDT_CFR); - up_enable_irq(STM32_IRQ_WWDG); + up_enable_irq(SAM_IRQ_WWDG); } else { @@ -563,7 +563,7 @@ static xcpt_t sam34_capture(FAR struct watchdog_lowerhalf_s *lower, regval &= ~WWDG_CFR_EWI; sam34_putreg(regval, SAM_WDT_CFR); - up_disable_irq(STM32_IRQ_WWDG); + up_disable_irq(SAM_IRQ_WWDG); } leave_critical_section(flags); diff --git a/arch/arm/src/sam34/sam_wdt.h b/arch/arm/src/sam34/sam_wdt.h index 234f4e25204..77a1fbab40e 100644 --- a/arch/arm/src/sam34/sam_wdt.h +++ b/arch/arm/src/sam34/sam_wdt.h @@ -95,4 +95,4 @@ void sam_wdtinitialize(FAR const char *devpath); #endif /* __ASSEMBLY__ */ #endif /* CONFIG_WATCHDOG */ -#endif /* __ARCH_ARM_SRC_STM32_STM32_WDG_H */ +#endif /* __ARCH_ARM_SRC_SAM34_WDT_H */ diff --git a/arch/arm/src/sama5/sam_oneshot.h b/arch/arm/src/sama5/sam_oneshot.h index 4886ad5fbaa..cc5c6976137 100644 --- a/arch/arm/src/sama5/sam_oneshot.h +++ b/arch/arm/src/sama5/sam_oneshot.h @@ -143,7 +143,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * sam_oneshot_initialize(); * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * sam_freerun_initialize(); + * sam_freerun_initialize(). May be NULL if there is no matching + * free-running timer. * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -175,7 +176,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, * sam_oneshot_initialize(); * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * sam_freerun_initialize(); + * sam_freerun_initialize(). May be NULL if there is no matching + * free-running timer. * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c index 3e7506c4bd9..48cecdcca66 100644 --- a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c @@ -69,7 +69,7 @@ struct sam_oneshot_lowerhalf_s /* Private lower half data follows */ - struct sam_oneshot_s oneshot; /* STM32-specific oneshot state */ + struct sam_oneshot_s oneshot; /* SAM-specific oneshot state */ oneshot_callback_t callback; /* internal handler that receives callback */ FAR void *arg; /* Argument that is passed to the handler */ }; @@ -321,7 +321,7 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, priv->lh.ops = &g_oneshot_ops; - /* Initialize the contained STM32 oneshot timer */ + /* Initialize the contained SAM oneshot timer */ ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution); if (ret < 0) From 1965e25da4ef2668d6d4d2e29272c03f8889f020 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 17:14:41 -0600 Subject: [PATCH 016/214] STM32L4: Add oneshot lower half driver. --- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 2 +- arch/arm/src/stm32l4/Make.defs | 2 +- arch/arm/src/stm32l4/stm32l4_oneshot.h | 11 +- .../src/stm32l4/stm32l4_oneshot_lowerhalf.c | 334 ++++++++++++++++++ 4 files changed, 342 insertions(+), 7 deletions(-) create mode 100644 arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index c7d13e703a6..5373dc815bf 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -331,4 +331,4 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, } return &priv->lh; -} \ No newline at end of file +} diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs index 33a5e0a5ba8..d265c2a4f51 100644 --- a/arch/arm/src/stm32l4/Make.defs +++ b/arch/arm/src/stm32l4/Make.defs @@ -125,7 +125,7 @@ CHIP_CSRCS += stm32l4_tickless.c endif ifeq ($(CONFIG_STM32L4_ONESHOT),y) -CHIP_CSRCS += stm32l4_oneshot.c +CHIP_CSRCS += stm32l4_oneshot.c stm32l4_oneshot_lowerhalf.c endif ifeq ($(CONFIG_STM32L4_FREERUN),y) diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot.h b/arch/arm/src/stm32l4/stm32l4_oneshot.h index 743652bf49b..86800f6b352 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot.h +++ b/arch/arm/src/stm32l4/stm32l4_oneshot.h @@ -118,7 +118,7 @@ extern "C" ****************************************************************************/ int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan, - uint16_t resolution); + uint16_t resolution); /**************************************************************************** * Name: stm32l4_oneshot_max_delay @@ -128,7 +128,8 @@ int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec); +int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, + uint64_t *usec); /**************************************************************************** * Name: stm32l4_oneshot_start @@ -151,8 +152,8 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec) ****************************************************************************/ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot, - oneshot_handler_t handler, void *arg, - const struct timespec *ts); + oneshot_handler_t handler, void *arg, + const struct timespec *ts); /**************************************************************************** * Name: stm32l4_oneshot_cancel @@ -179,7 +180,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot, ****************************************************************************/ int stm32l4_oneshot_cancel(struct stm32l4_oneshot_s *oneshot, - struct timespec *ts); + struct timespec *ts); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c new file mode 100644 index 00000000000..0db6af09d58 --- /dev/null +++ b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c @@ -0,0 +1,334 @@ +/**************************************************************************** + * arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "stm32l4_oneshot.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of the oneshot timer lower-half driver */ + +struct stm32l4_oneshot_lowerhalf_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. This must be the first thing in this + * structure so that pointers to struct oneshot_lowerhalf_s are cast + * compatible to struct stm32l4_oneshot_lowerhalf_s and vice versa. + */ + + struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */ + + /* Private lower half data follows */ + + struct stm32l4_oneshot_s oneshot; /* STM32-specific oneshot state */ + oneshot_callback_t callback; /* internal handler that receives callback */ + FAR void *arg; /* Argument that is passed to the handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void stm32l4_oneshot_handler(void *arg); + +static int stm32l4_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec); +static int stm32l4_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); +static int stm32l4_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Lower half operations */ + +static const struct oneshot_operations_s g_oneshot_ops = +{ + .max_delay = stm32l4_max_delay, + .start = stm32l4_start, + .cancel = stm32l4_cancel, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32l4_oneshot_handler + * + * Description: + * Timer expiration handler + * + * Input Parameters: + * arg - Should be the same argument provided when stm32l4_oneshot_start() + * was called. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void stm32l4_oneshot_handler(void *arg) +{ + FAR struct stm32l4_oneshot_lowerhalf_s *priv = + (FAR struct stm32l4_oneshot_lowerhalf_s *)arg; + oneshot_callback_t callback; + FAR void *cbarg; + + DEBUGASSERT(priv != NULL); + + /* Perhaps the callback was nullified in a race condition with + * stm32l4_cancel? + */ + + if (priv->callback) + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ + + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; + + /* Then perform the callback */ + + callback(&priv->lh, cbarg); + } +} + +/**************************************************************************** + * Name: stm32l4_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * usec The user-provided location in which to return the maxumum delay + * in microseconds. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int stm32l4_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR uint64_t *usec) +{ + FAR struct stm32l4_oneshot_lowerhalf_s *priv = + (FAR struct stm32l4_oneshot_lowerhalf_s *)lower; + + DEBUGASSERT(priv != NULL && usec != NULL); + return stm32l4_oneshot_max_delay(&priv->oneshot, usec); +} + +/**************************************************************************** + * Name: stm32l4_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int stm32l4_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts) +{ + FAR struct stm32l4_oneshot_lowerhalf_s *priv = + (FAR struct stm32l4_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Save the callback information and start the timer */ + + flags = enter_critical_section(); + priv->callback = callback; + priv->arg = arg; + ret = stm32l4_oneshot_start(&priv->oneshot, + stm32l4_oneshot_handler, priv, ts); + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: stm32l4_oneshot_start failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Name: stm32l4_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +static int stm32l4_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts) +{ + FAR struct stm32l4_oneshot_lowerhalf_s *priv = + (FAR struct stm32l4_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Cancel the timer */ + + flags = enter_critical_section(); + ret = stm32l4_oneshot_cancel(&priv->oneshot, ts); + priv->callback = NULL; + priv->arg = NULL; + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: stm32l4_oneshot_cancel failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution) +{ + FAR struct stm32l4_oneshot_lowerhalf_s *priv; + int ret; + + /* Allocate an instance of the lower half driver */ + + priv = (FAR struct stm32l4_oneshot_lowerhalf_s *) + kmm_zalloc(sizeof(struct stm32l4_oneshot_lowerhalf_s)); + + if (priv == NULL) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + return NULL; + } + + /* Initialize the lower-half driver structure */ + + priv->lh.ops = &g_oneshot_ops; + + /* Initialize the contained STM32 oneshot timer */ + + ret = stm32l4_oneshot_initialize(&priv->oneshot, chan, resolution); + if (ret < 0) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + kmm_free(priv); + return NULL; + } + + return &priv->lh; +} From 61b0ac06bf097f36402c6abc0562db8627ddf464 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 17:20:12 -0600 Subject: [PATCH 017/214] Missed a dependency in last set of commits --- arch/arm/src/sam34/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig index 8e764dff40e..1f1f423e857 100644 --- a/arch/arm/src/sam34/Kconfig +++ b/arch/arm/src/sam34/Kconfig @@ -1060,7 +1060,6 @@ config SAM34_TC5_TIOB config SAM34_ONESHOT bool "TC one-shot wrapper" - depends on SAM34_FREERUN default n if !SCHED_TICKLESS default y if SCHED_TICKLESS ---help--- From 155055d5642dfef4f8431598ad6afbe0af5e1047 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 18:20:25 -0600 Subject: [PATCH 018/214] strtod(): Was not returning endptr on error conditions. --- libc/stdlib/lib_strtod.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/libc/stdlib/lib_strtod.c b/libc/stdlib/lib_strtod.c index 9b7462368bf..bd2a55e996e 100644 --- a/libc/stdlib/lib_strtod.c +++ b/libc/stdlib/lib_strtod.c @@ -115,6 +115,8 @@ double_t strtod(FAR const char *str, FAR char **endptr) negative = 1; /* Fall through to increment position */ case '+': p++; + default: + break; } number = 0.; @@ -151,7 +153,8 @@ double_t strtod(FAR const char *str, FAR char **endptr) if (num_digits == 0) { set_errno(ERANGE); - return 0.0; + number = 0.0; + goto errout; } /* Correct for sign */ @@ -174,6 +177,8 @@ double_t strtod(FAR const char *str, FAR char **endptr) negative = 1; /* Fall through to increment pos */ case '+': p++; + default: + break; } /* Process string of digits */ @@ -199,7 +204,8 @@ double_t strtod(FAR const char *str, FAR char **endptr) exponent > __DBL_MAX_EXP__) { set_errno(ERANGE); - return infinite; + number = infinite; + goto errout; } /* Scale the result */ @@ -220,6 +226,7 @@ double_t strtod(FAR const char *str, FAR char **endptr) number *= p10; } } + n >>= 1; p10 *= p10; } @@ -229,6 +236,7 @@ double_t strtod(FAR const char *str, FAR char **endptr) set_errno(ERANGE); } +errout: if (endptr) { *endptr = p; From 6e5010e0d0c3785d61a6674a513d83495654c95d Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Aug 2016 18:21:29 -0600 Subject: [PATCH 019/214] floor(), floorf(), and floorl(): Fix logic error. Was not correctly handling negative integral value. --- libc/math/lib_floor.c | 22 ++++++++++++++++++---- libc/math/lib_floorf.c | 22 ++++++++++++++++++---- libc/math/lib_floorl.c | 23 +++++++++++++++++++---- 3 files changed, 55 insertions(+), 12 deletions(-) diff --git a/libc/math/lib_floor.c b/libc/math/lib_floor.c index f583dfa6b72..7a8cc7a1109 100644 --- a/libc/math/lib_floor.c +++ b/libc/math/lib_floor.c @@ -41,12 +41,26 @@ #ifdef CONFIG_HAVE_DOUBLE double floor(double x) { - modf(x, &x); - if (x < 0.0) + double modx; + + /* modf() will return the integer part of X. The return value of floor + * differs for non-integer, negative values. + * + * x modf floor + * ---- ----- ----- + * 2.0 2.0 2.0 + * 2.4 2.0 2.0 + * 2.9 2.0 2.0 + * -2.7 -2.0 -3.0 + * -2.0 -2.0 -2.0 + */ + + (void)modf(x, &modx); + if (x < 0.0 && x < modx) { - x -= 1.0; + modx -= 1.0; } - return x; + return modx; } #endif diff --git a/libc/math/lib_floorf.c b/libc/math/lib_floorf.c index d2fac02d2d5..deefcf9407f 100644 --- a/libc/math/lib_floorf.c +++ b/libc/math/lib_floorf.c @@ -37,11 +37,25 @@ float floorf(float x) { - modff(x, &x); - if (x < 0.0F) + float modx; + + /* modf() will return the integer part of X. The return value of floor + * differs for non-integer, negative values. + * + * x modff floor + * ---- ----- ----- + * 2.0 2.0 2.0 + * 2.4 2.0 2.0 + * 2.9 2.0 2.0 + * -2.7 -2.0 -3.0 + * -2.0 -2.0 -2.0 + */ + + (void)modff(x, &modx); + if (x < 0.0F && x < modx) { - x -= 1.0F; + modx -= 1.0F; } - return x; + return modx; } diff --git a/libc/math/lib_floorl.c b/libc/math/lib_floorl.c index 214ade8ee28..f1328e9a72b 100644 --- a/libc/math/lib_floorl.c +++ b/libc/math/lib_floorl.c @@ -41,12 +41,27 @@ #ifdef CONFIG_HAVE_LONG_DOUBLE long double floorl(long double x) { - modfl(x, &x); - if (x < 0.0) + long double modx; + + /* modf() will return the integer part of X. The return value of floor + * differs for non-integer, negative values. + * + * x modfl floor + * ---- ----- ----- + * 2.0 2.0 2.0 + * 2.4 2.0 2.0 + * 2.9 2.0 2.0 + * -2.7 -2.0 -3.0 + * -2.0 -2.0 -2.0 + */ + + (void)modfl(x, &modx); + if (x < 0.0 && x < modx) { - x -= 1.0; + modx -= 1.0; } - return x; + return modx; + } #endif From 9ca15c718de596d3cd68a2bd0dcdf6e20ca0dd6c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 06:55:10 -0600 Subject: [PATCH 020/214] configs/sim: Add a configuration useful for testing Mini Basic --- configs/sim/README.txt | 5 + configs/sim/minibasic/Make.defs | 128 +++++ configs/sim/minibasic/defconfig | 820 ++++++++++++++++++++++++++++++++ configs/sim/minibasic/setenv.sh | 45 ++ 4 files changed, 998 insertions(+) create mode 100644 configs/sim/minibasic/Make.defs create mode 100644 configs/sim/minibasic/defconfig create mode 100644 configs/sim/minibasic/setenv.sh diff --git a/configs/sim/README.txt b/configs/sim/README.txt index 759b75647f1..df8a231553d 100644 --- a/configs/sim/README.txt +++ b/configs/sim/README.txt @@ -490,6 +490,11 @@ cxxtest postpone running C++ static initializers until NuttX has been initialized. +minibasic + + This configuration was used to test the Mini Basic port at + apps/interpreters/minibasic. + mount Configures to use apps/examples/mount. diff --git a/configs/sim/minibasic/Make.defs b/configs/sim/minibasic/Make.defs new file mode 100644 index 00000000000..d89368ccc21 --- /dev/null +++ b/configs/sim/minibasic/Make.defs @@ -0,0 +1,128 @@ +############################################################################ +# configs/sim/minibasic/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk + +HOSTOS = ${shell uname -o 2>/dev/null || echo "Other"} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += -O2 +endif + +ARCHCPUFLAGS = -fno-builtin +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHINCLUDESXX = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx +ARCHSCRIPT = + +ifeq ($(CONFIG_SIM_M32),y) + ARCHCPUFLAGS += -m32 + ARCHCPUFLAGSXX += -m32 +endif + +CROSSDEV = +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGSXX) $(ARCHINCLUDESXX) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) +CXXELFFLAGS = $(CXXFLAGS) + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a + +ifeq ($(HOSTOS),Cygwin) + EXEEXT = .exe +else + EXEEXT = +endif + +LDLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(LD) +CCLINKFLAGS = $(ARCHSCRIPT) # Link flags used with $(CC) +LDFLAGS = $(ARCHSCRIPT) # For backward compatibility, same as CCLINKFLAGS + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDLINKFLAGS += -g + CCLINKFLAGS += -g + LDFLAGS += -g +endif + +ifeq ($(CONFIG_SIM_M32),y) + LDLINKFLAGS += -melf_i386 + CCLINKFLAGS += -m32 + LDFLAGS += -m32 +endif + + +MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +HOSTLDFLAGS = diff --git a/configs/sim/minibasic/defconfig b/configs/sim/minibasic/defconfig new file mode 100644 index 00000000000..0e1519ffc0e --- /dev/null +++ b/configs/sim/minibasic/defconfig @@ -0,0 +1,820 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +CONFIG_DEBUG_FEATURES=y + +# +# Debug SYSLOG Output Controls +# +# CONFIG_DEBUG_ERROR is not set +CONFIG_DEBUG_ASSERTIONS=y + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_GPIO is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_RENESAS is not set +CONFIG_ARCH_SIM=y +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="sim" + +# +# Simulation Configuration Options +# +CONFIG_HOST_X86_64=y +# CONFIG_HOST_X86 is not set +# CONFIG_SIM_M32 is not set +CONFIG_SIM_X8664_SYSTEMV=y +# CONFIG_SIM_X8664_MICROSOFT is not set +CONFIG_SIM_WALLTIME=y +CONFIG_SIM_NET_HOST_ROUTE=y +# CONFIG_SIM_NET_BRIDGE is not set +# CONFIG_SIM_FRAMEBUFFER is not set +# CONFIG_SIM_SPIFLASH is not set +# CONFIG_SIM_QSPIFLASH is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_MULTICPU=y +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +CONFIG_ARCH_HAVE_POWEROFF=y +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=0 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +CONFIG_BOOT_RUNFROMEXTSRAM=y +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x0 +CONFIG_RAM_SIZE=0 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SIM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sim" + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +CONFIG_BOARDCTL_POWEROFF=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_APP_SYMTAB is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=4 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=8 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=64 +CONFIG_SCHED_HAVE_PARENT=y +# CONFIG_SCHED_CHILD_STATUS is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=32 +CONFIG_NFILE_STREAMS=16 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_ONEXIT_MAX=1 + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCHLD=4 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=32 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_USERMAIN_STACKSIZE=4096 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=8192 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +# CONFIG_DEV_URANDOM is not set +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +# CONFIG_MCU_SERIAL is not set +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set +# CONFIG_FS_HOSTFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +CONFIG_BINFMT_EXEPATH=y +CONFIG_PATH_INITIAL="/bin" +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +CONFIG_LIBC_EXECFUNCS=y +CONFIG_EXECFUNCS_HAVE_SYMTAB=y +CONFIG_EXECFUNCS_SYMTAB="g_symtab" +CONFIG_EXECFUNCS_NSYMBOLS=0 +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +CONFIG_TIME_EXTENDED=y +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PRIORITY=100 +CONFIG_EXAMPLES_HELLO_STACKSIZE=8192 +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +CONFIG_FSUTILS_PASSWD=y +CONFIG_FSUTILS_PASSWD_PATH="/etc/passwd" +CONFIG_FSUTILS_PASSWD_READONLY=y +CONFIG_FSUTILS_PASSWD_IOBUFFER_SIZE=512 +CONFIG_FSUTILS_PASSWD_KEY1=0x12345678 +CONFIG_FSUTILS_PASSWD_KEY2=0x9abcdef0 +CONFIG_FSUTILS_PASSWD_KEY3=0x12345678 +CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0 + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +CONFIG_INTERPRETERS_MINIBASIC=y +CONFIG_INTERPRETER_MINIBASIC_PRIORITY=100 +CONFIG_INTERPRETER_MINIBASIC_STACKSIZE=4096 +CONFIG_INTERPRETER_MINIBASIC_IOBUFSIZE=1024 +CONFIG_INTERPRETER_MINIBASIC_TESTSCRIPT=y +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILE_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_POWEROFF is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +CONFIG_NSH_DISABLE_SHUTDOWN=y +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +CONFIG_NSH_ROMFSETC=y +# CONFIG_NSH_ROMFSRC is not set +CONFIG_NSH_ROMFSMOUNTPT="/etc" +CONFIG_NSH_INITSCRIPT="init.d/rcS" +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSSECTSIZE=64 +# CONFIG_NSH_DEFAULTROMFS is not set +CONFIG_NSH_ARCHROMFS=y +# CONFIG_NSH_CUSTOMROMFS is not set +CONFIG_NSH_FATDEVNO=2 +CONFIG_NSH_FATSECTSIZE=512 +CONFIG_NSH_FATNSECTORS=1024 +CONFIG_NSH_FATMOUNTPT="/tmp" + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYMTAB is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/minibasic/setenv.sh b/configs/sim/minibasic/setenv.sh new file mode 100644 index 00000000000..bc88903e638 --- /dev/null +++ b/configs/sim/minibasic/setenv.sh @@ -0,0 +1,45 @@ +#!/bin/bash +# sim/minibasic/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +#export NUTTX_BIN= +#export PATH=${NUTTX_BIN}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" From 8dd17ad5d790561143fa9d9481ca7183296e527e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 07:01:19 -0600 Subject: [PATCH 021/214] Remove name from ChangeLog/ReleaseNotes per request. --- ChangeLog | 3 +-- ReleaseNotes | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/ChangeLog b/ChangeLog index 7b20e8cc1ba..f296c8b6254 100755 --- a/ChangeLog +++ b/ChangeLog @@ -10536,8 +10536,7 @@ nuttx/libc/mqueue to nuttx/sched/mqueue. Also add syscall support for mq_setattr() and mq_getattr(). This is necessary in protected and kernel builds because in those cases the message queue structure is - protected and cannot be accessed directly from user mode code. Noted - by Jouko Holopainen (2015-06-03). + protected and cannot be accessed directly from user mode code (2015-06-03). * drivers/net/tun.c: TUN driver bug fix. From Max Neklyudov (2015-06-03. * drivers/net/Kconfig, include/nuttx/net/mii.h, and arch/arm/src/lpc17xx/lpc17_ethernet.c: Add support for the Micrel diff --git a/ReleaseNotes b/ReleaseNotes index 27710f0c6b3..66e1c712c1e 100644 --- a/ReleaseNotes +++ b/ReleaseNotes @@ -9063,7 +9063,7 @@ detailed bugfix information): for mq_setattr() and mq_getattr(). This is necessary in protected and kernel builds because in those cases the message queue structure is protected and cannot be accessed directly from user - mode code. Noted by Jouko Holopainen. + mode code. * File Systems/Block Drivers/MTD: From 89135c55e435ed81d948947bf88920a03382f01d Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 10:40:07 -0600 Subject: [PATCH 022/214] drivers/timer: Add an upper-half, oneshot timer character driver. --- Kconfig | 1 - arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 2 +- drivers/sensors/zerocross.c | 30 +- drivers/timers/Kconfig | 10 +- drivers/timers/Make.defs | 6 + drivers/timers/oneshot.c | 393 +++++++++++++++++++ include/nuttx/timers/oneshot.h | 67 ++++ include/nuttx/timers/timer.h | 15 +- 8 files changed, 500 insertions(+), 24 deletions(-) create mode 100644 drivers/timers/oneshot.c diff --git a/Kconfig b/Kconfig index 31f6f54629c..bf1f1c7b4b3 100644 --- a/Kconfig +++ b/Kconfig @@ -1367,7 +1367,6 @@ endif # DEBUG_SPI config DEBUG_TIMER bool "Timer Debug Features" default n - depends on TIMER ---help--- Enable timer debug features. diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index 5373dc815bf..aee56316c5b 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -69,7 +69,7 @@ struct stm32_oneshot_lowerhalf_s /* Private lower half data follows */ struct stm32_oneshot_s oneshot; /* STM32-specific oneshot state */ - oneshot_callback_t callback; /* internal handler that receives callback */ + oneshot_callback_t callback; /* Internal handler that receives callback */ FAR void *arg; /* Argument that is passed to the handler */ }; diff --git a/drivers/sensors/zerocross.c b/drivers/sensors/zerocross.c index d7bc19e381a..0140b9ba728 100644 --- a/drivers/sensors/zerocross.c +++ b/drivers/sensors/zerocross.c @@ -33,10 +33,6 @@ * ****************************************************************************/ -/**************************************************************************** - * Compilation Switches - ****************************************************************************/ - /**************************************************************************** * Included Files ****************************************************************************/ @@ -64,14 +60,13 @@ #ifdef CONFIG_ZEROCROSS -#ifdef CONFIG_DISABLE_SIGNALS -#error "This driver needs SIGNAL support, remove CONFIG_DISABLE_SIGNALS" -#endif - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/* Debug ********************************************************************/ + +#ifdef CONFIG_DISABLE_SIGNALS +# error "This driver needs SIGNAL support, remove CONFIG_DISABLE_SIGNALS" +#endif /**************************************************************************** * Private Type Definitions @@ -132,15 +127,18 @@ static void zerocross_interrupt(FAR const struct zc_lowerhalf_s *lower, static const struct file_operations g_zcops = { - zc_open, /* open */ - zc_close, /* close */ - zc_read, /* read */ - zc_write, /* write */ + zc_open, /* open */ + zc_close, /* close */ + zc_read, /* read */ + zc_write, /* write */ 0, /* seek */ - zc_ioctl /* ioctl */ + zc_ioctl /* ioctl */ #ifndef CONFIG_DISABLE_POLL , 0 /* poll */ #endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , 0 /* unlink */ +#endif }; volatile int sample = 0; @@ -467,7 +465,7 @@ static int zc_ioctl(FAR struct file *filep, int cmd, unsigned long arg) default: { - sninfo("Forwarding unrecognized cmd: %d arg: %ld\n", cmd, arg); + snerr("ERROR: Unrecognized cmd: %d arg: %ld\n", cmd, arg); ret = -ENOTTY; } break; @@ -485,7 +483,7 @@ static int zc_ioctl(FAR struct file *filep, int cmd, unsigned long arg) * Name: zc_register * * Description: - * Register the Zero Cross lower half device as 'devpath' + * Register the Zero Cross character device as 'devpath' * * Input Parameters: * devpath - The full path to the driver to register. E.g., "/dev/zc0" diff --git a/drivers/timers/Kconfig b/drivers/timers/Kconfig index 076cc43c8bf..a7f204408d3 100644 --- a/drivers/timers/Kconfig +++ b/drivers/timers/Kconfig @@ -5,7 +5,7 @@ menu "Timer Driver Support" -menuconfig TIMER +config TIMER bool "Timer Support" default n ---help--- @@ -13,6 +13,14 @@ menuconfig TIMER driver. See include/nuttx/timers/timer.h for further timer driver information. +config ONESHOT + bool "Oneshot timer driver" + default n + ---help--- + This selection enables building of the "upper-half" oneshot timer + driver. See include/nuttx/timers/oneshot.h for further oneshot timer + driver information. + menuconfig RTC bool "RTC Driver Support" default n diff --git a/drivers/timers/Make.defs b/drivers/timers/Make.defs index 61c7a9764fa..64940c43bb2 100644 --- a/drivers/timers/Make.defs +++ b/drivers/timers/Make.defs @@ -51,6 +51,12 @@ ifeq ($(CONFIG_TIMER),y) TMRVPATH = :timers endif +ifeq ($(CONFIG_ONESHOT),y) + CSRCS += oneshot.c + TMRDEPPATH = --dep-path timers + TMRVPATH = :timers +endif + ifeq ($(CONFIG_RTC_DSXXXX),y) CSRCS += ds3231.c TMRDEPPATH = --dep-path timers diff --git a/drivers/timers/oneshot.c b/drivers/timers/oneshot.c new file mode 100644 index 00000000000..5ff65edf62a --- /dev/null +++ b/drivers/timers/oneshot.c @@ -0,0 +1,393 @@ +/**************************************************************************** + * drivers/timers/oneshot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_ONESHOT + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_DISABLE_SIGNALS +# error "This driver needs SIGNAL support, remove CONFIG_DISABLE_SIGNALS" +#endif + +/**************************************************************************** + * Private Type Definitions + ****************************************************************************/ + +/* This structure describes the state of the upper half driver */ + +struct oneshot_dev_s +{ + FAR struct oneshot_lowerhalf_s *od_lower; /* Lower-half driver state */ + sem_t od_exclsem; /* Supports mutual exclusion */ + + /* Oneshot timer expiration notification information */ + + uint8_t od_signo; /* Signal number for notification */ + pid_t od_pid; /* PID to be notified */ + FAR void *od_arg; /* Signal value argument */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int oneshot_open(FAR struct file *filep); +static int oneshot_close(FAR struct file *filep); +static ssize_t oneshot_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static ssize_t oneshot_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int oneshot_ioctl(FAR struct file *filep, int cmd, + unsigned long arg); + +static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower, + FAR void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_oneshot_ops = +{ + oneshot_open, /* open */ + oneshot_close, /* close */ + oneshot_read, /* read */ + oneshot_write, /* write */ + 0, /* seek */ + oneshot_ioctl /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , 0 /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , 0 /* unlink */ +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_callback + ****************************************************************************/ + +static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower, + FAR void *arg) +{ + FAR struct oneshot_dev_s *priv = (FAR struct oneshot_dev_s *)arg; +#ifdef CONFIG_CAN_PASS_STRUCTS + union sigval value; +#endif + + DEBUGASSERT(priv != NULL); + + /* Signal the waiter.. if there is one */ + +#ifdef CONFIG_CAN_PASS_STRUCTS + value.sival_ptr = priv->od_arg; + (void)sigqueue(priv->od_pid, priv->od_signo, value); +#else + (void)sigqueue(priv->od_pid, priv->od_signo, priv->od_arg); +#endif +} + +/************************************************************************************ + * Name: oneshot_open + * + * Description: + * This function is called whenever the PWM device is opened. + * + ************************************************************************************/ + +static int oneshot_open(FAR struct file *filep) +{ + tmrinfo("Opening...\n"); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); + return OK; +} + +/************************************************************************************ + * Name: oneshot_close + * + * Description: + * This function is called when the PWM device is closed. + * + ************************************************************************************/ + +static int oneshot_close(FAR struct file *filep) +{ + tmrinfo("Closing...\n"); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); + return OK; +} + +/************************************************************************************ + * Name: oneshot_read + * + * Description:O + * A dummy read method. This is provided only to satsify the VFS layer. + * + ************************************************************************************/ + +static ssize_t oneshot_read(FAR struct file *filep, FAR char *buffer, size_t buflen) +{ + /* Return zero -- usually meaning end-of-file */ + + tmrinfo("buflen=%ld\n", (unsigned long)buflen); + return 0; +} + +/************************************************************************************ + * Name: oneshot_write + * + * Description: + * A dummy write method. This is provided only to satsify the VFS layer. + * + ************************************************************************************/ + +static ssize_t oneshot_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + /* Return a failure */ + + tmrinfo("buflen=%ld\n", (unsigned long)buflen); + return -EPERM; +} + +/************************************************************************************ + * Name: oneshot_ioctl + * + * Description: + * The standard ioctl method. This is where ALL of the PWM work is done. + * + ************************************************************************************/ + +static int oneshot_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode; + FAR struct oneshot_dev_s *priv; + int ret; + + tmrinfo("cmd=%d arg=%08lx\n", cmd, (unsigned long)arg); + + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); + inode = filep->f_inode; + priv = (FAR struct oneshot_dev_s *)inode->i_private; + DEBUGASSERT(priv != NULL); + + /* Get exclusive access to the device structures */ + + ret = sem_wait(&priv->od_exclsem); + if (ret < 0) + { + return ret; + } + + /* Handle built-in ioctl commands */ + + ret = -EINVAL; + switch (cmd) + { + /* OSIOC_MAXDELAY - Return the maximum delay that can be supported + * by this timer. + * Argument: A referenct to a struct timespec in + * which the maximum time will be returned. + */ + + case OSIOC_MAXDELAY: + { + FAR struct timespec *ts; + uint64_t usecs; + + ts = (FAR struct timespec *)((uintptr_t)arg); + DEBUGASSERT(ts != NULL); + + ret = ONESHOT_MAX_DELAY(priv->od_lower, &usecs); + if (ret >= 0) + { + uint64_t sec = usecs / 1000000; + usecs -= 1000000 * sec; + + ts->tv_sec = (time_t)sec; + ts->tv_nsec = (long)(usecs * 1000); + } + } + break; + + /* OSIOC_START - Start the oneshot timer + * Argument: A reference to struct oneshot_start_s + */ + + case OSIOC_START: + { + FAR struct oneshot_start_s *start; + pid_t pid; + + start = (FAR struct oneshot_start_s *)((uintptr_t)arg); + DEBUGASSERT(start != NULL); + + /* Save signalling information */ + + priv->od_signo = start->signo; + priv->od_arg = start->arg; + + pid = start->pid; + if (pid == 0) + { + pid = getpid(); + } + + priv->od_pid = pid; + + /* Start the oneshot timer */ + + ret = ONESHOT_START(priv->od_lower, oneshot_callback, start->arg, + &start->ts); + } + break; + + /* OSIOC_CANCEL - Stop the timer + * Argument: A reference to a struct timespec in + * which the time remaining will be returned. + */ + + case OSIOC_CANCEL: + { + FAR struct timespec *ts = (FAR struct timespec *)((uintptr_t)arg); + + /* Cancel the oneshot timer */ + + ret = ONESHOT_CANCEL(priv->od_lower, ts); + } + break; + + default: + { + tmrerr("ERROR: Unrecognized cmd: %d arg: %ld\n", cmd, arg); + ret = -ENOTTY; + } + break; + } + + sem_post(&priv->od_exclsem); + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_register + * + * Description: + * Register the oneshot device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/oneshot0" + * lower - An instance of the lower half interface + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. The following + * possible error values may be returned (most are returned by + * register_driver()): + * + * EINVAL - 'path' is invalid for this operation + * EEXIST - An inode already exists at 'path' + * ENOMEM - Failed to allocate in-memory resources for the operation + * + ****************************************************************************/ + +int oneshot_register(FAR const char *devname, + FAR struct oneshot_lowerhalf_s *lower) +{ + FAR struct oneshot_dev_s *priv; + int ret; + + sninfo("devname=%s lower=%p\n", devname, lower); + DEBUGASSERT(devname != NULL && lower != NULL); + + /* Allocate a new oneshot timer driver instance */ + + priv = (FAR struct oneshot_dev_s *) + kmm_zalloc(sizeof(struct oneshot_dev_s)); + + if (!priv) + { + snerr("ERROR: Failed to allocate device structure\n"); + return -ENOMEM; + } + + /* Initialize the new oneshot timer driver instance */ + + priv->od_lower = lower; + sem_init(&priv->od_exclsem, 0, 1); + + /* And register the oneshot timer driver */ + + ret = register_driver(devname, &g_oneshot_ops, 0666, priv); + if (ret < 0) + { + snerr("ERROR: register_driver failed: %d\n", ret); + sem_destroy(&priv->od_exclsem); + kmm_free(priv); + } + + return ret; +} + +#endif /* CONFIG_ONESHOT */ diff --git a/include/nuttx/timers/oneshot.h b/include/nuttx/timers/oneshot.h index b4e17a05900..31bd34d73fa 100644 --- a/include/nuttx/timers/oneshot.h +++ b/include/nuttx/timers/oneshot.h @@ -45,9 +45,38 @@ #include #include +#include + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +/* IOCTL commands ***********************************************************/ +/* These commands are used by applications to access the oneshot lower-half + * logic via the oneshot character driver IOCTL command. Since the oneshot + * driver is a device control interface and not a data transfer interface, + * the majority of the functionality is implemented in driver IOCTL calls. + * The oneshot IOCTL commands are listed below: + * + * These are detected and handled by the "upper half" timer driver. + * + * OSIOC_MAXDELAY - Return the maximum delay that can be supported by + * this timer. + * Argument: A referenct to a struct timespec in which + * the maximum time will be returned. + * OSIOC_START - Start the oneshot timer + * Argument: A reference to struct oneshot_start_s + * OSIOC_CANCEL - Stop the timer + * Argument: A reference to a struct timespec in which + * the time remaining will be returned. + * + * NOTE: _TCIOC(0x0020) througn _TCIOC(0x003f) are reserved for use by the + * oneshot driver to assure that the values are unique. Other timer drivers + * must not use IOCTL commands in this numeric range. + */ + +#define OSIOC_MAXDELAY _TCIOC(0x0020) +#define OSIOC_START _TCIOC(0x0021) +#define OSIOC_CANCEL _TCIOC(0x0022) /* Method access helper macros **********************************************/ @@ -162,6 +191,18 @@ struct oneshot_lowerhalf_s /* Private lower half data may follow */ }; +#ifdef CONFIG_ONESHOT +/* Argument to OSIOC_START IOCTL command */ + +struct oneshot_start_s +{ + pid_t pid; /* PID of task to be signalled (0 means calling task) */ + int signo; /* Signal number to use */ + FAR void *arg; /* Signal value argument */ + struct timespec ts; /* Delay until time expiration */ +}; +#endif + /**************************************************************************** * Public Data ****************************************************************************/ @@ -201,6 +242,32 @@ extern "C" FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, uint16_t resolution); +/**************************************************************************** + * Name: oneshot_register + * + * Description: + * Register the oneshot device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/oneshot0" + * lower - An instance of the lower half interface + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. The following + * possible error values may be returned (most are returned by + * register_driver()): + * + * EINVAL - 'path' is invalid for this operation + * EEXIST - An inode already exists at 'path' + * ENOMEM - Failed to allocate in-memory resources for the operation + * + ****************************************************************************/ + +#ifdef CONFIG_ONESHOT +int oneshot_register(FAR const char *devname, + FAR struct oneshot_lowerhalf_s *lower); +#endif + #undef EXTERN #ifdef __cplusplus } diff --git a/include/nuttx/timers/timer.h b/include/nuttx/timers/timer.h index 5d11498e71e..8df658376ae 100644 --- a/include/nuttx/timers/timer.h +++ b/include/nuttx/timers/timer.h @@ -77,13 +77,18 @@ * NOTE: The TCIOC_SETHANDLER ioctl cannot be supported in the kernel build * mode. In that case direct callbacks from kernel space into user space is * forbidden. + * + * NOTE: _TCIOC(0x0001) througn _TCIOC(0x001f) are reserved for use by the + * timer driver to assure that the values are unique. Other timer drivers, + * such as the oneshot timer, must not use IOCTL commands in this numeric + * range. */ -#define TCIOC_START _TCIOC(0x001) -#define TCIOC_STOP _TCIOC(0x002) -#define TCIOC_GETSTATUS _TCIOC(0x003) -#define TCIOC_SETTIMEOUT _TCIOC(0x004) -#define TCIOC_SETHANDLER _TCIOC(0x005) +#define TCIOC_START _TCIOC(0x0001) +#define TCIOC_STOP _TCIOC(0x0002) +#define TCIOC_GETSTATUS _TCIOC(0x0003) +#define TCIOC_SETTIMEOUT _TCIOC(0x0004) +#define TCIOC_SETHANDLER _TCIOC(0x0005) /* Bit Settings *************************************************************/ /* Bit settings for the struct timer_status_s flags field */ From 82b86cdcf3778d7947c553df22ac63064bec2e0b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 11:33:10 -0600 Subject: [PATCH 023/214] oneshot interface: max_delay method should return time in a standard struct timespec form. --- arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c | 23 +++++++++++---- arch/arm/src/sama5/sam_oneshot_lowerhalf.c | 13 +++++---- arch/arm/src/samv7/sam_oneshot_lowerhalf.c | 23 +++++++++++---- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 23 +++++++++++---- .../src/stm32l4/stm32l4_oneshot_lowerhalf.c | 29 +++++++++++++------ drivers/timers/oneshot.c | 17 +++-------- include/nuttx/timers/oneshot.h | 7 ++--- 7 files changed, 85 insertions(+), 50 deletions(-) diff --git a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c index 9221a5a397c..67e743d17ac 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c +++ b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c @@ -80,7 +80,7 @@ struct sam_oneshot_lowerhalf_s static void sam_oneshot_handler(void *arg); static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec); + FAR struct timespec *ts); static int sam_start(FAR struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, FAR void *arg, FAR const struct timespec *ts); @@ -159,8 +159,7 @@ static void sam_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * usec The user-provided location in which to return the maxumum delay - * in microseconds. + * ts The location in which to return the maxumum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned @@ -169,13 +168,25 @@ static void sam_oneshot_handler(void *arg) ****************************************************************************/ static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec) + FAR struct timespec *ts) { FAR struct sam_oneshot_lowerhalf_s *priv = (FAR struct sam_oneshot_lowerhalf_s *)lower; + uint64_t usecs; + int ret; - DEBUGASSERT(priv != NULL && usec != NULL); - return sam_oneshot_max_delay(&priv->oneshot, usec); + DEBUGASSERT(priv != NULL && ts != NULL); + ret = sam_oneshot_max_delay(&priv->oneshot, &usecs); + if (ret >= 0) + { + uint64_t sec = usecs / 1000000; + usecs -= 1000000 * sec; + + ts->tv_sec = (time_t)sec; + ts->tv_nsec = (long)(usecs * 1000); + } + + return ret; } /**************************************************************************** diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c index 48cecdcca66..e6aa2e40a70 100644 --- a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c @@ -41,6 +41,7 @@ #include #include +#include #include #include #include @@ -81,7 +82,7 @@ struct sam_oneshot_lowerhalf_s static void sam_oneshot_handler(void *arg); static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec); + FAR struct timespec *ts); static int sam_start(FAR struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, FAR void *arg, FAR const struct timespec *ts); @@ -160,8 +161,7 @@ static void sam_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * usec The user-provided location in which to return the maxumum delay - * in microseconds. + * ts The location in which to return the maxumum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned @@ -170,12 +170,13 @@ static void sam_oneshot_handler(void *arg) ****************************************************************************/ static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec) + FAR struct timespec *ts) { - DEBUGASSERT(priv != NULL && usec != NULL); + DEBUGASSERT(priv != NULL && ts != NULL); #warning Missing logic - *usec = UINT64_MAX; + ts->tv_sec = INT_MAX; + ts->tv_nsec = LONG_MAX; return -ENOSYS; } diff --git a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c index 0d5b4e75c5a..b4ffbdd361b 100644 --- a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c @@ -80,7 +80,7 @@ struct sam_oneshot_lowerhalf_s static void sam_oneshot_handler(void *arg); static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec); + FAR struct timespec *ts); static int sam_start(FAR struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, FAR void *arg, FAR const struct timespec *ts); @@ -159,8 +159,7 @@ static void sam_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * usec The user-provided location in which to return the maxumum delay - * in microseconds. + * ts The location in which to return the maxumum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned @@ -169,13 +168,25 @@ static void sam_oneshot_handler(void *arg) ****************************************************************************/ static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec) + FAR struct timespec *ts) { FAR struct sam_oneshot_lowerhalf_s *priv = (FAR struct sam_oneshot_lowerhalf_s *)lower; + uint64_t usecs; + int ret; - DEBUGASSERT(priv != NULL && usec != NULL); - return sam_oneshot_max_delay(&priv->oneshot, usec); + DEBUGASSERT(priv != NULL && ts != NULL); + ret = sam_oneshot_max_delay(&priv->oneshot, &usecs); + if (ret >= 0) + { + uint64_t sec = usecs / 1000000; + usecs -= 1000000 * sec; + + ts->tv_sec = (time_t)sec; + ts->tv_nsec = (long)(usecs * 1000); + } + + return ret; } /**************************************************************************** diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index aee56316c5b..24b36de5553 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -80,7 +80,7 @@ struct stm32_oneshot_lowerhalf_s static void stm32_oneshot_handler(void *arg); static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec); + FAR struct timespec *ts); static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, FAR void *arg, FAR const struct timespec *ts); @@ -159,8 +159,7 @@ static void stm32_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * usec The user-provided location in which to return the maxumum delay - * in microseconds. + * ts The location in which to return the maxumum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned @@ -169,13 +168,25 @@ static void stm32_oneshot_handler(void *arg) ****************************************************************************/ static int stm32_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec) + FAR struct timespec *ts) { FAR struct stm32_oneshot_lowerhalf_s *priv = (FAR struct stm32_oneshot_lowerhalf_s *)lower; + uint64_t usecs; + int ret; - DEBUGASSERT(priv != NULL && usec != NULL); - return stm32_oneshot_max_delay(&priv->oneshot, usec); + DEBUGASSERT(priv != NULL && ts != NULL); + ret = stm32_oneshot_max_delay(&priv->oneshot, &usecs); + if (ret >= 0) + { + uint64_t sec = usecs / 1000000; + usecs -= 1000000 * sec; + + ts->tv_sec = (time_t)sec; + ts->tv_nsec = (long)(usecs * 1000); + } + + return ret; } /**************************************************************************** diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c index 0db6af09d58..faf6afd5f58 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c @@ -80,12 +80,12 @@ struct stm32l4_oneshot_lowerhalf_s static void stm32l4_oneshot_handler(void *arg); static int stm32l4_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec); + FAR struct timespec *ts); static int stm32l4_start(FAR struct oneshot_lowerhalf_s *lower, - oneshot_callback_t callback, FAR void *arg, - FAR const struct timespec *ts); + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); static int stm32l4_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); + FAR struct timespec *ts); /**************************************************************************** * Private Data @@ -159,8 +159,7 @@ static void stm32l4_oneshot_handler(void *arg) * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * usec The user-provided location in which to return the maxumum delay - * in microseconds. + * ts The location in which to return the maxumum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned @@ -169,13 +168,25 @@ static void stm32l4_oneshot_handler(void *arg) ****************************************************************************/ static int stm32l4_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec) + FAR struct timespec *ts) { FAR struct stm32l4_oneshot_lowerhalf_s *priv = (FAR struct stm32l4_oneshot_lowerhalf_s *)lower; + uint64_t usecs; + int ret; - DEBUGASSERT(priv != NULL && usec != NULL); - return stm32l4_oneshot_max_delay(&priv->oneshot, usec); + DEBUGASSERT(priv != NULL && ts != NULL); + ret = stm32l4_oneshot_max_delay(&priv->oneshot, &usecs); + if (ret >= 0) + { + uint64_t sec = usecs / 1000000; + usecs -= 1000000 * sec; + + ts->tv_sec = (time_t)sec; + ts->tv_nsec = (long)(usecs * 1000); + } + + return ret; } /**************************************************************************** diff --git a/drivers/timers/oneshot.c b/drivers/timers/oneshot.c index 5ff65edf62a..975f83bba2b 100644 --- a/drivers/timers/oneshot.c +++ b/drivers/timers/oneshot.c @@ -188,6 +188,7 @@ static ssize_t oneshot_read(FAR struct file *filep, FAR char *buffer, size_t buf /* Return zero -- usually meaning end-of-file */ tmrinfo("buflen=%ld\n", (unsigned long)buflen); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); return 0; } @@ -205,6 +206,7 @@ static ssize_t oneshot_write(FAR struct file *filep, FAR const char *buffer, /* Return a failure */ tmrinfo("buflen=%ld\n", (unsigned long)buflen); + DEBUGASSERT(filep != NULL && filep->f_inode != NULL); return -EPERM; } @@ -250,21 +252,10 @@ static int oneshot_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case OSIOC_MAXDELAY: { - FAR struct timespec *ts; - uint64_t usecs; - - ts = (FAR struct timespec *)((uintptr_t)arg); + FAR struct timespec *ts = (FAR struct timespec *)((uintptr_t)arg); DEBUGASSERT(ts != NULL); - ret = ONESHOT_MAX_DELAY(priv->od_lower, &usecs); - if (ret >= 0) - { - uint64_t sec = usecs / 1000000; - usecs -= 1000000 * sec; - - ts->tv_sec = (time_t)sec; - ts->tv_nsec = (long)(usecs * 1000); - } + ret = ONESHOT_MAX_DELAY(priv->od_lower, ts); } break; diff --git a/include/nuttx/timers/oneshot.h b/include/nuttx/timers/oneshot.h index 31bd34d73fa..2fd001758e7 100644 --- a/include/nuttx/timers/oneshot.h +++ b/include/nuttx/timers/oneshot.h @@ -90,8 +90,7 @@ * lower An instance of the lower-half oneshot state structure. This * structure must have been previously initialized via a call to * oneshot_initialize(); - * usec The user-provided location in which to return the maxumum delay - * in microseconds. + * ts The location in which to return the maxumum delay. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned @@ -99,7 +98,7 @@ * ****************************************************************************/ -#define ONESHOT_MAX_DELAY(l,u) ((l)->ops->max_delay(l,u)) +#define ONESHOT_MAX_DELAY(l,t) ((l)->ops->max_delay(l,t)) /**************************************************************************** * Name: ONESHOT_START @@ -170,7 +169,7 @@ struct timespec; struct oneshot_operations_s { CODE int (*max_delay)(FAR struct oneshot_lowerhalf_s *lower, - FAR uint64_t *usec); + FAR struct timespec *ts); CODE int (*start)(FAR struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, FAR void *arg, FAR const struct timespec *ts); From b4e8876b094255d1c771d0a3cb79f77db030bfc3 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 12:41:49 -0600 Subject: [PATCH 024/214] Correct some spacing --- arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c | 22 +++++++++---------- arch/arm/src/sama5/sam_oneshot_lowerhalf.c | 22 +++++++++---------- arch/arm/src/samv7/sam_oneshot_lowerhalf.c | 22 +++++++++---------- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 22 +++++++++---------- .../src/stm32l4/stm32l4_oneshot_lowerhalf.c | 22 +++++++++---------- 5 files changed, 55 insertions(+), 55 deletions(-) diff --git a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c index 67e743d17ac..62f049e1d66 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c +++ b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c @@ -133,20 +133,20 @@ static void sam_oneshot_handler(void *arg) */ if (priv->callback) - { - /* Sample and nullify BEFORE executing callback (in case the callback - * restarts the oneshot). - */ + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ - callback = priv->callback; - cbarg = priv->arg; - priv->callback = NULL; - priv->arg = NULL; + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; - /* Then perform the callback */ + /* Then perform the callback */ - callback(&priv->lh, cbarg); - } + callback(&priv->lh, cbarg); + } } /**************************************************************************** diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c index e6aa2e40a70..f2c1eeed39f 100644 --- a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c @@ -135,20 +135,20 @@ static void sam_oneshot_handler(void *arg) */ if (priv->callback) - { - /* Sample and nullify BEFORE executing callback (in case the callback - * restarts the oneshot). - */ + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ - callback = priv->callback; - cbarg = priv->arg; - priv->callback = NULL; - priv->arg = NULL; + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; - /* Then perform the callback */ + /* Then perform the callback */ - callback(&priv->lh, cbarg); - } + callback(&priv->lh, cbarg); + } } /**************************************************************************** diff --git a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c index b4ffbdd361b..d5e80f54892 100644 --- a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c @@ -133,20 +133,20 @@ static void sam_oneshot_handler(void *arg) */ if (priv->callback) - { - /* Sample and nullify BEFORE executing callback (in case the callback - * restarts the oneshot). - */ + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ - callback = priv->callback; - cbarg = priv->arg; - priv->callback = NULL; - priv->arg = NULL; + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; - /* Then perform the callback */ + /* Then perform the callback */ - callback(&priv->lh, cbarg); - } + callback(&priv->lh, cbarg); + } } /**************************************************************************** diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index 24b36de5553..ae76ffaa806 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -133,20 +133,20 @@ static void stm32_oneshot_handler(void *arg) */ if (priv->callback) - { - /* Sample and nullify BEFORE executing callback (in case the callback - * restarts the oneshot). - */ + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ - callback = priv->callback; - cbarg = priv->arg; - priv->callback = NULL; - priv->arg = NULL; + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; - /* Then perform the callback */ + /* Then perform the callback */ - callback(&priv->lh, cbarg); - } + callback(&priv->lh, cbarg); + } } /**************************************************************************** diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c index faf6afd5f58..4d3213ce1b6 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c @@ -133,20 +133,20 @@ static void stm32l4_oneshot_handler(void *arg) */ if (priv->callback) - { - /* Sample and nullify BEFORE executing callback (in case the callback - * restarts the oneshot). - */ + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ - callback = priv->callback; - cbarg = priv->arg; - priv->callback = NULL; - priv->arg = NULL; + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; - /* Then perform the callback */ + /* Then perform the callback */ - callback(&priv->lh, cbarg); - } + callback(&priv->lh, cbarg); + } } /**************************************************************************** From 046acf6b5488bace303790b204066b2541fab571 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 13:14:03 -0600 Subject: [PATCH 025/214] Add a simulated oneshot lowerhalf driver --- arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c | 4 +- arch/arm/src/sama5/sam_oneshot_lowerhalf.c | 6 +- arch/arm/src/samv7/sam_oneshot_lowerhalf.c | 4 +- arch/arm/src/stm32/stm32_oneshot_lowerhalf.c | 4 +- .../src/stm32l4/stm32l4_oneshot_lowerhalf.c | 4 +- arch/sim/src/Makefile | 4 + arch/sim/src/up_oneshot.c | 322 ++++++++++++++++++ configs/sim/src/sim_bringup.c | 25 +- 8 files changed, 361 insertions(+), 12 deletions(-) create mode 100644 arch/sim/src/up_oneshot.c diff --git a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c index 62f049e1d66..cdab331d93a 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c +++ b/arch/arm/src/sam34/sam4cm_oneshot_lowerhalf.c @@ -218,7 +218,7 @@ static int sam_start(FAR struct oneshot_lowerhalf_s *lower, irqstate_t flags; int ret; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL); /* Save the callback information and start the timer */ @@ -336,7 +336,7 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution); if (ret < 0) { - tmrerr("ERROR: Failed to initialized state structure\n"); + tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret); kmm_free(priv); return NULL; } diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c index f2c1eeed39f..4a22cc9855d 100644 --- a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c @@ -172,7 +172,7 @@ static void sam_oneshot_handler(void *arg) static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, FAR struct timespec *ts) { - DEBUGASSERT(priv != NULL && ts != NULL); + DEBUGASSERT(lower != NULL && ts != NULL); #warning Missing logic ts->tv_sec = INT_MAX; @@ -209,7 +209,7 @@ static int sam_start(FAR struct oneshot_lowerhalf_s *lower, irqstate_t flags; int ret; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL); /* Save the callback information and start the timer */ @@ -327,7 +327,7 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution); if (ret < 0) { - tmrerr("ERROR: Failed to initialized state structure\n"); + tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret); kmm_free(priv); return NULL; } diff --git a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c index d5e80f54892..e6154850eb3 100644 --- a/arch/arm/src/samv7/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/samv7/sam_oneshot_lowerhalf.c @@ -218,7 +218,7 @@ static int sam_start(FAR struct oneshot_lowerhalf_s *lower, irqstate_t flags; int ret; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL); /* Save the callback information and start the timer */ @@ -336,7 +336,7 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, ret = sam_oneshot_initialize(&priv->oneshot, chan, resolution); if (ret < 0) { - tmrerr("ERROR: Failed to initialized state structure\n"); + tmrerr("ERROR: sam_oneshot_initialize failed: %d\n", ret); kmm_free(priv); return NULL; } diff --git a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c index ae76ffaa806..41426958bcf 100644 --- a/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_oneshot_lowerhalf.c @@ -218,7 +218,7 @@ static int stm32_start(FAR struct oneshot_lowerhalf_s *lower, irqstate_t flags; int ret; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL); /* Save the callback information and start the timer */ @@ -336,7 +336,7 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, ret = stm32_oneshot_initialize(&priv->oneshot, chan, resolution); if (ret < 0) { - tmrerr("ERROR: Failed to initialized state structure\n"); + tmrerr("ERROR: stm32_oneshot_initialize failed: %d\n", ret); kmm_free(priv); return NULL; } diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c index 4d3213ce1b6..8a73130dc7d 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_oneshot_lowerhalf.c @@ -218,7 +218,7 @@ static int stm32l4_start(FAR struct oneshot_lowerhalf_s *lower, irqstate_t flags; int ret; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL); /* Save the callback information and start the timer */ @@ -336,7 +336,7 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, ret = stm32l4_oneshot_initialize(&priv->oneshot, chan, resolution); if (ret < 0) { - tmrerr("ERROR: Failed to initialized state structure\n"); + tmrerr("ERROR: stm32l4_oneshot_initialize failed: %d\n", ret); kmm_free(priv); return NULL; } diff --git a/arch/sim/src/Makefile b/arch/sim/src/Makefile index d669f394218..69d8e85b1e3 100644 --- a/arch/sim/src/Makefile +++ b/arch/sim/src/Makefile @@ -85,6 +85,10 @@ ifeq ($(CONFIG_DEV_CONSOLE),y) HOSTSRCS += up_simuart.c endif +ifeq ($(CONFIG_ONESHOT),y) + CSRCS += up_oneshot.c +endif + ifeq ($(CONFIG_NX_LCDDRIVER),y) CSRCS += board_lcd.c else diff --git a/arch/sim/src/up_oneshot.c b/arch/sim/src/up_oneshot.c new file mode 100644 index 00000000000..8f4a368333e --- /dev/null +++ b/arch/sim/src/up_oneshot.c @@ -0,0 +1,322 @@ +/**************************************************************************** + * arch/sim/src/up_oneshot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of the oneshot timer lower-half driver */ + +struct sim_oneshot_lowerhalf_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. This must be the first thing in this + * structure so that pointers to struct oneshot_lowerhalf_s are cast + * compatible to struct sim_oneshot_lowerhalf_s and vice versa. + */ + + struct oneshot_lowerhalf_s lh; /* Common lower-half driver fields */ + + /* Private lower half data follows */ + + WDOG_ID wdog; /* Simulates oneshot timer */ + oneshot_callback_t callback; /* internal handler that receives callback */ + FAR void *arg; /* Argument that is passed to the handler */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void sim_oneshot_handler(void *arg); + +static int sim_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); +static int sim_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts); +static int sim_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Lower half operations */ + +static const struct oneshot_operations_s g_oneshot_ops = +{ + .max_delay = sim_max_delay, + .start = sim_start, + .cancel = sim_cancel, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sim_oneshot_handler + * + * Description: + * Timer expiration handler + * + * Input Parameters: + * arg - Should be the same argument provided when sim_oneshot_start() + * was called. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void sim_oneshot_handler(void *arg) +{ + FAR struct sim_oneshot_lowerhalf_s *priv = + (FAR struct sim_oneshot_lowerhalf_s *)arg; + oneshot_callback_t callback; + FAR void *cbarg; + + DEBUGASSERT(priv != NULL); + + /* Perhaps the callback was nullified in a race condition with + * sim_cancel? + */ + + if (priv->callback) + { + /* Sample and nullify BEFORE executing callback (in case the callback + * restarts the oneshot). + */ + + callback = priv->callback; + cbarg = priv->arg; + priv->callback = NULL; + priv->arg = NULL; + + /* Then perform the callback */ + + callback(&priv->lh, cbarg); + } +} + +/**************************************************************************** + * Name: sim_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds) + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the maxumum delay. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sim_max_delay(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts) +{ + DEBUGASSERT(lower != NULL && ts != NULL); + + ts->tv_sec = INT_MAX; + ts->tv_nsec = LONG_MAX; + return -ENOSYS; +} + +/**************************************************************************** + * Name: sim_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int sim_start(FAR struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, FAR void *arg, + FAR const struct timespec *ts) +{ + FAR struct sim_oneshot_lowerhalf_s *priv = + (FAR struct sim_oneshot_lowerhalf_s *)lower; + systime_t ticks; + int64_t nsec; + + DEBUGASSERT(priv != NULL && callback != NULL && ts != NULL); + + /* Convert time to ticks */ + + nsec = (int64_t)ts->tv_sec * NSEC_PER_SEC + + (int64_t)ts->tv_nsec; + ticks = (systime_t)((nsec + NSEC_PER_TICK - 1) / NSEC_PER_TICK); + + /* Save the callback information and start the timer */ + + priv->callback = callback; + priv->arg = arg; + + return wd_start(priv->wdog, ticks, (wdentry_t)sim_oneshot_handler, + 1, (wdparm_t)priv); +} + +/**************************************************************************** + * Name: sim_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +static int sim_cancel(FAR struct oneshot_lowerhalf_s *lower, + FAR struct timespec *ts) +{ + FAR struct sim_oneshot_lowerhalf_s *priv = + (FAR struct sim_oneshot_lowerhalf_s *)lower; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Cancel the timer */ + + ret = wd_cancel(priv->wdog); + priv->callback = NULL; + priv->arg = NULL; + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution) +{ + FAR struct sim_oneshot_lowerhalf_s *priv; + + /* Allocate an instance of the lower half driver */ + + priv = (FAR struct sim_oneshot_lowerhalf_s *) + kmm_zalloc(sizeof(struct sim_oneshot_lowerhalf_s)); + + if (priv == NULL) + { + tmrerr("ERROR: Failed to initialized state structure\n"); + return NULL; + } + + /* Initialize the lower-half driver structure */ + + priv->lh.ops = &g_oneshot_ops; + + /* Initialize the contained watchdog timer */ + + priv->wdog = wd_create(); + if (priv->wdog == NULL) + { + tmrerr("ERROR: Failed to create wdog\n"); + kmm_free(priv); + return NULL; + } + + return &priv->lh; +} \ No newline at end of file diff --git a/configs/sim/src/sim_bringup.c b/configs/sim/src/sim_bringup.c index fa8ac5aec23..d222a5b722f 100644 --- a/configs/sim/src/sim_bringup.c +++ b/configs/sim/src/sim_bringup.c @@ -45,6 +45,7 @@ #include #include +#include #include "up_internal.h" #include "sim.h" @@ -67,7 +68,10 @@ int trv_mount_world(int minor, FAR const char *mountpoint); int sim_bringup(void) { -#ifdef CONFIG_FS_PROCFS +#ifdef CONFIG_ONESHOT + FAR struct oneshot_lowerhalf_s *oneshot; +#endif +#if defined(CONFIG_FS_PROCFS) || defined(CONFIG_ONESHOT) int ret; #endif @@ -83,6 +87,25 @@ int sim_bringup(void) (void)sim_gpio_initialize(); #endif +#ifdef CONFIG_ONESHOT + /* Initialize the simulated analog joystick input device */ + + oneshot = oneshot_initialize(0, 0); + if (oneshot == NULL) + { + _err("ERROR: oneshot_initialize faile\n"); + } + else + { + ret = oneshot_register("/dev/oneshot", oneshot); + if (ret < 0) + { + _err("ERROR: Failed to register oneshot at /dev/oneshot: %d\n", + ret); + } + } +#endif + #ifdef CONFIG_AJOYSTICK /* Initialize the simulated analog joystick input device */ From ab16ad753079c122dc22738308f4e4783a05ec1c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 14:19:11 -0600 Subject: [PATCH 026/214] Fix some bugs in the oneshot driver logic --- arch/sim/src/up_oneshot.c | 8 ++++---- drivers/timers/oneshot.c | 5 ++--- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/sim/src/up_oneshot.c b/arch/sim/src/up_oneshot.c index 8f4a368333e..cef9c9b2ea4 100644 --- a/arch/sim/src/up_oneshot.c +++ b/arch/sim/src/up_oneshot.c @@ -77,7 +77,7 @@ struct sim_oneshot_lowerhalf_s * Private Function Prototypes ****************************************************************************/ -static void sim_oneshot_handler(void *arg); +static void sim_oneshot_handler(int argc, wdparm_t arg1, ...); static int sim_max_delay(FAR struct oneshot_lowerhalf_s *lower, FAR struct timespec *ts); @@ -119,14 +119,14 @@ static const struct oneshot_operations_s g_oneshot_ops = * ****************************************************************************/ -static void sim_oneshot_handler(void *arg) +static void sim_oneshot_handler(int argc, wdparm_t arg1, ...) { FAR struct sim_oneshot_lowerhalf_s *priv = - (FAR struct sim_oneshot_lowerhalf_s *)arg; + (FAR struct sim_oneshot_lowerhalf_s *)arg1; oneshot_callback_t callback; FAR void *cbarg; - DEBUGASSERT(priv != NULL); + DEBUGASSERT(argc == 1 && priv != NULL); /* Perhaps the callback was nullified in a race condition with * sim_cancel? diff --git a/drivers/timers/oneshot.c b/drivers/timers/oneshot.c index 975f83bba2b..518071d19db 100644 --- a/drivers/timers/oneshot.c +++ b/drivers/timers/oneshot.c @@ -239,9 +239,8 @@ static int oneshot_ioctl(FAR struct file *filep, int cmd, unsigned long arg) return ret; } - /* Handle built-in ioctl commands */ + /* Handle oneshot timer ioctl commands */ - ret = -EINVAL; switch (cmd) { /* OSIOC_MAXDELAY - Return the maximum delay that can be supported @@ -286,7 +285,7 @@ static int oneshot_ioctl(FAR struct file *filep, int cmd, unsigned long arg) /* Start the oneshot timer */ - ret = ONESHOT_START(priv->od_lower, oneshot_callback, start->arg, + ret = ONESHOT_START(priv->od_lower, oneshot_callback, priv, &start->ts); } break; From afb02b56d48d8732fc28d9122a1989b6a573cfea Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 18:32:37 -0600 Subject: [PATCH 027/214] STM32F3 SPI: Fix the number of bit setting for the F3. It works differently than for other parts. --- arch/arm/src/stm32/chip/stm32_spi.h | 36 ++++++++++++++++------------- arch/arm/src/stm32/stm32_spi.c | 9 +++++++- 2 files changed, 28 insertions(+), 17 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32_spi.h b/arch/arm/src/stm32/chip/stm32_spi.h index bdbabab3346..3df1cec7bcb 100644 --- a/arch/arm/src/stm32/chip/stm32_spi.h +++ b/arch/arm/src/stm32/chip/stm32_spi.h @@ -135,7 +135,11 @@ #define SPI_CR1_SSI (1 << 8) /* Bit 8: Internal slave select */ #define SPI_CR1_SSM (1 << 9) /* Bit 9: Software slave management */ #define SPI_CR1_RXONLY (1 << 10) /* Bit 10: Receive only */ -#define SPI_CR1_DFF (1 << 11) /* Bit 11: Data Frame Format */ +#ifdef CONFIG_STM32_STM32F30XX +# define SPI_CR1_CRCL (1 << 11) /* Bit 11: CRC length */ +#else +# define SPI_CR1_DFF (1 << 11) /* Bit 11: Data Frame Format */ +#endif #define SPI_CR1_CRCNEXT (1 << 12) /* Bit 12: Transmit CRC next */ #define SPI_CR1_CRCEN (1 << 13) /* Bit 13: Hardware CRC calculation enable */ #define SPI_CR1_BIDIOE (1 << 14) /* Bit 14: Output enable in bidirectional mode */ @@ -157,21 +161,21 @@ #define SPI_CR2_TXEIE (1 << 7) /* Bit 7: Tx buffer empty interrupt enable */ #ifdef CONFIG_STM32_STM32F30XX -#define SPI_CR1_DS_SHIFT (8) /* Bits 8-11: Data size */ -#define SPI_CR1_DS_MASK (15 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_4BIT (3 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_5BIT (4 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_6BIT (5 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_7BIT (6 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_8BIT (7 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_9BIT (8 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_10BIT (9 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_11BIT (10 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_12BIT (11 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_13BIT (12 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_14BIT (13 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_15BIT (14 << SPI_CR1_DS_SHIFT) -# define SPI_CR1_DS_16BIT (15 << SPI_CR1_DS_SHIFT) +#define SPI_CR2_DS_SHIFT (8) /* Bits 8-11: Data size */ +#define SPI_CR2_DS_MASK (15 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_4BIT (3 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_5BIT (4 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_6BIT (5 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_7BIT (6 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_8BIT (7 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_9BIT (8 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_10BIT (9 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_11BIT (10 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_12BIT (11 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_13BIT (12 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_14BIT (13 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_15BIT (14 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS_16BIT (15 << SPI_CR2_DS_SHIFT) #define SPI_CR2_FRXTH (1 << 12) /* Bit 12: FIFO reception threshold */ #define SPI_CR2_LDMARX (1 << 13) /* Bit 13: Last DMA transfer for receptione */ #define SPI_CR2_LDMATX (1 << 14) /* Bit 14: Last DMA transfer for transmission */ diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index dd9a2aa7cb6..36902bdb997 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -1151,6 +1151,13 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) if (nbits != priv->nbits) { +#ifdef CONFIG_STM32_STM32F30XX + DEBUGASSERT(nbits >= 8 && nbits <= 16)' + + spi_modifycr1(priv, 0, SPI_CR1_SPE); + spi_modifycr2(priv, SPI_CR2_DS(nbits), SPI_CR2_DS_MASK); + spi_modifycr1(priv, SPI_CR1_SPE, 0); +#else /* Yes... Set CR1 appropriately */ switch (nbits) @@ -1172,7 +1179,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) spi_modifycr1(priv, 0, SPI_CR1_SPE); spi_modifycr1(priv, setbits, clrbits); spi_modifycr1(priv, SPI_CR1_SPE, 0); - +#endif /* Save the selection so the subsequence re-configurations will be faster */ priv->nbits = nbits; From 3383a25c38d93c60315415e840ec019094524a03 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 18:40:25 -0600 Subject: [PATCH 028/214] Some logic missing from last commit --- arch/arm/src/stm32/chip/stm32_spi.h | 27 ++++++++++++++------------- arch/arm/src/stm32/stm32_spi.c | 27 +++++++++++++++++++++++++++ 2 files changed, 41 insertions(+), 13 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32_spi.h b/arch/arm/src/stm32/chip/stm32_spi.h index 3df1cec7bcb..2dbaefc344e 100644 --- a/arch/arm/src/stm32/chip/stm32_spi.h +++ b/arch/arm/src/stm32/chip/stm32_spi.h @@ -163,6 +163,7 @@ #ifdef CONFIG_STM32_STM32F30XX #define SPI_CR2_DS_SHIFT (8) /* Bits 8-11: Data size */ #define SPI_CR2_DS_MASK (15 << SPI_CR2_DS_SHIFT) +# define SPI_CR2_DS(n) ((uint32_t)((n) - 1) << SPI_CR2_DS_SHIFT) # define SPI_CR2_DS_4BIT (3 << SPI_CR2_DS_SHIFT) # define SPI_CR2_DS_5BIT (4 << SPI_CR2_DS_SHIFT) # define SPI_CR2_DS_6BIT (5 << SPI_CR2_DS_SHIFT) @@ -199,22 +200,22 @@ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ defined(CONFIG_STM32_STM32F40XX) -# define SPI_SR_TIFRFE (1 << 8) /* Bit 8: TI frame format error */ +# define SPI_SR_FRE (1 << 8) /* Bit 8: TI frame format error */ #endif #ifdef CONFIG_STM32_STM32F30XX -#define SPI_CR1_FRLVL_SHIFT (9) /* Bits 9-10: FIFO reception level */ -#define SPI_CR1_FRLVL_MASK (3 << SPI_CR1_FRLVL_SHIFT) -# define SPI_CR1_FRLVL_EMPTY (0 << SPI_CR1_FRLVL_SHIFT) /* FIFO empty */ -# define SPI_CR1_FRLVL_QUARTER (1 << SPI_CR1_FRLVL_SHIFT) /* 1/4 FIFO */ -# define SPI_CR1_FRLVL_HALF (2 << SPI_CR1_FRLVL_SHIFT) /* 1/2 FIFO */ -# define SPI_CR1_FRLVL_FULL (3 << SPI_CR1_FRLVL_SHIFT) /* FIFO full */ -#define SPI_CR1_FTLVL_SHIFT (11) /* Bits 11-12: FIFO transmission level */ -#define SPI_CR1_FTLVL_MASK (3 << SPI_CR1_FTLVL_SHIFT) -# define SPI_CR1_FTLVL_EMPTY (0 << SPI_CR1_FTLVL_SHIFT) /* FIFO empty */ -# define SPI_CR1_FTLVL_QUARTER (1 << SPI_CR1_FTLVL_SHIFT) /* 1/4 FIFO */ -# define SPI_CR1_FTLVL_HALF (2 << SPI_CR1_FTLVL_SHIFT) /* 1/2 FIFO */ -# define SPI_CR1_FTLVL_FULL (3 << SPI_CR1_FTLVL_SHIFT) /* FIFO full */ +#define SPI_SR_FRLVL_SHIFT (9) /* Bits 9-10: FIFO reception level */ +#define SPI_SR_FRLVL_MASK (3 << SPI_SR_FRLVL_SHIFT) +# define SPI_SR_FRLVL_EMPTY (0 << SPI_SR_FRLVL_SHIFT) /* FIFO empty */ +# define SPI_SR_FRLVL_QUARTER (1 << SPI_SR_FRLVL_SHIFT) /* 1/4 FIFO */ +# define SPI_SR_FRLVL_HALF (2 << SPI_SR_FRLVL_SHIFT) /* 1/2 FIFO */ +# define SPI_SR_FRLVL_FULL (3 << SPI_SR_FRLVL_SHIFT) /* FIFO full */ +#define SPI_SR_FTLVL_SHIFT (11) /* Bits 11-12: FIFO transmission level */ +#define SPI_SR_FTLVL_MASK (3 << SPI_SR_FTLVL_SHIFT) +# define SPI_SR_FTLVL_EMPTY (0 << SPI_SR_FTLVL_SHIFT) /* FIFO empty */ +# define SPI_SR_FTLVL_QUARTER (1 << SPI_SR_FTLVL_SHIFT) /* 1/4 FIFO */ +# define SPI_SR_FTLVL_HALF (2 << SPI_SR_FTLVL_SHIFT) /* 1/2 FIFO */ +# define SPI_SR_FTLVL_FULL (3 << SPI_SR_FTLVL_SHIFT) /* FIFO full */ #endif /* I2S configuration register */ diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index 36902bdb997..cd3d55c4935 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -906,6 +906,33 @@ static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, uin spi_putreg(priv, STM32_SPI_CR1_OFFSET, cr1); } +/************************************************************************************ + * Name: spi_modifycr2 + * + * Description: + * Clear and set bits in the CR2 register + * + * Input Parameters: + * priv - Device-specific state data + * clrbits - The bits to clear + * setbits - The bits to set + * + * Returned Value: + * None + * + ************************************************************************************/ + +#ifdef CONFIG_STM32_STM32F30XX +static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits, uint16_t clrbits) +{ + uint16_t cr2; + cr2 = spi_getreg(priv, STM32_SPI_CR2_OFFSET); + cr2 &= ~clrbits; + cr2 |= setbits; + spi_putreg(priv, STM32_SPI_CR2_OFFSET, cr2); +} +#endif + /************************************************************************************ * Name: spi_lock * From 10f90a1738864c912852bca0b97931bae6931e2f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 12 Aug 2016 19:00:34 -0600 Subject: [PATCH 029/214] STM32 F3: Fix more SPI issues --- arch/arm/src/stm32/stm32_spi.c | 50 ++++++++++++++++++++++++++++-- arch/arm/src/stm32l4/stm32l4_spi.c | 17 +--------- 2 files changed, 49 insertions(+), 18 deletions(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index cd3d55c4935..f42ae0c3e6f 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -624,7 +624,11 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word) static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv) { +#ifdef CONFIG_STM32_STM32F30XX + return (priv->nbits > 8); +#else return ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_DFF) != 0); +#endif } /************************************************************************************ @@ -1179,10 +1183,32 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) if (nbits != priv->nbits) { #ifdef CONFIG_STM32_STM32F30XX - DEBUGASSERT(nbits >= 8 && nbits <= 16)' + /* Yes... Set CR2 appropriately */ + /* Set the number of bits (valid range 4-16) */ + + if (nbits < 4 || nbits > 16) + { + return; + } + + clrbits = SPI_CR2_DS_MASK; + setbits = SPI_CR2_DS(nbits); + + /* If nbits is <=8, then we are in byte mode and FRXTH shall be set + * (else, transaction will not complete). + */ + + if (nbits < 9) + { + setbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 1 byte */ + } + else + { + clrbits |= SPI_CR2_FRXTH; /* RX FIFO Threshold = 2 bytes */ + } spi_modifycr1(priv, 0, SPI_CR1_SPE); - spi_modifycr2(priv, SPI_CR2_DS(nbits), SPI_CR2_DS_MASK); + spi_modifycr2(priv, setbits, clearbits); spi_modifycr1(priv, SPI_CR1_SPE, 0); #else /* Yes... Set CR1 appropriately */ @@ -1541,6 +1567,25 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv) uint16_t setbits; uint16_t clrbits; +#ifdef CONFIG_STM32_STM32F30XX + /* Configure CR1 and CR2. Default configuration: + * Mode 0: CR1.CPHA=0 and CR1.CPOL=0 + * Master: CR1.MSTR=1 + * 8-bit: CR2.DS=7 + * MSB tranmitted first: CR1.LSBFIRST=0 + * Replace NSS with SSI & SSI=1: CR1.SSI=1 CR1.SSM=1 (prevents MODF error) + * Two lines full duplex: CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) and CR1.RXONLY=0 + */ + + clrbits = SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_BR_MASK | SPI_CR1_LSBFIRST | + SPI_CR1_RXONLY | SPI_CR1_CRCL | SPI_CR1_BIDIOE | SPI_CR1_BIDIMODE; + setbits = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM; + spi_modifycr1(priv, setbits, clrbits); + + clrbits = SPI_CR2_DS_MASK; + setbits = SPI_CR2_DS_8BIT | SPI_CR2_FRXTH; /* FRXTH must be high in 8-bit mode */ + spi_modifycr2(priv, setbits, clrbits); +#else /* Configure CR1. Default configuration: * Mode 0: CPHA=0 and CPOL=0 * Master: MSTR=1 @@ -1554,6 +1599,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv) SPI_CR1_RXONLY | SPI_CR1_DFF | SPI_CR1_BIDIOE | SPI_CR1_BIDIMODE; setbits = SPI_CR1_MSTR | SPI_CR1_SSI | SPI_CR1_SSM; spi_modifycr1(priv, setbits, clrbits); +#endif priv->frequency = 0; priv->nbits = 8; diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c index a241f63ce29..0be7c3df16e 100644 --- a/arch/arm/src/stm32l4/stm32l4_spi.c +++ b/arch/arm/src/stm32l4/stm32l4_spi.c @@ -567,22 +567,7 @@ static inline void spi_writebyte(FAR struct stm32l4_spidev_s *priv, uint8_t byte static inline bool spi_16bitmode(FAR struct stm32l4_spidev_s *priv) { - uint8_t bits = priv->nbits; - - /* Get the real number of bits */ - - if (bits < 0) - { - bits = -bits; - } - - return (bits > 8); - - /* Should we read the hardware regs? seems to be equivalent ~~ sebastien lorquet - * (20160413) - */ - -// return ((spi_getreg(priv, STM32L4_SPI_CR2_OFFSET) & SPI_CR2_DS_MASK) == SPI_CR2_DS_16BIT); + return (priv->nbits > 8); } /************************************************************************************ From da5563c0e7cd4858ae73163a26cd4544229e3a97 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 06:43:13 -0600 Subject: [PATCH 030/214] STM32: Add conditional logic for STM32F37xx --- arch/arm/src/stm32/chip/stm32_spi.h | 23 +++++++++++------------ arch/arm/src/stm32/stm32_spi.c | 18 ++++++++++-------- 2 files changed, 21 insertions(+), 20 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32_spi.h b/arch/arm/src/stm32/chip/stm32_spi.h index 2dbaefc344e..3e0a086b63c 100644 --- a/arch/arm/src/stm32/chip/stm32_spi.h +++ b/arch/arm/src/stm32/chip/stm32_spi.h @@ -66,7 +66,7 @@ #define STM32_SPI_TXCRCR_OFFSET 0x0018 /* SPI Tx CRC register (16-bit) */ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define STM32_SPI_I2SCFGR_OFFSET 0x001c /* I2S configuration register */ # define STM32_SPI_I2SPR_OFFSET 0x0020 /* I2S prescaler register */ #endif @@ -92,7 +92,7 @@ # define STM32_SPI2_RXCRCR (STM32_SPI2_BASE+STM32_SPI_RXCRCR_OFFSET) # define STM32_SPI2_TXCRCR (STM32_SPI2_BASE+STM32_SPI_TXCRCR_OFFSET) #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define STM32_SPI2_I2SCFGR (STM32_SPI2_BASE+STM32_SPI_I2SCFGR_OFFSET) # define STM32_SPI2_I2SPR (STM32_SPI2_BASE+STM32_SPI_I2SPR_OFFSET) # endif @@ -107,7 +107,7 @@ # define STM32_SPI3_RXCRCR (STM32_SPI3_BASE+STM32_SPI_RXCRCR_OFFSET) # define STM32_SPI3_TXCRCR (STM32_SPI3_BASE+STM32_SPI_TXCRCR_OFFSET) #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define STM32_SPI3_I2SCFGR (STM32_SPI3_BASE+STM32_SPI_I2SCFGR_OFFSET) # define STM32_SPI3_I2SPR (STM32_SPI3_BASE+STM32_SPI_I2SPR_OFFSET) # endif @@ -135,7 +135,7 @@ #define SPI_CR1_SSI (1 << 8) /* Bit 8: Internal slave select */ #define SPI_CR1_SSM (1 << 9) /* Bit 9: Software slave management */ #define SPI_CR1_RXONLY (1 << 10) /* Bit 10: Receive only */ -#ifdef CONFIG_STM32_STM32F30XX +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) # define SPI_CR1_CRCL (1 << 11) /* Bit 11: CRC length */ #else # define SPI_CR1_DFF (1 << 11) /* Bit 11: Data Frame Format */ @@ -152,7 +152,7 @@ #define SPI_CR2_SSOE (1 << 2) /* Bit 2: SS Output Enable */ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define SPI_CR2_FRF (1 << 4) /* Bit 4: Frame format */ #endif @@ -160,7 +160,7 @@ #define SPI_CR2_RXNEIE (1 << 6) /* Bit 6: RX buffer not empty interrupt enable */ #define SPI_CR2_TXEIE (1 << 7) /* Bit 7: Tx buffer empty interrupt enable */ -#ifdef CONFIG_STM32_STM32F30XX +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) #define SPI_CR2_DS_SHIFT (8) /* Bits 8-11: Data size */ #define SPI_CR2_DS_MASK (15 << SPI_CR2_DS_SHIFT) # define SPI_CR2_DS(n) ((uint32_t)((n) - 1) << SPI_CR2_DS_SHIFT) @@ -188,7 +188,7 @@ #define SPI_SR_TXE (1 << 1) /* Bit 1: Transmit buffer empty */ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define SPI_SR_CHSIDE (1 << 2) /* Bit 2: Channel side */ # define SPI_SR_UDR (1 << 3) /* Bit 3: Underrun flag */ #endif @@ -199,11 +199,11 @@ #define SPI_SR_BSY (1 << 7) /* Bit 7: Busy flag */ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define SPI_SR_FRE (1 << 8) /* Bit 8: TI frame format error */ #endif -#ifdef CONFIG_STM32_STM32F30XX +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) #define SPI_SR_FRLVL_SHIFT (9) /* Bits 9-10: FIFO reception level */ #define SPI_SR_FRLVL_MASK (3 << SPI_SR_FRLVL_SHIFT) # define SPI_SR_FRLVL_EMPTY (0 << SPI_SR_FRLVL_SHIFT) /* FIFO empty */ @@ -221,7 +221,7 @@ /* I2S configuration register */ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define SPI_I2SCFGR_CHLEN (1 << 0) /* Bit 0: Channel length (number of bits per audio channel) */ # define SPI_I2SCFGR_DATLEN_SHIFT (1) /* Bit 1-2: Data length to be transferred */ # define SPI_I2SCFGR_DATLEN_MASK (3 << SPI_I2SCFGR_DATLEN_SHIFT) @@ -249,7 +249,7 @@ /* I2S prescaler register */ #if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F40XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32F40XX) # define SPI_I2SPR_I2SDIV_SHIFT (0) /* Bit 0-7: I2S Linear prescaler */ # define SPI_I2SPR_I2SDIV_MASK (0xff << SPI_I2SPR_I2SDIV_SHIFT) # define SPI_I2SPR_ODD (1 << 8) /* Bit 8: Odd factor for the prescaler */ @@ -257,4 +257,3 @@ #endif #endif /* __ARCH_ARM_STC_STM32_CHIP_STM32_SPI_H */ - diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index f42ae0c3e6f..f8936e2e4d9 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -132,8 +132,8 @@ /* DMA channel configuration */ -#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F37XX) +#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) || \ + defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) # define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC ) # define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC ) # define SPI_RXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS ) @@ -624,7 +624,7 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word) static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv) { -#ifdef CONFIG_STM32_STM32F30XX +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) return (priv->nbits > 8); #else return ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_DFF) != 0); @@ -901,7 +901,8 @@ static inline void spi_dmatxstart(FAR struct stm32_spidev_s *priv) * ************************************************************************************/ -static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, uint16_t clrbits) +static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, + uint16_t clrbits) { uint16_t cr1; cr1 = spi_getreg(priv, STM32_SPI_CR1_OFFSET); @@ -926,8 +927,9 @@ static void spi_modifycr1(FAR struct stm32_spidev_s *priv, uint16_t setbits, uin * ************************************************************************************/ -#ifdef CONFIG_STM32_STM32F30XX -static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits, uint16_t clrbits) +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) +static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits, + uint16_t clrbits) { uint16_t cr2; cr2 = spi_getreg(priv, STM32_SPI_CR2_OFFSET); @@ -1182,7 +1184,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) if (nbits != priv->nbits) { -#ifdef CONFIG_STM32_STM32F30XX +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) /* Yes... Set CR2 appropriately */ /* Set the number of bits (valid range 4-16) */ @@ -1567,7 +1569,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv) uint16_t setbits; uint16_t clrbits; -#ifdef CONFIG_STM32_STM32F30XX +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) /* Configure CR1 and CR2. Default configuration: * Mode 0: CR1.CPHA=0 and CR1.CPOL=0 * Master: CR1.MSTR=1 From 805cb5c75240a4ee32c1e17e3dee68fc5ec1e522 Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Sat, 13 Aug 2016 07:23:48 -0600 Subject: [PATCH 031/214] STM32F3 SPI: Fix a typo --- arch/arm/src/stm32/stm32_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index f8936e2e4d9..050a4b36180 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -1210,7 +1210,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) } spi_modifycr1(priv, 0, SPI_CR1_SPE); - spi_modifycr2(priv, setbits, clearbits); + spi_modifycr2(priv, setbits, clrbits); spi_modifycr1(priv, SPI_CR1_SPE, 0); #else /* Yes... Set CR1 appropriately */ From efc9f674d216f6e8897791b82ca6940fed7b2701 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 07:50:54 -0600 Subject: [PATCH 032/214] Trivial changes to comments and spacing --- arch/arm/src/stm32/stm32_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index 050a4b36180..1c81340a5ba 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -932,7 +932,7 @@ static void spi_modifycr2(FAR struct stm32_spidev_s *priv, uint16_t setbits, uint16_t clrbits) { uint16_t cr2; - cr2 = spi_getreg(priv, STM32_SPI_CR2_OFFSET); + cr2 = spi_getreg(priv, STM32_SPI_CR2_OFFSET); cr2 &= ~clrbits; cr2 |= setbits; spi_putreg(priv, STM32_SPI_CR2_OFFSET, cr2); @@ -1196,7 +1196,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) clrbits = SPI_CR2_DS_MASK; setbits = SPI_CR2_DS(nbits); - /* If nbits is <=8, then we are in byte mode and FRXTH shall be set + /* If nbits is <=8, then we are in byte mode and FRXTH must be set * (else, transaction will not complete). */ From 42202c6365f1a2b941dd17c2b1eb010f30ba615c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 08:01:41 -0600 Subject: [PATCH 033/214] STM32 and STM32L4: Enabling DMA loses other bits in CR2 --- arch/arm/src/stm32/stm32_spi.c | 2 +- arch/arm/src/stm32l4/stm32l4_spi.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index 1c81340a5ba..b925e3a97fd 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -1637,7 +1637,7 @@ static void spi_bus_initialize(FAR struct stm32_spidev_s *priv) priv->txdma = stm32_dmachannel(priv->txch); DEBUGASSERT(priv->rxdma && priv->txdma); - spi_putreg(priv, STM32_SPI_CR2_OFFSET, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN); + spi_modifycr2(priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0); #endif /* Enable spi */ diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c index 0be7c3df16e..b6b2774d22c 100644 --- a/arch/arm/src/stm32l4/stm32l4_spi.c +++ b/arch/arm/src/stm32l4/stm32l4_spi.c @@ -840,7 +840,8 @@ static inline void spi_dmatxstart(FAR struct stm32l4_spidev_s *priv) * ************************************************************************************/ -static void spi_modifycr(uint32_t addr, FAR struct stm32l4_spidev_s *priv, uint16_t setbits, uint16_t clrbits) +static void spi_modifycr(uint32_t addr, FAR struct stm32l4_spidev_s *priv, + uint16_t setbits, uint16_t clrbits) { uint16_t cr; @@ -1533,7 +1534,7 @@ static void spi_bus_initialize(FAR struct stm32l4_spidev_s *priv) priv->txdma = stm32l4_dmachannel(priv->txch); DEBUGASSERT(priv->rxdma && priv->txdma); - spi_putreg(priv, STM32L4_SPI_CR2_OFFSET, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN); + spi_modifycr(STM32L4_SPI_CR2_OFFSET, priv, SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN, 0); #endif /* Enable spi */ From 51fcd89b9837ed7056f02ddf6dd00b17dee62ff9 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 08:31:37 -0600 Subject: [PATCH 034/214] Add and fix some SPI debug output --- arch/arm/src/stm32/stm32_spi.c | 7 ++----- arch/arm/src/stm32l4/stm32l4_spi.c | 9 ++------- 2 files changed, 4 insertions(+), 12 deletions(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index b925e3a97fd..ab7d01ebeef 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -508,10 +508,6 @@ static struct stm32_spidev_s g_spi6dev = }; #endif -/************************************************************************************ - * Public Data - ************************************************************************************/ - /************************************************************************************ * Private Functions ************************************************************************************/ @@ -1190,6 +1186,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) if (nbits < 4 || nbits > 16) { + spierr("ERROR: nbits out of range: %d\n", nbits); return; } @@ -1814,7 +1811,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus) else #endif { - spierr("ERROR: Unsupbused SPI bus: %d\n", bus); + spierr("ERROR: Unsupported SPI bus: %d\n", bus); return NULL; } diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c index b6b2774d22c..7cd6f3268ec 100644 --- a/arch/arm/src/stm32l4/stm32l4_spi.c +++ b/arch/arm/src/stm32l4/stm32l4_spi.c @@ -358,12 +358,6 @@ static struct stm32l4_spidev_s g_spi3dev = }; #endif -/*endif?*/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - /************************************************************************************ * Private Functions ************************************************************************************/ @@ -1103,6 +1097,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) if (nbits < 4 || nbits > 16) { + spierr("ERROR: nbits out of range: %d\n", nbits); return; } @@ -1639,7 +1634,7 @@ FAR struct spi_dev_s *stm32l4_spibus_initialize(int bus) else #endif { - spierr("ERROR: Unsupbused SPI bus: %d\n", bus); + spierr("ERROR: Unsupported SPI bus: %d\n", bus); return NULL; } From 172761163b548baee5d644cad55c84989e009831 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 10:11:23 -0600 Subject: [PATCH 035/214] STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing. --- arch/arm/src/stm32/stm32_spi.c | 49 ++++++++++++++++++++++++++++++++-- 1 file changed, 47 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index ab7d01ebeef..a018c31cc2f 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -195,6 +195,10 @@ struct stm32_spidev_s static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset); static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset, uint16_t value); +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) +static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset, + uint8_t value); +#endif static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv); static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t byte); static inline bool spi_16bitmode(FAR struct stm32_spidev_s *priv); @@ -553,6 +557,30 @@ static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset, u putreg16(value, priv->spibase + offset); } +/************************************************************************************ + * Name: spi_putreg8 + * + * Description: + * Write an 8-bit value to the SPI register at offset + * + * Input Parameters: + * priv - private SPI device structure + * offset - offset to the register of interest + * value - the 16-bit value to be written + * + * Returned Value: + * The contents of the 16-bit register + * + ************************************************************************************/ + +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) +static inline void spi_putreg8(FAR struct stm32_spidev_s *priv, uint8_t offset, + uint8_t value) +{ + putreg8(value, priv->spibase + offset); +} +#endif + /************************************************************************************ * Name: spi_readword * @@ -599,9 +627,26 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word) while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) == 0); - /* Then send the byte */ + /* Then send the word */ - spi_putreg(priv, STM32_SPI_DR_OFFSET, word); +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) + /* "When the data frame size fits into one byte (less than or equal to 8 bits), + * data packing is used automatically when any read or write 16-bit access is + * performed on the SPIx_DR register. The double data frame pattern is handled + * in parallel in this case. At first, the SPI operates using the pattern + * stored in the LSB of the accessed word, then with the other half stored in + * the MSB." + */ + + if (priv->nbits < 9) + { + spi_putreg8(priv, STM32_SPI_DR_OFFSET, (uint8_t)word); + } + else +#endif + { + spi_putreg(priv, STM32_SPI_DR_OFFSET, word); + } } /************************************************************************************ From eed5e416267c2b13a958165fb6d5cb72a1689c21 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 10:24:40 -0600 Subject: [PATCH 036/214] Add some comments --- arch/arm/src/stm32/stm32_spi.c | 33 ++++++++++++++++++++++++++++----- 1 file changed, 28 insertions(+), 5 deletions(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index a018c31cc2f..6df127dd771 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -603,6 +603,20 @@ static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv) /* Then return the received byte */ +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) + /* "When the data frame size fits into one byte (less than or equal to 8 bits), + * data packing is used automatically when any read or write 16-bit access is + * performed on the SPIx_DR register. The double data frame pattern is handled + * in parallel in this case. At first, the SPI operates using the pattern + * stored in the LSB of the accessed word, then with the other half stored in + * the MSB.... The receiver then has to access both data frames by a single + * 16-bit read of SPIx_DR as a response to this single RXNE event. The RxFIFO + * threshold setting and the following read access must be always kept aligned + * at the receiver side, as data can be lost if it is not in line." + */ + + /* REVISIT */ +#endif return spi_getreg(priv, STM32_SPI_DR_OFFSET); } @@ -631,11 +645,20 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16_t word) #if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) /* "When the data frame size fits into one byte (less than or equal to 8 bits), - * data packing is used automatically when any read or write 16-bit access is - * performed on the SPIx_DR register. The double data frame pattern is handled - * in parallel in this case. At first, the SPI operates using the pattern - * stored in the LSB of the accessed word, then with the other half stored in - * the MSB." + * data packing is used automatically when any read or write 16-bit access is + * performed on the SPIx_DR register. The double data frame pattern is handled + * in parallel in this case. At first, the SPI operates using the pattern + * stored in the LSB of the accessed word, then with the other half stored in + * the MSB... + * + * "A specific problem appears if an odd number of such "fit into one byte" + * data frames must be handled. On the transmitter side, writing the last + * data frame of any odd sequence with an 8-bit access to SPIx_DR is enough. + * ..." + * + * REVISIT: "...The receiver has to change the Rx_FIFO threshold level for the + * last data frame received in the odd sequence of frames in order to generate + * the RXNE event." */ if (priv->nbits < 9) From 1a10518daeaca215500a6adcd5790292934b5b52 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 12:03:12 -0600 Subject: [PATCH 037/214] Update ChangeLog --- ChangeLog | 83 ++++++++++++++++++++++++++++++++++ arch/arm/src/stm32/stm32_spi.c | 3 ++ 2 files changed, 86 insertions(+) diff --git a/ChangeLog b/ChangeLog index f296c8b6254..716f99760c7 100755 --- a/ChangeLog +++ b/ChangeLog @@ -12486,3 +12486,86 @@ 2016-08-01). * drivers/sensors: Add KXJT9 Accelerometer driver from the Motorola Moto Z MDK (2016-08-02). + * arch/arm/sim: Add a simulated I/O Expander driver (2016-08-03). + * configs/sim: Add logic to set the simulated I/O expander for testing + with apps/examples/gpio (2016-08-03). + * fs/fat: FAT performance improvement. In large files, seeking to a + position from the beginning of the file can be very time consuming. + ftell does lssek(fd, 0, SET_CURR). In that case, that is wasted time + since we are going to seek to the same position. This fix short- + circutes fat_seek() in all cases where we attempt to seek to current + position. Suggested by Nate Weibley (2016-08-03). + * tools/sethost.sh: Add sethost.sh. This is a script that you can use + to quickly change the host platform from Linux to Windows/Cygwin. + Might save you a lot of headaches (2016-08-03). + * arch/arm/src/tiva: Add tiva PWM lower-half driver implementation. + From Young (2016-08-05). + * drivers/spi/spi_transfer.c: Add a helper function that encapsulates + and manages a sequence of SPI transfers (2016-08-05). + * drivers/spi: Add an SPI character driver that will permit access to + the SPI bus for testing purposes. This driver is a simple wrapper + around spi_transfer() (2016-08-05). + * drivers/wireless: Add MFRC522 RFID ISO14443 and Mifare transceiver + driver. From Alan Carvalho de Assis (2016-08-06). + * configs/stm32f103-minimum: Add board support to MFRC522 driver. From + Alan Carvalho de Assis (2016-08-06). + * arch/renesas: Rename arch/sh to arch/renesas (2016-08-06). + * arch/arm/src/efm32, stm32, stm32l4: STM32 and EFM32 SPI drivers + adopted an incompatible conventions somewhere along the line. The + set the number of bits to negative when calling SPI_SETBITS which had + the magical side-effect of setting LSB first order of bit + transmission. This is not only a hokey way to pass control + information but is supported by no other SPI drivers. This change + three things: (1) It adds HWFEAT_LSBFIRST as a new H/W feature. + (2) It changes the implementations of SPI_SETBITS in the STM32 and + EFM32 derivers so that negated bit numbers are simply errors and it + adds the SPI_HWFEATURES method that can set the LSB bit order, and + (3) It changes all calls with negative number of bits from all + drivers: The number of bits is now always positive and SPI_HWFEATURES + is called with HWFEAT_LSBFIRST to set the bit order (2016-08-08). + * arch/arm/src/stm32: Add missing SPI2 and SPI3 support for STM32F3F3. + Add STM32F37XX DMA channel configuration. For STM32F37XX, + SYSCFG_EXTICR_PORTE defined twice. From Alan Carvalho de Assis + (2016-08-08). + * arch/arm/src/stm32: Make stm32_pwr_enablebkp thread safe. From + Max Neklyudov (2016-08-09). + * arch/arm/src/stm32: SAM3/4 GPIO: Enable peripheral clock for GPIO port + when GPIO is configured as input. The value of a GPIO input is only + sampled when the peripheral clock for the port controller the GPIO + resides in is enabled. Therefore we need to enable the clock even when + polling a GPIO. From Wolfgang Reissnegger (2016-08-09). + * arch/arm/src/tiva: Fix two bugs of tiva pwm lower-half driver + implementation. From Young (2016-08-10). + * sched/group: Explicitly initialize the group tg_exitsem with + sem_init(). The existing logic worked because the correct + initialization value is all zero, but it is better to initialize the + semaphore explicitly (2016-08-10). + * arch/arm/stm32: Fix bad pllmul values for STM32F1XX connectivity line. + STM32F1XX connectivity line supports only x4, x5, x6, x7, x8, x9 and + x6.5 values. From Michał Łyszczek (2016-08-11). + * include/nuttx/timers: Add oneshot timer lower half interface + (2016-08-11). + * arch/arm/src/stm32: Add a experimental oneshot, lower-half driver for + STM32 (2016-08-11). + * arch/arm/src/samv7: Add option to support oneshot timer without free- + running timer. Add oneshot lower half driver (2016-08-11). + * arch/arm/src/sama5: Add option to support oneshot timer without free- + running timer. Add oneshot lower half driver (2016-08-11). + * arch/arm/src/sam34: SAM4CM: Add option to support oneshot timer without + free-running timer. Add oneshot lower half driver (2016-08-11). + * arch/arm/src/stm32l4: Add oneshot lower half driver (2016-08-11). + * libc/stdlib: strtod() was not returning endptr on error conditions + (2016-08-11). + * libc/math: floor(), floorf(), and floorl(): Fix logic error. Was not + correctly handling negative integral value (2016-08-11). + * configs/sim: Add a configuration useful for testing Mini Basic + (2016-08-12). + * drivers/timers: Add an upper-half, oneshot timer character driver + (2016-08-12). + * arch/sim/src: Add a simulated oneshot lowerhalf driver (2016-08-12). + * arch/arm/src/stm32: STM32F3 SPI: Fix the number of bit setting for + the F3. It works differently than for other STM32 parts (2016-08-12). + * arch/arm/stm32 and stm32l4: Enabling SPI DMA loses other bits in CR2 + (2016-08-13). + * arch/arm/src/stm32: STM32F3 SPI: Cannot write always 16-bit value to + DR register because of how the F3 implements data packing (2016-08-13). diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index 6df127dd771..f0173cadda6 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -1401,6 +1401,9 @@ static uint16_t spi_send(FAR struct spi_dev_s *dev, uint16_t wd) * Description: * Exchange a block of data on SPI without using DMA * + * REVISIT: This function could be much more efficient by exploiting (1) RX and TX + * FIFOs and (2) the STM32 F3 data packing. + * * Input Parameters: * dev - Device-specific state data * txbuffer - A pointer to the buffer of data to be sent From 5a97def131785884b3484e8e6972997af2b04814 Mon Sep 17 00:00:00 2001 From: v01d Date: Sat, 13 Aug 2016 18:48:45 -0300 Subject: [PATCH 038/214] kinetis k20 i2c fixed --- arch/arm/src/kinetis/kinetis_i2c.c | 58 +++++++++++++----------------- 1 file changed, 25 insertions(+), 33 deletions(-) diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 8bfc75b928a..7ae099a6857 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -290,37 +290,31 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) { - struct i2c_msg_s *msg; - irqstate_t flags; + struct i2c_msg_s *msg; msg = priv->msgs; - i2cinfo("start"); - - flags = enter_critical_section(); - /* now take control of the bus */ if (getreg8(KINETIS_I2C0_C1) & I2C_C1_MST) { /* we are already the bus master, so send a repeated start */ putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_RSTA | I2C_C1_TX, KINETIS_I2C0_C1); -#if 0 - putreg8(I2C_C1_IICEN | I2C_C1_IICIE, KINETIS_I2C0_C1); /* DEBUG: stop + start */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); -#endif } else { /* we are not currently the bus master, so wait for bus ready */ while (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY); - + /* become the bus master in transmit mode (send start) */ putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); } - /* wait until start condition establishes control of the bus */ - while (1) { - if (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY) break; + if (I2C_M_READ & msg->flags) /* DEBUG: should happen always */ + { + /* wait until start condition establishes control of the bus */ + while (1) { + if (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY) break; + } } /* initiate actual transfer (send address) */ @@ -328,8 +322,6 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr), KINETIS_I2C0_D); - leave_critical_section(flags); - return OK; } @@ -459,8 +451,12 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) /* actually intending to read (address was just sent) */ else { - regval &= ~I2C_C1_TX; - putreg8(regval, KINETIS_I2C0_C1); /* go to RX mode */ + if (msg->length == 1) /* go to RX mode, do not send ACK */ + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C0_C1); + else /* go to RX mode */ + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST, KINETIS_I2C0_C1); + + /* TODO: handle zero-length reads */ dummy = getreg8(KINETIS_I2C0_D); /* dummy read to initiate reception */ } @@ -473,8 +469,7 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) if (priv->rdcnt == (msg->length - 1)) { /* go to TX mode before last read, otherwise a new read is triggered */ - regval |= I2C_C1_TX; - putreg8(regval, KINETIS_I2C0_C1); + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); /* go to TX mode */ msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); priv->rdcnt++; @@ -485,9 +480,7 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) else if (priv->rdcnt == (msg->length - 2)) { /* Do not ACK any more */ - regval = getreg8(KINETIS_I2C0_C1); - regval |= I2C_C1_TXAK; - putreg8(regval, KINETIS_I2C0_C1); + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C0_C1); msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); priv->rdcnt++; @@ -523,9 +516,6 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, sem_wait(&priv->mutex); /* Set up for the transfer */ - - priv->wrcnt = 0; - priv->rdcnt = 0; priv->msgs = msgs; priv->nmsg = count; priv->state = STATE_OK; @@ -544,20 +534,22 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, /* Process every message */ while (priv->nmsg && priv->state == STATE_OK) { + priv->wrcnt = 0; + priv->rdcnt = 0; + /* Initiate the transfer */ kinetis_i2c_start(priv); /* wait for transfer complete */ wd_start(priv->timeout, I2C_TIMEOUT, kinetis_i2c_timeout, 1, (uint32_t)priv); - sem_wait(&priv->wait); + sem_wait(&priv->wait); wd_cancel(priv->timeout); - - /* Process next message */ - if (priv->state == STATE_OK) - kinetis_i2c_nextmsg(priv); } + /* disable interrupts */ + putreg8(I2C_C1_IICEN, KINETIS_I2C0_C1); + /* release access to I2C bus */ sem_post(&priv->mutex); @@ -636,8 +628,8 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) kinetis_pinconfig(PIN_I2C0_SCL); kinetis_pinconfig(PIN_I2C0_SDA); - /* Enable (with interrupts) */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE, KINETIS_I2C0_C1); + /* Enable */ + putreg8(I2C_C1_IICEN, KINETIS_I2C0_C1); /* High-drive select (TODO: why)? */ regval = getreg8(KINETIS_I2C0_C2); From 2743df1e644f0e9f7cf2e4aee912736949c8c91c Mon Sep 17 00:00:00 2001 From: v01d Date: Sat, 13 Aug 2016 18:57:50 -0300 Subject: [PATCH 039/214] teensy 3.x i2c --- configs/teensy-3.x/include/board.h | 8 ++++---- configs/teensy-3.x/src/k20_i2c.c | 32 ++++++------------------------ configs/teensy-3.x/src/teensy-3x.h | 3 +++ 3 files changed, 13 insertions(+), 30 deletions(-) diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h index d0c5c0002ba..b95734a04af 100644 --- a/configs/teensy-3.x/include/board.h +++ b/configs/teensy-3.x/include/board.h @@ -234,11 +234,11 @@ #ifdef CONFIG_KINETIS_I2C0 #ifdef CONFIG_TEENSY_3X_I2C_ALT_PINS -# define PIN_I2C0_SCL (PIN_I2C0_SCL_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) -# define PIN_I2C0_SDA (PIN_I2C0_SDA_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW | PIN_ALT2_HIGHDRIVE) +# define PIN_I2C0_SCL (PIN_I2C0_SCL_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) +# define PIN_I2C0_SDA (PIN_I2C0_SDA_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) #else -# define PIN_I2C0_SCL (PIN_I2C0_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW /*| PIN_ALT2_HIGHDRIVE*/) -# define PIN_I2C0_SDA (PIN_I2C0_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW /*| PIN_ALT2_HIGHDRIVE*/) +# define PIN_I2C0_SCL (PIN_I2C0_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) +# define PIN_I2C0_SDA (PIN_I2C0_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) #endif #endif diff --git a/configs/teensy-3.x/src/k20_i2c.c b/configs/teensy-3.x/src/k20_i2c.c index be546056fc0..b6393b11d1f 100644 --- a/configs/teensy-3.x/src/k20_i2c.c +++ b/configs/teensy-3.x/src/k20_i2c.c @@ -2,24 +2,6 @@ * Included Files ************************************************************************************/ -#if 0 -#include - -#include -#include -#include - -#include -#include -#include - -#include "up_arch.h" -#include "chip.h" -#include "kinetis.h" -#include "teensy-3x.h" -#include "kinetis_i2c.h" -#endif - #include #include @@ -35,7 +17,6 @@ #include "kinetis_i2c.h" #include "teensy-3x.h" - #if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) /************************************************************************************ @@ -52,23 +33,22 @@ void kinetis_i2cdev_initialize(void) { - FAR struct i2c_master_s *i2c; + i2c_dev = NULL; #if defined(CONFIG_KINETIS_I2C0) - i2c = kinetis_i2cbus_initialize(0); + i2c_dev = kinetis_i2cbus_initialize(0); #if defined(CONFIG_I2C_DRIVER) - i2c_register(i2c, 0); + i2c_register(i2c_dev, 0); #endif #endif - #if defined(CONFIG_KINETIS_I2C1) - i2c = kinetis_i2cbus_initialize(1); +#error Not yet supported in kinetis driver + i2c_dev = kinetis_i2cbus_initialize(1); #if defined(CONFIG_I2C_DRIVER) - i2c_register(i2c, 1); + i2c_register(i2c_dev, 1); #endif #endif } - #endif /* CONFIG_KINETIS_I2C0 || CONFIG_KINETIS_I2C1 */ diff --git a/configs/teensy-3.x/src/teensy-3x.h b/configs/teensy-3.x/src/teensy-3x.h index a50f5b0606e..030ac3d2cd6 100644 --- a/configs/teensy-3.x/src/teensy-3x.h +++ b/configs/teensy-3.x/src/teensy-3x.h @@ -44,6 +44,7 @@ #include #include #include +#include /************************************************************************************ * Pre-processor Definitions @@ -76,6 +77,8 @@ * Public data ************************************************************************************/ +FAR struct i2c_master_s* i2c_dev; + #ifndef __ASSEMBLY__ /************************************************************************************ From 8052dc49557ab5d50c8f2ff9168250b15c84ff78 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 16:01:50 -0600 Subject: [PATCH 040/214] STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others. --- ChangeLog | 4 ++-- arch/arm/src/stm32/stm32_spi.c | 2 +- arch/arm/src/stm32l4/stm32l4_spi.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/ChangeLog b/ChangeLog index 716f99760c7..5b01e5e1425 100755 --- a/ChangeLog +++ b/ChangeLog @@ -12393,7 +12393,6 @@ (2016-07-23). * Freedom-K64F: Add PWM support. From Jordan MacIntyre (2016-07-25). - 7.18 2016-xx-xx Gregory Nutt * drivers/serial/pty.c, serial.c, usbdev/cdcacm.c, include/nuttx/fs/ioctl.h: @@ -12564,7 +12563,8 @@ (2016-08-12). * arch/sim/src: Add a simulated oneshot lowerhalf driver (2016-08-12). * arch/arm/src/stm32: STM32F3 SPI: Fix the number of bit setting for - the F3. It works differently than for other STM32 parts (2016-08-12). + the F3. That and data packing work differently on the STM32F3 than + for other STM32 parts (2016-08-12). * arch/arm/stm32 and stm32l4: Enabling SPI DMA loses other bits in CR2 (2016-08-13). * arch/arm/src/stm32: STM32F3 SPI: Cannot write always 16-bit value to diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index f0173cadda6..b8400c6564f 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -182,7 +182,7 @@ struct stm32_spidev_s sem_t exclsem; /* Held while chip is selected for mutual exclusion */ uint32_t frequency; /* Requested clock frequency */ uint32_t actual; /* Actual clock frequency */ - int8_t nbits; /* Width of word in bits (8 or 16) */ + uint8_t nbits; /* Width of word in bits (4 through 16) */ uint8_t mode; /* Mode 0,1,2,3 */ }; diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c index 7cd6f3268ec..27937c30c92 100644 --- a/arch/arm/src/stm32l4/stm32l4_spi.c +++ b/arch/arm/src/stm32l4/stm32l4_spi.c @@ -163,7 +163,7 @@ struct stm32l4_spidev_s sem_t exclsem; /* Held while chip is selected for mutual exclusion */ uint32_t frequency; /* Requested clock frequency */ uint32_t actual; /* Actual clock frequency */ - int8_t nbits; /* Width of word in bits (8 or 16) */ + uint8_t nbits; /* Width of word in bits (4 through 16) */ uint8_t mode; /* Mode 0,1,2,3 */ }; From 21e930cdba8b506e9bda14ad505105329b9707a3 Mon Sep 17 00:00:00 2001 From: v01d Date: Sat, 13 Aug 2016 19:20:20 -0300 Subject: [PATCH 041/214] SH1106 0.96 OLED module support (SSD1306 compatible) + I2C fixes --- drivers/lcd/Kconfig | 29 +++++++++++++++++++++-------- drivers/lcd/ssd1306.h | 21 ++++++++++++++++++++- drivers/lcd/ssd1306_base.c | 2 +- drivers/lcd/ssd1306_i2c.c | 26 ++++++++++++++------------ 4 files changed, 56 insertions(+), 22 deletions(-) diff --git a/drivers/lcd/Kconfig b/drivers/lcd/Kconfig index 97618eba04b..b3abcaeabd8 100644 --- a/drivers/lcd/Kconfig +++ b/drivers/lcd/Kconfig @@ -285,8 +285,21 @@ config UG9664HSWAG01_POWER endif +config LCD_SH1106_OLED_132 + bool "Generic 0.96'' OLED Display Module (SH1106/SSD1306)" + default n + select LCD_SSD1306 + ---help--- + 0.96'' OLED Display Module, featuring an SH1106, typically advertised as + SSD1306. Mostly similar to "UG2864HSWEG01" although it uses the full + 132x28 pixels. + + Required LCD driver settings: + LCD_MAXCONTRAST should be 255, but any value >0 and <=255 will be accepted. + LCD_MAXPOWER should be 1: 0=off, 1=on + config LCD_UG2864HSWEG01 - bool "UG-2864HSWEG01 OLED Display Module" + bool "UG-2864HSWEG01 OLED Display Module (SSD1306)" default n select LCD_SSD1306 ---help--- @@ -301,7 +314,7 @@ config LCD_UG2864HSWEG01 SPI_CMDDATA - Include support for cmd/data selection. config LCD_UG2832HSWEG04 - bool "UG-2832HSWEG04 OLED Display Module" + bool "UG-2832HSWEG04 OLED Display Module (SSD1306)" default n depends on !LCD_UG2864HSWEG01 select LCD_SSD1306 @@ -323,22 +336,22 @@ config LCD_SSD1306 if LCD_SSD1306 choice - prompt "UG-2832HSWEG04 Interface" + prompt "SSD1306 Interface" default LCD_SSD1306_SPI config LCD_SSD1306_SPI - bool "UG-2832HSWEG04 on SPI Interface" + bool "SSD1306 on SPI Interface" select SPI ---help--- Enables support for the SPI interface. config LCD_SSD1306_I2C - bool "UG-2832HSWEG04 on I2C Interface" + bool "SSD1306 on I2C Interface" select I2C ---help--- Enables support for the I2C interface -endchoice # UG-2832HSWEG04 Interface +endchoice # SSD1306 Interface endif # LCD_SSD1306 if LCD_SSD1306_SPI @@ -369,13 +382,13 @@ endif # LCD_SSD1306_SPI if LCD_SSD1306_I2C config SSD1306_I2CADDR - int "UG-2832HSWEG04 I2C Address" + int "SSD1306 I2C Address" default 120 ---help--- I2C Address of SSD1306 config SSD1306_I2CFREQ - int "UG-2832HSWEG04 I2C Frequency" + int "SSD1306 I2C Frequency" default 400000 ---help--- I2C Frequency to communicate with SSD1306 diff --git a/drivers/lcd/ssd1306.h b/drivers/lcd/ssd1306.h index 696371ebfbc..7a22c95acb7 100644 --- a/drivers/lcd/ssd1306.h +++ b/drivers/lcd/ssd1306.h @@ -64,7 +64,7 @@ # define CONFIG_SSD1306_NINTERFACES 1 #endif -#if !defined(CONFIG_LCD_UG2864HSWEG01) && !defined(CONFIG_LCD_UG2832HSWEG04) +#if !defined(CONFIG_LCD_SH1106_OLED_132) && !defined(CONFIG_LCD_UG2864HSWEG01) && !defined(CONFIG_LCD_UG2832HSWEG04) # error "Unknown and unsupported SSD1306 LCD" #endif @@ -149,6 +149,12 @@ # define SSD1306_DEV_XOFFSET 2 /* Offset to logical column 0 */ # define SSD1306_DEV_PAGES 4 /* 4 pages */ # define SSD1306_DEV_CMNPAD 0x02 /* COM configuration */ +#elif defined(CONFIG_LCD_SH1106_OLED_132) +# define SSD1306_DEV_NATIVE_XRES 132 /* Full 132 columns used */ +# define SSD1306_DEV_NATIVE_YRES 64 /* 8 pages each 8 rows */ +# define SSD1306_DEV_XOFFSET 0 /* Offset to logical column 0 */ +# define SSD1306_DEV_PAGES 8 /* 8 pages */ +# define SSD1306_DEV_CMNPAD 0x12 /* COM configuration */ #endif #if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) @@ -163,7 +169,12 @@ /* Bytes per logical row and actual device row */ +#if defined(CONFIG_LCD_SH1106_OLED_132) +#define SSD1306_DEV_XSTRIDE ((SSD1306_DEV_XRES >> 3) + 4) +#else #define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) +#endif + #define SSD1306_DEV_YSTRIDE (SSD1306_DEV_YRES >> 3) /* Color depth and format */ @@ -202,6 +213,14 @@ # undef SSD1306_DEV_REVERSEX # define SSD1306_DEV_REVERSEY 1 # endif +#elif defined(CONFIG_LCD_SH1106_OLED_132) +# if defined(CONFIG_LCD_LANDSCAPE) +# undef SSD1306_DEV_REVERSEX +# define SSD1306_DEV_REVERSEY 1 +# elif defined(CONFIG_LCD_RLANDSCAPE) +# define SSD1306_DEV_REVERSEX 1 +# undef SSD1306_DEV_REVERSEY +# endif #endif /* Bit helpers */ diff --git a/drivers/lcd/ssd1306_base.c b/drivers/lcd/ssd1306_base.c index 96a50c369d1..d26808e93d6 100644 --- a/drivers/lcd/ssd1306_base.c +++ b/drivers/lcd/ssd1306_base.c @@ -885,7 +885,7 @@ FAR struct lcd_dev_s *ssd1306_initialize(FAR struct i2c_master_s *dev, unsigned /* Clear the display */ up_mdelay(100); - ssd1306_fill(&priv->dev, SSD1306_Y1_BLACK); + ssd1306_fill(&priv->dev, CONFIG_NX_BGCOLOR); return &priv->dev; } diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c index d6de937e35c..93391eba84f 100644 --- a/drivers/lcd/ssd1306_i2c.c +++ b/drivers/lcd/ssd1306_i2c.c @@ -42,6 +42,7 @@ #include #include #include +#include #include #include @@ -67,7 +68,7 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) */ struct i2c_msg_s msg; - uint8_t txbuffer[1]; + uint8_t txbuffer[2]; int ret; #ifdef CONFIG_LCD_SSD1306_REGDEBUG @@ -78,7 +79,8 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) * address followed by one byte of data. */ - txbuffer[0] = regval; + txbuffer[0] = 0x00; + txbuffer[1] = regval; /* Setup 8-bit SSD1306 address write message */ @@ -86,7 +88,7 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) msg.addr = priv->addr; /* 7-bit address */ msg.flags = 0; /* Write transaction, beginning with START */ msg.buffer = txbuffer; /* Transfer from this address */ - msg.length = 1; /* Send one byte following the address + msg.length = 2; /* Send one byte following the address * (then STOP) */ /* Perform the transfer */ @@ -106,6 +108,8 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) * ****************************************************************************/ +static uint8_t blk_buffer[SSD1306_DEV_XRES + 1]; + void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) { /* 8-bit data read sequence: @@ -116,16 +120,14 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) struct i2c_msg_s msg; int ret; - /* Setup 8-bit SSD1306 address write message */ + blk_buffer[0] = 0x40; + memcpy(&blk_buffer[1], data, len); - msg.frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */ - msg.addr = priv->addr; /* 7-bit address */ - msg.flags = 0; /* Write transaction, beginning with START */ - msg.buffer = data; /* Transfer from this address */ - msg.length = len; /* Send one byte following the address - * (then STOP) */ - - /* Perform the transfer */ + msg.frequency = CONFIG_SSD1306_I2CFREQ; + msg.addr = priv->addr; + msg.flags = 0; + msg.buffer = blk_buffer; + msg.length = len + 1; ret = I2C_TRANSFER(priv->i2c, &msg, 1); if (ret < 0) From e963e8d879d500c0fd0d76b2a02566ce6d2ab9ad Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 16:53:23 -0600 Subject: [PATCH 042/214] Changes from review of PR 112 --- drivers/lcd/ssd1306.h | 15 ++++++++++++--- drivers/lcd/ssd1306_i2c.c | 40 +++++++++++++++++++++++++-------------- 2 files changed, 38 insertions(+), 17 deletions(-) diff --git a/drivers/lcd/ssd1306.h b/drivers/lcd/ssd1306.h index 7a22c95acb7..6dabca1d7cb 100644 --- a/drivers/lcd/ssd1306.h +++ b/drivers/lcd/ssd1306.h @@ -64,7 +64,8 @@ # define CONFIG_SSD1306_NINTERFACES 1 #endif -#if !defined(CONFIG_LCD_SH1106_OLED_132) && !defined(CONFIG_LCD_UG2864HSWEG01) && !defined(CONFIG_LCD_UG2832HSWEG04) +#if !defined(CONFIG_LCD_SH1106_OLED_132) && !defined(CONFIG_LCD_UG2864HSWEG01) && \ + !defined(CONFIG_LCD_UG2832HSWEG04) # error "Unknown and unsupported SSD1306 LCD" #endif @@ -77,6 +78,14 @@ # undef CONFIG_LCD_RPORTRAIT #endif +/************************************************************************************** + * Pre-processor Definitions + **************************************************************************************/ + +#ifndef CONFIG_NX_BGCOLOR +# define CONFIG_NX_BGCOLOR SSD1306_Y1_BLACK +#endif + /* SSD1306 Commands *******************************************************************/ #define SSD1306_SETCOLL(ad) (0x00 | ((ad) & 0x0f)) /* Set Lower Column Address: (00h - 0fh) */ @@ -170,9 +179,9 @@ /* Bytes per logical row and actual device row */ #if defined(CONFIG_LCD_SH1106_OLED_132) -#define SSD1306_DEV_XSTRIDE ((SSD1306_DEV_XRES >> 3) + 4) +# define SSD1306_DEV_XSTRIDE ((SSD1306_DEV_XRES >> 3) + 4) #else -#define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) +# define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) #endif #define SSD1306_DEV_YSTRIDE (SSD1306_DEV_YRES >> 3) diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c index 93391eba84f..b468cacf916 100644 --- a/drivers/lcd/ssd1306_i2c.c +++ b/drivers/lcd/ssd1306_i2c.c @@ -52,6 +52,10 @@ #if defined(CONFIG_LCD_SSD1306) && defined(CONFIG_LCD_SSD1306_I2C) +/**************************************************************************** + * Public Functions + ****************************************************************************/ + /**************************************************************************** * Name: ssd1306_sendbyte * @@ -79,8 +83,8 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) * address followed by one byte of data. */ - txbuffer[0] = 0x00; - txbuffer[1] = regval; + txbuffer[0] = 0x00; + txbuffer[1] = regval; /* Setup 8-bit SSD1306 address write message */ @@ -108,28 +112,36 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) * ****************************************************************************/ -static uint8_t blk_buffer[SSD1306_DEV_XRES + 1]; - void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) { + struct i2c_msg_s msg[2]; + uint8_t regaddr; + int ret; + /* 8-bit data read sequence: * * Start - I2C_Write_Address - SSD1306_Reg_Address - SSD1306_Write_Data - STOP */ - struct i2c_msg_s msg; - int ret; + /* Send the SSD1306 register address */ - blk_buffer[0] = 0x40; - memcpy(&blk_buffer[1], data, len); + regaddr = 0x40; - msg.frequency = CONFIG_SSD1306_I2CFREQ; - msg.addr = priv->addr; - msg.flags = 0; - msg.buffer = blk_buffer; - msg.length = len + 1; + msg[0].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */ + msg[0].addr = priv->addr; /* 7-bit address */ + msg[0].flags = 0; /* Write transaction, beginning with START */ + msg[0].buffer = ®addr; /* Transfer from this address */ + msg[0].length = 1; /* Send the one byte register address */ - ret = I2C_TRANSFER(priv->i2c, &msg, 1); + /* Followed by the SSD1306 write data (with no RESTART) */ + + msg[1].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */ + msg[1].addr = priv->addr; /* 7-bit address */ + msg[1].flags = I2C_M_NORESTART; /* Write transaction with no RESTART */ + msg[1].buffer = data; /* Transfer from this address */ + msg[1].length = len; /* Send the data, then STOP */ + + ret = I2C_TRANSFER(priv->i2c, msg, 2); if (ret < 0) { snerr("ERROR: I2C_TRANSFER failed: %d\n", ret); From 3023724cf2c1970bf32f14a69c52ecc699a07ccd Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 17:32:35 -0600 Subject: [PATCH 043/214] Changes from review of PR 113 --- arch/arm/src/kinetis/Make.defs | 2 +- arch/arm/src/kinetis/kinetis_alarm.h | 35 ++ arch/arm/src/kinetis/kinetis_i2c.c | 883 ++++++++++++++++----------- arch/arm/src/kinetis/kinetis_i2c.h | 35 ++ arch/arm/src/kinetis/kinetis_rtc.c | 570 +++++++++-------- configs/teensy-3.x/include/board.h | 2 +- configs/teensy-3.x/src/k20_boot.c | 13 +- configs/teensy-3.x/src/k20_i2c.c | 35 ++ 8 files changed, 960 insertions(+), 615 deletions(-) diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs index 29eec9505af..bb7f54d87bb 100644 --- a/arch/arm/src/kinetis/Make.defs +++ b/arch/arm/src/kinetis/Make.defs @@ -1,7 +1,7 @@ ############################################################################ # arch/arm/src/kinetis/Make.defs # -# Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved. +# Copyright (C) 2011, 2013-2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/arch/arm/src/kinetis/kinetis_alarm.h b/arch/arm/src/kinetis/kinetis_alarm.h index ee135a5eb2f..751cfd8cf05 100644 --- a/arch/arm/src/kinetis/kinetis_alarm.h +++ b/arch/arm/src/kinetis/kinetis_alarm.h @@ -1,3 +1,38 @@ +/**************************************************************************** + * arch/arm/src/kinetis/kinetis_alarm.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Matias v01d + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + #ifndef __ARCH_ARM_SRC_KINETIS_ALARM_H #define __ARCH_ARM_SRC_KINETIS_ALARM_H diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 7ae099a6857..1e0987378bc 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -1,3 +1,38 @@ +/**************************************************************************** + * arch/arm/src/kinetis/kinetis_i2c.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Matias v01d + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + /**************************************************************************** * Included Files ****************************************************************************/ @@ -31,14 +66,13 @@ #include "kinetis.h" #include "kinetis_i2c.h" - #if defined(CONFIG_KINETIS_I2C0) /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -#define I2C_TIMEOUT (20*1000/CONFIG_USEC_PER_TICK) /* 20 mS */ +#define I2C_TIMEOUT (20*1000/CONFIG_USEC_PER_TICK) /* 20 mS */ #define I2C_DEFAULT_FREQUENCY 400000 @@ -47,35 +81,39 @@ #define STATE_TIMEOUT 2 #define STATE_NAK 3 -/* - * TODO: +/* TODO: * - revisar tamanio de todos los registros (getreg/putreg) */ /**************************************************************************** - * Private Data + * Private Types ****************************************************************************/ struct kinetis_i2cdev_s { - struct i2c_master_s dev; /* Generic I2C device */ - unsigned int base; /* Base address of registers */ - uint16_t irqid; /* IRQ for this device */ - uint32_t baseFreq; /* branch frequency */ + struct i2c_master_s dev; /* Generic I2C device */ + unsigned int base; /* Base address of registers */ + uint16_t irqid; /* IRQ for this device */ + uint32_t baseFreq; /* branch frequency */ - sem_t mutex; /* Only one thread can access at a time */ - sem_t wait; /* Place to wait for state machine completion */ - volatile uint8_t state; /* State of state machine */ - WDOG_ID timeout; /* watchdog to timeout when bus hung */ - uint32_t frequency; /* Current I2C frequency */ + sem_t mutex; /* Only one thread can access at a time */ + sem_t wait; /* Place to wait for state machine completion */ + volatile uint8_t state; /* State of state machine */ + WDOG_ID timeout; /* watchdog to timeout when bus hung */ + uint32_t frequency; /* Current I2C frequency */ - struct i2c_msg_s *msgs; /* remaining transfers - first one is in progress */ - unsigned int nmsg; /* number of transfer remaining */ + struct i2c_msg_s *msgs; /* remaining transfers - first one is in + * progress */ + unsigned int nmsg; /* number of transfer remaining */ - uint16_t wrcnt; /* number of bytes sent to tx fifo */ - uint16_t rdcnt; /* number of bytes read from rx fifo */ + uint16_t wrcnt; /* number of bytes sent to tx fifo */ + uint16_t rdcnt; /* number of bytes read from rx fifo */ }; +/**************************************************************************** + * Private Data + ****************************************************************************/ + static struct kinetis_i2cdev_s g_i2c_dev; /**************************************************************************** @@ -87,11 +125,11 @@ static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv); static int kinetis_i2c_interrupt(int irq, FAR void *context); static void kinetis_i2c_timeout(int argc, uint32_t arg, ...); static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, - uint32_t frequency); + uint32_t frequency); static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s *msgs, int count); + FAR struct i2c_msg_s *msgs, int count); #ifdef CONFIG_I2C_RESET -static int kinetis_i2c_reset(FAR struct i2c_master_s * dev); +static int kinetis_i2c_reset(FAR struct i2c_master_s *dev); #endif /**************************************************************************** @@ -102,7 +140,7 @@ struct i2c_ops_s kinetis_i2c_ops = { .transfer = kinetis_i2c_transfer #ifdef CONFIG_I2C_RESET - , .reset = kinetis_i2c_reset + ,.reset = kinetis_i2c_reset #endif }; @@ -115,169 +153,270 @@ struct i2c_ops_s kinetis_i2c_ops = ****************************************************************************/ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, - uint32_t frequency) + uint32_t frequency) { - if (frequency == priv->frequency) return; + if (frequency == priv->frequency) + { + return; + } - /* TODO: use apropriate definitions */ + /* TODO: use apropriate definitions */ - #if BOARD_BUS_FREQ == 120000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV1152; // 104 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV288; // 416 kHz - } else { - I2C0_F = I2C_F_DIV128; // 0.94 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 108000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV1024; // 105 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV256; // 422 kHz - } else { - I2C0_F = I2C_F_DIV112; // 0.96 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 96000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV960; // 100 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV240; // 400 kHz - } else { - I2C0_F = I2C_F_DIV96; // 1.0 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 90000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV896; // 100 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV224; // 402 kHz - } else { - I2C0_F = I2C_F_DIV88; // 1.02 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 80000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV768; // 104 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV192; // 416 kHz - } else { - I2C0_F = I2C_F_DIV80; // 1.0 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 72000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV640; // 112 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV192; // 375 kHz - } else { - I2C0_F = I2C_F_DIV72; // 1.0 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 64000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV640; // 100 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV160; // 400 kHz - } else { - I2C0_F = I2C_F_DIV64; // 1.0 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 60000000 - if (frequency < 400000) { - I2C0_F = 0x2C; // 104 kHz - } else if (frequency < 1000000) { - I2C0_F = 0x1C; // 416 kHz - } else { - I2C0_F = 0x12; // 938 kHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 56000000 - if (frequency < 400000) { - I2C0_F = 0x2B; // 109 kHz - } else if (frequency < 1000000) { - I2C0_F = 0x1C; // 389 kHz - } else { - I2C0_F = 0x0E; // 1 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 54000000 - if (frequency < 400000) { - I2C0_F = I2C_F_DIV512; // 105 kHz - } else if (frequency < 1000000) { - I2C0_F = I2C_F_DIV128; // 422 kHz - } else { - I2C0_F = I2C_F_DIV56; // 0.96 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 48000000 - if (frequency < 400000) { - I2C0_F = 0x27; // 100 kHz - } else if (frequency < 1000000) { - I2C0_F = 0x1A; // 400 kHz - } else { - I2C0_F = 0x0D; // 1 MHz - } - I2C0_FLT = 4; - #elif BOARD_BUS_FREQ == 40000000 - if (frequency < 400000) { - I2C0_F = 0x29; // 104 kHz - } else if (frequency < 1000000) { - I2C0_F = 0x19; // 416 kHz - } else { - I2C0_F = 0x0B; // 1 MHz - } - I2C0_FLT = 3; - #elif BOARD_BUS_FREQ == 36000000 - if (frequency < 400000) { - putreg8(0x28, KINETIS_I2C0_F); // 113 kHz - } else if (frequency < 1000000) { - putreg8(0x19, KINETIS_I2C0_F); // 375 kHz - } else { - putreg8(0x0A, KINETIS_I2C0_F); // 1 MHz - } - putreg8(3, KINETIS_I2C0_FLT); - #elif BOARD_BUS_FREQ == 24000000 - if (frequency < 400000) { - I2C0_F = 0x1F; // 100 kHz - } else if (frequency < 1000000) { - I2C0_F = 0x12; // 375 kHz - } else { - I2C0_F = 0x02; // 1 MHz - } - I2C0_FLT = 2; - #elif BOARD_BUS_FREQ == 16000000 - if (frequency < 400000) { - I2C0_F = 0x20; // 100 kHz - } else if (frequency < 1000000) { - I2C0_F = 0x07; // 400 kHz - } else { - I2C0_F = 0x00; // 800 MHz - } - I2C0_FLT = 1; - #elif BOARD_BUS_FREQ == 8000000 - if (frequency < 400000) { - I2C0_F = 0x14; // 100 kHz - } else { - I2C0_F = 0x00; // 400 kHz - } - I2C0_FLT = 1; - #elif BOARD_BUS_FREQ == 4000000 - if (frequency < 400000) { - I2C0_F = 0x07; // 100 kHz - } else { - I2C0_F = 0x00; // 200 kHz - } - I2C0_FLT = 1; - #elif BOARD_BUS_FREQ == 2000000 - I2C0_F = 0x00; // 100 kHz - I2C0_FLT = 1; - #else - #error "F_BUS must be 120, 108, 96, 9, 80, 72, 64, 60, 56, 54, 48, 40, 36, 24, 16, 8, 4 or 2 MHz" - #endif +#if BOARD_BUS_FREQ == 120000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV1152, KINETIS_I2C0_F); /* 104 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV288, KINETIS_I2C0_F); /* 416 kHz */ + } + else + { + putreg8(I2C_F_DIV128, KINETIS_I2C0_F); /* 0.94 MHz */ + } - priv->frequency = frequency; + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 108000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV1024, KINETIS_I2C0_F); /* 105 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV256, KINETIS_I2C0_F); /* 422 kHz */ + } + else + { + putreg8(I2C_F_DIV112, KINETIS_I2C0_F); /* 0.96 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 96000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV960, KINETIS_I2C0_F); /* 100 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV240, KINETIS_I2C0_F); /* 400 kHz */ + } + else + { + putreg8(I2C_F_DIV96, KINETIS_I2C0_F); /* 1.0 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 90000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV896, KINETIS_I2C0_F); /* 100 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV224, KINETIS_I2C0_F); /* 402 kHz */ + } + else + { + putreg8(I2C_F_DIV88, KINETIS_I2C0_F); /* 1.02 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 80000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV768, KINETIS_I2C0_F); /* 104 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV192, KINETIS_I2C0_F); /* 416 kHz */ + } + else + { + putreg8(I2C_F_DIV80, KINETIS_I2C0_F); /* 1.0 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 72000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV640, KINETIS_I2C0_F); /* 112 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV192, KINETIS_I2C0_F); /* 375 kHz */ + } + else + { + putreg8(I2C_F_DIV72, KINETIS_I2C0_F); /* 1.0 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 64000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV640, KINETIS_I2C0_F); /* 100 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV160, KINETIS_I2C0_F); /* 400 kHz */ + } + else + { + putreg8(I2C_F_DIV64, KINETIS_I2C0_F); /* 1.0 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 60000000 + if (frequency < 400000) + { + putreg8(0x2C, KINETIS_I2C0_F); /* 104 kHz */ + } + else if (frequency < 1000000) + { + putreg8(0x1C, KINETIS_I2C0_F); /* 416 kHz */ + } + else + { + putreg8(0x12, KINETIS_I2C0_F); /* 938 kHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 56000000 + if (frequency < 400000) + { + putreg8(0x2B, KINETIS_I2C0_F); /* 109 kHz */ + } + else if (frequency < 1000000) + { + putreg8(0x1C, KINETIS_I2C0_F); /* 389 kHz */ + } + else + { + putreg8(0x0E, KINETIS_I2C0_F); /* 1 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 54000000 + if (frequency < 400000) + { + putreg8(I2C_F_DIV512, KINETIS_I2C0_F); /* 105 kHz */ + } + else if (frequency < 1000000) + { + putreg8(I2C_F_DIV128, KINETIS_I2C0_F); /* 422 kHz */ + } + else + { + putreg8(I2C_F_DIV56, KINETIS_I2C0_F); /* 0.96 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 48000000 + if (frequency < 400000) + { + putreg8(0x27, KINETIS_I2C0_F); /* 100 kHz */ + } + else if (frequency < 1000000) + { + putreg8(0x1A, KINETIS_I2C0_F); /* 400 kHz */ + } + else + { + putreg8(0x0D, KINETIS_I2C0_F); /* 1 MHz */ + } + + putreg8(4, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 40000000 + if (frequency < 400000) + { + putreg8(0x29, KINETIS_I2C0_F); /* 104 kHz */ + } + else if (frequency < 1000000) + { + putreg8(0x19, KINETIS_I2C0_F); /* 416 kHz */ + } + else + { + putreg8(0x0B, KINETIS_I2C0_F); /* 1 MHz */ + } + + putreg8(3, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 36000000 + if (frequency < 400000) + { + putreg8(0x28, KINETIS_I2C0_F); /* 113 kHz */ + } + else if (frequency < 1000000) + { + putreg8(0x19, KINETIS_I2C0_F); /* 375 kHz */ + } + else + { + putreg8(0x0A, KINETIS_I2C0_F); /* 1 MHz */ + } + + putreg8(3, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 24000000 + if (frequency < 400000) + { + putreg8(0x1F, KINETIS_I2C0_F); /* 100 kHz */ + } + else if (frequency < 1000000) + { + putreg8(0x12, KINETIS_I2C0_F); /* 375 kHz */ + } + else + { + putreg8(0x02, KINETIS_I2C0_F); /* 1 MHz */ + } + + putreg8(2, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 16000000 + if (frequency < 400000) + { + putreg8(0x20, KINETIS_I2C0_F); /* 100 kHz */ + } + else if (frequency < 1000000) + { + putreg8(0x07, KINETIS_I2C0_F); /* 400 kHz */ + } + else + { + putreg8(0x00, KINETIS_I2C0_F); /* 800 MHz */ + } + + putreg8(1, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 8000000 + if (frequency < 400000) + { + putreg8(0x14, KINETIS_I2C0_F); /* 100 kHz */ + } + else + { + putreg8(0x00, KINETIS_I2C0_F); /* 400 kHz */ + } + + putreg8(1, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 4000000 + if (frequency < 400000) + { + putreg8(0x07, KINETIS_I2C0_F); /* 100 kHz */ + } + else + { + putreg8(0x00, KINETIS_I2C0_F); /* 200 kHz */ + } + + putreg8(1, KINETIS_I2C0_FLT); +#elif BOARD_BUS_FREQ == 2000000 + putreg8(0x00, KINETIS_I2C0_F); /* 100 kHz */ + putreg8(1, KINETIS_I2C0_FLT); +#else +# error "F_BUS must be 120, 108, 96, 9, 80, 72, 64, 60, 56, 54, 48, 40, 36, 24, 16, 8, 4 or 2 MHz" +#endif + + priv->frequency = frequency; } /**************************************************************************** @@ -290,39 +429,50 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) { - struct i2c_msg_s *msg; + struct i2c_msg_s *msg; msg = priv->msgs; - /* now take control of the bus */ + /* Now take control of the bus */ + if (getreg8(KINETIS_I2C0_C1) & I2C_C1_MST) - { - /* we are already the bus master, so send a repeated start */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_RSTA | I2C_C1_TX, KINETIS_I2C0_C1); - } - else - { - /* we are not currently the bus master, so wait for bus ready */ - while (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY); + { + /* We are already the bus master, so send a repeated start */ - /* become the bus master in transmit mode (send start) */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); - } - - if (I2C_M_READ & msg->flags) /* DEBUG: should happen always */ - { - /* wait until start condition establishes control of the bus */ - while (1) { - if (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY) break; + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_RSTA | + I2C_C1_TX, KINETIS_I2C0_C1); } - } + else + { + /* We are not currently the bus master, so wait for bus ready */ + + while (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY); + + /* Become the bus master in transmit mode (send start) */ + + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, + KINETIS_I2C0_C1); + } + + if (I2C_M_READ & msg->flags) /* DEBUG: should happen always */ + { + /* Wait until start condition establishes control of the bus */ + + while (1) + { + if (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY) + { + break; + } + } + } + + /* Initiate actual transfer (send address) */ - /* initiate actual transfer (send address) */ putreg8((I2C_M_READ & msg->flags) == I2C_M_READ ? - I2C_READADDR8(msg->addr) : - I2C_WRITEADDR8(msg->addr), KINETIS_I2C0_D); + I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr), KINETIS_I2C0_D); - return OK; + return OK; } /**************************************************************************** @@ -393,105 +543,138 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) struct kinetis_i2cdev_s *priv; struct i2c_msg_s *msg; uint32_t state; - int regval, dummy; + int regval; + int dummy; UNUSED(dummy); if (irq == KINETIS_IRQ_I2C0) - { - priv = &g_i2c_dev; - } + { + priv = &g_i2c_dev; + } else - { - PANIC(); - } + { + PANIC(); + } + + /* Get current state */ - /* get current state */ state = getreg8(KINETIS_I2C0_S); msg = priv->msgs; - /* arbitration lost */ + /* Arbitration lost */ + if (state & I2C_S_ARBL) - { - putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); - priv->state = STATE_ARBITRATION_ERROR; - kinetis_i2c_stop(priv); - } + { + putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); + priv->state = STATE_ARBITRATION_ERROR; + kinetis_i2c_stop(priv); + } else - { - /* clear interrupt */ - putreg8(I2C_S_IICIF, KINETIS_I2C0_S); - - regval = getreg8(KINETIS_I2C0_C1); - - /* TX mode */ - if (regval & I2C_C1_TX) { - /* last write was not acknowledged */ - if (state & I2C_S_RXAK) - { - priv->state = STATE_NAK; /* set error flag */ - kinetis_i2c_stop(priv); /* send STOP */ - } - else - { - /* actually intending to write */ - if ((I2C_M_READ & msg->flags) == 0) + /* Clear interrupt */ + + putreg8(I2C_S_IICIF, KINETIS_I2C0_S); + + regval = getreg8(KINETIS_I2C0_C1); + + /* TX mode */ + + if (regval & I2C_C1_TX) { - /* wrote everything */ - if (priv->wrcnt == msg->length) - { - kinetis_i2c_nextmsg(priv); /* continue with next message */ - } + /* Last write was not acknowledged */ + + if (state & I2C_S_RXAK) + { + priv->state = STATE_NAK; /* Set error flag */ + kinetis_i2c_stop(priv); /* Send STOP */ + } else - { - putreg8(msg->buffer[priv->wrcnt], KINETIS_I2C0_D); /* Put next byte */ - priv->wrcnt++; - } + { + /* Actually intending to write */ + + if ((I2C_M_READ & msg->flags) == 0) + { + /* Wrote everything */ + + if (priv->wrcnt == msg->length) + { + /* Continue with next message */ + + kinetis_i2c_nextmsg(priv); + } + else + { + /* Put next byte */ + + putreg8(msg->buffer[priv->wrcnt], KINETIS_I2C0_D); + priv->wrcnt++; + } + } + + /* Actually intending to read (address was just sent) */ + + else + { + if (msg->length == 1) /* go to RX mode, do not send ACK */ + { + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | + I2C_C1_TXAK, KINETIS_I2C0_C1); + } + else /* go to RX mode */ + { + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST, + KINETIS_I2C0_C1); + } + + /* TODO: handle zero-length reads */ + /* Dummy read to initiate reception */ + + dummy = getreg8(KINETIS_I2C0_D); + } + } } - /* actually intending to read (address was just sent) */ - else - { - if (msg->length == 1) /* go to RX mode, do not send ACK */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C0_C1); - else /* go to RX mode */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST, KINETIS_I2C0_C1); - /* TODO: handle zero-length reads */ + /* RX: mode */ - dummy = getreg8(KINETIS_I2C0_D); /* dummy read to initiate reception */ - } - } - } - /* RX: mode */ - else - { - /* if last receiving byte */ - if (priv->rdcnt == (msg->length - 1)) - { - /* go to TX mode before last read, otherwise a new read is triggered */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); /* go to TX mode */ - - msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); - priv->rdcnt++; - - kinetis_i2c_nextmsg(priv); - } - /* second to last receiving byte */ - else if (priv->rdcnt == (msg->length - 2)) - { - /* Do not ACK any more */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C0_C1); - - msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); - priv->rdcnt++; - } else - { - msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); - priv->rdcnt++; - } + { + /* If last receiving byte */ + + if (priv->rdcnt == (msg->length - 1)) + { + /* go to TX mode before last read, otherwise a new read is + * triggered. + */ + + /* Go to TX mode */ + + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); + + msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + priv->rdcnt++; + + kinetis_i2c_nextmsg(priv); + } + + /* Second to last receiving byte */ + + else if (priv->rdcnt == (msg->length - 2)) + { + /* Do not ACK any more */ + + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, + KINETIS_I2C0_C1); + + msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + priv->rdcnt++; + } + else + { + msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + priv->rdcnt++; + } + } } - } return OK; } @@ -505,7 +688,7 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) ****************************************************************************/ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s *msgs, int count) + FAR struct i2c_msg_s *msgs, int count) { struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; @@ -516,47 +699,58 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, sem_wait(&priv->mutex); /* Set up for the transfer */ - priv->msgs = msgs; - priv->nmsg = count; + + priv->msgs = msgs; + priv->nmsg = count; priv->state = STATE_OK; - /* Configure the I2C frequency. - * REVISIT: Note that the frequency is set only on the first message. - * This could be extended to support different transfer frequencies for - * each message segment. + /* Configure the I2C frequency. REVISIT: Note that the frequency is set only + * on the first message. This could be extended to support different transfer + * frequencies for each message segment. */ kinetis_i2c_setfrequency(priv, msgs->frequency); - /* clear the status flags */ + /* Clear the status flags */ + putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); /* Process every message */ + while (priv->nmsg && priv->state == STATE_OK) - { - priv->wrcnt = 0; - priv->rdcnt = 0; + { + priv->wrcnt = 0; + priv->rdcnt = 0; - /* Initiate the transfer */ - kinetis_i2c_start(priv); + /* Initiate the transfer */ - /* wait for transfer complete */ - wd_start(priv->timeout, I2C_TIMEOUT, kinetis_i2c_timeout, 1, (uint32_t)priv); - sem_wait(&priv->wait); + kinetis_i2c_start(priv); - wd_cancel(priv->timeout); - } + /* Wait for transfer complete */ + + wd_start(priv->timeout, I2C_TIMEOUT, kinetis_i2c_timeout, 1, + (uint32_t) priv); + sem_wait(&priv->wait); + + wd_cancel(priv->timeout); + } + + /* Disable interrupts */ - /* disable interrupts */ putreg8(I2C_C1_IICEN, KINETIS_I2C0_C1); - /* release access to I2C bus */ + /* Release access to I2C bus */ + sem_post(&priv->mutex); if (priv->state != STATE_OK) - return -1; + { + return -EIO; + } else - return 0; /* TODO: correct? */ + { + return 0; + } } /************************************************************************************ @@ -574,11 +768,11 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, ************************************************************************************/ #ifdef CONFIG_I2C_RESET -static int kinetis_i2c_reset(FAR struct i2c_master_s * dev) +static int kinetis_i2c_reset(FAR struct i2c_master_s *dev) { return OK; } -#endif /* CONFIG_I2C_RESET */ +#endif /* CONFIG_I2C_RESET */ /**************************************************************************** * Public Functions @@ -597,10 +791,10 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) struct kinetis_i2cdev_s *priv; if (port > 1) - { - i2cerr("ERROR: Kinetis I2C Only suppors ports 0 and 1\n"); - return NULL; - } + { + i2cerr("ERROR: Kinetis I2C Only suppors ports 0 and 1\n"); + return NULL; + } irqstate_t flags; uint32_t regval; @@ -608,38 +802,43 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) flags = enter_critical_section(); if (port == 0) - { - priv = &g_i2c_dev; - priv->base = KINETIS_I2C0_BASE; - priv->irqid = KINETIS_IRQ_I2C0; - priv->baseFreq = BOARD_BUS_FREQ; + { + priv = &g_i2c_dev; + priv->base = KINETIS_I2C0_BASE; + priv->irqid = KINETIS_IRQ_I2C0; + priv->baseFreq = BOARD_BUS_FREQ; - /* Enable clock */ - regval = getreg32(KINETIS_SIM_SCGC4); - regval |= SIM_SCGC4_I2C0; - putreg32(regval, KINETIS_SIM_SCGC4); + /* Enable clock */ - kinetis_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY); + regval = getreg32(KINETIS_SIM_SCGC4); + regval |= SIM_SCGC4_I2C0; + putreg32(regval, KINETIS_SIM_SCGC4); - /* Disable while configuring */ - putreg8(0, KINETIS_I2C0_C1); + kinetis_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY); - /* Configure pins */ - kinetis_pinconfig(PIN_I2C0_SCL); - kinetis_pinconfig(PIN_I2C0_SDA); + /* Disable while configuring */ - /* Enable */ - putreg8(I2C_C1_IICEN, KINETIS_I2C0_C1); + putreg8(0, KINETIS_I2C0_C1); - /* High-drive select (TODO: why)? */ - regval = getreg8(KINETIS_I2C0_C2); - regval |= I2C_C2_HDRS; - putreg8(regval, KINETIS_I2C0_C2); - } + /* Configure pins */ + + kinetis_pinconfig(PIN_I2C0_SCL); + kinetis_pinconfig(PIN_I2C0_SDA); + + /* Enable */ + + putreg8(I2C_C1_IICEN, KINETIS_I2C0_C1); + + /* High-drive select (TODO: why)? */ + + regval = getreg8(KINETIS_I2C0_C2); + regval |= I2C_C2_HDRS; + putreg8(regval, KINETIS_I2C0_C2); + } else - { - return NULL; - } + { + return NULL; + } leave_critical_section(flags); @@ -673,12 +872,12 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) * ****************************************************************************/ -int kinetis_i2cbus_uninitialize(FAR struct i2c_master_s * dev) +int kinetis_i2cbus_uninitialize(FAR struct i2c_master_s *dev) { - struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *) dev; + struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; putreg8(0, KINETIS_I2C0_C1); - + up_disable_irq(priv->irqid); irq_detach(priv->irqid); return OK; diff --git a/arch/arm/src/kinetis/kinetis_i2c.h b/arch/arm/src/kinetis/kinetis_i2c.h index b42e248882a..098e4d39add 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.h +++ b/arch/arm/src/kinetis/kinetis_i2c.h @@ -1,3 +1,38 @@ +/**************************************************************************** + * arch/arm/src/kinetis/kinetis_i2c.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Matias v01d + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + #ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H #define __ARCH_ARM_SRC_KINETIS_KINETIS_I2C_H diff --git a/arch/arm/src/kinetis/kinetis_rtc.c b/arch/arm/src/kinetis/kinetis_rtc.c index 3d0af29c60d..ca0f4848d19 100644 --- a/arch/arm/src/kinetis/kinetis_rtc.c +++ b/arch/arm/src/kinetis/kinetis_rtc.c @@ -1,6 +1,41 @@ -/************************************************************************************ +/**************************************************************************** + * arch/arm/src/kinetis/kinetis_rtc.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Matias v01d + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include #include @@ -25,269 +60,25 @@ #if defined(CONFIG_RTC) -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ +/**************************************************************************** * Private Data - ************************************************************************************/ + ****************************************************************************/ #ifdef CONFIG_RTC_ALARM static alarmcb_t g_alarmcb; #endif -/************************************************************************************ - * Private Declarations - ************************************************************************************/ - -static int kinetis_rtc_interrupt(int irq, void *context); - -/************************************************************************************ +/**************************************************************************** * Public Data - ************************************************************************************/ + ****************************************************************************/ volatile bool g_rtc_enabled = false; -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -/************************************************************************************ - * Name: up_rtc_initialize - * - * Description: - * Initialize the hardware RTC per the selected configuration. This function is - * called once during the OS initialization sequence - * - * Input Parameters: - * None - * - * Returned Value: - * Zero (OK) on success; a negated errno on failure - * - ************************************************************************************/ - -int up_rtc_initialize(void) -{ - int regval; - - /* enable RTC module */ - regval = getreg32(KINETIS_SIM_SCGC6); - regval |= SIM_SCGC6_RTC; - putreg32(regval, KINETIS_SIM_SCGC6); - - /* disable counters (just in case) */ - putreg32(0, KINETIS_RTC_SR); - - /* enable oscilator */ - putreg32(RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE, KINETIS_RTC_CR); /* capacitance values from teensyduino */ - /* TODO: delay some time (1024 cycles? would be 30ms) */ - - /* disable interrupts */ - putreg32(0, KINETIS_RTC_IER); - - /* reset flags requires writing the seconds register, the following line avoids altering any stored time value */ - putreg32(getreg32(KINETIS_RTC_TSR), KINETIS_RTC_TSR); - -#if defined(CONFIG_RTC_ALARM) - /* enable alarm interrupts */ - irq_attach(KINETIS_IRQ_RTC, kinetis_rtc_interrupt); - up_enable_irq(KINETIS_IRQ_RTC); -#endif - - /* enable counters */ - putreg32(RTC_SR_TCE, KINETIS_RTC_SR); - - /* mark RTC enabled */ - g_rtc_enabled = true; - - return OK; -} - -/************************************************************************************ - * Name: up_rtc_time - * - * Description: - * Get the current time in seconds. This is similar to the standard time() - * function. This interface is only required if the low-resolution RTC/counter - * hardware implementation selected. It is only used by the RTOS during - * initialization to set up the system time when CONFIG_RTC is set but neither - * CONFIG_RTC_HIRES nor CONFIG_RTC_DATETIME are set. - * - * Input Parameters: - * None - * - * Returned Value: - * The current time in seconds - * - ************************************************************************************/ - -#ifndef CONFIG_RTC_HIRES -time_t up_rtc_time(void) -{ - return getreg32(KINETIS_RTC_TSR); -} -#endif - -/************************************************************************************ - * Name: up_rtc_gettime - * - * Description: - * Get the current time from the high resolution RTC clock/counter. This interface - * is only supported by the high-resolution RTC/counter hardware implementation. - * It is used to replace the system timer. - * - * Input Parameters: - * tp - The location to return the high resolution time value. - * - * Returned Value: - * Zero (OK) on success; a negated errno on failure - * - ************************************************************************************/ - -#ifdef CONFIG_RTC_HIRES -int up_rtc_gettime(FAR struct timespec *tp) -{ - irqstate_t flags; - uint32_t seconds, prescaler, prescaler2; - - /* - * get prescaler and seconds register. this is in a loop which - * ensures that registers will be re-read if during the reads the - * prescaler has wrapped-around - */ - - flags = enter_critical_section(); - do - { - prescaler = getreg32(KINETIS_RTC_TPR); - seconds = getreg32(KINETIS_RTC_TSR); - prescaler2 = getreg32(KINETIS_RTC_TPR); - } - while (prescaler > prescaler2); - leave_critical_section(flags); - - /* build seconds + nanoseconds from seconds and prescaler register */ - tp->tv_sec = seconds; - tp->tv_nsec = prescaler * (1000000000 / CONFIG_RTC_FREQUENCY); - return OK; -} -#endif - -/************************************************************************************ - * Name: up_rtc_settime - * - * Description: - * Set the RTC to the provided time. All RTC implementations must be able to - * set their time based on a standard timespec. - * - * Input Parameters: - * tp - the time to use - * - * Returned Value: - * Zero (OK) on success; a negated errno on failure - * - ************************************************************************************/ - -int up_rtc_settime(FAR const struct timespec *tp) -{ - irqstate_t flags; - uint32_t seconds, prescaler; - - seconds = tp->tv_sec; - prescaler = tp->tv_nsec * (CONFIG_RTC_FREQUENCY / 1000000000); - - flags = enter_critical_section(); - - putreg32(0, KINETIS_RTC_SR); /* disable counter */ - - putreg32(prescaler, KINETIS_RTC_TPR); /* always write prescaler first */ - putreg32(seconds, KINETIS_RTC_TSR); - - putreg32(RTC_SR_TCE, KINETIS_RTC_SR); /* re-enable counter */ - - leave_critical_section(flags); - - return OK; -} - -/************************************************************************************ +/**************************************************************************** * Private Functions - ************************************************************************************/ + ****************************************************************************/ -/************************************************************************************ - * Name: kinetis_rtc_setalarm - * - * Description: - * Set up an alarm. - * - * Input Parameters: - * tp - the time to set the alarm - * callback - the function to call when the alarm expires. - * - * Returned Value: - * Zero (OK) on success; a negated errno on failure - * - ************************************************************************************/ - -#ifdef CONFIG_RTC_ALARM -int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) -{ - /* Is there already something waiting on the ALARM? */ - if (g_alarmcb == NULL) - { - /* No.. Save the callback function pointer */ - - g_alarmcb = callback; - - /* Enable and set RTC alarm */ - - putreg32(tp->tv_sec, KINETIS_RTC_TAR); /* set alarm (also resets flags) */ - putreg32(RTC_IER_TAIE, KINETIS_RTC_IER); /* enable alarm interrupt */ - - return OK; - } - else - return -EBUSY; -} -#endif - -/************************************************************************************ - * Name: kinetis_rtc_cancelalarm - * - * Description: - * Cancel a pending alarm alarm - * - * Input Parameters: - * none - * - * Returned Value: - * Zero (OK) on success; a negated errno on failure - * - ************************************************************************************/ - -#ifdef CONFIG_RTC_ALARM -int kinetis_rtc_cancelalarm(void) -{ - if (g_alarmcb != NULL) - { - /* Cancel the global callback function */ - - g_alarmcb = NULL; - - /* Unset the alarm */ - - putreg32(0, KINETIS_RTC_IER); /* disable alarm interrupt */ - - return OK; - } - else - return -ENODATA; -} -#endif - -/************************************************************************************ +/**************************************************************************** * Name: kinetis_rtc_interrupt * * Description: @@ -300,19 +91,21 @@ int kinetis_rtc_cancelalarm(void) * Returned Value: * Zero (OK) on success; A negated errno value on failure. * - ************************************************************************************/ + ****************************************************************************/ #if defined(CONFIG_RTC_ALARM) static int kinetis_rtc_interrupt(int irq, void *context) { if (g_alarmcb != NULL) - { - /* Alarm callback */ - g_alarmcb(); - g_alarmcb = NULL; - } + { + /* Alarm callback */ + + g_alarmcb(); + g_alarmcb = NULL; + } /* Clear pending flags, disable alarm */ + putreg32(0, KINETIS_RTC_TAR); /* unset alarm (resets flags) */ putreg32(0, KINETIS_RTC_IER); /* disable alarm interrupt */ @@ -320,4 +113,261 @@ static int kinetis_rtc_interrupt(int irq, void *context) } #endif -#endif // KINETIS_RTC +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_rtc_initialize + * + * Description: + * Initialize the hardware RTC per the selected configuration. This + * function is called once during the OS initialization sequence + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int up_rtc_initialize(void) +{ + int regval; + + /* Enable RTC module */ + + regval = getreg32(KINETIS_SIM_SCGC6); + regval |= SIM_SCGC6_RTC; + putreg32(regval, KINETIS_SIM_SCGC6); + + /* Disable counters (just in case) */ + + putreg32(0, KINETIS_RTC_SR); + + /* Enable oscilator */ + /* capacitance values from teensyduino */ + + putreg32(RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE, KINETIS_RTC_CR); + + /* TODO: delay some time (1024 cycles? would be 30ms) */ + + /* Disable interrupts */ + + putreg32(0, KINETIS_RTC_IER); + + /* Reset flags requires writing the seconds register, the following line + * avoids altering any stored time value. + */ + + putreg32(getreg32(KINETIS_RTC_TSR), KINETIS_RTC_TSR); + +#if defined(CONFIG_RTC_ALARM) + /* Enable alarm interrupts. REVISIT: This will not work. up_rtc_initialize() + * is called very early in initialization BEFORE the interrupt system will be + * enabled. All interrupts will disabled later when the interrupt system is + * disabled. This must be done later when the alarm is first set. + */ + + irq_attach(KINETIS_IRQ_RTC, kinetis_rtc_interrupt); + up_enable_irq(KINETIS_IRQ_RTC); +#endif + + /* Enable counters */ + + putreg32(RTC_SR_TCE, KINETIS_RTC_SR); + + /* Mark RTC enabled */ + + g_rtc_enabled = true; + + return OK; +} + +/**************************************************************************** + * Name: up_rtc_time + * + * Description: + * Get the current time in seconds. This is similar to the standard + * time() function. This interface is only required if the low-resolution + * RTC/counter hardware implementation selected. It is only used by the + * RTOS during initialization to set up the system time when CONFIG_RTC is + * set but neither CONFIG_RTC_HIRES nor CONFIG_RTC_DATETIME are set. + * + * Input Parameters: + * None + * + * Returned Value: + * The current time in seconds + * + ****************************************************************************/ + +#ifndef CONFIG_RTC_HIRES +time_t up_rtc_time(void) +{ + return getreg32(KINETIS_RTC_TSR); +} +#endif + +/**************************************************************************** + * Name: up_rtc_gettime + * + * Description: + * Get the current time from the high resolution RTC clock/counter. This + * interface is only supported by the high-resolution RTC/counter hardware + * implementation. It is used to replace the system timer. + * + * Input Parameters: + * tp - The location to return the high resolution time value. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_HIRES +int up_rtc_gettime(FAR struct timespec *tp) +{ + irqstate_t flags; + uint32_t seconds, prescaler, prescaler2; + + /* Get prescaler and seconds register. this is in a loop which ensures that + * registers will be re-read if during the reads the prescaler has + * wrapped-around. + */ + + flags = enter_critical_section(); + do + { + prescaler = getreg32(KINETIS_RTC_TPR); + seconds = getreg32(KINETIS_RTC_TSR); + prescaler2 = getreg32(KINETIS_RTC_TPR); + } + while (prescaler > prescaler2); + + leave_critical_section(flags); + + /* Build seconds + nanoseconds from seconds and prescaler register */ + + tp->tv_sec = seconds; + tp->tv_nsec = prescaler * (1000000000 / CONFIG_RTC_FREQUENCY); + return OK; +} +#endif + +/**************************************************************************** + * Name: up_rtc_settime + * + * Description: + * Set the RTC to the provided time. All RTC implementations must be able + * to set their time based on a standard timespec. + * + * Input Parameters: + * tp - the time to use + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +int up_rtc_settime(FAR const struct timespec *tp) +{ + irqstate_t flags; + uint32_t seconds, prescaler; + + seconds = tp->tv_sec; + prescaler = tp->tv_nsec * (CONFIG_RTC_FREQUENCY / 1000000000); + + flags = enter_critical_section(); + + putreg32(0, KINETIS_RTC_SR); /* Disable counter */ + + putreg32(prescaler, KINETIS_RTC_TPR); /* Always write prescaler first */ + putreg32(seconds, KINETIS_RTC_TSR); + + putreg32(RTC_SR_TCE, KINETIS_RTC_SR); /* Re-enable counter */ + + leave_critical_section(flags); + + return OK; +} + +/**************************************************************************** + * Name: kinetis_rtc_setalarm + * + * Description: + * Set up an alarm. + * + * Input Parameters: + * tp - the time to set the alarm + * callback - the function to call when the alarm expires. + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +int kinetis_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback) +{ + /* Is there already something waiting on the ALARM? */ + + if (g_alarmcb == NULL) + { + /* No.. Save the callback function pointer */ + + g_alarmcb = callback; + + /* Enable and set RTC alarm */ + + putreg32(tp->tv_sec, KINETIS_RTC_TAR); /* Set alarm (also resets + * flags) */ + putreg32(RTC_IER_TAIE, KINETIS_RTC_IER); /* Enable alarm interrupt */ + + return OK; + } + else + { + return -EBUSY; + } +} +#endif + +/**************************************************************************** + * Name: kinetis_rtc_cancelalarm + * + * Description: + * Cancel a pending alarm alarm + * + * Input Parameters: + * none + * + * Returned Value: + * Zero (OK) on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_RTC_ALARM +int kinetis_rtc_cancelalarm(void) +{ + if (g_alarmcb != NULL) + { + /* Cancel the global callback function */ + + g_alarmcb = NULL; + + /* Unset the alarm */ + + putreg32(0, KINETIS_RTC_IER); /* disable alarm interrupt */ + + return OK; + } + else + { + return -ENODATA; + } +} +#endif + +#endif /* KINETIS_RTC */ diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h index b95734a04af..38a84af6571 100644 --- a/configs/teensy-3.x/include/board.h +++ b/configs/teensy-3.x/include/board.h @@ -243,7 +243,7 @@ #endif #ifdef CONFIG_KINETIS_I2C1 -#error I2C1 not currently supported +# error I2C1 not currently supported #endif /************************************************************************************ diff --git a/configs/teensy-3.x/src/k20_boot.c b/configs/teensy-3.x/src/k20_boot.c index cfb62f9b260..e6447871e60 100644 --- a/configs/teensy-3.x/src/k20_boot.c +++ b/configs/teensy-3.x/src/k20_boot.c @@ -1,7 +1,7 @@ /************************************************************************************ * configs/teensy-3.x/src/k20_boot.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,14 +47,6 @@ #include "up_arch.h" #include "teensy-3x.h" -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Private Functions - ************************************************************************************/ - /************************************************************************************ * Public Functions ************************************************************************************/ @@ -93,8 +85,7 @@ void kinetis_boardinitialize(void) void board_initialize(void) { #if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) - //if (kinetis_i2cdev_initialize) - kinetis_i2cdev_initialize(); + kinetis_i2cdev_initialize(); #endif } #endif diff --git a/configs/teensy-3.x/src/k20_i2c.c b/configs/teensy-3.x/src/k20_i2c.c index b6393b11d1f..f1440882fde 100644 --- a/configs/teensy-3.x/src/k20_i2c.c +++ b/configs/teensy-3.x/src/k20_i2c.c @@ -1,3 +1,38 @@ +/**************************************************************************** + * configs/teensy-3.x/src/k20_i2c.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Matias v01d + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + /************************************************************************************ * Included Files ************************************************************************************/ From 45e71a140a330d6accd89f7547af02e45b30bc92 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 13 Aug 2016 18:04:09 -0600 Subject: [PATCH 044/214] Fix some alignment and long line issues --- arch/arm/src/kinetis/kinetis_i2c.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 1e0987378bc..ca0f7f66f2d 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -345,15 +345,15 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, #elif BOARD_BUS_FREQ == 36000000 if (frequency < 400000) { - putreg8(0x28, KINETIS_I2C0_F); /* 113 kHz */ + putreg8(0x28, KINETIS_I2C0_F); /* 113 kHz */ } else if (frequency < 1000000) { - putreg8(0x19, KINETIS_I2C0_F); /* 375 kHz */ + putreg8(0x19, KINETIS_I2C0_F); /* 375 kHz */ } else { - putreg8(0x0A, KINETIS_I2C0_F); /* 1 MHz */ + putreg8(0x0A, KINETIS_I2C0_F); /* 1 MHz */ } putreg8(3, KINETIS_I2C0_FLT); @@ -470,7 +470,8 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) /* Initiate actual transfer (send address) */ putreg8((I2C_M_READ & msg->flags) == I2C_M_READ ? - I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr), KINETIS_I2C0_D); + I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr), + KINETIS_I2C0_D); return OK; } @@ -620,7 +621,7 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C0_C1); } - else /* go to RX mode */ + else /* go to RX mode */ { putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST, KINETIS_I2C0_C1); @@ -648,7 +649,8 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) /* Go to TX mode */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, KINETIS_I2C0_C1); + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, + KINETIS_I2C0_C1); msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); priv->rdcnt++; @@ -704,9 +706,9 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, priv->nmsg = count; priv->state = STATE_OK; - /* Configure the I2C frequency. REVISIT: Note that the frequency is set only - * on the first message. This could be extended to support different transfer - * frequencies for each message segment. + /* Configure the I2C frequency. REVISIT: Note that the frequency is set + * only on the first message. This could be extended to support + * different transfer frequencies for each message segment. */ kinetis_i2c_setfrequency(priv, msgs->frequency); From 4b582f0ae92a41ee9e354930a48d37ef58980f88 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 14 Aug 2016 07:16:18 -0600 Subject: [PATCH 045/214] Fix some comments --- drivers/lcd/ssd1306_i2c.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c index b468cacf916..7ec7941b50b 100644 --- a/drivers/lcd/ssd1306_i2c.c +++ b/drivers/lcd/ssd1306_i2c.c @@ -92,8 +92,8 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) msg.addr = priv->addr; /* 7-bit address */ msg.flags = 0; /* Write transaction, beginning with START */ msg.buffer = txbuffer; /* Transfer from this address */ - msg.length = 2; /* Send one byte following the address - * (then STOP) */ + msg.length = 2; /* Send two bytes following the address + * then STOP */ /* Perform the transfer */ @@ -123,9 +123,9 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) * Start - I2C_Write_Address - SSD1306_Reg_Address - SSD1306_Write_Data - STOP */ - /* Send the SSD1306 register address */ + /* Send the SSD1306 register address (with no STOP) */ - regaddr = 0x40; + regaddr = 0x40; msg[0].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */ msg[0].addr = priv->addr; /* 7-bit address */ @@ -133,7 +133,7 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) msg[0].buffer = ®addr; /* Transfer from this address */ msg[0].length = 1; /* Send the one byte register address */ - /* Followed by the SSD1306 write data (with no RESTART) */ + /* Followed by the SSD1306 write data (with no RESTART, then STOP) */ msg[1].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */ msg[1].addr = priv->addr; /* 7-bit address */ From 47fae83b1654a38e6cbe45f1d861849de6336d14 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Sun, 14 Aug 2016 16:32:11 +0200 Subject: [PATCH 046/214] Add minimal support for Kamami stm32butterfly2 development board Supported is: * LED1-4 * UART2 (terminal for nsh) --- configs/Kconfig | 14 + configs/README.txt | 3 + configs/stm32butterfly2/Kconfig | 7 + configs/stm32butterfly2/include/board.h | 194 ++++ configs/stm32butterfly2/nsh/Make.defs | 117 +++ configs/stm32butterfly2/nsh/defconfig | 1139 ++++++++++++++++++++++ configs/stm32butterfly2/nsh/setenv.sh | 78 ++ configs/stm32butterfly2/scripts/dfu.ld | 116 +++ configs/stm32butterfly2/scripts/flash.ld | 116 +++ configs/stm32butterfly2/src/Makefile | 41 + configs/stm32butterfly2/src/stm32_boot.c | 50 + configs/stm32butterfly2/src/stm32_leds.c | 201 ++++ 12 files changed, 2076 insertions(+) create mode 100644 configs/stm32butterfly2/Kconfig create mode 100644 configs/stm32butterfly2/include/board.h create mode 100644 configs/stm32butterfly2/nsh/Make.defs create mode 100644 configs/stm32butterfly2/nsh/defconfig create mode 100755 configs/stm32butterfly2/nsh/setenv.sh create mode 100644 configs/stm32butterfly2/scripts/dfu.ld create mode 100644 configs/stm32butterfly2/scripts/flash.ld create mode 100644 configs/stm32butterfly2/src/Makefile create mode 100644 configs/stm32butterfly2/src/stm32_boot.c create mode 100644 configs/stm32butterfly2/src/stm32_leds.c diff --git a/configs/Kconfig b/configs/Kconfig index a46efb462a9..7f0bd8f48d2 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -936,6 +936,16 @@ config ARCH_BOARD_SPARK (http://www.spark.io). This board features the STM32103CBT6 MCU from STMicro. +config ARCH_BOARD_STM32_BUTTERFLY2 + bool "Kamami STM32Butterfly2 development board" + depends on ARCH_CHIP_STM32F107VC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + A configuration for the Kamami STM32Butterfly2 development board + based on STM32F107VC micro-controler chip with optional ETH + board. + config ARCH_BOARD_STM32_TINY bool "STM32-Tiny board" depends on ARCH_CHIP_STM32F103C8 @@ -1433,6 +1443,7 @@ config ARCH_BOARD default "shenzhou" if ARCH_BOARD_SHENZHOU default "skp16c26" if ARCH_BOARD_SKP16C26 default "spark" if ARCH_BOARD_SPARK + default "stm32butterfly2" if ARCH_BOARD_STM32_BUTTERFLY2 default "stm32_tiny" if ARCH_BOARD_STM32_TINY default "stm32f103-minimum" if ARCH_BOARD_STM32F103_MINIMUM default "stm3210e-eval" if ARCH_BOARD_STM3210E_EVAL @@ -1775,6 +1786,9 @@ endif if ARCH_BOARD_SPARK source "configs/spark/Kconfig" endif +if ARCH_BOARD_STM32_BUTTERFLY2 +source "configs/stm32butterfly2/Kconfig" +endif if ARCH_BOARD_STM32_TINY source "configs/stm32_tiny/Kconfig" endif diff --git a/configs/README.txt b/configs/README.txt index 6f30c63104c..65c481fc129 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -648,6 +648,9 @@ configs/stm3240g-eval microcontroller (ARM Cortex-M4 with FPU). This port uses a GNU Cortex-M4 toolchain (such as CodeSourcery). +configs/stm32butterfly2 + Kamami stm32butterfly2 development board with optional ETH phy. + configs/stm32f103-minimum Generic STM32F103C8T6 Minimum ARM Development Board. diff --git a/configs/stm32butterfly2/Kconfig b/configs/stm32butterfly2/Kconfig new file mode 100644 index 00000000000..9f26f5f3d27 --- /dev/null +++ b/configs/stm32butterfly2/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32_BUTTERFLY2 +endif diff --git a/configs/stm32butterfly2/include/board.h b/configs/stm32butterfly2/include/board.h new file mode 100644 index 00000000000..1fb66fa9d05 --- /dev/null +++ b/configs/stm32butterfly2/include/board.h @@ -0,0 +1,194 @@ +/******************************************************************************* + * configs/stm32butterfly2/include/board.h + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ******************************************************************************/ + +#ifndef __CONFIGS_STM32_BUTTERFLY2_INCLUDE_BOARD_H +#define __CONFIGS_STM32_BUTTERFLY2_INCLUDE_BOARD_H 1 + +/******************************************************************************* + * Included Files + ******************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +#include "stm32_rcc.h" + +/******************************************************************************* + * Pre-processor Definitions + ******************************************************************************/ + +/* Clocking *******************************************************************/ + +/* HSI - 8 MHz RC factory-trimmed + * LSI - 40 KHz RC (30-60KHz, uncalibrated) + * HSE - On-board crystal frequency is 14.7456MHz + * LSE - LSE is not connected + */ + +#define STM32_BOARD_XTAL 14745600ul + +#define STM32_HSI_FREQUENCY 8000000ul +#define STM32_LSI_FREQUENCY 40000u +#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL +#define STM32_LSE_FREQUENCY 0 + +/* PLL output is 71.8848MHz */ + +#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d4 +#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx12 +#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d4 +#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx65 +#define STM32_PLL_FREQUENCY 71884800ul + +/* SYSCLK and HCLK adre the PLL frequency */ + +#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY +#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY + +/* APB2 clock (PCLK2) is HCLK */ + +#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK +#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY +#define STM32_APB2_CLKIN STM32_PCLK2_FREQUENCY + +#define STM32APB_TIM1_CLKIN STM32_PCLK2_FREQUENCY + +/* APB1 clock (PCLK1) is HCLK/2 (35.9424MHz) */ + +#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 +#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) + +#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) + +/* LED definitions ************************************************************/ +/* There are four LEDs on stm32butterfly2 board that can be controlled by + * software. All pulled high and van be illuminated by driving the output low. + * + * LED1 PB0 + * LED2 PB1 + * LED3 PC4 + * LED4 PC5 + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED1 0 +#define BOARD_LED2 1 +#define BOARD_LED3 2 +#define BOARD_LED4 3 +#define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED1_BIT (1 << BOARD_LED1) +#define BOARD_LED2_BIT (1 << BOARD_LED2) +#define BOARD_LED3_BIT (1 << BOARD_LED3) +#define BOARD_LED4_BIT (1 << BOARD_LED4) + +/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is defined. + * In thath case, the usage by the board port is defined in include/board.h and + * src/stm32_leds.c. The LEDs are used to encode OS-related events as follows: + * + * SYMBOL Val Meaning LED state + * LED1 LED2 LED3 LED4 + * ----------------- --- ----------------------- ---- ---- ---- ---- */ +#define LED_STARTED 0 /* NuttX has been started ON OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF ON OFF OFF */ +#define LED_IRQSENABLED 2 /* Interrupts enabled OFF OFF ON OFF */ +#define LED_STACKCREATED 3 /* Idle stack created OFF OFF OFF ON */ +#define LED_INIRQ 5 /* In an interrupt N/C N/C N/C GLOW */ +#define LED_SIGNAL 6 /* In a signal handler N/C N/C N/C GLOW */ +#define LED_ASSERTION 7 /* An assertion failed N/C N/C N/C GLOW */ +#define LED_PANIC 8 /* The system has crashed N/C N/C N/C FLASH */ +#undef LED_IDLE /* MCU is is sleep mode Not used */ + +/* After booting, LED1-3 are not longer used by the system and can be used for + * other purposes by the application (Of course, all LEDs are available to the + * application if CONFIG_ARCH_LEDS is not defined. + */ + +/******************************************************************************* + * Public Data + ******************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/******************************************************************************* + * Public Function Prototypes + ******************************************************************************/ + +/******************************************************************************* + * Name: stm32_led_initialize + * + * Description: + * Initializes board specific LEDS + ******************************************************************************/ + void stm32_led_initialize(void); + +/******************************************************************************* + * Name: stm32_boardinitialize + * + * Description: + * All STM32 architectures must provide the following entry point. This + * entry point is called early in the initialization -- after all memory + * has been configured and mapped but before any devices have been + * initialized. + ******************************************************************************/ +EXTERN void stm32_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32_BUTTERFLY2_INCLUDE_BOARD_H */ diff --git a/configs/stm32butterfly2/nsh/Make.defs b/configs/stm32butterfly2/nsh/Make.defs new file mode 100644 index 00000000000..55c08e0406d --- /dev/null +++ b/configs/stm32butterfly2/nsh/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/viewtool-stm32f107/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = dfu.ld +else + LDSCRIPT = flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32butterfly2/nsh/defconfig b/configs/stm32butterfly2/nsh/defconfig new file mode 100644 index 00000000000..91c9c3ccc4b --- /dev/null +++ b/configs/stm32butterfly2/nsh/defconfig @@ -0,0 +1,1139 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +# CONFIG_STM32_HAVE_TIM8 is not set +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set +# CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32butterfly2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=1970 +CONFIG_START_MONTH=0 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=100 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +CONFIG_SCHED_CPULOAD=y +# CONFIG_SCHED_CPULOAD_EXTCLK is not set +CONFIG_SCHED_CPULOAD_TIMECONSTANT=2 +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +CONFIG_SYSLOG_TIMESTAMP=y +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +CONFIG_LIBC_STRERROR_SHORT=y +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# NxWidgets/NxWM +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_MOTD=y +# CONFIG_NSH_PLATFORM_MOTD is not set +CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you" + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_VI=y +CONFIG_SYSTEM_VI_COLS=64 +CONFIG_SYSTEM_VI_ROWS=16 +CONFIG_SYSTEM_VI_DEBUGLEVEL=0 +CONFIG_SYSTEM_VI_STACKSIZE=2048 +CONFIG_SYSTEM_VI_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32butterfly2/nsh/setenv.sh b/configs/stm32butterfly2/nsh/setenv.sh new file mode 100755 index 00000000000..8b5188cf969 --- /dev/null +++ b/configs/stm32butterfly2/nsh/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/viewtool-stm32f107/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32butterfly2/scripts/dfu.ld b/configs/stm32butterfly2/scripts/dfu.ld new file mode 100644 index 00000000000..2658216b1be --- /dev/null +++ b/configs/stm32butterfly2/scripts/dfu.ld @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/scripts/dfu.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The RAM vector table (if present) should lie at the beginning of SRAM */ + + .ram_vectors : { + *(.ram_vectors) + } > sram + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32butterfly2/scripts/flash.ld b/configs/stm32butterfly2/scripts/flash.ld new file mode 100644 index 00000000000..8b6d9332abd --- /dev/null +++ b/configs/stm32butterfly2/scripts/flash.ld @@ -0,0 +1,116 @@ +/**************************************************************************** + * configs/viewtool-stm32f107/scripts/flash.ld + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The RAM vector table (if present) should lie at the beginning of SRAM */ + + .ram_vectors : { + *(.ram_vectors) + } > sram + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32butterfly2/src/Makefile b/configs/stm32butterfly2/src/Makefile new file mode 100644 index 00000000000..f8483678fe3 --- /dev/null +++ b/configs/stm32butterfly2/src/Makefile @@ -0,0 +1,41 @@ +############################################################################ +# configs/stm32butterfly2/src/Makefile +# +# Copyright (C) 2016 Michał Łyszczek. All rights reserved. +# Author: Michał Łyszczek +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_leds.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c new file mode 100644 index 00000000000..d123369c293 --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_boot.c @@ -0,0 +1,50 @@ +/******************************************************************************* + * configs/stm32butterfly2/src/boot.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ******************************************************************************/ + +/******************************************************************************* + * Included Files + ******************************************************************************/ + +#include +#include + +/******************************************************************************* + * Public Functions + ******************************************************************************/ + +void stm32_boardinitialize(void) +{ + stm32_led_initialize(); +} diff --git a/configs/stm32butterfly2/src/stm32_leds.c b/configs/stm32butterfly2/src/stm32_leds.c new file mode 100644 index 00000000000..46ac5e6ff4f --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_leds.c @@ -0,0 +1,201 @@ +/******************************************************************************* + * configs/stm32butterfly2/src/led.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ******************************************************************************/ + +/******************************************************************************* + * Included Files + ******************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "stm32_gpio.h" + +/******************************************************************************* + * Pre-processor definitions + ******************************************************************************/ + +#define GPIO_LED1 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN0) +#define GPIO_LED2 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ + GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN1) +#define GPIO_LED3 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ + GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN4) +#define GPIO_LED4 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ + GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN5) + +/******************************************************************************* + * Private Types + ******************************************************************************/ + +/* Identifies led state */ +enum led_state +{ + LED_ON = false, + LED_OFF = true +}; + +/******************************************************************************* + * Private Functions + ******************************************************************************/ + +static void led_state(enum led_state state, unsigned int leds) +{ + if (leds & BOARD_LED1_BIT) + { + stm32_gpiowrite(GPIO_LED1, state); + } + + if (leds & BOARD_LED2_BIT) + { + stm32_gpiowrite(GPIO_LED2, state); + } + + if (leds & BOARD_LED3_BIT) + { + stm32_gpiowrite(GPIO_LED3, state); + } + + if (leds & BOARD_LED4_BIT) + { + stm32_gpiowrite(GPIO_LED4, state); + } +} + +/******************************************************************************* + * Public Functions + ******************************************************************************/ + +void stm32_led_initialize(void) +{ + stm32_configgpio(GPIO_LED1); + stm32_configgpio(GPIO_LED2); + stm32_configgpio(GPIO_LED3); + stm32_configgpio(GPIO_LED4); +} + +#ifdef CONFIG_ARCH_LEDS +void board_autoled_on(int led) +{ + switch (led) + { + case LED_STARTED: + led_state(LED_OFF, BOARD_LED2_BIT | BOARD_LED3_BIT | BOARD_LED4_BIT); + led_state(LED_ON, BOARD_LED1_BIT); + break; + + case LED_HEAPALLOCATE: + led_state(LED_OFF, BOARD_LED1_BIT | BOARD_LED3_BIT | BOARD_LED4_BIT); + led_state(LED_ON, BOARD_LED2_BIT); + break; + + case LED_IRQSENABLED: + led_state(LED_OFF, BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED4_BIT); + led_state(LED_ON, BOARD_LED3_BIT); + break; + + case LED_STACKCREATED: + led_state(LED_OFF, BOARD_LED1_BIT | BOARD_LED2_BIT | BOARD_LED3_BIT); + led_state(LED_ON, BOARD_LED4_BIT); + break; + + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + led_state(LED_ON, BOARD_LED4_BIT); + break; + } +} + +void board_autoled_off(int led) +{ + switch (led) + { + case LED_STARTED: + led_state(LED_OFF, BOARD_LED1_BIT); + break; + + case LED_HEAPALLOCATE: + led_state(LED_OFF, BOARD_LED2_BIT); + break; + + case LED_IRQSENABLED: + led_state(LED_OFF, BOARD_LED3_BIT); + break; + + case LED_STACKCREATED: + case LED_INIRQ: + case LED_SIGNAL: + case LED_ASSERTION: + case LED_PANIC: + led_state(LED_OFF, BOARD_LED4_BIT); + break; + } +} +#endif + +void board_userled_initialize(void) +{ + /* Already initialized by stm32_led_initialize. */ +} + +void board_userled(int led, bool ledon) +{ +#ifndef CONFIG_ARCH_LEDS + if (led == BOARD_LED4) + { + return; + } +#endif + unsigned int ledbit = 1 << led; + led_state(ledon, ledbit); +} + +void board_userled_all(uint8_t ledset) +{ +#ifdef CONFIG_ARCH_LEDS + led_state(LED_ON, ledset & ~BOARD_LED4_BIT); + led_state(LED_OFF, ~(ledset | BOARD_LED4_BIT)); +#else + led_state(LED_ON, ledset); + led_state(led_OFF, ~ledset); +#endif +} From 7bca86fa31dcb8586b27f0db3e5b517ad0cacaa5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Sun, 14 Aug 2016 16:33:48 +0200 Subject: [PATCH 047/214] Add support for stm32butterfly ethernet interface --- configs/stm32butterfly2/nshnet/Make.defs | 117 ++ configs/stm32butterfly2/nshnet/defconfig | 1349 ++++++++++++++++++++++ configs/stm32butterfly2/nshnet/setenv.sh | 78 ++ 3 files changed, 1544 insertions(+) create mode 100644 configs/stm32butterfly2/nshnet/Make.defs create mode 100644 configs/stm32butterfly2/nshnet/defconfig create mode 100755 configs/stm32butterfly2/nshnet/setenv.sh diff --git a/configs/stm32butterfly2/nshnet/Make.defs b/configs/stm32butterfly2/nshnet/Make.defs new file mode 100644 index 00000000000..55c08e0406d --- /dev/null +++ b/configs/stm32butterfly2/nshnet/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/viewtool-stm32f107/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = dfu.ld +else + LDSCRIPT = flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig new file mode 100644 index 00000000000..43e188960ba --- /dev/null +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -0,0 +1,1349 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +# CONFIG_STM32_HAVE_TIM8 is not set +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_PWR=y +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_ETH_REMAP=y +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCM_PROCFS is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set +# CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +# CONFIG_STM32_MII_MCO is not set +CONFIG_STM32_MII_EXTCLK=y +# CONFIG_STM32_AUTONEG is not set +CONFIG_STM32_ETHFD=y +CONFIG_STM32_ETH100MBPS=y +# CONFIG_STM32_ETH_PTP is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32butterfly2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=1970 +CONFIG_START_MONTH=0 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=100 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +CONFIG_SCHED_CPULOAD=y +# CONFIG_SCHED_CPULOAD_EXTCLK is not set +CONFIG_SCHED_CPULOAD_TIMECONSTANT=2 +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +CONFIG_SYSLOG_TIMESTAMP=y +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +# CONFIG_NET_SOCKOPTS is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=4 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +# CONFIG_NET_TCP_SPLIT is not set +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +# CONFIG_NET_UDP is not set + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="kurwistm" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +CONFIG_LIBC_STRERROR_SHORT=y +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# NxWidgets/NxWM +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_XMLRPC is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_MOTD=y +# CONFIG_NSH_PLATFORM_MOTD is not set +CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you" + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT=y +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a01010a +CONFIG_NSH_DRIPADDR=0x0a010101 +CONFIG_NSH_NETMASK=0xffffff00 +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_VI=y +CONFIG_SYSTEM_VI_COLS=64 +CONFIG_SYSTEM_VI_ROWS=16 +CONFIG_SYSTEM_VI_DEBUGLEVEL=0 +CONFIG_SYSTEM_VI_STACKSIZE=2048 +CONFIG_SYSTEM_VI_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32butterfly2/nshnet/setenv.sh b/configs/stm32butterfly2/nshnet/setenv.sh new file mode 100755 index 00000000000..8b5188cf969 --- /dev/null +++ b/configs/stm32butterfly2/nshnet/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/viewtool-stm32f107/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" From 8c396a298637011f3379bf6566cfe2c8a8bc024c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Sun, 14 Aug 2016 17:16:49 +0200 Subject: [PATCH 048/214] Add adc support (on-board potentiometer) --- configs/stm32butterfly2/include/board.h | 6 ++ configs/stm32butterfly2/nshnet/defconfig | 69 +++++++++++++++++++-- configs/stm32butterfly2/src/Makefile | 4 ++ configs/stm32butterfly2/src/stm32_adc.c | 78 ++++++++++++++++++++++++ configs/stm32butterfly2/src/stm32_boot.c | 5 ++ 5 files changed, 158 insertions(+), 4 deletions(-) create mode 100644 configs/stm32butterfly2/src/stm32_adc.c diff --git a/configs/stm32butterfly2/include/board.h b/configs/stm32butterfly2/include/board.h index 1fb66fa9d05..2fbe7d47961 100644 --- a/configs/stm32butterfly2/include/board.h +++ b/configs/stm32butterfly2/include/board.h @@ -148,6 +148,12 @@ * application if CONFIG_ARCH_LEDS is not defined. */ +/* ADC configuration. Right now only ADC12_IN10 is supported (potentiometer) */ + +#ifdef CONFIG_STM32_ADC2 +# error "CONFIG_STM32_ADC2 is not supported" +#endif + /******************************************************************************* * Public Data ******************************************************************************/ diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index 43e188960ba..ea829b59101 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -43,7 +43,38 @@ CONFIG_RAW_BINARY=y # Debug Options # CONFIG_DEBUG_ALERT=y -# CONFIG_DEBUG_FEATURES is not set +CONFIG_DEBUG_FEATURES=y + +# +# Debug SYSLOG Output Controls +# +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_WARN=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_ASSERTIONS is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_NET is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_ANALOG is not set +# CONFIG_DEBUG_GPIO is not set CONFIG_ARCH_HAVE_STACKCHECK=y # CONFIG_STACK_COLORATION is not set CONFIG_ARCH_HAVE_HEAPCHECK=y @@ -130,6 +161,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set # # ARMV7M Configuration Options @@ -365,7 +397,7 @@ CONFIG_STM32_HAVE_SPI3=y # CONFIG_STM32_HAVE_SPI6 is not set # CONFIG_STM32_HAVE_SAIPLL is not set # CONFIG_STM32_HAVE_I2SPLL is not set -# CONFIG_STM32_ADC1 is not set +CONFIG_STM32_ADC1=y # CONFIG_STM32_ADC2 is not set # CONFIG_STM32_BKP is not set # CONFIG_STM32_CAN1 is not set @@ -396,6 +428,7 @@ CONFIG_STM32_USART2=y # CONFIG_STM32_UART5 is not set # CONFIG_STM32_IWDG is not set # CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y # CONFIG_STM32_NOEXT_VECTORS is not set # @@ -421,6 +454,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set + +# +# ADC Configuration +# CONFIG_STM32_USART=y CONFIG_STM32_SERIALDRIVER=y @@ -555,7 +592,14 @@ CONFIG_ARCH_HAVE_BUTTONS=y # Board-Specific Options # # CONFIG_BOARD_CRASHDUMP is not set -# CONFIG_LIB_BOARDCTL is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -693,7 +737,14 @@ CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_TIMER is not set # CONFIG_RTC is not set # CONFIG_WATCHDOG is not set -# CONFIG_ANALOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set # CONFIG_AUDIO_DEVICES is not set # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set @@ -732,6 +783,7 @@ CONFIG_NETDEVICES=y # CONFIG_NETDEV_MULTINIC is not set # CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set # CONFIG_NETDEV_LATEINIT is not set +# CONFIG_NET_DUMPPACKET is not set # # External Ethernet MAC Device Support @@ -762,6 +814,7 @@ CONFIG_ETH0_PHY_DP83848C=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_NETDEV_PHY_DEBUG is not set # CONFIG_PIPES is not set # CONFIG_PM is not set # CONFIG_POWER is not set @@ -800,6 +853,7 @@ CONFIG_SERIAL_NPOLLWAITERS=2 # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y CONFIG_USART2_SERIAL_CONSOLE=y # CONFIG_OTHER_SERIAL_CONSOLE is not set @@ -938,6 +992,7 @@ CONFIG_NET_IOB=y CONFIG_IOB_NBUFFERS=24 CONFIG_IOB_BUFSIZE=196 CONFIG_IOB_NCHAINS=8 +# CONFIG_IOB_DEBUG is not set # CONFIG_NET_ARCH_INCR32 is not set # CONFIG_NET_ARCH_CHKSUM is not set # CONFIG_NET_STATISTICS is not set @@ -1094,6 +1149,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_GROUPSIZE=4 +CONFIG_EXAMPLES_ADC_SWTRIG=y # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_DHCPD is not set @@ -1139,6 +1198,7 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WEBSERVER is not set @@ -1297,6 +1357,7 @@ CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 +# CONFIG_NSH_NETINIT_DEBUG is not set # # IP Address Configuration diff --git a/configs/stm32butterfly2/src/Makefile b/configs/stm32butterfly2/src/Makefile index f8483678fe3..547a536c57b 100644 --- a/configs/stm32butterfly2/src/Makefile +++ b/configs/stm32butterfly2/src/Makefile @@ -38,4 +38,8 @@ ASRCS = CSRCS = stm32_boot.c stm32_leds.c +ifeq ($(CONFIG_STM32_ADC),y) +CSRCS += stm32_adc.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32butterfly2/src/stm32_adc.c b/configs/stm32butterfly2/src/stm32_adc.c new file mode 100644 index 00000000000..02fa3fe2387 --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_adc.c @@ -0,0 +1,78 @@ +/******************************************************************************* + * configs/stm32butterfly2/src/stm32_adc.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ******************************************************************************/ + +/******************************************************************************* + * Included Files + ******************************************************************************/ + +#include +#include +#include +#include +#include + +/******************************************************************************* + * Public Functions + ******************************************************************************/ + +int board_adc_setup(void) +{ + static bool initialized = false; + uint8_t channel[1] = {10}; + struct adc_dev_s *adc; + int rv; + + if (initialized) + { + return OK; + } + + stm32_configgpio(GPIO_ADC12_IN10); + adc = stm32_adcinitialize(1, channel, 1); + if (adc == NULL) + { + aerr("ERROR: Failed to get adc interface\n"); + return -ENODEV; + } + + if ((rv = adc_register("/dev/adc0", adc)) < 0) + { + aerr("ERROR: adc_register failed: %d\n", rv); + return rv; + } + + initialized = true; + return OK; +} diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c index d123369c293..008a2b70207 100644 --- a/configs/stm32butterfly2/src/stm32_boot.c +++ b/configs/stm32butterfly2/src/stm32_boot.c @@ -48,3 +48,8 @@ void stm32_boardinitialize(void) { stm32_led_initialize(); } + +int board_app_initialize(uintptr_t arg) +{ + return 0; +} From 014b8268ccfd4cf92c383cfac2ddb9ea98cb4d42 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 14 Aug 2016 10:14:28 -0600 Subject: [PATCH 049/214] Minor stylistic corrections --- TODO | 3 +-- arch/arm/src/kinetis/kinetis_i2c.c | 21 ++++++++++----------- 2 files changed, 11 insertions(+), 13 deletions(-) diff --git a/TODO b/TODO index 5e38398b921..2123ce52604 100644 --- a/TODO +++ b/TODO @@ -927,8 +927,7 @@ o Network (net/, drivers/net) CONFIG_NET_NOINTS). This is really a very bad use of CPU resources; All of the network stack processing should be modified to use a work queue (and, all use of CONFIG_NET_NOINTS=n - should be eliminated). This applies to almost all Ethernet - drivers: + should be eliminated). This applies to many Ethernet drivers: ARCHITECTURE CONFIG_NET_NOINTS? ADDRESS FILTER SUPPORT? C5471 NO NO diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index ca0f7f66f2d..462e214c1bc 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -111,13 +111,7 @@ struct kinetis_i2cdev_s }; /**************************************************************************** - * Private Data - ****************************************************************************/ - -static struct kinetis_i2cdev_s g_i2c_dev; - -/**************************************************************************** - * Private Functions + * Private Function Prototypes ****************************************************************************/ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv); @@ -133,10 +127,10 @@ static int kinetis_i2c_reset(FAR struct i2c_master_s *dev); #endif /**************************************************************************** - * I2C device operations + * Private Data ****************************************************************************/ -struct i2c_ops_s kinetis_i2c_ops = +static const struct i2c_ops_s g_i2c_ops = { .transfer = kinetis_i2c_transfer #ifdef CONFIG_I2C_RESET @@ -144,6 +138,12 @@ struct i2c_ops_s kinetis_i2c_ops = #endif }; +static struct kinetis_i2cdev_s g_i2c_dev; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + /**************************************************************************** * Name: kinetis_i2c_setfrequency * @@ -575,7 +575,6 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) /* Clear interrupt */ putreg8(I2C_S_IICIF, KINETIS_I2C0_S); - regval = getreg8(KINETIS_I2C0_C1); /* TX mode */ @@ -862,7 +861,7 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) /* Install our operations */ - priv->dev.ops = &kinetis_i2c_ops; + priv->dev.ops = &g_i2c_ops; return &priv->dev; } From 02a7fd24303aa21e727413399d75f0b3170f226d Mon Sep 17 00:00:00 2001 From: v01d Date: Sun, 14 Aug 2016 14:45:20 -0300 Subject: [PATCH 050/214] Make OLED 132x64 use 128x64 for the time being --- drivers/lcd/ssd1306.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/lcd/ssd1306.h b/drivers/lcd/ssd1306.h index 6dabca1d7cb..095903f9473 100644 --- a/drivers/lcd/ssd1306.h +++ b/drivers/lcd/ssd1306.h @@ -159,7 +159,7 @@ # define SSD1306_DEV_PAGES 4 /* 4 pages */ # define SSD1306_DEV_CMNPAD 0x02 /* COM configuration */ #elif defined(CONFIG_LCD_SH1106_OLED_132) -# define SSD1306_DEV_NATIVE_XRES 132 /* Full 132 columns used */ +# define SSD1306_DEV_NATIVE_XRES 128 /* Only 128 columns used, supporting 132 is a bit difficult */ # define SSD1306_DEV_NATIVE_YRES 64 /* 8 pages each 8 rows */ # define SSD1306_DEV_XOFFSET 0 /* Offset to logical column 0 */ # define SSD1306_DEV_PAGES 8 /* 8 pages */ @@ -179,7 +179,7 @@ /* Bytes per logical row and actual device row */ #if defined(CONFIG_LCD_SH1106_OLED_132) -# define SSD1306_DEV_XSTRIDE ((SSD1306_DEV_XRES >> 3) + 4) +#define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) #else # define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) #endif From 943c85393908c30e1e1a0ea4b99d961cabf58f88 Mon Sep 17 00:00:00 2001 From: v01d Date: Sun, 14 Aug 2016 16:22:32 -0300 Subject: [PATCH 051/214] semantic changes --- drivers/lcd/ssd1306_i2c.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c index b468cacf916..fccb44f215a 100644 --- a/drivers/lcd/ssd1306_i2c.c +++ b/drivers/lcd/ssd1306_i2c.c @@ -115,22 +115,22 @@ void ssd1306_sendbyte(FAR struct ssd1306_dev_s *priv, uint8_t regval) void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) { struct i2c_msg_s msg[2]; - uint8_t regaddr; + uint8_t transfer_mode; int ret; /* 8-bit data read sequence: * - * Start - I2C_Write_Address - SSD1306_Reg_Address - SSD1306_Write_Data - STOP + * Start - I2C_Write_Address - Data transfer select - SSD1306_Write_Data - STOP */ - /* Send the SSD1306 register address */ + /* Select data transfer */ - regaddr = 0x40; + transfer_mode = 0x40; msg[0].frequency = CONFIG_SSD1306_I2CFREQ; /* I2C frequency */ msg[0].addr = priv->addr; /* 7-bit address */ msg[0].flags = 0; /* Write transaction, beginning with START */ - msg[0].buffer = ®addr; /* Transfer from this address */ + msg[0].buffer = &transfer_mode; /* Transfer mode send */ msg[0].length = 1; /* Send the one byte register address */ /* Followed by the SSD1306 write data (with no RESTART) */ From 239c56f3b915de1652fe30dfe7eae33c624ce9a7 Mon Sep 17 00:00:00 2001 From: v01d Date: Sun, 14 Aug 2016 16:22:19 -0300 Subject: [PATCH 052/214] support NORESTART --- arch/arm/src/kinetis/kinetis_i2c.c | 97 +++++++++++++++++++++++++----- 1 file changed, 82 insertions(+), 15 deletions(-) diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index ca0f7f66f2d..51f0890dd89 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -102,6 +102,8 @@ struct kinetis_i2cdev_s WDOG_ID timeout; /* watchdog to timeout when bus hung */ uint32_t frequency; /* Current I2C frequency */ + int restart; /* Should next transfer restart or not */ + struct i2c_msg_s *msgs; /* remaining transfers - first one is in * progress */ unsigned int nmsg; /* number of transfer remaining */ @@ -523,7 +525,13 @@ void kinetis_i2c_nextmsg(struct kinetis_i2cdev_s *priv) if (priv->nmsg > 0) { priv->msgs++; - sem_post(&priv->wait); + priv->wrcnt = 0; + priv->rdcnt = 0; + + if (priv->restart) + { + sem_post(&priv->wait); + } } else { @@ -602,6 +610,16 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) /* Continue with next message */ kinetis_i2c_nextmsg(priv); + + if (!priv->restart) + { + /* Initiate transfer of following message */ + + putreg8(priv->msgs->buffer[priv->wrcnt], KINETIS_I2C0_D); + priv->wrcnt++; + + sem_post(&priv->wait); + } } else { @@ -616,7 +634,8 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) else { - if (msg->length == 1) /* go to RX mode, do not send ACK */ + if (msg->length == 1 && priv->restart) /* go to RX mode, + do not send ACK */ { putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C0_C1); @@ -643,14 +662,28 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) if (priv->rdcnt == (msg->length - 1)) { - /* go to TX mode before last read, otherwise a new read is - * triggered. - */ + if (priv->restart) + { + /* go to TX mode before last read, otherwise a new read is + * triggered. + */ - /* Go to TX mode */ + /* Go to TX mode */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, - KINETIS_I2C0_C1); + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, + KINETIS_I2C0_C1); + } + else if ((priv->msgs + 1)->length == 1) + { + /* we will continue reception on next message. + * if next message is length == 1, this is actually the 2nd to + * last byte, so do not send ACK */ + + /* Do not ACK any more */ + + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, + KINETIS_I2C0_C1); + } msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); priv->rdcnt++; @@ -662,10 +695,13 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) else if (priv->rdcnt == (msg->length - 2)) { - /* Do not ACK any more */ + if (priv->restart) + { + /* Do not ACK any more */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, - KINETIS_I2C0_C1); + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, + KINETIS_I2C0_C1); + } msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); priv->rdcnt++; @@ -693,6 +729,7 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs, int count) { struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; + int msg_n; DEBUGASSERT(dev != NULL); @@ -702,9 +739,12 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, /* Set up for the transfer */ + msg_n = 0; priv->msgs = msgs; priv->nmsg = count; priv->state = STATE_OK; + priv->wrcnt = 0; + priv->rdcnt = 0; /* Configure the I2C frequency. REVISIT: Note that the frequency is set * only on the first message. This could be extended to support @@ -721,12 +761,37 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, while (priv->nmsg && priv->state == STATE_OK) { - priv->wrcnt = 0; - priv->rdcnt = 0; + priv->restart = 1; - /* Initiate the transfer */ + /* process NORESTART flag */ - kinetis_i2c_start(priv); + if (priv->nmsg > 1) + { + struct i2c_msg_s* nextmsg = (priv->msgs + 1); + + /* if there is a following message with "norestart" flag of + * the same type as the current one, we can avoid the restart + */ + + if ((nextmsg->flags & I2C_M_NORESTART) && + nextmsg->addr == priv->msgs->addr && + nextmsg->frequency == priv->msgs->frequency && + (nextmsg->flags & I2C_M_READ) == (priv->msgs->flags & I2C_M_READ)) + { + /* "no restart" can be performed */ + + priv->restart = 0; + } + } + + /* only send start when required (we are trusting the flags setting to be correctly used here) */ + + if (!(priv->msgs->flags & I2C_M_NORESTART)) + { + /* Initiate the transfer, in case restart is required */ + + kinetis_i2c_start(priv); + } /* Wait for transfer complete */ @@ -735,6 +800,8 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, sem_wait(&priv->wait); wd_cancel(priv->timeout); + + msg_n++; } /* Disable interrupts */ From f84780f36e857356190edeef7448d48e245e334f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 14 Aug 2016 13:38:47 -0600 Subject: [PATCH 053/214] Changes from review of PR 114 --- arch/arm/src/kinetis/kinetis_i2c.c | 46 ++++++++++++++++-------------- include/nuttx/i2c/i2c_master.h | 2 +- 2 files changed, 26 insertions(+), 22 deletions(-) diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index b0cb733644d..1496a552322 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -94,17 +94,15 @@ struct kinetis_i2cdev_s struct i2c_master_s dev; /* Generic I2C device */ unsigned int base; /* Base address of registers */ uint16_t irqid; /* IRQ for this device */ - uint32_t baseFreq; /* branch frequency */ + uint32_t basefreq; /* branch frequency */ sem_t mutex; /* Only one thread can access at a time */ sem_t wait; /* Place to wait for state machine completion */ volatile uint8_t state; /* State of state machine */ WDOG_ID timeout; /* watchdog to timeout when bus hung */ uint32_t frequency; /* Current I2C frequency */ - - int restart; /* Should next transfer restart or not */ - - struct i2c_msg_s *msgs; /* remaining transfers - first one is in + bool restart; /* Should next transfer restart or not */ + struct i2c_msg_s *msgs; /* Remaining transfers - first one is in * progress */ unsigned int nmsg; /* number of transfer remaining */ @@ -633,14 +631,17 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) else { - if (msg->length == 1 && priv->restart) /* go to RX mode, - do not send ACK */ + if (msg->length == 1 && priv->restart) { + /* Go to RX mode, do not send ACK */ + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C0_C1); } - else /* go to RX mode */ + else { + /* Go to RX mode */ + putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST, KINETIS_I2C0_C1); } @@ -663,7 +664,7 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) { if (priv->restart) { - /* go to TX mode before last read, otherwise a new read is + /* Go to TX mode before last read, otherwise a new read is * triggered. */ @@ -674,9 +675,10 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) } else if ((priv->msgs + 1)->length == 1) { - /* we will continue reception on next message. - * if next message is length == 1, this is actually the 2nd to - * last byte, so do not send ACK */ + /* We will continue reception on next message. + * if next message is length == 1, this is actually the + * 2nd to last byte, so do not send ACK. + */ /* Do not ACK any more */ @@ -738,9 +740,9 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, /* Set up for the transfer */ - msg_n = 0; - priv->msgs = msgs; - priv->nmsg = count; + msg_n = 0; + priv->msgs = msgs; + priv->nmsg = count; priv->state = STATE_OK; priv->wrcnt = 0; priv->rdcnt = 0; @@ -760,15 +762,15 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, while (priv->nmsg && priv->state == STATE_OK) { - priv->restart = 1; + priv->restart = true; - /* process NORESTART flag */ + /* Process NORESTART flag */ if (priv->nmsg > 1) { struct i2c_msg_s* nextmsg = (priv->msgs + 1); - /* if there is a following message with "norestart" flag of + /* If there is a following message with "norestart" flag of * the same type as the current one, we can avoid the restart */ @@ -779,11 +781,13 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, { /* "no restart" can be performed */ - priv->restart = 0; + priv->restart = false; } } - /* only send start when required (we are trusting the flags setting to be correctly used here) */ + /* Only send start when required (we are trusting the flags setting to + * be correctly used here). + */ if (!(priv->msgs->flags & I2C_M_NORESTART)) { @@ -874,7 +878,7 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) priv = &g_i2c_dev; priv->base = KINETIS_I2C0_BASE; priv->irqid = KINETIS_IRQ_I2C0; - priv->baseFreq = BOARD_BUS_FREQ; + priv->basefreq = BOARD_BUS_FREQ; /* Enable clock */ diff --git a/include/nuttx/i2c/i2c_master.h b/include/nuttx/i2c/i2c_master.h index c3684398ee6..da759de19ae 100644 --- a/include/nuttx/i2c/i2c_master.h +++ b/include/nuttx/i2c/i2c_master.h @@ -205,7 +205,7 @@ struct i2c_master_s struct i2c_transfer_s { FAR struct i2c_msg_s *msgv; /* Array of I2C messages for the transfer */ - size_t msgc; /* Number of messges in the array. */ + size_t msgc; /* Number of messages in the array. */ }; /**************************************************************************** From 32ebeb15b4e429bd2029bbb8e73ee6611321bb64 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 14 Aug 2016 13:47:07 -0600 Subject: [PATCH 054/214] Trivial changes from review of PR 115 --- drivers/lcd/ssd1306.h | 3 ++- drivers/lcd/ssd1306_i2c.c | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/lcd/ssd1306.h b/drivers/lcd/ssd1306.h index 095903f9473..b04f2bc4009 100644 --- a/drivers/lcd/ssd1306.h +++ b/drivers/lcd/ssd1306.h @@ -179,7 +179,7 @@ /* Bytes per logical row and actual device row */ #if defined(CONFIG_LCD_SH1106_OLED_132) -#define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) +# define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) #else # define SSD1306_DEV_XSTRIDE (SSD1306_DEV_XRES >> 3) #endif @@ -285,3 +285,4 @@ static inline void ssd1306_configspi(FAR struct spi_dev_s *spi) #endif #endif /* __DRIVERS_LCD_SSD1306_H */ + diff --git a/drivers/lcd/ssd1306_i2c.c b/drivers/lcd/ssd1306_i2c.c index 314ad8fa911..04a2e9ee362 100644 --- a/drivers/lcd/ssd1306_i2c.c +++ b/drivers/lcd/ssd1306_i2c.c @@ -149,3 +149,4 @@ void ssd1306_sendblk(FAR struct ssd1306_dev_s *priv, uint8_t *data, uint8_t len) } #endif /* CONFIG_LCD_SSD1306 &7 CONFIG_LCD_SSD1306_I2C */ + From 053aea552f3f00f79f379aa750ae15ad0bdf0c99 Mon Sep 17 00:00:00 2001 From: Piotr Mienkowski Date: Mon, 15 Aug 2016 08:00:36 -0600 Subject: [PATCH 055/214] Add support for SAMV7 DACC module --- arch/arm/src/samv7/Make.defs | 4 + arch/arm/src/samv7/chip/sam_dacc.h | 226 ++++++ arch/arm/src/samv7/sam_dac.c | 658 ++++++++++++++++++ arch/arm/src/samv7/sam_dac.h | 129 ++++ configs/same70-xplained/src/Makefile | 4 + configs/same70-xplained/src/sam_bringup.c | 8 + configs/same70-xplained/src/sam_dac.c | 123 ++++ configs/same70-xplained/src/same70-xplained.h | 12 + drivers/analog/dac.c | 7 +- 9 files changed, 1170 insertions(+), 1 deletion(-) create mode 100644 arch/arm/src/samv7/chip/sam_dacc.h create mode 100644 arch/arm/src/samv7/sam_dac.c create mode 100644 arch/arm/src/samv7/sam_dac.h create mode 100644 configs/same70-xplained/src/sam_dac.c diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs index 66c51a9acb9..5a497b3356b 100644 --- a/arch/arm/src/samv7/Make.defs +++ b/arch/arm/src/samv7/Make.defs @@ -214,3 +214,7 @@ endif ifeq ($(CONFIG_SAMV7_PROGMEM),y) CHIP_CSRCS += sam_progmem.c endif + +ifneq (,$(findstring y,$(CONFIG_SAMV7_DAC0) $(CONFIG_SAMV7_DAC1))) +CHIP_CSRCS += sam_dac.c +endif diff --git a/arch/arm/src/samv7/chip/sam_dacc.h b/arch/arm/src/samv7/chip/sam_dacc.h new file mode 100644 index 00000000000..a40b0d09e5a --- /dev/null +++ b/arch/arm/src/samv7/chip/sam_dacc.h @@ -0,0 +1,226 @@ +/**************************************************************************************** + * arch/arm/src/samv7/chip/sam_dacc.h + * Digital-to-Analog Converter Controller (DACC) for the SAMV7 + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H +#define __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H + +/**************************************************************************************** + * Included Files + ****************************************************************************************/ + +#include + +#include "chip.h" +#include "chip/sam_memorymap.h" + +/**************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************/ + +/* DACC register offsets *****************************************************************/ + +#define SAM_DACC_CR_OFFSET 0x0000 /* Control Register */ +#define SAM_DACC_MR_OFFSET 0x0004 /* Mode Register */ +#define SAM_DACC_TRIGR_OFFSET 0x0008 /* Trigger Register */ +#define SAM_DACC_CHER_OFFSET 0x0010 /* Channel Enable Register */ +#define SAM_DACC_CHDR_OFFSET 0x0014 /* Channel Disable Register */ +#define SAM_DACC_CHSR_OFFSET 0x0018 /* Channel Status Register */ +#define SAM_DACC_CDR0_OFFSET 0x001c /* Conversion Data Register 0 */ +#define SAM_DACC_CDR1_OFFSET 0x0020 /* Conversion Data Register 1 */ +#define SAM_DACC_IER_OFFSET 0x0024 /* Interrupt Enable Register */ +#define SAM_DACC_IDR_OFFSET 0x0028 /* Interrupt Disable Register */ +#define SAM_DACC_IMR_OFFSET 0x002c /* Interrupt Mask Register */ +#define SAM_DACC_ISR_OFFSET 0x0030 /* Interrupt Status Register */ +#define SAM_DACC_ACR_OFFSET 0x0094 /* Analog Current Register */ +#define SAM_DACC_WPMR_OFFSET 0x00e4 /* Write Protect Mode register */ +#define SAM_DACC_WPSR_OFFSET 0x00e8 /* Write Protect Status register */ + +/* DACC register addresses **************************************************************/ + +#define SAM_DACC_CR (SAM_DACC_BASE+SAM_DACC_CR_OFFSET) +#define SAM_DACC_MR (SAM_DACC_BASE+SAM_DACC_MR_OFFSET) +#define SAM_DACC_TRIGR (SAM_DACC_BASE+SAM_DACC_TRIGR_OFFSET) +#define SAM_DACC_CHER (SAM_DACC_BASE+SAM_DACC_CHER_OFFSET) +#define SAM_DACC_CHDR (SAM_DACC_BASE+SAM_DACC_CHDR_OFFSET) +#define SAM_DACC_CHSR (SAM_DACC_BASE+SAM_DACC_CHSR_OFFSET) +#define SAM_DACC_CDR0 (SAM_DACC_BASE+SAM_DACC_CDR0_OFFSET) +#define SAM_DACC_CDR1 (SAM_DACC_BASE+SAM_DACC_CDR1_OFFSET) +#define SAM_DACC_IER (SAM_DACC_BASE+SAM_DACC_IER_OFFSET) +#define SAM_DACC_IDR (SAM_DACC_BASE+SAM_DACC_IDR_OFFSET) +#define SAM_DACC_IMR (SAM_DACC_BASE+SAM_DACC_IMR_OFFSET) +#define SAM_DACC_ISR (SAM_DACC_BASE+SAM_DACC_ISR_OFFSET) +#define SAM_DACC_ACR (SAM_DACC_BASE+SAM_DACC_ACR_OFFSET) +#define SAM_DACC_WPMR (SAM_DACC_BASE+SAM_DACC_WPMR_OFFSET) +#define SAM_DACC_WPSR (SAM_DACC_BASE+SAM_DACC_WPSR_OFFSET) + +/* DACC register bit definitions ********************************************************/ + +/* Control Register */ + +#define DACC_CR_SWRST (1 << 0) /* Bit 0: Software reset */ + +/* Mode Register */ + +#define DACC_MR_MAXS0 (1 << 0) /* Max Speed Mode for Channel 0 */ +# define DACC_MR_MAXS0_TRIG_EVENT (0 << 0) /* External trigger mode or Free-running mode enabled */ +# define DACC_MR_MAXS0_MAXIMUM (1 << 0) /* Max speed mode enabled */ +#define DACC_MR_MAXS1 (1 << 1) /* Max Speed Mode for Channel 1 */ +# define DACC_MR_MAXS1_TRIG_EVENT (0 << 1) /* External trigger mode or Free-running mode enabled */ +# define DACC_MR_MAXS1_MAXIMUM (1 << 1) /* Max speed mode enabled */ +#define DACC_MR_WORD (1 << 4) /* Word Transfer Mode */ +# define DACC_MR_WORD_DISABLED (0 << 4) /* One data to convert is written to the FIFO per access to DACC */ +# define DACC_MR_WORD_ENABLED (1 << 4) /* Two data to convert are written to the FIFO per access to DACC */ +#define DACC_MR_ZERO (1 << 5) /* Must always be written to 0 */ +#define DACC_MR_DIFF (1 << 23) /* Differential Mode */ +# define DACC_MR_DIFF_DISABLED (0 << 23) /* DAC0 and DAC1 are single-ended outputs */ +# define DACC_MR_DIFF_ENABLED (1 << 23) /* DACP and DACN are differential outputs. The differential level is configured by the channel 0 value. */ +#define DACC_MR_PRESCALER_SHIFT (24) +#define DACC_MR_PRESCALER_MASK (0xfu << DACC_MR_PRESCALER_SHIFT) /* Peripheral Clock to DAC Clock Ratio */ +#define DACC_MR_PRESCALER(value) ((DACC_MR_PRESCALER_MASK & ((value) << DACC_MR_PRESCALER_SHIFT))) +# define DACC_MR_PRESCALER_2 (0 << DACC_MR_PRESCALER_SHIFT) /* 2 periods of DAC Clock */ +# define DACC_MR_PRESCALER_3 (1 << DACC_MR_PRESCALER_SHIFT) /* 3 periods of DAC Clock */ +# define DACC_MR_PRESCALER_4 (2 << DACC_MR_PRESCALER_SHIFT) /* 4 periods of DAC Clock */ +# define DACC_MR_PRESCALER_5 (3 << DACC_MR_PRESCALER_SHIFT) /* 5 periods of DAC Clock */ +# define DACC_MR_PRESCALER_6 (4 << DACC_MR_PRESCALER_SHIFT) /* 6 periods of DAC Clock */ +# define DACC_MR_PRESCALER_7 (5 << DACC_MR_PRESCALER_SHIFT) /* 7 periods of DAC Clock */ +# define DACC_MR_PRESCALER_8 (6 << DACC_MR_PRESCALER_SHIFT) /* 8 periods of DAC Clock */ +# define DACC_MR_PRESCALER_9 (7 << DACC_MR_PRESCALER_SHIFT) /* 9 periods of DAC Clock */ +# define DACC_MR_PRESCALER_10 (8 << DACC_MR_PRESCALER_SHIFT) /* 10 periods of DAC Clock */ +# define DACC_MR_PRESCALER_11 (9 << DACC_MR_PRESCALER_SHIFT) /* 11 periods of DAC Clock */ +# define DACC_MR_PRESCALER_12 (10 << DACC_MR_PRESCALER_SHIFT) /* 12 periods of DAC Clock */ +# define DACC_MR_PRESCALER_13 (11 << DACC_MR_PRESCALER_SHIFT) /* 13 periods of DAC Clock */ +# define DACC_MR_PRESCALER_14 (12 << DACC_MR_PRESCALER_SHIFT) /* 14 periods of DAC Clock */ +# define DACC_MR_PRESCALER_15 (13 << DACC_MR_PRESCALER_SHIFT) /* 15 periods of DAC Clock */ +# define DACC_MR_PRESCALER_16 (14 << DACC_MR_PRESCALER_SHIFT) /* 16 periods of DAC Clock */ +# define DACC_MR_PRESCALER_17 (15 << DACC_MR_PRESCALER_SHIFT) /* 17 periods of DAC Clock */ + +/* Trigger Register */ + +#define DACC_TRIGR_TRGEN0 (1 << 0) /* Trigger Enable of Channel 0 */ +# define DACC_TRIGR_TRGEN0_DIS (0 << 0) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */ +# define DACC_TRIGR_TRGEN0_EN (1 << 0) /* External trigger mode enabled. */ +#define DACC_TRIGR_TRGEN1 (1 << 1) /* Trigger Enable of Channel 1 */ +# define DACC_TRIGR_TRGEN1_DIS (0 << 1) /* External trigger mode disabled. DACC is in Free-running mode or Max speed mode. */ +# define DACC_TRIGR_TRGEN1_EN (1 << 1) /* External trigger mode enabled. */ +#define DACC_TRIGR_TRGSEL0_SHIFT (4) +#define DACC_TRIGR_TRGSEL0_MASK (0x7u << DACC_TRIGR_TRGSEL0_SHIFT) /* Trigger Selection of Channel 0 */ +#define DACC_TRIGR_TRGSEL0(value) ((DACC_TRIGR_TRGSEL0_MASK & ((value) << DACC_TRIGR_TRGSEL0_SHIFT))) +# define DACC_TRIGR_TRGSEL0_DATRG (0 << 4) /* DATRG output */ +# define DACC_TRIGR_TRGSEL0_TC0 (1 << 4) /* TC0 output */ +# define DACC_TRIGR_TRGSEL0_TC1 (2 << 4) /* TC1 output */ +# define DACC_TRIGR_TRGSEL0_TC2 (3 << 4) /* TC2 output */ +# define DACC_TRIGR_TRGSEL0_PWM0EV0 (4 << 4) /* PWM0 event 0 */ +# define DACC_TRIGR_TRGSEL0_PWM0EV1 (5 << 4) /* PWM0 event 1 */ +# define DACC_TRIGR_TRGSEL0_PWM1EV0 (6 << 4) /* PWM1 event 0 */ +# define DACC_TRIGR_TRGSEL0_PWM1EV1 (7 << 4) /* PWM1 event 1 */ +#define DACC_TRIGR_TRGSEL1_SHIFT (8) +#define DACC_TRIGR_TRGSEL1_MASK (0x7u << DACC_TRIGR_TRGSEL1_SHIFT) /* Trigger Selection of Channel 1 */ +#define DACC_TRIGR_TRGSEL1(value) ((DACC_TRIGR_TRGSEL1_MASK & ((value) << DACC_TRIGR_TRGSEL1_SHIFT))) +# define DACC_TRIGR_TRGSEL1_DATRG (0 << 8) /* DATRG output */ +# define DACC_TRIGR_TRGSEL1_TC0 (1 << 8) /* TC0 output */ +# define DACC_TRIGR_TRGSEL1_TC1 (2 << 8) /* TC1 output */ +# define DACC_TRIGR_TRGSEL1_TC2 (3 << 8) /* TC2 output */ +# define DACC_TRIGR_TRGSEL1_PWM0EV0 (4 << 8) /* PWM0 event 0 */ +# define DACC_TRIGR_TRGSEL1_PWM0EV1 (5 << 8) /* PWM0 event 1 */ +# define DACC_TRIGR_TRGSEL1_PWM1EV0 (6 << 8) /* PWM1 event 0 */ +# define DACC_TRIGR_TRGSEL1_PWM1EV1 (7 << 8) /* PWM1 event 1 */ +#define DACC_TRIGR_OSR0_SHIFT (16) +#define DACC_TRIGR_OSR0_MASK (0x7u << DACC_TRIGR_OSR0_SHIFT) /* Over Sampling Ratio of Channel 0 */ +#define DACC_TRIGR_OSR0(value) ((DACC_TRIGR_OSR0_MASK & ((value) << DACC_TRIGR_OSR0_SHIFT))) +# define DACC_TRIGR_OSR0_OSR_1 (0 << 16) /* OSR = 1 */ +# define DACC_TRIGR_OSR0_OSR_2 (1 << 16) /* OSR = 2 */ +# define DACC_TRIGR_OSR0_OSR_4 (2 << 16) /* OSR = 4 */ +# define DACC_TRIGR_OSR0_OSR_8 (3 << 16) /* OSR = 8 */ +# define DACC_TRIGR_OSR0_OSR_16 (4 << 16) /* OSR = 16 */ +# define DACC_TRIGR_OSR0_OSR_32 (5 << 16) /* OSR = 32 */ +#define DACC_TRIGR_OSR1_SHIFT (20) +#define DACC_TRIGR_OSR1_MASK (0x7u << DACC_TRIGR_OSR1_SHIFT) /* Over Sampling Ratio of Channel 1 */ +#define DACC_TRIGR_OSR1(value) ((DACC_TRIGR_OSR1_MASK & ((value) << DACC_TRIGR_OSR1_SHIFT))) +# define DACC_TRIGR_OSR1_OSR_1 (0 << 20) /* OSR = 1 */ +# define DACC_TRIGR_OSR1_OSR_2 (1 << 20) /* OSR = 2 */ +# define DACC_TRIGR_OSR1_OSR_4 (2 << 20) /* OSR = 4 */ +# define DACC_TRIGR_OSR1_OSR_8 (3 << 20) /* OSR = 8 */ +# define DACC_TRIGR_OSR1_OSR_16 (4 << 20) /* OSR = 16 */ +# define DACC_TRIGR_OSR1_OSR_32 (5 << 20) /* OSR = 32 */ + +/* Channel Enable, Channel Disable, and Channel Status Registers */ + +#define DACC_CH0 (1 << 0) /* Channel 0 */ +#define DACC_CH1 (1 << 1) /* Channel 1 */ +#define DACC_CHSR_DACRDY0 (1 << 8) /* DAC Ready Flag */ +#define DACC_CHSR_DACRDY1 (1 << 9) /* DAC Ready Flag */ + +/* Conversion Data Register -- 32-bit data */ + +#define DACC_CDR_DATA0_SHIFT (0) +#define DACC_CDR_DATA0_MASK (0xffffu << DACC_CDR_DATA0_SHIFT) /* Data to Convert for channel 0 */ +#define DACC_CDR_DATA0(value) ((DACC_CDR_DATA0_MASK & ((value) << DACC_CDR_DATA0_SHIFT))) +#define DACC_CDR_DATA1_SHIFT (16) +#define DACC_CDR_DATA1_MASK (0xffffu << DACC_CDR_DATA1_SHIFT) /* Data to Convert for channel 1 */ +#define DACC_CDR_DATA1(value) ((DACC_CDR_DATA1_MASK & ((value) << DACC_CDR_DATA1_SHIFT))) + +/* Interrupt Enable, Interrupt Disable, Interrupt Mask, and Interrupt Status Register */ + +#define DACC_INT_TXRDY0 (1 << 0) /* Transmit Ready Interrupt of channel 0 */ +#define DACC_INT_TXRDY1 (1 << 1) /* Transmit Ready Interrupt of channel 1 */ +#define DACC_INT_EOC0 (1 << 4) /* End of Conversion Interrupt of channel 0 */ +#define DACC_INT_EOC1 (1 << 5) /* End of Conversion Interrupt of channel 1 */ +#define DACC_INT_ALL (0xffffffffu) /* All interrupts */ + +/* Analog Current Register */ + +#define DACC_ACR_IBCTLCH0_SHIFT (0) +#define DACC_ACR_IBCTLCH0_MASK (0x3u << DACC_ACR_IBCTLCH0_SHIFT) /* Analog Output Current Control */ +#define DACC_ACR_IBCTLCH0(value) ((DACC_ACR_IBCTLCH0_MASK & ((value) << DACC_ACR_IBCTLCH0_SHIFT))) +#define DACC_ACR_IBCTLCH1_SHIFT (2) +#define DACC_ACR_IBCTLCH1_MASK (0x3u << DACC_ACR_IBCTLCH1_SHIFT) /* Analog Output Current Control */ +#define DACC_ACR_IBCTLCH1(value) ((DACC_ACR_IBCTLCH1_MASK & ((value) << DACC_ACR_IBCTLCH1_SHIFT))) + +/* Write Protect Mode register */ + +#define DACC_WPMR_WPEN (1 << 0) /* Write Protection Enable */ +#define DACC_WPMR_WPKEY_SHIFT (8) +#define DACC_WPMR_WPKEY_MASK (0xffffffu << DACC_WPMR_WPKEY_SHIFT) /* Write Protect Key */ +#define DACC_WPMR_WPKEY(value) ((DACC_WPMR_WPKEY_MASK & ((value) << DACC_WPMR_WPKEY_SHIFT))) +# define DACC_WPMR_WPKEY_PASSWD (0x444143u << 8) /* Writing any other value in this field aborts the write operation of bit WPEN. Always reads as 0. */ + +/* Write Protect Status register */ + +#define DACC_WPSR_WPVS (1 << 0) /* Write Protection Violation Status */ +#define DACC_WPSR_WPVSRC_SHIFT (8) +#define DACC_WPSR_WPVSRC_MASK (0xffu << DACC_WPSR_WPVSRC_SHIFT) /* Write Protection Violation Source */ + +#endif /* __ARCH_ARM_SRC_SAMV7_CHIP_SAM_DACC_H */ diff --git a/arch/arm/src/samv7/sam_dac.c b/arch/arm/src/samv7/sam_dac.c new file mode 100644 index 00000000000..598201ce390 --- /dev/null +++ b/arch/arm/src/samv7/sam_dac.c @@ -0,0 +1,658 @@ +/************************************************************************************ + * arch/arm/src/samv7/sam_dac.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#include "up_internal.h" +#include "up_arch.h" +#include "cache.h" + +#include "chip/sam_dacc.h" +#include "chip/sam_pmc.h" +#include "chip/sam_pinmap.h" + +#include "sam_gpio.h" +#include "sam_xdmac.h" +#include "sam_periphclks.h" +#include "sam_tc.h" +#include "sam_dac.h" + +#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Get TC channel number from Trigger Selection value */ + +#define SAMV7_DAC_TC_CHANNEL (CONFIG_SAMV7_DAC_TRIGGER_SELECT - 1) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure represents the internal state of a single SAMV7 DAC module */ + +struct sam_dac_s +{ + uint8_t initialized : 1; /* True, the DAC block has been initialized */ +#ifdef CONFIG_SAMV7_DAC_TRIGGER + TC_HANDLE tc; /* Timer handle */ +#endif +}; + +/* This structure represents the internal state of one SAMV7 DAC channel */ + +struct sam_chan_s +{ + uint8_t inuse : 1; /* True, the driver is in use and not available */ + uint8_t intf; /* DAC zero-based interface number (0 or 1) */ + uint32_t dro; /* Conversion Data Register */ +#ifdef CONFIG_SAMV7_DAC_TRIGGER + uint32_t reg_dacc_trigr_clear; /* channel DACC_TRIGR register clear bits */ + uint32_t reg_dacc_trigr_set; /* channel DACC_TRIGR register set bits */ +#endif +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Interrupt handler */ + +static int dac_interrupt(int irq, FAR void *context); + +/* DAC methods */ + +static void dac_reset(FAR struct dac_dev_s *dev); +static int dac_setup(FAR struct dac_dev_s *dev); +static void dac_shutdown(FAR struct dac_dev_s *dev); +static void dac_txint(FAR struct dac_dev_s *dev, bool enable); +static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg); +static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg); + +/* Initialization */ + +#ifdef CONFIG_SAMV7_DAC_TRIGGER +static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, + int channel); +static void dac_timer_free(struct sam_dac_s *priv); +#endif +static int dac_channel_init(FAR struct sam_chan_s *chan); +static int dac_module_init(void); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct dac_ops_s g_dacops = +{ + .ao_reset = dac_reset, + .ao_setup = dac_setup, + .ao_shutdown = dac_shutdown, + .ao_txint = dac_txint, + .ao_send = dac_send, + .ao_ioctl = dac_ioctl, +}; + +#ifdef CONFIG_SAMV7_DAC0 +static struct sam_chan_s g_dac1priv = +{ + .intf = 0, + .dro = SAM_DACC_CDR0, +#ifdef CONFIG_SAMV7_DAC_TRIGGER + .reg_dacc_trigr_clear = DACC_TRIGR_TRGSEL0_MASK, + .reg_dacc_trigr_set = DACC_TRIGR_TRGSEL0(CONFIG_SAMV7_DAC_TRIGGER_SELECT) | DACC_TRIGR_TRGEN0, +#endif +}; + +static struct dac_dev_s g_dac1dev = +{ + .ad_ops = &g_dacops, + .ad_priv = &g_dac1priv, +}; +#endif + +#ifdef CONFIG_SAMV7_DAC1 +static struct sam_chan_s g_dac2priv = +{ + .intf = 1, + .dro = SAM_DACC_CDR1, +#ifdef CONFIG_SAMV7_DAC_TRIGGER + .reg_dacc_trigr_clear = DACC_TRIGR_TRGSEL1_MASK, + .reg_dacc_trigr_set = DACC_TRIGR_TRGSEL1(CONFIG_SAMV7_DAC_TRIGGER_SELECT) | DACC_TRIGR_TRGEN1, +#endif +}; + +static struct dac_dev_s g_dac2dev = +{ + .ad_ops = &g_dacops, + .ad_priv = &g_dac2priv, +}; +#endif + +static struct sam_dac_s g_dacmodule; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: dac_interrupt + * + * Description: + * DAC interrupt handler. + * + * Input Parameters: + * + * Returned Value: + * OK + * + ****************************************************************************/ + +static int dac_interrupt(int irq, FAR void *context) +{ +#ifdef CONFIG_SAMV7_DAC1 + uint32_t status; + + status = getreg32(SAM_DACC_ISR) & getreg32(SAM_DACC_IMR); + if (status & DACC_INT_TXRDY1) + { + dac_txdone(&g_dac2dev); + } + + if (status & DACC_INT_TXRDY0) +#endif + { + dac_txdone(&g_dac1dev); + } + + return OK; +} + +/**************************************************************************** + * Name: dac_reset + * + * Description: + * Reset the DAC channel. Called early to initialize the hardware. This + * is called, before dac_setup() and on error conditions. + * + * Input Parameters: + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void dac_reset(FAR struct dac_dev_s *dev) +{ + irqstate_t flags; + + /* Reset only the selected DAC channel; the other DAC channel must remain + * functional. + */ + + flags = enter_critical_section(); + +#warning "Missing logic" + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: dac_setup + * + * Description: + * Configure the DAC. This method is called the first time that the DAC + * device is opened. This will occur when the port is first opened. + * This setup includes configuring and attaching DAC interrupts. Interrupts + * are all disabled upon return. + * + * Input Parameters: + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int dac_setup(FAR struct dac_dev_s *dev) +{ +#warning "Missing logic" + return OK; +} + +/**************************************************************************** + * Name: dac_shutdown + * + * Description: + * Disable the DAC. This method is called when the DAC device is closed. + * This method reverses the operation the setup method. + * + * Input Parameters: + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void dac_shutdown(FAR struct dac_dev_s *dev) +{ +#warning "Missing logic" +} + +/**************************************************************************** + * Name: dac_txint + * + * Description: + * Call to enable or disable TX interrupts. + * + * Input Parameters: + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void dac_txint(FAR struct dac_dev_s *dev, bool enable) +{ + FAR struct sam_chan_s *chan; + + chan = dev->ad_priv; + if (enable) + { + putreg32(DACC_INT_TXRDY0 << chan->intf, SAM_DACC_IER); + } + else + { + putreg32(DACC_INT_TXRDY0 << chan->intf, SAM_DACC_IDR); + } +} + +/**************************************************************************** + * Name: dac_send + * + * Description: + * Set the DAC output. + * + * Input Parameters: + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg) +{ + FAR struct sam_chan_s *chan = dev->ad_priv; + + /* Interrupt based transfer */ + + putreg16(msg->am_data >> 16, chan->dro); + + return OK; +} + +/**************************************************************************** + * Name: dac_ioctl + * + * Description: + * All ioctl calls will be routed through this method. + * + * Input Parameters: + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg) +{ + return -ENOTTY; +} + +/**************************************************************************** + * Name: dac_timer_init + * + * Description: + * Configure a timer to periodically trigger conversion. Only channels TC0, + * TC1, TC2 can be used with DAC. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_DAC_TRIGGER +static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, + int channel) +{ + uint32_t mode; + uint32_t regval; + uint32_t freq_actual; + + ainfo("required frequency=%ld [Hz], channel=%d\n", + (long)freq_required, channel); + + DEBUGASSERT(priv && (freq_required > 0) && (channel >= 0 && channel <= 2)); + + /* Set the timer/counter waveform mode the the clock input. Use smallest + * MCK divisor of 8 to have highest clock resolution thus smallest frequency + * error. With 32 bit counter the lowest possible frequency of 1 Hz is easily + * supported. + */ + + /* TODO Add support for TC_CMR_TCCLKS_PCK6 to reduce frequency error */ + + mode = (TC_CMR_TCCLKS_MCK8 | /* Use MCK/8 clock signal */ + TC_CMR_WAVSEL_UPRC | /* UP mode w/ trigger on RC Compare */ + TC_CMR_WAVE | /* Wave mode */ + TC_CMR_ACPA_CLEAR | /* RA Compare Effect on TIOA: Clear */ + TC_CMR_ACPC_SET); /* RC Compare Effect on TIOA: Set */ + + /* Now allocate and configure the channel */ + + priv->tc = sam_tc_allocate(channel, mode); + if (!priv->tc) + { + aerr("ERROR: Failed to allocate channel %d mode %08x\n", channel, mode); + return -EINVAL; + } + + /* Calculate the actual counter value from this divider and the tc input + * frequency. + */ + + regval = BOARD_MCK_FREQUENCY / 8 / freq_required; + DEBUGASSERT(regval > 0); /* Will check for integer underflow */ + + /* Set up TC_RA and TC_RC. The frequency is determined by RA and RC: + * TIOA is cleared on RA match; TIOA is set on RC match. + */ + + sam_tc_setregister(priv->tc, TC_REGA, regval >> 1); + sam_tc_setregister(priv->tc, TC_REGC, regval); + + freq_actual = BOARD_MCK_FREQUENCY / 8 / regval; + ainfo("configured frequency=%ld [Hz]\n", (long)freq_actual); + + /* And start the timer */ + + sam_tc_start(priv->tc); + return OK; +} +#endif + +/**************************************************************************** + * Name: dac_timer_free + * + * Description: + * Free the timer resource + * + ****************************************************************************/ + +#ifdef CONFIG_SAMV7_DAC_TRIGGER +static void dac_timer_free(struct sam_dac_s *priv) +{ + /* Is a timer allocated? */ + + ainfo("tc=%p\n", priv->tc); + + if (priv->tc) + { + /* Yes.. stop it and free it */ + + sam_tc_stop(priv->tc); + sam_tc_free(priv->tc); + priv->tc = NULL; + } +} +#endif + +/**************************************************************************** + * Name: dac_channel_init + * + * Description: + * Initialize the DAC channel. + * + * Input Parameters: + * chan - A reference to the DAC channel state data + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int dac_channel_init(FAR struct sam_chan_s *chan) +{ + /* Is the selected channel already in-use? */ + + if (chan->inuse) + { + /* Yes.. then return EBUSY */ + + return -EBUSY; + } + +#ifdef CONFIG_SAMV7_DAC_TRIGGER + /* Configure trigger mode operation */ + + ainfo("Enabled trigger mode for DAC%d\n", chan->intf); + + modifyreg32(SAM_DACC_TRIGR, + chan->reg_dacc_trigr_clear, + chan->reg_dacc_trigr_set); +#endif + + /* Enable DAC Channel */ + + putreg32(1 << chan->intf, SAM_DACC_CHER); + + /* Mark the DAC channel "in-use" */ + + chan->inuse = 1; + return OK; +} + +/**************************************************************************** + * Name: dac_module_init + * + * Description: + * Initialize the DAC. All ioctl calls will be routed through this method. + * + * Input Parameters: + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int dac_module_init(void) +{ + uint32_t regval; + int ret; + + /* Has the DAC block already been initialized? */ + + if (g_dacmodule.initialized) + { + /* Yes.. then return success We only have to do this once */ + + return OK; + } + + ainfo("Initializing...\n"); + + /* Disable DAC peripheral clock */ + + sam_dacc_disableclk(); + + /* Configure DAC pins */ + +#ifdef CONFIG_SAMV7_DAC0 + sam_configgpio(GPIO_DAC0); +#endif +#ifdef CONFIG_SAMV7_DAC1 + sam_configgpio(GPIO_DAC1); +#endif + + /* Enable the DAC peripheral clock */ + + sam_dacc_enableclk(); + + /* Reset the DAC controller */ + + putreg32(DACC_CR_SWRST, SAM_DACC_CR); + + /* Set the MCK clock prescaler: PRESCAL = (MCK / DACClock) - 2 */ + + regval = DACC_MR_PRESCALER(CONFIG_SAMV7_DAC_PRESCAL); + putreg32(regval, SAM_DACC_MR); + + /* Configure trigger mode operation */ + +#ifdef CONFIG_SAMV7_DAC_TRIGGER + ret = dac_timer_init(&g_dacmodule, + CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY, + SAMV7_DAC_TC_CHANNEL); + if (ret < 0) + { + aerr("ERROR: Failed to initialize the timer: %d\n", ret); + return ret; + } +#endif + + /* Configure interrupts */ + + ret = irq_attach(SAM_IRQ_DACC, dac_interrupt); + if (ret < 0) + { + aerr("irq_attach failed: %d\n", ret); + return ret; + } + + ainfo("Enable the DAC interrupt: irq=%d\n", SAM_IRQ_DACC); + up_enable_irq(SAM_IRQ_DACC); + + /* Mark the DAC module as initialized */ + + g_dacmodule.initialized = 1; + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_dac_initialize + * + * Description: + * Initialize the DAC. + * + * Input Parameters: + * intf - The DAC interface number. + * + * Returned Value: + * Valid DAC device structure reference on success, NULL on failure. + * + ****************************************************************************/ + +FAR struct dac_dev_s *sam_dac_initialize(int intf) +{ + FAR struct dac_dev_s *dev; + FAR struct sam_chan_s *chan; + int ret; + +#ifdef CONFIG_SAMV7_DAC0 + if (intf == 0) + { + ainfo("DAC1 Selected\n"); + dev = &g_dac1dev; + } + else +#endif +#ifdef CONFIG_SAMV7_DAC1 + if (intf == 1) + { + ainfo("DAC2 Selected\n"); + dev = &g_dac2dev; + } + else +#endif + { + aerr("ERROR: No such DAC interface: %d\n", intf); + errno = ENODEV; + return NULL; + } + + /* Initialize the DAC peripheral module */ + + ret = dac_module_init(); + if (ret < 0) + { + aerr("ERROR: Failed to initialize the DAC peripheral module: %d\n", ret); + errno = -ret; + return NULL; + } + + /* Configure the selected DAC channel */ + + chan = dev->ad_priv; + ret = dac_channel_init(chan); + if (ret < 0) + { + aerr("ERROR: Failed to initialize DAC channel %d: %d\n", intf, ret); + errno = -ret; + return NULL; + } + + return dev; +} + +#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */ diff --git a/arch/arm/src/samv7/sam_dac.h b/arch/arm/src/samv7/sam_dac.h new file mode 100644 index 00000000000..616d25b486c --- /dev/null +++ b/arch/arm/src/samv7/sam_dac.h @@ -0,0 +1,129 @@ +/**************************************************************************** + * arch/arm/src/samv7/sam_dac.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAMV7_SAM_DAC_H +#define __ARCH_ARM_SRC_SAMV7_SAM_DAC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include "chip/sam_dacc.h" + +#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1) + +/**************************************************************************** + * Pre-processor definitions + ****************************************************************************/ +/* Default configuration settings may be overridden in the board configuration + * file. + */ + +#if !defined(CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE) +# define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE 8 +#elif CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE > 65535 +# warning "CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE value does not fit into uint16_t, limiting it to 65535" +# undef CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE +# define CONFIG_SAMV7_DAC_DMA_BUFFER_SIZE (65535) +#endif + +#if !defined(CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY) +# define CONFIG_SAMV7_DAC_TRIGGER_FREQUENCY 8000 +#endif + +/* PRESCAL = (MCK / DACClock) - 2 + * + * Given: + * MCK = 150MHz + * DACClock = 16MHz + * Then: + * PRESCAL = 7 + */ + +#if !defined(CONFIG_SAMV7_DAC_PRESCAL) +#define CONFIG_SAMV7_DAC_PRESCAL (7) +#elif CONFIG_SAMV7_DAC_PRESCAL > 15 +# warning "Maximum valid CONFIG_SAMV7_DAC_PRESCAL value is 15" +#endif + +#if !defined(CONFIG_SAMV7_DAC_TRIGGER_SELECT) +#define CONFIG_SAMV7_DAC_TRIGGER_SELECT (3) +#elif CONFIG_SAMV7_DAC_TRIGGER_SELECT < 1 || CONFIG_SAMV7_DAC_TRIGGER_SELECT > 3 +# warning "Only CONFIG_SAMV7_DAC_TRIGGER_SELECT == [1-3] is supported" +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: sam_dac_initialize + * + * Description: + * Initialize the DAC + * + * Input Parameters: + * intf - The DAC interface number. + * + * Returned Value: + * Valid DAC device structure reference on success; a NULL on failure + * + ****************************************************************************/ + +struct dac_dev_s; +FAR struct dac_dev_s *sam_dac_initialize(int intf); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */ +#endif /* __ARCH_ARM_SRC_SAMV7_SAM_DAC_H */ diff --git a/configs/same70-xplained/src/Makefile b/configs/same70-xplained/src/Makefile index 4d883fccb75..1f2eafb849a 100644 --- a/configs/same70-xplained/src/Makefile +++ b/configs/same70-xplained/src/Makefile @@ -90,4 +90,8 @@ endif endif endif +ifneq (,$(findstring y,$(CONFIG_SAMV7_DAC0) $(CONFIG_SAMV7_DAC1))) +CSRCS += sam_dac.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/same70-xplained/src/sam_bringup.c b/configs/same70-xplained/src/sam_bringup.c index 7cc5fed0c00..9a84f3228ea 100644 --- a/configs/same70-xplained/src/sam_bringup.c +++ b/configs/same70-xplained/src/sam_bringup.c @@ -329,6 +329,14 @@ int sam_bringup(void) } #endif +#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1) + ret = sam_dacdev_initialize(); + if (ret < 0) + { + _err("ERROR: Initialization of the DAC module failed: %d\n", ret); + } +#endif + /* If we got here then perhaps not all initialization was successful, but * at least enough succeeded to bring-up NSH with perhaps reduced * capabilities. diff --git a/configs/same70-xplained/src/sam_dac.c b/configs/same70-xplained/src/sam_dac.c new file mode 100644 index 00000000000..884de6e27ca --- /dev/null +++ b/configs/same70-xplained/src/sam_dac.c @@ -0,0 +1,123 @@ +/************************************************************************************ + * configs/same70-xplained/src/sam_dac.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "chip.h" +#include "sam_dac.h" +#include "same70-xplained.h" + +#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: sam_dacdev_initialize + * + * Description: + * Called to configure DAC peripheral module and register DAC device driver + ************************************************************************************/ + +int sam_dacdev_initialize(void) +{ + static bool initialized = false; + struct dac_dev_s *dac; + int ret; + + /* Check if we have already initialized */ + + if (!initialized) + { +#ifdef CONFIG_SAMV7_DAC0 + /* Get an instance of the DAC0 interface */ + + dac = sam_dac_initialize(0); + if (dac == NULL) + { + aerr("ERROR: Failed to get DAC0 interface\n"); + return -ENODEV; + } + + /* Register the DAC driver at "/dev/dac0" */ + + ret = dac_register("/dev/dac0", dac); + if (ret < 0) + { + aerr("ERROR: dac_register failed: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_SAMV7_DAC1 + /* Get an instance of the DAC1 interface */ + + dac = sam_dac_initialize(1); + if (dac == NULL) + { + aerr("ERROR: Failed to get DAC1 interface\n"); + return -ENODEV; + } + + /* Register the DAC driver at "/dev/dac1" */ + + ret = dac_register("/dev/dac1", dac); + if (ret < 0) + { + aerr("ERROR: dac_register failed: %d\n", ret); + return ret; + } +#endif + /* Now we are initialized */ + + initialized = true; + } + return OK; +} + +#endif /* CONFIG_SAMV7_DAC0 || CONFIG_SAMV7_DAC1 */ diff --git a/configs/same70-xplained/src/same70-xplained.h b/configs/same70-xplained/src/same70-xplained.h index 0859c0f450b..117c6a68933 100644 --- a/configs/same70-xplained/src/same70-xplained.h +++ b/configs/same70-xplained/src/same70-xplained.h @@ -349,6 +349,18 @@ void sam_sdram_config(void); int sam_bringup(void); #endif +/************************************************************************************ + * Name: sam_dacdev_initialize + * + * Description: + * Called to configure DAC peripheral module + * + ************************************************************************************/ + +#if defined(CONFIG_SAMV7_DAC0) || defined(CONFIG_SAMV7_DAC1) +int sam_dacdev_initialize(void); +#endif + /************************************************************************************ * Name: sam_spidev_initialize * diff --git a/drivers/analog/dac.c b/drivers/analog/dac.c index daf8b5f34a4..fbbc7618334 100644 --- a/drivers/analog/dac.c +++ b/drivers/analog/dac.c @@ -478,6 +478,7 @@ static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg) int dac_txdone(FAR struct dac_dev_s *dev) { int ret = -ENOENT; + int sval; /* Verify that the xmit FIFO is not empty */ @@ -497,7 +498,11 @@ int dac_txdone(FAR struct dac_dev_s *dev) { /* Inform any waiting threads that new xmit space is available */ - ret = sem_post(&dev->ad_xmit.af_sem); + ret = sem_getvalue(&dev->ad_xmit.af_sem, &sval); + if (ret == OK && sval <= 0) + { + ret = sem_post(&dev->ad_xmit.af_sem); + } } } From c367e4985fe13c69241a726d758f87edf3fa090e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 15 Aug 2016 08:21:46 -0600 Subject: [PATCH 056/214] Add configuration logic for the SAMV7 DAC module --- arch/arm/src/samv7/Kconfig | 35 +++++++++++++++++++++++++++++++++++ arch/arm/src/samv7/Make.defs | 2 +- 2 files changed, 36 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig index ebdb78fb269..c028517d871 100644 --- a/arch/arm/src/samv7/Kconfig +++ b/arch/arm/src/samv7/Kconfig @@ -196,6 +196,10 @@ config SAMV7_HAVE_MCAN1 bool default n +config SAMV7_DAC + bool + default n + config SAMV7_HAVE_DAC1 bool default n @@ -334,10 +338,12 @@ config SAMV7_MCAN1 config SAMV7_DAC0 bool "Digital To Analog Converter 0 (DAC0)" default n + select SAMV7_DAC config SAMV7_DAC1 bool "Digital To Analog Converter 1 (DAC1)" default n + select SAMV7_DAC depends on SAMV7_HAVE_DAC1 config SAMV7_EBI @@ -1657,6 +1663,35 @@ config SAMV7_TC_REGDEBUG endmenu # Timer/counter Configuration endif # SAMV7_HAVE_TC +menu "DAC device driver configuration" + depends on SAMV7_DAC + +config SAMV7_DAC_PRESCAL + int "DAC MCK prescaler" + ---help--- + Define PRESCALER (Peripheral Clock to DAC Clock Ratio) + +config SAMV7_DAC_TRIGGER + bool "DAC trigger mode" + default n + ---help--- + Enable DAC trigger mode + +config SAMV7_DAC_TRIGGER_FREQUENCY + int "DAC trigger frequency" + ---help--- + Define DAC trigger frequency + +config SAMV7_DAC_TRIGGER_SELECT + int "DAC trigger source" + default 1 + range 1 3 + ---help--- + Define DAC trigger source (only support for TC0, TC1, TC2 output is + currently implemented) + +endmenu # DAC device driver configuration + menu "HSMCI device driver options" depends on SAMV7_HSMCI diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs index 5a497b3356b..dfe56491f96 100644 --- a/arch/arm/src/samv7/Make.defs +++ b/arch/arm/src/samv7/Make.defs @@ -215,6 +215,6 @@ ifeq ($(CONFIG_SAMV7_PROGMEM),y) CHIP_CSRCS += sam_progmem.c endif -ifneq (,$(findstring y,$(CONFIG_SAMV7_DAC0) $(CONFIG_SAMV7_DAC1))) +ifeq ($(CONFIG_SAMV7_DAC),y) CHIP_CSRCS += sam_dac.c endif From e53118ffc257e904bacacff9197e1785289b83e9 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 15 Aug 2016 08:55:11 -0600 Subject: [PATCH 057/214] SAMV7 DAC configuration needs some conditional logic --- arch/arm/src/samv7/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig index c028517d871..0ba4964e9b5 100644 --- a/arch/arm/src/samv7/Kconfig +++ b/arch/arm/src/samv7/Kconfig @@ -1677,6 +1677,8 @@ config SAMV7_DAC_TRIGGER ---help--- Enable DAC trigger mode +if SAMV7_DAC_TRIGGER + config SAMV7_DAC_TRIGGER_FREQUENCY int "DAC trigger frequency" ---help--- @@ -1690,6 +1692,7 @@ config SAMV7_DAC_TRIGGER_SELECT Define DAC trigger source (only support for TC0, TC1, TC2 output is currently implemented) +endif # SAMV7_DAC_TRIGGER endmenu # DAC device driver configuration menu "HSMCI device driver options" From d941f6d38046e6c94b824385ac38d5ad1bcab6a1 Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Mon, 15 Aug 2016 09:33:51 -0600 Subject: [PATCH 058/214] Add oneshot board initialization to stm32f103-minimum --- configs/stm32f103-minimum/src/stm32_appinit.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/configs/stm32f103-minimum/src/stm32_appinit.c b/configs/stm32f103-minimum/src/stm32_appinit.c index 78b7ac3ebf9..30a8f682114 100644 --- a/configs/stm32f103-minimum/src/stm32_appinit.c +++ b/configs/stm32f103-minimum/src/stm32_appinit.c @@ -45,6 +45,7 @@ #include #include +#include #include "stm32.h" #include "stm32f103_minimum.h" @@ -80,11 +81,22 @@ int board_app_initialize(uintptr_t arg) { +#ifdef CONFIG_ONESHOT + struct oneshot_lowerhalf_s *os = NULL; +#endif int ret = OK; #ifdef CONFIG_WL_MFRC522 ret = stm32_mfrc522initialize("/dev/rfid0"); #endif +#ifdef CONFIG_ONESHOT + os = oneshot_initialize(1, 10); + if (os) + { + ret = oneshot_register("/dev/oneshot", os); + } +#endif + return ret; } From 83fca7ded78b36b0a9dc8fa6245858000f58ac52 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Mon, 15 Aug 2016 17:34:43 +0200 Subject: [PATCH 059/214] Add support for spi sdcard with card detection logic --- configs/stm32butterfly2/include/board.h | 12 +- configs/stm32butterfly2/nshnet/defconfig | 96 ++++---- configs/stm32butterfly2/src/Makefile | 8 + configs/stm32butterfly2/src/stm32_boot.c | 14 +- .../stm32butterfly2/src/stm32_butterfly2.h | 77 +++++++ configs/stm32butterfly2/src/stm32_mmcsd.c | 209 ++++++++++++++++++ configs/stm32butterfly2/src/stm32_spi.c | 102 +++++++++ 7 files changed, 468 insertions(+), 50 deletions(-) create mode 100644 configs/stm32butterfly2/src/stm32_butterfly2.h create mode 100644 configs/stm32butterfly2/src/stm32_mmcsd.c create mode 100644 configs/stm32butterfly2/src/stm32_spi.c diff --git a/configs/stm32butterfly2/include/board.h b/configs/stm32butterfly2/include/board.h index 2fbe7d47961..bb12930e197 100644 --- a/configs/stm32butterfly2/include/board.h +++ b/configs/stm32butterfly2/include/board.h @@ -49,7 +49,7 @@ #include "stm32_rcc.h" /******************************************************************************* - * Pre-processor Definitions + * Pre-processor Definitions ******************************************************************************/ /* Clocking *******************************************************************/ @@ -100,7 +100,7 @@ #define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) - + /* LED definitions ************************************************************/ /* There are four LEDs on stm32butterfly2 board that can be controlled by * software. All pulled high and van be illuminated by driving the output low. @@ -154,6 +154,12 @@ # error "CONFIG_STM32_ADC2 is not supported" #endif +/* SPI configuration. Only SPI1 is supported */ + +#ifdef CONFIG_STM32_SPI2 +# error "CONFIG_STM32_SPI2 is not supported" +#endif + /******************************************************************************* * Public Data ******************************************************************************/ @@ -178,7 +184,7 @@ extern "C" { * Description: * Initializes board specific LEDS ******************************************************************************/ - void stm32_led_initialize(void); +void stm32_led_initialize(void); /******************************************************************************* * Name: stm32_boardinitialize diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index ea829b59101..8fda7c027c2 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -43,38 +43,7 @@ CONFIG_RAW_BINARY=y # Debug Options # CONFIG_DEBUG_ALERT=y -CONFIG_DEBUG_FEATURES=y - -# -# Debug SYSLOG Output Controls -# -CONFIG_DEBUG_ERROR=y -CONFIG_DEBUG_WARN=y -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_ASSERTIONS is not set - -# -# Subsystem Debug Options -# -# CONFIG_DEBUG_BINFMT is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_DEBUG_GRAPHICS is not set -# CONFIG_DEBUG_LIB is not set -# CONFIG_DEBUG_MM is not set -# CONFIG_DEBUG_NET is not set -# CONFIG_DEBUG_SCHED is not set - -# -# OS Function Debug Options -# -# CONFIG_DEBUG_IRQ is not set - -# -# Driver Debug Options -# -# CONFIG_DEBUG_LEDS is not set -# CONFIG_DEBUG_ANALOG is not set -# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_FEATURES is not set CONFIG_ARCH_HAVE_STACKCHECK=y # CONFIG_STACK_COLORATION is not set CONFIG_ARCH_HAVE_HEAPCHECK=y @@ -161,7 +130,6 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set -# CONFIG_DEBUG_HARDFAULT is not set # # ARMV7M Configuration Options @@ -411,7 +379,7 @@ CONFIG_STM32_ETHMAC=y # CONFIG_STM32_I2C1 is not set # CONFIG_STM32_OTGFS is not set CONFIG_STM32_PWR=y -# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI1=y # CONFIG_STM32_SPI2 is not set # CONFIG_STM32_SPI3 is not set # CONFIG_STM32_TIM1 is not set @@ -429,12 +397,14 @@ CONFIG_STM32_USART2=y # CONFIG_STM32_IWDG is not set # CONFIG_STM32_WWDG is not set CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y # CONFIG_STM32_NOEXT_VECTORS is not set # # Alternate Pin Mapping # CONFIG_STM32_ETH_REMAP=y +# CONFIG_STM32_SPI1_REMAP is not set CONFIG_STM32_USART2_REMAP=y # CONFIG_STM32_JTAG_DISABLE is not set CONFIG_STM32_JTAG_FULL_ENABLE=y @@ -479,6 +449,12 @@ CONFIG_STM32_USART2_SERIALDRIVER=y # CONFIG_STM32_FLOWCONTROL_BROKEN is not set # CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -613,7 +589,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y # CONFIG_SCHED_TICKLESS is not set CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set -# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_CLOCK_MONOTONIC=y # CONFIG_JULIAN_TIME is not set CONFIG_START_YEAR=1970 CONFIG_START_MONTH=0 @@ -728,7 +704,16 @@ CONFIG_RAMDISK=y # CONFIG_PWM is not set CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_I2C is not set -# CONFIG_SPI is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_HWFEATURES=y +# CONFIG_SPI_CRCGENERATION is not set +CONFIG_SPI_CS_CONTROL=y +# CONFIG_SPI_CS_DELAY_CONTROL is not set # CONFIG_I2S is not set # @@ -769,7 +754,17 @@ CONFIG_ADC_FIFOSIZE=8 # CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set # CONFIG_NCP5623C is not set -# CONFIG_MMCSD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set # CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set @@ -783,7 +778,6 @@ CONFIG_NETDEVICES=y # CONFIG_NETDEV_MULTINIC is not set # CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set # CONFIG_NETDEV_LATEINIT is not set -# CONFIG_NET_DUMPPACKET is not set # # External Ethernet MAC Device Support @@ -814,7 +808,6 @@ CONFIG_ETH0_PHY_DP83848C=y # CONFIG_ETH0_PHY_LAN8740A is not set # CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set -# CONFIG_NETDEV_PHY_DEBUG is not set # CONFIG_PIPES is not set # CONFIG_PM is not set # CONFIG_POWER is not set @@ -853,7 +846,6 @@ CONFIG_SERIAL_NPOLLWAITERS=2 # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_DMA is not set -# CONFIG_SERIAL_TIOCSERGSTRUCT is not set CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y CONFIG_USART2_SERIAL_CONSOLE=y # CONFIG_OTHER_SERIAL_CONSOLE is not set @@ -992,7 +984,6 @@ CONFIG_NET_IOB=y CONFIG_IOB_NBUFFERS=24 CONFIG_IOB_BUFSIZE=196 CONFIG_IOB_NCHAINS=8 -# CONFIG_IOB_DEBUG is not set # CONFIG_NET_ARCH_INCR32 is not set # CONFIG_NET_ARCH_CHKSUM is not set # CONFIG_NET_STATISTICS is not set @@ -1023,7 +1014,14 @@ CONFIG_FS_WRITABLE=y # CONFIG_FS_NAMED_SEMAPHORES is not set CONFIG_FS_MQUEUE_MPATH="/var/mqueue" # CONFIG_FS_RAMMAP is not set -# CONFIG_FS_FAT is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set # CONFIG_FS_TMPFS is not set @@ -1168,7 +1166,11 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set -# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_MOUNT=y +# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set +CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 +CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 +CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 # CONFIG_EXAMPLES_NETTEST is not set # CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y @@ -1302,6 +1304,7 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set @@ -1325,6 +1328,8 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 # # Configure Command Options @@ -1348,7 +1353,7 @@ CONFIG_NSH_STRERROR=y # CONFIG_NSH_CONSOLE=y # CONFIG_NSH_ALTCONDEV is not set -# CONFIG_NSH_ARCHINIT is not set +CONFIG_NSH_ARCHINIT=y # # Networking Configuration @@ -1357,7 +1362,6 @@ CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 -# CONFIG_NSH_NETINIT_DEBUG is not set # # IP Address Configuration @@ -1391,7 +1395,7 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set -# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_RAMTEST=y CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y diff --git a/configs/stm32butterfly2/src/Makefile b/configs/stm32butterfly2/src/Makefile index 547a536c57b..fcabcc6d192 100644 --- a/configs/stm32butterfly2/src/Makefile +++ b/configs/stm32butterfly2/src/Makefile @@ -42,4 +42,12 @@ ifeq ($(CONFIG_STM32_ADC),y) CSRCS += stm32_adc.c endif +ifeq ($(CONFIG_STM32_SPI1),y) +CSRCS += stm32_spi.c +endif + +ifeq ($(CONFIG_MMCSD),y) +CSRCS += stm32_mmcsd.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c index 008a2b70207..5f5ea750b3a 100644 --- a/configs/stm32butterfly2/src/stm32_boot.c +++ b/configs/stm32butterfly2/src/stm32_boot.c @@ -39,6 +39,10 @@ #include #include +#include + +#include "stm32_gpio.h" +#include "stm32_butterfly2.h" /******************************************************************************* * Public Functions @@ -47,9 +51,17 @@ void stm32_boardinitialize(void) { stm32_led_initialize(); + stm32_spidev_initialize(); } int board_app_initialize(uintptr_t arg) { - return 0; + int rv; + if ((rv = stm32_sdinitialize(CONFIG_NSH_MMCSDMINOR)) < 0) + { + syslog(LOG_ERR, "Failed to initialize SD slot %d: %d\n"); + return rv; + } + + return 0; } diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h new file mode 100644 index 00000000000..dc0c46fbb01 --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_butterfly2.h @@ -0,0 +1,77 @@ +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_butterfly2.h + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/***************************************************************************** + * Included Files + ****************************************************************************/ + +#include "stm32_gpio.h" + +/***************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define GPIO_SD_CS (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ + GPIO_OUTPUT_SET | GPIO_PORTA | GPIO_PIN4) +#define GPIO_SD_CD (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_EXTI |\ + GPIO_PORTB | GPIO_PIN9) + +/***************************************************************************** + * Public Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + * Note: + * Here only CS pins are configured as SPI pins are configured by driver + * itself. + ****************************************************************************/ + +void stm32_spidev_initialize(void); + +/***************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initializes SPI-based SD card + * + ****************************************************************************/ + +int stm32_sdinitialize(int minor); + diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c new file mode 100644 index 00000000000..104de4b2eec --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_mmcsd.c @@ -0,0 +1,209 @@ +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_mmcsd.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/***************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "stm32.h" +#include "stm32_butterfly2.h" +#include "stm32_spi.h" + +/***************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_STM32_SPI1 +# error "SD driver requires CONFIG_STM32_SPI1 to be enabled" +#endif + +#ifdef CONFIG_DISABLE_MOUNTPOINT +# error "SD driver requires CONFIG_DISABLE_MOUNTPOINT to be disabled" +#endif + +/***************************************************************************** + * Private Definitions + ****************************************************************************/ + +static const int SD_SPI_PORT = 1; /* SD is connected to SPI1 port */ +static const int SD_SLOT_NO = 0; /* There is only one SD slot */ + +/* Media changed callback */ + +static spi_mediachange_t mediachangeclbk; + +/* Argument for media changed callback */ + +static void *mediachangearg; + +/* Semafor to inform stm32_cd_thread that card was inserted or pulled out */ + +static sem_t cdsem; + +/***************************************************************************** + * Private Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_cd_thread + * + * Description: + * Working thread to call mediachanged function when card is inserted or + * pulled out. + ****************************************************************************/ + +static void *stm32_cd_thread(void *arg) +{ + (void)arg; + + while (1) + { + sem_wait(&cdsem); + + if (mediachangeclbk) + { + /* Card doesn't seem to initialize properly without letting it to + * rest for a millsecond or so. + */ + + usleep(1 * 1000); + mediachangeclbk(mediachangearg); + } + } + + return NULL; +} + +/***************************************************************************** + * Name: stm32_cd + * + * Description: + * Card detect interrupt handler. + ****************************************************************************/ + +static int stm32_cd(int irq, FAR void *context) +{ + static const int debounce_time = 100; /* [ms] */ + static uint32_t now = 0; + static uint32_t prev = 0; + + struct timespec tp; + clock_gettime(CLOCK_MONOTONIC, &tp); + now = tp.tv_sec * 1000 + tp.tv_nsec / 1000000; + + /* When inserting card, card detect plate might bounce causing this + * interrupt to be called many time on single card insert/deinsert. Thus we + * are allowing only one interrupt every 100ms. + */ + + if (now - debounce_time > prev) + { + prev = now; + sem_post(&cdsem); + } + + return OK; +} + +/***************************************************************************** + * Public Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_spi1register + * + * Description: + * Registers media change callback + ****************************************************************************/ + +int stm32_spi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, + FAR void *arg) +{ + mediachangeclbk = callback; + mediachangearg = arg; + return OK; +} + +/***************************************************************************** + * Name: stm32_sdinitialize + * + * Description: + * Initialize SPI-based SD card and card detect thread. + ****************************************************************************/ + +int stm32_sdinitialize(int minor) +{ + FAR struct spi_dev_s *spi; + int rv; + + spi = stm32_spibus_initialize(SD_SPI_PORT); + if (!spi) + { + ferr("failed to initialize SPI port %d\n", SD_SPI_PORT); + return -ENODEV; + } + + if ((rv = mmcsd_spislotinitialize(minor, SD_SLOT_NO, spi)) < 0) + { + ferr("failed to bind SPI port %d to SD slot %d\n", SD_SPI_PORT, + SD_SLOT_NO); + return rv; + } + + stm32_gpiosetevent(GPIO_SD_CD, true, true, true, stm32_cd); + sem_init(&cdsem, 0, 0); + + pthread_attr_t pattr; + pthread_attr_init(&pattr); +#ifdef CONFIG_DEBUG_FS + pthread_attr_setstacksize(&pattr, 1024); +#else + pthread_attr_setstacksize(&pattr, 256); +#endif + pthread_create(NULL, &pattr, stm32_cd_thread, NULL); + + return OK; +} + diff --git a/configs/stm32butterfly2/src/stm32_spi.c b/configs/stm32butterfly2/src/stm32_spi.c new file mode 100644 index 00000000000..de3f77538dc --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_spi.c @@ -0,0 +1,102 @@ +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_spi.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + ****************************************************************************/ + +/***************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include "stm32_butterfly2.h" +#include "stm32_gpio.h" +#include "stm32_spi.h" + +/***************************************************************************** + * Public Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + * Note: + * Here only CS pins are configured as SPI pins are configured by driver + * itself. + ****************************************************************************/ + +void stm32_spidev_initialize(void) +{ + stm32_configgpio(GPIO_SD_CS); + stm32_configgpio(GPIO_SD_CD); +} + +/***************************************************************************** + * Name: stm32_spi1select + * + * Description: + * Function asserts given devid based on select + ****************************************************************************/ + +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool select) +{ + if (devid == SPIDEV_MMCSD) + { + stm32_gpiowrite(GPIO_SD_CS, !select); + } +} + +/***************************************************************************** + * Name: stm32_spi1status + * + * Description: + * Return status of devid + ****************************************************************************/ + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + if (devid == SPIDEV_MMCSD) + { + if (stm32_gpioread(GPIO_SD_CD) == 0) + { + return SPI_STATUS_PRESENT; + } + } + + return 0; +} From 3f48392974475a51eeec44baf0018847ff35bcc0 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 15 Aug 2016 10:22:12 -0600 Subject: [PATCH 060/214] Add defaults in SAMV7 configuration for all DAC settings --- arch/arm/src/samv7/Kconfig | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig index 0ba4964e9b5..c545647318d 100644 --- a/arch/arm/src/samv7/Kconfig +++ b/arch/arm/src/samv7/Kconfig @@ -1668,9 +1668,28 @@ menu "DAC device driver configuration" config SAMV7_DAC_PRESCAL int "DAC MCK prescaler" + default 7 + range 0 15 ---help--- Define PRESCALER (Peripheral Clock to DAC Clock Ratio) + 0 -> 2 periods of DAC Clock + 1 -> 3 periods of DAC Clock + 2 -> 4 periods of DAC Clock + 3 -> 5 periods of DAC Clock + 4 -> 6 periods of DAC Clock + 5 -> 7 periods of DAC Clock + 6 -> 8 periods of DAC Clock + 7 -> 9 periods of DAC Clock + 8 -> 10 periods of DAC Clock + 9 -> 11 periods of DAC Clock + 10 -> 12 periods of DAC Clock + 11 -> 13 periods of DAC Clock + 12 -> 14 periods of DAC Clock + 13 -> 15 periods of DAC Clock + 14 -> 16 periods of DAC Clock + 15 -> 17 periods of DAC Clock + config SAMV7_DAC_TRIGGER bool "DAC trigger mode" default n @@ -1681,16 +1700,21 @@ if SAMV7_DAC_TRIGGER config SAMV7_DAC_TRIGGER_FREQUENCY int "DAC trigger frequency" + default 1000 ---help--- Define DAC trigger frequency config SAMV7_DAC_TRIGGER_SELECT int "DAC trigger source" - default 1 + default 3 range 1 3 ---help--- - Define DAC trigger source (only support for TC0, TC1, TC2 output is - currently implemented) + Define DAC trigger source. Snly support for TC0, TC1, TC2 output is + currently implemented: + + 1 -> TC0 + 2 -> TC1 + 3 -> TC2 endif # SAMV7_DAC_TRIGGER endmenu # DAC device driver configuration From b2be0be3a637d03b75cf7fb15ba9ebb7e7632a95 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 15 Aug 2016 11:43:55 -0600 Subject: [PATCH 061/214] Simulated oneshot max_delay() method should not return a failure. --- arch/sim/src/up_oneshot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sim/src/up_oneshot.c b/arch/sim/src/up_oneshot.c index cef9c9b2ea4..c01bfea80e6 100644 --- a/arch/sim/src/up_oneshot.c +++ b/arch/sim/src/up_oneshot.c @@ -174,7 +174,7 @@ static int sim_max_delay(FAR struct oneshot_lowerhalf_s *lower, ts->tv_sec = INT_MAX; ts->tv_nsec = LONG_MAX; - return -ENOSYS; + return OK; } /**************************************************************************** From 795db7c103557126fb26d6c4ca7a02c16458f913 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Mon, 15 Aug 2016 21:52:00 +0200 Subject: [PATCH 062/214] Add support for onboard joystick --- configs/stm32butterfly2/nshnet/defconfig | 5 +- configs/stm32butterfly2/src/Makefile | 5 +- configs/stm32butterfly2/src/stm32_buttons.c | 107 ++++++++++++++++++++ 3 files changed, 115 insertions(+), 2 deletions(-) create mode 100644 configs/stm32butterfly2/src/stm32_buttons.c diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index 8fda7c027c2..826534dfc7d 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -562,7 +562,7 @@ CONFIG_ARCH_BOARD="stm32butterfly2" CONFIG_ARCH_HAVE_LEDS=y CONFIG_ARCH_LEDS=y CONFIG_ARCH_HAVE_BUTTONS=y -# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_BUTTONS=y # # Board-Specific Options @@ -1151,6 +1151,9 @@ CONFIG_EXAMPLES_ADC=y CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" CONFIG_EXAMPLES_ADC_GROUPSIZE=4 CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=4 # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_DHCPD is not set diff --git a/configs/stm32butterfly2/src/Makefile b/configs/stm32butterfly2/src/Makefile index fcabcc6d192..ad5f6f882d0 100644 --- a/configs/stm32butterfly2/src/Makefile +++ b/configs/stm32butterfly2/src/Makefile @@ -30,7 +30,6 @@ # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN # ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE # POSSIBILITY OF SUCH DAMAGE. -# ############################################################################ -include $(TOPDIR)/Make.defs @@ -50,4 +49,8 @@ ifeq ($(CONFIG_MMCSD),y) CSRCS += stm32_mmcsd.c endif +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32butterfly2/src/stm32_buttons.c b/configs/stm32butterfly2/src/stm32_buttons.c new file mode 100644 index 00000000000..e09e477d78e --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_buttons.c @@ -0,0 +1,107 @@ +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_buttons.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + ****************************************************************************/ + +/***************************************************************************** + * Public Includes + ****************************************************************************/ + +#include "stm32_gpio.h" + +/***************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NUM_BUTTONS 5 + +#define GPIO_JOY_O (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\ + GPIO_PORTC | GPIO_PIN7) +#define GPIO_JOY_U (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\ + GPIO_PORTC | GPIO_PIN8) +#define GPIO_JOY_D (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\ + GPIO_PORTC | GPIO_PIN9) +#define GPIO_JOY_R (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\ + GPIO_PORTC | GPIO_PIN10) +#define GPIO_JOY_L (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT |\ + GPIO_PORTC | GPIO_PIN11) + +/***************************************************************************** + * Private Declarations + ****************************************************************************/ + +static const uint32_t buttons[NUM_BUTTONS] = { + GPIO_JOY_O, GPIO_JOY_U, GPIO_JOY_D, GPIO_JOY_R, GPIO_JOY_L }; + +/***************************************************************************** + * Public Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: board_button_initialize + * + * Description: + * Initializes gpio pins for joystick buttons + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + for (i = 0; i != NUM_BUTTONS; ++i) + { + stm32_configgpio(buttons[i]); + } +} + +/***************************************************************************** + * Name: board_buttons + * + * Description: + * Reads keys + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t rv = 0; + int i; + + for (i = 0; i != NUM_BUTTONS; ++i) + { + if (stm32_gpioread(buttons[i]) == 0) + { + rv |= 1 << i; + } + } + + return rv; +} + From f40bb14495f9bd067947289e1f3e8c253885c139 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Aug 2016 07:21:03 -0600 Subject: [PATCH 063/214] Kinetis: Add support for I2C1 --- arch/arm/src/kinetis/Kconfig | 2 + arch/arm/src/kinetis/kinetis_i2c.c | 392 ++++++++++++++++++----------- configs/teensy-3.x/include/board.h | 10 +- configs/teensy-3.x/src/k20_i2c.c | 1 - 4 files changed, 258 insertions(+), 147 deletions(-) diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig index 6028e6470b2..ebffecf9b56 100644 --- a/arch/arm/src/kinetis/Kconfig +++ b/arch/arm/src/kinetis/Kconfig @@ -255,12 +255,14 @@ config KINETIS_SPI2 config KINETIS_I2C0 bool "I2C0" default n + select I2C ---help--- Support I2C0 config KINETIS_I2C1 bool "I2C1" default n + select I2C ---help--- Support I2C1 diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 1496a552322..b17838393fa 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -66,7 +66,7 @@ #include "kinetis.h" #include "kinetis_i2c.h" -#if defined(CONFIG_KINETIS_I2C0) +#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) /**************************************************************************** * Pre-processor Definitions @@ -92,7 +92,7 @@ struct kinetis_i2cdev_s { struct i2c_master_s dev; /* Generic I2C device */ - unsigned int base; /* Base address of registers */ + uintptr_t base; /* Base address of registers */ uint16_t irqid; /* IRQ for this device */ uint32_t basefreq; /* branch frequency */ @@ -114,16 +114,27 @@ struct kinetis_i2cdev_s * Private Function Prototypes ****************************************************************************/ +static uint8_t kinetis_i2c_getreg(struct kinetis_i2cdev_s *priv, + uint8_t offset); +static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv, + uint8_t value, uint8_t offset); + static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv); static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv); -static int kinetis_i2c_interrupt(int irq, FAR void *context); +static int kinetis_i2c_interrupt(struct kinetis_i2cdev_s *priv); +#ifdef CONFIG_KINETIS_I2C0 +static int kinetis_i2c0_interrupt(int irq, void *context); +#endif +#ifdef CONFIG_KINETIS_I2C1 +static int kinetis_i2c1_interrupt(int irq, void *context); +#endif static void kinetis_i2c_timeout(int argc, uint32_t arg, ...); static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, uint32_t frequency); -static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s *msgs, int count); +static int kinetis_i2c_transfer(struct i2c_master_s *dev, + struct i2c_msg_s *msgs, int count); #ifdef CONFIG_I2C_RESET -static int kinetis_i2c_reset(FAR struct i2c_master_s *dev); +static int kinetis_i2c_reset(struct i2c_master_s *dev); #endif /**************************************************************************** @@ -138,12 +149,46 @@ static const struct i2c_ops_s g_i2c_ops = #endif }; -static struct kinetis_i2cdev_s g_i2c_dev; +#ifdef CONFIG_KINETIS_I2C0 +static struct kinetis_i2cdev_s g_i2c0_dev; +#endif +#ifdef CONFIG_KINETIS_I2C1 +static struct kinetis_i2cdev_s g_i2c1_dev; +#endif /**************************************************************************** * Private Functions ****************************************************************************/ + +/**************************************************************************** + * Name: kinetis_i2c_getreg + * + * Description: + * Get a 16-bit register value by offset + * + ****************************************************************************/ + +static uint8_t kinetis_i2c_getreg(struct kinetis_i2cdev_s *priv, + uint8_t offset) +{ + return getreg8(priv->base + offset); +} + +/**************************************************************************** + * Name: kinetis_i2c_putreg + * + * Description: + * Put a 16-bit register value by offset + * + ****************************************************************************/ + +static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv, uint8_t offset, + uint8_t value) +{ + putreg8(value, priv->base + offset); +} + /**************************************************************************** * Name: kinetis_i2c_setfrequency * @@ -165,253 +210,253 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, #if BOARD_BUS_FREQ == 120000000 if (frequency < 400000) { - putreg8(I2C_F_DIV1152, KINETIS_I2C0_F); /* 104 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV1152, KINETIS_I2C_F_OFFSET); /* 104 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV288, KINETIS_I2C0_F); /* 416 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV288, KINETIS_I2C_F_OFFSET); /* 416 kHz */ } else { - putreg8(I2C_F_DIV128, KINETIS_I2C0_F); /* 0.94 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV128, KINETIS_I2C_F_OFFSET); /* 0.94 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 108000000 if (frequency < 400000) { - putreg8(I2C_F_DIV1024, KINETIS_I2C0_F); /* 105 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV1024, KINETIS_I2C_F_OFFSET); /* 105 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV256, KINETIS_I2C0_F); /* 422 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV256, KINETIS_I2C_F_OFFSET); /* 422 kHz */ } else { - putreg8(I2C_F_DIV112, KINETIS_I2C0_F); /* 0.96 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV112, KINETIS_I2C_F_OFFSET); /* 0.96 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 96000000 if (frequency < 400000) { - putreg8(I2C_F_DIV960, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV960, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV240, KINETIS_I2C0_F); /* 400 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV240, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } else { - putreg8(I2C_F_DIV96, KINETIS_I2C0_F); /* 1.0 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV96, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 90000000 if (frequency < 400000) { - putreg8(I2C_F_DIV896, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV896, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV224, KINETIS_I2C0_F); /* 402 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV224, KINETIS_I2C_F_OFFSET); /* 402 kHz */ } else { - putreg8(I2C_F_DIV88, KINETIS_I2C0_F); /* 1.02 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV88, KINETIS_I2C_F_OFFSET); /* 1.02 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 80000000 if (frequency < 400000) { - putreg8(I2C_F_DIV768, KINETIS_I2C0_F); /* 104 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV768, KINETIS_I2C_F_OFFSET); /* 104 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV192, KINETIS_I2C0_F); /* 416 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV192, KINETIS_I2C_F_OFFSET); /* 416 kHz */ } else { - putreg8(I2C_F_DIV80, KINETIS_I2C0_F); /* 1.0 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV80, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 72000000 if (frequency < 400000) { - putreg8(I2C_F_DIV640, KINETIS_I2C0_F); /* 112 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV640, KINETIS_I2C_F_OFFSET); /* 112 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV192, KINETIS_I2C0_F); /* 375 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV192, KINETIS_I2C_F_OFFSET); /* 375 kHz */ } else { - putreg8(I2C_F_DIV72, KINETIS_I2C0_F); /* 1.0 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV72, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 64000000 if (frequency < 400000) { - putreg8(I2C_F_DIV640, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV640, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV160, KINETIS_I2C0_F); /* 400 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV160, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } else { - putreg8(I2C_F_DIV64, KINETIS_I2C0_F); /* 1.0 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV64, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 60000000 if (frequency < 400000) { - putreg8(0x2C, KINETIS_I2C0_F); /* 104 kHz */ + kinetis_i2c_putreg(priv, 0x2C, KINETIS_I2C_F_OFFSET); /* 104 kHz */ } else if (frequency < 1000000) { - putreg8(0x1C, KINETIS_I2C0_F); /* 416 kHz */ + kinetis_i2c_putreg(priv, 0x1C, KINETIS_I2C_F_OFFSET); /* 416 kHz */ } else { - putreg8(0x12, KINETIS_I2C0_F); /* 938 kHz */ + kinetis_i2c_putreg(priv, 0x12, KINETIS_I2C_F_OFFSET); /* 938 kHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 56000000 if (frequency < 400000) { - putreg8(0x2B, KINETIS_I2C0_F); /* 109 kHz */ + kinetis_i2c_putreg(priv, 0x2B, KINETIS_I2C_F_OFFSET); /* 109 kHz */ } else if (frequency < 1000000) { - putreg8(0x1C, KINETIS_I2C0_F); /* 389 kHz */ + kinetis_i2c_putreg(priv, 0x1C, KINETIS_I2C_F_OFFSET); /* 389 kHz */ } else { - putreg8(0x0E, KINETIS_I2C0_F); /* 1 MHz */ + kinetis_i2c_putreg(priv, 0x0E, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 54000000 if (frequency < 400000) { - putreg8(I2C_F_DIV512, KINETIS_I2C0_F); /* 105 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV512, KINETIS_I2C_F_OFFSET); /* 105 kHz */ } else if (frequency < 1000000) { - putreg8(I2C_F_DIV128, KINETIS_I2C0_F); /* 422 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV128, KINETIS_I2C_F_OFFSET); /* 422 kHz */ } else { - putreg8(I2C_F_DIV56, KINETIS_I2C0_F); /* 0.96 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV56, KINETIS_I2C_F_OFFSET); /* 0.96 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 48000000 if (frequency < 400000) { - putreg8(0x27, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, 0x27, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - putreg8(0x1A, KINETIS_I2C0_F); /* 400 kHz */ + kinetis_i2c_putreg(priv, 0x1A, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } else { - putreg8(0x0D, KINETIS_I2C0_F); /* 1 MHz */ + kinetis_i2c_putreg(priv, 0x0D, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - putreg8(4, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 40000000 if (frequency < 400000) { - putreg8(0x29, KINETIS_I2C0_F); /* 104 kHz */ + kinetis_i2c_putreg(priv, 0x29, KINETIS_I2C_F_OFFSET); /* 104 kHz */ } else if (frequency < 1000000) { - putreg8(0x19, KINETIS_I2C0_F); /* 416 kHz */ + kinetis_i2c_putreg(priv, 0x19, KINETIS_I2C_F_OFFSET); /* 416 kHz */ } else { - putreg8(0x0B, KINETIS_I2C0_F); /* 1 MHz */ + kinetis_i2c_putreg(priv, 0x0B, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - putreg8(3, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 3, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 36000000 if (frequency < 400000) { - putreg8(0x28, KINETIS_I2C0_F); /* 113 kHz */ + kinetis_i2c_putreg(priv, 0x28, KINETIS_I2C_F_OFFSET); /* 113 kHz */ } else if (frequency < 1000000) { - putreg8(0x19, KINETIS_I2C0_F); /* 375 kHz */ + kinetis_i2c_putreg(priv, 0x19, KINETIS_I2C_F_OFFSET); /* 375 kHz */ } else { - putreg8(0x0A, KINETIS_I2C0_F); /* 1 MHz */ + kinetis_i2c_putreg(priv, 0x0A, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - putreg8(3, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 3, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 24000000 if (frequency < 400000) { - putreg8(0x1F, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, 0x1F, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - putreg8(0x12, KINETIS_I2C0_F); /* 375 kHz */ + kinetis_i2c_putreg(priv, 0x12, KINETIS_I2C_F_OFFSET); /* 375 kHz */ } else { - putreg8(0x02, KINETIS_I2C0_F); /* 1 MHz */ + kinetis_i2c_putreg(priv, 0x02, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - putreg8(2, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 2, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 16000000 if (frequency < 400000) { - putreg8(0x20, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, 0x20, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - putreg8(0x07, KINETIS_I2C0_F); /* 400 kHz */ + kinetis_i2c_putreg(priv, 0x07, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } else { - putreg8(0x00, KINETIS_I2C0_F); /* 800 MHz */ + kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 800 MHz */ } - putreg8(1, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 8000000 if (frequency < 400000) { - putreg8(0x14, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, 0x14, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else { - putreg8(0x00, KINETIS_I2C0_F); /* 400 kHz */ + kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } - putreg8(1, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 4000000 if (frequency < 400000) { - putreg8(0x07, KINETIS_I2C0_F); /* 100 kHz */ + kinetis_i2c_putreg(priv, 0x07, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else { - putreg8(0x00, KINETIS_I2C0_F); /* 200 kHz */ + kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 200 kHz */ } - putreg8(1, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 2000000 - putreg8(0x00, KINETIS_I2C0_F); /* 100 kHz */ - putreg8(1, KINETIS_I2C0_FLT); + kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 100 kHz */ + kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); #else # error "F_BUS must be 120, 108, 96, 9, 80, 72, 64, 60, 56, 54, 48, 40, 36, 24, 16, 8, 4 or 2 MHz" #endif @@ -435,23 +480,23 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) /* Now take control of the bus */ - if (getreg8(KINETIS_I2C0_C1) & I2C_C1_MST) + if (kinetis_i2c_getreg(priv, KINETIS_I2C_C1_OFFSET) & I2C_C1_MST) { /* We are already the bus master, so send a repeated start */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_RSTA | - I2C_C1_TX, KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | + I2C_C1_RSTA | I2C_C1_TX, KINETIS_I2C_C1_OFFSET); } else { /* We are not currently the bus master, so wait for bus ready */ - while (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY); + while (kinetis_i2c_getreg(priv, KINETIS_I2C_S_OFFSET) & I2C_S_BUSY); /* Become the bus master in transmit mode (send start) */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, - KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | + I2C_C1_TX, KINETIS_I2C_C1_OFFSET); } if (I2C_M_READ & msg->flags) /* DEBUG: should happen always */ @@ -460,7 +505,7 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) while (1) { - if (getreg8(KINETIS_I2C0_S) & I2C_S_BUSY) + if (kinetis_i2c_getreg(priv, KINETIS_I2C_S_OFFSET) & I2C_S_BUSY) { break; } @@ -469,9 +514,9 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) /* Initiate actual transfer (send address) */ - putreg8((I2C_M_READ & msg->flags) == I2C_M_READ ? - I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr), - KINETIS_I2C0_D); + kinetis_i2c_putreg(priv, (I2C_M_READ & msg->flags) == I2C_M_READ ? + I2C_READADDR8(msg->addr) : I2C_WRITEADDR8(msg->addr), + KINETIS_I2C_D_OFFSET); return OK; } @@ -486,7 +531,8 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv) { - putreg8(I2C_C1_IICEN | I2C_C1_IICIE, KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE, + KINETIS_I2C_C1_OFFSET); sem_post(&priv->wait); } @@ -541,38 +587,29 @@ void kinetis_i2c_nextmsg(struct kinetis_i2cdev_s *priv) * Name: kinetis_i2c_interrupt * * Description: - * The I2C Interrupt Handler + * The I2C common interrupt handler * ****************************************************************************/ -static int kinetis_i2c_interrupt(int irq, FAR void *context) +static int kinetis_i2c_interrupt(struct kinetis_i2cdev_s *priv) { - struct kinetis_i2cdev_s *priv; struct i2c_msg_s *msg; uint32_t state; int regval; int dummy; UNUSED(dummy); - if (irq == KINETIS_IRQ_I2C0) - { - priv = &g_i2c_dev; - } - else - { - PANIC(); - } - /* Get current state */ - state = getreg8(KINETIS_I2C0_S); + state = kinetis_i2c_getreg(priv, KINETIS_I2C_S_OFFSET); msg = priv->msgs; /* Arbitration lost */ if (state & I2C_S_ARBL) { - putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); + kinetis_i2c_putreg(priv, I2C_S_IICIF | I2C_S_ARBL, + KINETIS_I2C_S_OFFSET); priv->state = STATE_ARBITRATION_ERROR; kinetis_i2c_stop(priv); } @@ -580,8 +617,8 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) { /* Clear interrupt */ - putreg8(I2C_S_IICIF, KINETIS_I2C0_S); - regval = getreg8(KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_S_IICIF, KINETIS_I2C_S_OFFSET); + regval = kinetis_i2c_getreg(priv, KINETIS_I2C_C1_OFFSET); /* TX mode */ @@ -612,7 +649,9 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) { /* Initiate transfer of following message */ - putreg8(priv->msgs->buffer[priv->wrcnt], KINETIS_I2C0_D); + kinetis_i2c_putreg(priv, + priv->msgs->buffer[priv->wrcnt], + KINETIS_I2C_D_OFFSET); priv->wrcnt++; sem_post(&priv->wait); @@ -622,7 +661,8 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) { /* Put next byte */ - putreg8(msg->buffer[priv->wrcnt], KINETIS_I2C0_D); + kinetis_i2c_putreg(priv, msg->buffer[priv->wrcnt], + KINETIS_I2C_D_OFFSET); priv->wrcnt++; } } @@ -635,21 +675,22 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) { /* Go to RX mode, do not send ACK */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | - I2C_C1_TXAK, KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | + I2C_C1_MST | I2C_C1_TXAK, + KINETIS_I2C_C1_OFFSET); } else { /* Go to RX mode */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST, - KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | + I2C_C1_MST, KINETIS_I2C_C1_OFFSET); } /* TODO: handle zero-length reads */ /* Dummy read to initiate reception */ - dummy = getreg8(KINETIS_I2C0_D); + dummy = kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET); } } } @@ -670,8 +711,9 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) /* Go to TX mode */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TX, - KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | + I2C_C1_MST | I2C_C1_TX, + KINETIS_I2C_C1_OFFSET); } else if ((priv->msgs + 1)->length == 1) { @@ -682,11 +724,13 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) /* Do not ACK any more */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, - KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | + I2C_C1_MST | I2C_C1_TXAK, + KINETIS_I2C_C1_OFFSET); } - msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + msg->buffer[priv->rdcnt] = + kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET); priv->rdcnt++; kinetis_i2c_nextmsg(priv); @@ -700,16 +744,18 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) { /* Do not ACK any more */ - putreg8(I2C_C1_IICEN | I2C_C1_IICIE | I2C_C1_MST | I2C_C1_TXAK, - KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE | + I2C_C1_MST | I2C_C1_TXAK, KINETIS_I2C_C1_OFFSET); } - msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + msg->buffer[priv->rdcnt] = + kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET); priv->rdcnt++; } else { - msg->buffer[priv->rdcnt] = getreg8(KINETIS_I2C0_D); + msg->buffer[priv->rdcnt] = + kinetis_i2c_getreg(priv, KINETIS_I2C_D_OFFSET); priv->rdcnt++; } } @@ -718,6 +764,28 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) return OK; } +/**************************************************************************** + * Name: kinetis_i2cN_interrupt + * + * Description: + * The I2CN interrupt handlers + * + ****************************************************************************/ + +#ifdef CONFIG_KINETIS_I2C0 +static int kinetis_i2c0_interrupt(int irq, void *context) +{ + return kinetis_i2c_interrupt(&g_i2c0_dev); +} +#endif + +#ifdef CONFIG_KINETIS_I2C1 +static int kinetis_i2c1_interrupt(int irq, void *context) +{ + return kinetis_i2c_interrupt(&g_i2c1_dev); +} +#endif + /**************************************************************************** * Name: kinetis_i2c_transfer * @@ -726,8 +794,8 @@ static int kinetis_i2c_interrupt(int irq, FAR void *context) * ****************************************************************************/ -static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s *msgs, int count) +static int kinetis_i2c_transfer(struct i2c_master_s *dev, + struct i2c_msg_s *msgs, int count) { struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; int msg_n; @@ -756,7 +824,7 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, /* Clear the status flags */ - putreg8(I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C0_S); + kinetis_i2c_putreg(priv, I2C_S_IICIF | I2C_S_ARBL, KINETIS_I2C_S_OFFSET); /* Process every message */ @@ -809,7 +877,7 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, /* Disable interrupts */ - putreg8(I2C_C1_IICEN, KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, I2C_C1_IICEN, KINETIS_I2C_C1_OFFSET); /* Release access to I2C bus */ @@ -840,7 +908,7 @@ static int kinetis_i2c_transfer(FAR struct i2c_master_s *dev, ************************************************************************************/ #ifdef CONFIG_I2C_RESET -static int kinetis_i2c_reset(FAR struct i2c_master_s *dev) +static int kinetis_i2c_reset(struct i2c_master_s *dev) { return OK; } @@ -861,6 +929,7 @@ static int kinetis_i2c_reset(FAR struct i2c_master_s *dev) struct i2c_master_s *kinetis_i2cbus_initialize(int port) { struct kinetis_i2cdev_s *priv; + xcpt_t handler; if (port > 1) { @@ -873,45 +942,78 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) flags = enter_critical_section(); +#ifdef CONFIG_KINETIS_I2C0 if (port == 0) { - priv = &g_i2c_dev; - priv->base = KINETIS_I2C0_BASE; - priv->irqid = KINETIS_IRQ_I2C0; + priv = &g_i2c0_dev; + priv->base = KINETIS_I2C0_BASE; + priv->irqid = KINETIS_IRQ_I2C0; priv->basefreq = BOARD_BUS_FREQ; + handler = kinetis_i2c0_interrupt; + /* Enable clock */ - regval = getreg32(KINETIS_SIM_SCGC4); - regval |= SIM_SCGC4_I2C0; + regval = getreg32(KINETIS_SIM_SCGC4); + regval |= SIM_SCGC4_I2C0; putreg32(regval, KINETIS_SIM_SCGC4); - kinetis_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY); - /* Disable while configuring */ - putreg8(0, KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET); /* Configure pins */ kinetis_pinconfig(PIN_I2C0_SCL); kinetis_pinconfig(PIN_I2C0_SDA); - - /* Enable */ - - putreg8(I2C_C1_IICEN, KINETIS_I2C0_C1); - - /* High-drive select (TODO: why)? */ - - regval = getreg8(KINETIS_I2C0_C2); - regval |= I2C_C2_HDRS; - putreg8(regval, KINETIS_I2C0_C2); } else +#endif +#ifdef CONFIG_KINETIS_I2C1 + if (port == 1) { + priv = &g_i2c1_dev; + priv->base = KINETIS_I2C1_BASE; + priv->irqid = KINETIS_IRQ_I2C1; + priv->basefreq = BOARD_BUS_FREQ; + + handler = kinetis_i2c1_interrupt; + + /* Enable clock */ + + regval = getreg32(KINETIS_SIM_SCGC4); + regval |= SIM_SCGC4_I2C1; + putreg32(regval, KINETIS_SIM_SCGC4); + + /* Disable while configuring */ + + kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET); + + /* Configure pins */ + + kinetis_pinconfig(PIN_I2C1_SCL); + kinetis_pinconfig(PIN_I2C1_SDA); + } + else +#endif + { + leave_critical_section(flags); + i2cerr("ERROR: Unsupport I2C bus: %d\n", port); return NULL; } + kinetis_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY); + + /* Enable */ + + kinetis_i2c_putreg(priv, I2C_C1_IICEN, KINETIS_I2C_C1_OFFSET); + + /* High-drive select (TODO: why)? */ + + regval = kinetis_i2c_getreg(priv, KINETIS_I2C_C2_OFFSET); + regval |= I2C_C2_HDRS; + kinetis_i2c_putreg(priv, regval, KINETIS_I2C_C2_OFFSET); + leave_critical_section(flags); sem_init(&priv->mutex, 0, 1); @@ -924,7 +1026,7 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) /* Attach Interrupt Handler */ - irq_attach(priv->irqid, kinetis_i2c_interrupt); + irq_attach(priv->irqid, handler); /* Enable Interrupt Handler */ @@ -944,15 +1046,15 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) * ****************************************************************************/ -int kinetis_i2cbus_uninitialize(FAR struct i2c_master_s *dev) +int kinetis_i2cbus_uninitialize(struct i2c_master_s *dev) { struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; - putreg8(0, KINETIS_I2C0_C1); + kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET); up_disable_irq(priv->irqid); irq_detach(priv->irqid); return OK; } -#endif /* CONFIG_KINETIS_I2C0 */ +#endif /* CONFIG_KINETIS_I2C0 || CONFIG_KINETIS_I2C1 */ diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h index 38a84af6571..b7099de6e8c 100644 --- a/configs/teensy-3.x/include/board.h +++ b/configs/teensy-3.x/include/board.h @@ -242,8 +242,16 @@ #endif #endif +/* REVISIT: Added only for clean compilation with I2C1 enabled. */ + #ifdef CONFIG_KINETIS_I2C1 -# error I2C1 not currently supported +#ifdef CONFIG_TEENSY_3X_I2C_ALT_PINS +# define PIN_I2C1_SCL (PIN_I2C1_SCL_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) +# define PIN_I2C1_SDA (PIN_I2C1_SDA_1 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) +#else +# define PIN_I2C1_SCL (PIN_I2C1_SCL_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) +# define PIN_I2C1_SDA (PIN_I2C1_SDA_2 | PIN_ALT2_OPENDRAIN | PIN_ALT2_SLOW) +#endif #endif /************************************************************************************ diff --git a/configs/teensy-3.x/src/k20_i2c.c b/configs/teensy-3.x/src/k20_i2c.c index f1440882fde..76cc8e884aa 100644 --- a/configs/teensy-3.x/src/k20_i2c.c +++ b/configs/teensy-3.x/src/k20_i2c.c @@ -78,7 +78,6 @@ void kinetis_i2cdev_initialize(void) #endif #if defined(CONFIG_KINETIS_I2C1) -#error Not yet supported in kinetis driver i2c_dev = kinetis_i2cbus_initialize(1); #if defined(CONFIG_I2C_DRIVER) i2c_register(i2c_dev, 1); From 32c1189f51f046af18bf0d6563a84a534c3d1c07 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Aug 2016 08:20:55 -0600 Subject: [PATCH 064/214] Re-order some fields so that the structure packs better and so is smaller. --- arch/arm/src/kinetis/kinetis_i2c.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index b17838393fa..1e8fdcdaae5 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -93,21 +93,19 @@ struct kinetis_i2cdev_s { struct i2c_master_s dev; /* Generic I2C device */ uintptr_t base; /* Base address of registers */ - uint16_t irqid; /* IRQ for this device */ - uint32_t basefreq; /* branch frequency */ - - sem_t mutex; /* Only one thread can access at a time */ - sem_t wait; /* Place to wait for state machine completion */ - volatile uint8_t state; /* State of state machine */ - WDOG_ID timeout; /* watchdog to timeout when bus hung */ + uint32_t basefreq; /* Branch frequency */ uint32_t frequency; /* Current I2C frequency */ - bool restart; /* Should next transfer restart or not */ - struct i2c_msg_s *msgs; /* Remaining transfers - first one is in - * progress */ - unsigned int nmsg; /* number of transfer remaining */ - + uint16_t irqid; /* IRQ for this device */ + uint16_t nmsg; /* Number of transfer remaining */ uint16_t wrcnt; /* number of bytes sent to tx fifo */ uint16_t rdcnt; /* number of bytes read from rx fifo */ + volatile uint8_t state; /* State of state machine */ + bool restart; /* Should next transfer restart or not */ + sem_t mutex; /* Only one thread can access at a time */ + sem_t wait; /* Place to wait for state machine completion */ + WDOG_ID timeout; /* watchdog to timeout when bus hung */ + struct i2c_msg_s *msgs; /* Remaining transfers - first one is in + * progress */ }; /**************************************************************************** From be83e739578cf0e3d24347315868f84fb1dd326e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Aug 2016 08:42:30 -0600 Subject: [PATCH 065/214] Kinetis I2C: Add comments, DEBUGASSERTions, and some I2C debug output. --- arch/arm/src/kinetis/kinetis_i2c.c | 59 ++++++++++++++++++++++++++++-- 1 file changed, 56 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 1e8fdcdaae5..ac06cb30fd4 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -89,6 +89,8 @@ * Private Types ****************************************************************************/ +/* I2C device state structure */ + struct kinetis_i2cdev_s { struct i2c_master_s dev; /* Generic I2C device */ @@ -112,11 +114,17 @@ struct kinetis_i2cdev_s * Private Function Prototypes ****************************************************************************/ +/* Register access */ + static uint8_t kinetis_i2c_getreg(struct kinetis_i2cdev_s *priv, uint8_t offset); static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv, uint8_t value, uint8_t offset); +/* I2C helpers */ + +static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, + uint32_t frequency); static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv); static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv); static int kinetis_i2c_interrupt(struct kinetis_i2cdev_s *priv); @@ -129,6 +137,9 @@ static int kinetis_i2c1_interrupt(int irq, void *context); static void kinetis_i2c_timeout(int argc, uint32_t arg, ...); static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, uint32_t frequency); + +/* I2C lower half driver methods */ + static int kinetis_i2c_transfer(struct i2c_master_s *dev, struct i2c_msg_s *msgs, int count); #ifdef CONFIG_I2C_RESET @@ -139,6 +150,8 @@ static int kinetis_i2c_reset(struct i2c_master_s *dev); * Private Data ****************************************************************************/ +/* I2C lower half driver operations */ + static const struct i2c_ops_s g_i2c_ops = { .transfer = kinetis_i2c_transfer @@ -147,6 +160,8 @@ static const struct i2c_ops_s g_i2c_ops = #endif }; +/* I2C device state instances */ + #ifdef CONFIG_KINETIS_I2C0 static struct kinetis_i2cdev_s g_i2c0_dev; #endif @@ -158,7 +173,6 @@ static struct kinetis_i2cdev_s g_i2c1_dev; * Private Functions ****************************************************************************/ - /**************************************************************************** * Name: kinetis_i2c_getreg * @@ -198,6 +212,8 @@ static void kinetis_i2c_putreg(struct kinetis_i2cdev_s *priv, uint8_t offset, static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, uint32_t frequency) { + i2cinfo("frequency=%lu\n", (unsigned long)frequency); + if (frequency == priv->frequency) { return; @@ -220,6 +236,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 108000000 if (frequency < 400000) { @@ -235,6 +252,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 96000000 if (frequency < 400000) { @@ -250,6 +268,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 90000000 if (frequency < 400000) { @@ -265,6 +284,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 80000000 if (frequency < 400000) { @@ -280,6 +300,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 72000000 if (frequency < 400000) { @@ -295,6 +316,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 64000000 if (frequency < 400000) { @@ -310,6 +332,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 60000000 if (frequency < 400000) { @@ -325,6 +348,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 56000000 if (frequency < 400000) { @@ -340,6 +364,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 54000000 if (frequency < 400000) { @@ -355,6 +380,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 48000000 if (frequency < 400000) { @@ -370,6 +396,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 40000000 if (frequency < 400000) { @@ -385,6 +412,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 3, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 36000000 if (frequency < 400000) { @@ -400,6 +428,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 3, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 24000000 if (frequency < 400000) { @@ -415,6 +444,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 2, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 16000000 if (frequency < 400000) { @@ -430,6 +460,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 8000000 if (frequency < 400000) { @@ -441,6 +472,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 4000000 if (frequency < 400000) { @@ -452,9 +484,11 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, } kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + #elif BOARD_BUS_FREQ == 2000000 kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 100 kHz */ kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + #else # error "F_BUS must be 120, 108, 96, 9, 80, 72, 64, 60, 56, 54, 48, 40, 36, 24, 16, 8, 4 or 2 MHz" #endif @@ -474,6 +508,7 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) { struct i2c_msg_s *msg; + i2cinfo("START msg=%p\n", priv->msgs); msg = priv->msgs; /* Now take control of the bus */ @@ -529,6 +564,8 @@ static int kinetis_i2c_start(struct kinetis_i2cdev_s *priv) static void kinetis_i2c_stop(struct kinetis_i2cdev_s *priv) { + i2cinfo("STOP msg=%p\n", priv->msgs); + kinetis_i2c_putreg(priv, I2C_C1_IICEN | I2C_C1_IICIE, KINETIS_I2C_C1_OFFSET); sem_post(&priv->wait); @@ -546,6 +583,9 @@ static void kinetis_i2c_timeout(int argc, uint32_t arg, ...) { struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)arg; + DEBUGASSERT(priv != NULL); + i2cinfo("Timeout msg=%p\n", priv->msgs); + irqstate_t flags = enter_critical_section(); priv->state = STATE_TIMEOUT; sem_post(&priv->wait); @@ -563,10 +603,13 @@ static void kinetis_i2c_timeout(int argc, uint32_t arg, ...) void kinetis_i2c_nextmsg(struct kinetis_i2cdev_s *priv) { priv->nmsg--; + i2cinfo("nmsg=%u\n", priv->nmsg); if (priv->nmsg > 0) { priv->msgs++; + i2cinfo("msg=%p\n", priv->msgs); + priv->wrcnt = 0; priv->rdcnt = 0; @@ -773,6 +816,7 @@ static int kinetis_i2c_interrupt(struct kinetis_i2cdev_s *priv) #ifdef CONFIG_KINETIS_I2C0 static int kinetis_i2c0_interrupt(int irq, void *context) { + i2cinfo("I2C0 Interrupt...\n"); return kinetis_i2c_interrupt(&g_i2c0_dev); } #endif @@ -780,6 +824,7 @@ static int kinetis_i2c0_interrupt(int irq, void *context) #ifdef CONFIG_KINETIS_I2C1 static int kinetis_i2c1_interrupt(int irq, void *context) { + i2cinfo("I2C1 Interrupt...\n"); return kinetis_i2c_interrupt(&g_i2c1_dev); } #endif @@ -798,7 +843,8 @@ static int kinetis_i2c_transfer(struct i2c_master_s *dev, struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; int msg_n; - DEBUGASSERT(dev != NULL); + i2cinfo("msgs=%p count=%d\n", msgs, count); + DEBUGASSERT(dev != NULL && msgs != NULL && (unsigned)count <= UINT16_MAX); /* Get exclusive access to the I2C bus */ @@ -826,7 +872,7 @@ static int kinetis_i2c_transfer(struct i2c_master_s *dev, /* Process every message */ - while (priv->nmsg && priv->state == STATE_OK) + while (priv->nmsg > 0 && priv->state == STATE_OK) { priv->restart = true; @@ -908,6 +954,7 @@ static int kinetis_i2c_transfer(struct i2c_master_s *dev, #ifdef CONFIG_I2C_RESET static int kinetis_i2c_reset(struct i2c_master_s *dev) { + i2cinfo("No reset...\n"); return OK; } #endif /* CONFIG_I2C_RESET */ @@ -929,6 +976,8 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) struct kinetis_i2cdev_s *priv; xcpt_t handler; + i2cinfo("port=%d\n", port); + if (port > 1) { i2cerr("ERROR: Kinetis I2C Only suppors ports 0 and 1\n"); @@ -1000,6 +1049,8 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) return NULL; } + /* Set the default I2C frequency */ + kinetis_i2c_setfrequency(priv, I2C_DEFAULT_FREQUENCY); /* Enable */ @@ -1048,6 +1099,8 @@ int kinetis_i2cbus_uninitialize(struct i2c_master_s *dev) { struct kinetis_i2cdev_s *priv = (struct kinetis_i2cdev_s *)dev; + DEBUGASSERT(priv != NULL); + kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET); up_disable_irq(priv->irqid); From a3b061e54f9f63aaa7d9f921d0e223cbf890d540 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Aug 2016 10:02:28 -0600 Subject: [PATCH 066/214] Kinetis: Add support for I2C2 --- arch/arm/src/kinetis/Kconfig | 53 +++++++++++++++++++++++++ arch/arm/src/kinetis/chip/kinetis_i2c.h | 52 +++++++++++++----------- arch/arm/src/kinetis/kinetis_i2c.c | 46 ++++++++++++++++++++- 3 files changed, 125 insertions(+), 26 deletions(-) diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig index ebffecf9b56..17923818b5a 100644 --- a/arch/arm/src/kinetis/Kconfig +++ b/arch/arm/src/kinetis/Kconfig @@ -37,94 +37,130 @@ config ARCH_CHIP_MK20DX128VLH5 config ARCH_CHIP_MK20DX64VLH7 bool "MK20DX64VLH7" select ARCH_FAMILY_K20 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK20DX128VLH7 bool "MK20DX128VLH7" select ARCH_FAMILY_K20 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK20DX256VLH7 bool "MK20DX256VLH7" select ARCH_FAMILY_K20 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK40N512VLQ100 bool "MK40N512VLQ100" select ARCH_FAMILY_K40 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK40N512VMD100 bool "MK40N512VMD100" select ARCH_FAMILY_K40 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK40X128VLQ100 bool "MK40X128VLQ100" select ARCH_FAMILY_K40 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK40X128VMD100 bool "MK40X128VMD100" select ARCH_FAMILY_K40 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK40X256VLQ100 bool "MK40X256VLQ100" select ARCH_FAMILY_K40 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK40X256VMD100 bool "MK40X256VMD100" select ARCH_FAMILY_K40 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK60N256VLQ100 bool "MK60N256VLQ100" select ARCH_FAMILY_K60 + select KINETIS_HAVE_I2C1 config ARCH_CHIP_MK60N256VMD100 bool "MK60N256VMD100" select ARCH_FAMILY_K60 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK60N512VLL100 bool "MK60N512VLL100" select ARCH_FAMILY_K60 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK60N512VLQ100 bool "MK60N512VLQ100" select ARCH_FAMILY_K60 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK60N512VMD100 bool "MK60N512VMD100" select ARCH_FAMILY_K60 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK60X256VLQ100 bool "MK60X256VLQ100" select ARCH_FAMILY_K60 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK60X256VMD100 bool "MK60X256VMD100" select ARCH_FAMILY_K60 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK64FN1M0VLL12 bool "MK64FN1M0VLL12" select ARCH_FAMILY_K64 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK64FX512VLL12 bool "MK64FX512VLL12" select ARCH_FAMILY_K64 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK64FX512VDC12 bool "MK64FX512VDC12" select ARCH_FAMILY_K64 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK64FN1M0VDC12 bool "MK64FN1M0VDC12" select ARCH_FAMILY_K64 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK64FX512VLQ12 bool "MK64FX512VLQ12" select ARCH_FAMILY_K64 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK64FX512VMD12 bool "MK64FX512VMD12" select ARCH_FAMILY_K64 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 config ARCH_CHIP_MK64FN1M0VMD12 bool "MK64FN1M0VMD12" select ARCH_FAMILY_K64 + select KINETIS_HAVE_I2C1 + select KINETIS_HAVE_I2C2 endchoice @@ -148,6 +184,14 @@ config ARCH_FAMILY_K64 menu "Kinetis Peripheral Support" +config KINETIS_HAVE_I2C1 + bool + default n + +config KINETIS_HAVE_I2C2 + bool + default n + config KINETIS_TRACE bool "Trace" default n @@ -263,6 +307,15 @@ config KINETIS_I2C1 bool "I2C1" default n select I2C + depends on KINETIS_HAVE_I2C1 + ---help--- + Support I2C1 + +config KINETIS_I2C2 + bool "I2C2" + default n + select I2C + depends on KINETIS_HAVE_I2C2 ---help--- Support I2C1 diff --git a/arch/arm/src/kinetis/chip/kinetis_i2c.h b/arch/arm/src/kinetis/chip/kinetis_i2c.h index 94d071727b3..ece5561bb64 100644 --- a/arch/arm/src/kinetis/chip/kinetis_i2c.h +++ b/arch/arm/src/kinetis/chip/kinetis_i2c.h @@ -78,31 +78,35 @@ #define KINETIS_I2C0_SLTH (KINETIS_I2C0_BASE+KINETIS_I2C_SLTH_OFFSET) #define KINETIS_I2C0_SLTL (KINETIS_I2C0_BASE+KINETIS_I2C_SLTL_OFFSET) -#define KINETIS_I2C1_A1 (KINETIS_I2C1_BASE+KINETIS_I2C_A1_OFFSET) -#define KINETIS_I2C1_F (KINETIS_I2C1_BASE+KINETIS_I2C_F_OFFSET) -#define KINETIS_I2C1_C1 (KINETIS_I2C1_BASE+KINETIS_I2C_C1_OFFSET) -#define KINETIS_I2C1_S (KINETIS_I2C1_BASE+KINETIS_I2C_S_OFFSET) -#define KINETIS_I2C1_D (KINETIS_I2C1_BASE+KINETIS_I2C_D_OFFSET) -#define KINETIS_I2C1_C2 (KINETIS_I2C1_BASE+KINETIS_I2C_C2_OFFSET) -#define KINETIS_I2C1_FLT (KINETIS_I2C1_BASE+KINETIS_I2C_FLT_OFFSET) -#define KINETIS_I2C1_RA (KINETIS_I2C1_BASE+KINETIS_I2C_RA_OFFSET) -#define KINETIS_I2C1_SMB (KINETIS_I2C1_BASE+KINETIS_I2C_SMB_OFFSET) -#define KINETIS_I2C1_A2 (KINETIS_I2C1_BASE+KINETIS_I2C_A2_OFFSET) -#define KINETIS_I2C1_SLTH (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET) -#define KINETIS_I2C1_SLTL (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET) +#ifdef CONFIG_KINETIS_HAVE_I2C1 +# define KINETIS_I2C1_A1 (KINETIS_I2C1_BASE+KINETIS_I2C_A1_OFFSET) +# define KINETIS_I2C1_F (KINETIS_I2C1_BASE+KINETIS_I2C_F_OFFSET) +# define KINETIS_I2C1_C1 (KINETIS_I2C1_BASE+KINETIS_I2C_C1_OFFSET) +# define KINETIS_I2C1_S (KINETIS_I2C1_BASE+KINETIS_I2C_S_OFFSET) +# define KINETIS_I2C1_D (KINETIS_I2C1_BASE+KINETIS_I2C_D_OFFSET) +# define KINETIS_I2C1_C2 (KINETIS_I2C1_BASE+KINETIS_I2C_C2_OFFSET) +# define KINETIS_I2C1_FLT (KINETIS_I2C1_BASE+KINETIS_I2C_FLT_OFFSET) +# define KINETIS_I2C1_RA (KINETIS_I2C1_BASE+KINETIS_I2C_RA_OFFSET) +# define KINETIS_I2C1_SMB (KINETIS_I2C1_BASE+KINETIS_I2C_SMB_OFFSET) +# define KINETIS_I2C1_A2 (KINETIS_I2C1_BASE+KINETIS_I2C_A2_OFFSET) +# define KINETIS_I2C1_SLTH (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET) +# define KINETIS_I2C1_SLTL (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET) +#endif -#define KINETIS_I2C2_A1 (KINETIS_I2C2_BASE+KINETIS_I2C_A1_OFFSET) -#define KINETIS_I2C2_F (KINETIS_I2C2_BASE+KINETIS_I2C_F_OFFSET) -#define KINETIS_I2C2_C1 (KINETIS_I2C2_BASE+KINETIS_I2C_C1_OFFSET) -#define KINETIS_I2C2_S (KINETIS_I2C2_BASE+KINETIS_I2C_S_OFFSET) -#define KINETIS_I2C2_D (KINETIS_I2C2_BASE+KINETIS_I2C_D_OFFSET) -#define KINETIS_I2C2_C2 (KINETIS_I2C2_BASE+KINETIS_I2C_C2_OFFSET) -#define KINETIS_I2C2_FLT (KINETIS_I2C2_BASE+KINETIS_I2C_FLT_OFFSET) -#define KINETIS_I2C2_RA (KINETIS_I2C2_BASE+KINETIS_I2C_RA_OFFSET) -#define KINETIS_I2C2_SMB (KINETIS_I2C2_BASE+KINETIS_I2C_SMB_OFFSET) -#define KINETIS_I2C2_A2 (KINETIS_I2C2_BASE+KINETIS_I2C_A2_OFFSET) -#define KINETIS_I2C2_SLTH (KINETIS_I2C2_BASE+KINETIS_I2C_SLTH_OFFSET) -#define KINETIS_I2C2_SLTL (KINETIS_I2C2_BASE+KINETIS_I2C_SLTL_OFFSET) +#ifdef CONFIG_KINETIS_HAVE_I2C2 +# define KINETIS_I2C2_A1 (KINETIS_I2C2_BASE+KINETIS_I2C_A1_OFFSET) +# define KINETIS_I2C2_F (KINETIS_I2C2_BASE+KINETIS_I2C_F_OFFSET) +# define KINETIS_I2C2_C1 (KINETIS_I2C2_BASE+KINETIS_I2C_C1_OFFSET) +# define KINETIS_I2C2_S (KINETIS_I2C2_BASE+KINETIS_I2C_S_OFFSET) +# define KINETIS_I2C2_D (KINETIS_I2C2_BASE+KINETIS_I2C_D_OFFSET) +# define KINETIS_I2C2_C2 (KINETIS_I2C2_BASE+KINETIS_I2C_C2_OFFSET) +# define KINETIS_I2C2_FLT (KINETIS_I2C2_BASE+KINETIS_I2C_FLT_OFFSET) +# define KINETIS_I2C2_RA (KINETIS_I2C2_BASE+KINETIS_I2C_RA_OFFSET) +# define KINETIS_I2C2_SMB (KINETIS_I2C2_BASE+KINETIS_I2C_SMB_OFFSET) +# define KINETIS_I2C2_A2 (KINETIS_I2C2_BASE+KINETIS_I2C_A2_OFFSET) +# define KINETIS_I2C2_SLTH (KINETIS_I2C2_BASE+KINETIS_I2C_SLTH_OFFSET) +# define KINETIS_I2C2_SLTL (KINETIS_I2C2_BASE+KINETIS_I2C_SLTL_OFFSET) +#endif /* Register Bit Definitions *****************************************************************/ diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index ac06cb30fd4..2ceca223644 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -66,7 +66,8 @@ #include "kinetis.h" #include "kinetis_i2c.h" -#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) +#if defined(CONFIG_KINETIS_I2C0) || defined(CONFIG_KINETIS_I2C1) || \ + defined(CONFIG_KINETIS_I2C2) /**************************************************************************** * Pre-processor Definitions @@ -134,6 +135,9 @@ static int kinetis_i2c0_interrupt(int irq, void *context); #ifdef CONFIG_KINETIS_I2C1 static int kinetis_i2c1_interrupt(int irq, void *context); #endif +#ifdef CONFIG_KINETIS_I2C2 +static int kinetis_i2c2_interrupt(int irq, void *context); +#endif static void kinetis_i2c_timeout(int argc, uint32_t arg, ...); static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, uint32_t frequency); @@ -168,6 +172,9 @@ static struct kinetis_i2cdev_s g_i2c0_dev; #ifdef CONFIG_KINETIS_I2C1 static struct kinetis_i2cdev_s g_i2c1_dev; #endif +#ifdef CONFIG_KINETIS_I2C2 +static struct kinetis_i2cdev_s g_i2c2_dev; +#endif /**************************************************************************** * Private Functions @@ -829,6 +836,14 @@ static int kinetis_i2c1_interrupt(int irq, void *context) } #endif +#ifdef CONFIG_KINETIS_I2C2 +static int kinetis_i2c2_interrupt(int irq, void *context) +{ + i2cinfo("I2C2 Interrupt...\n"); + return kinetis_i2c_interrupt(&g_i2c2_dev); +} +#endif + /**************************************************************************** * Name: kinetis_i2c_transfer * @@ -1042,6 +1057,33 @@ struct i2c_master_s *kinetis_i2cbus_initialize(int port) kinetis_pinconfig(PIN_I2C1_SDA); } else +#endif +#ifdef CONFIG_KINETIS_I2C2 + if (port == 2) + { + priv = &g_i2c2_dev; + priv->base = KINETIS_I2C2_BASE; + priv->irqid = KINETIS_IRQ_I2C2; + priv->basefreq = BOARD_BUS_FREQ; + + handler = kinetis_i2c2_interrupt; + + /* Enable clock */ + + regval = getreg32(KINETIS_SIM_SCGC4); + regval |= SIM_SCGC4_I2C2; + putreg32(regval, KINETIS_SIM_SCGC4); + + /* Disable while configuring */ + + kinetis_i2c_putreg(priv, 0, KINETIS_I2C_C1_OFFSET); + + /* Configure pins */ + + kinetis_pinconfig(PIN_I2C2_SCL); + kinetis_pinconfig(PIN_I2C2_SDA); + } + else #endif { leave_critical_section(flags); @@ -1108,4 +1150,4 @@ int kinetis_i2cbus_uninitialize(struct i2c_master_s *dev) return OK; } -#endif /* CONFIG_KINETIS_I2C0 || CONFIG_KINETIS_I2C1 */ +#endif /* CONFIG_KINETIS_I2C0 || CONFIG_KINETIS_I2C1 || CONFIG_KINETIS_I2C2 */ From 7f4488dc805d5ef590c2e602365bb9f10c095a11 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Aug 2016 10:18:52 -0600 Subject: [PATCH 067/214] Review I2C register definitions and add support for the K64 --- arch/arm/src/kinetis/chip/kinetis_i2c.h | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_i2c.h b/arch/arm/src/kinetis/chip/kinetis_i2c.h index ece5561bb64..487d8518065 100644 --- a/arch/arm/src/kinetis/chip/kinetis_i2c.h +++ b/arch/arm/src/kinetis/chip/kinetis_i2c.h @@ -119,6 +119,7 @@ #define I2C_F_ICR_SHIFT (0) /* Bits 0-5: Clock rate */ #define I2C_F_ICR_MASK (0x3f << I2C_F_ICR_SHIFT) +# define I2C_F_ICR(n) ((uint8_t)(n) << I2C_F_ICR_SHIFT) #define I2C_F_MULT_SHIFT (6) /* Bits 6-7: Multiplier factor */ #define I2C_F_MULT_MASK (3 << I2C_F_MULT_SHIFT) # define I2C_F_MULT_1 (0 << I2C_F_MULT_SHIFT) @@ -153,6 +154,7 @@ #define I2C_C2_AD_SHIFT (0) /* Bits 0-2: Slave address */ #define I2C_C2_AD_MASK (7 << I2C_C2_AD_SHIFT) +# define I2C_C2_AD(n) ((uint8_t)(n) << I2C_C2_AD_SHIFT) #define I2C_C2_RMEN (1 << 3) /* Bit 3: Range address matching enable */ #define I2C_C2_SBRC (1 << 4) /* Bit 4: Slave baud rate control */ #define I2C_C2_HDRS (1 << 5) /* Bit 5: High drive select */ @@ -160,9 +162,22 @@ #define I2C_C2_GCAEN (1 << 7) /* Bit 7: General call address enable */ /* I2C Programmable Input Glitch Filter register (8-bit) */ + +#ifdef KINETIS_K20 +# define I2C_FLT_SHIFT (0) /* Bits 0-4: I2C programmable filter factor */ +# define I2C_FLT_MASK (31 << I2C_FLT_SHIFT) /* Bits 5-7: Reserved */ -#define I2C_FLT_SHIFT (0) /* Bits 0-4: I2C programmable filter factor */ -#define I2C_FLT_MASK (31 << I2C_FLT_SHIFT) +#endif + +#ifdef KINETIS_K64 +# define I2C_FLT_SHIFT (0) /* Bits 0-3: I2C programmable filter factor */ +# define I2C_FLT_MASK (15 << I2C_FLT_SHIFT) +# define I2C_FLT(n) ((uint8_t)(n) << I2C_FLT_SHIFT) +# define I2C_FLT_STARTF (1 << 4) /* I2C bus start detect flag */ +# define I2C_FLT_SSIE (1 << 5) /* I2C bus stop or start interrupt enable */ +# define I2C_FLT_STOPF (1 << 6) /* I2C bus stop detect flag */ +# define I2C_FLT_SHEN (1 << 7) /* Stop hold enable */ +#endif /* I2C Range Address register (8-bit) */ /* Bit 0: Reserved */ From a337494221d2a9e202ee40a99f57dd39211fece8 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Aug 2016 11:44:04 -0600 Subject: [PATCH 068/214] Kinetis I2C: Remove literal hex register values. Replace with symbolic definitions from kinetis_i2c.h --- arch/arm/src/kinetis/chip/kinetis_i2c.h | 78 +++++++++++++++++++++ arch/arm/src/kinetis/kinetis_i2c.c | 92 ++++++++++++------------- 2 files changed, 123 insertions(+), 47 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_i2c.h b/arch/arm/src/kinetis/chip/kinetis_i2c.h index 487d8518065..6b376c95cea 100644 --- a/arch/arm/src/kinetis/chip/kinetis_i2c.h +++ b/arch/arm/src/kinetis/chip/kinetis_i2c.h @@ -126,6 +126,83 @@ # define I2C_F_MULT_2 (1 << I2C_F_MULT_SHIFT) # define I2C_F_MULT_4 (2 << I2C_F_MULT_SHIFT) +/* From Table 51-54. I2C divider and hold values. Duplicate divider values differ in hold + * times + */ + +#define I2C_F_DIV20 ((uint8_t)0x00) +#define I2C_F_DIV22 ((uint8_t)0x01) +#define I2C_F_DIV24 ((uint8_t)0x02) +#define I2C_F_DIV26 ((uint8_t)0x03) +#define I2C_F_DIV28 ((uint8_t)0x04) +#define I2C_F_DIV30 ((uint8_t)0x05) +#define I2C_F_DIV34 ((uint8_t)0x06) +#define I2C_F_DIV36 ((uint8_t)0x0a) +#define I2C_F_DIV40_1 ((uint8_t)0x07) +#define I2C_F_DIV41 ((uint8_t)0x08) +#define I2C_F_DIV32 ((uint8_t)0x09) +#define I2C_F_DIV36 ((uint8_t)0x0a) + +#define I2C_F_DIV40_2 ((uint8_t)0x0b) +#define I2C_F_DIV44 ((uint8_t)0x0c) +#define I2C_F_DIV48_1 ((uint8_t)0x0d) +#define I2C_F_DIV56_1 ((uint8_t)0x0e) +#define I2C_F_DIV68 ((uint8_t)0x0f) + +#define I2C_F_DIV48_2 ((uint8_t)0x10) +#define I2C_F_DIV56_2 ((uint8_t)0x11) +#define I2C_F_DIV64 ((uint8_t)0x12) +#define I2C_F_DIV72 ((uint8_t)0x13) +#define I2C_F_DIV80_1 ((uint8_t)0x14) +#define I2C_F_DIV88 ((uint8_t)0x15) +#define I2C_F_DIV104 ((uint8_t)0x16) +#define I2C_F_DIV128_1 ((uint8_t)0x17) + +#define I2C_F_DIV80_2 ((uint8_t)0x18) +#define I2C_F_DIV96 ((uint8_t)0x19) +#define I2C_F_DIV112 ((uint8_t)0x1a) +#define I2C_F_DIV128_2 ((uint8_t)0x1b) +#define I2C_F_DIV144 ((uint8_t)0x1c) +#define I2C_F_DIV160_1 ((uint8_t)0x1d) +#define I2C_F_DIV192_1 ((uint8_t)0x1e) +#define I2C_F_DIV240 ((uint8_t)0x1f) + +#define I2C_F_DIV160_2 ((uint8_t)0x20) +#define I2C_F_DIV192_2 ((uint8_t)0x1e) +#define I2C_F_DIV224 ((uint8_t)0x22) +#define I2C_F_DIV256 ((uint8_t)0x23) +#define I2C_F_DIV288 ((uint8_t)0x24) +#define I2C_F_DIV320_1 ((uint8_t)0x25) +#define I2C_F_DIV384_1 ((uint8_t)0x26) +#define I2C_F_DIV480 ((uint8_t)0x27) + +#define I2C_F_DIV320_2 ((uint8_t)0x28) +#define I2C_F_DIV384_2 ((uint8_t)0x29) +#define I2C_F_DIV448 ((uint8_t)0x2a) +#define I2C_F_DIV512 ((uint8_t)0x2b) +#define I2C_F_DIV576 ((uint8_t)0x2c) +#define I2C_F_DIV640_1 ((uint8_t)0x2d) +#define I2C_F_DIV768_1 ((uint8_t)0x2e) +#define I2C_F_DIV960 ((uint8_t)0x2f) + +#define I2C_F_DIV640_2 ((uint8_t)0x30) +#define I2C_F_DIV768_3 ((uint8_t)0x31) +#define I2C_F_DIV896 ((uint8_t)0x32) +#define I2C_F_DIV1024 ((uint8_t)0x33) +#define I2C_F_DIV1152 ((uint8_t)0x34) +#define I2C_F_DIV1280_1 ((uint8_t)0x35) +#define I2C_F_DIV1536_1 ((uint8_t)0x36) +#define I2C_F_DIV1920 ((uint8_t)0x37) + +#define I2C_F_DIV1280_2 ((uint8_t)0x38) +#define I2C_F_DIV1536_2 ((uint8_t)0x39) +#define I2C_F_DIV1792 ((uint8_t)0x3a) +#define I2C_F_DIV2048 ((uint8_t)0x3b) +#define I2C_F_DIV2304 ((uint8_t)0x3c) +#define I2C_F_DIV2560 ((uint8_t)0x3d) +#define I2C_F_DIV3072 ((uint8_t)0x3e) +#define I2C_F_DIV3840 ((uint8_t)0x3f) + /* I2C Control Register 1 (8-bit) */ #define I2C_C1_DMAEN (1 << 0) /* Bit 0: DMA enable */ @@ -166,6 +243,7 @@ #ifdef KINETIS_K20 # define I2C_FLT_SHIFT (0) /* Bits 0-4: I2C programmable filter factor */ # define I2C_FLT_MASK (31 << I2C_FLT_SHIFT) +# define I2C_FLT(n) ((uint8_t)(n) << I2C_FLT_SHIFT) /* Bits 5-7: Reserved */ #endif diff --git a/arch/arm/src/kinetis/kinetis_i2c.c b/arch/arm/src/kinetis/kinetis_i2c.c index 2ceca223644..1713bdbbb1d 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.c +++ b/arch/arm/src/kinetis/kinetis_i2c.c @@ -226,8 +226,6 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, return; } - /* TODO: use apropriate definitions */ - #if BOARD_BUS_FREQ == 120000000 if (frequency < 400000) { @@ -242,7 +240,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV128, KINETIS_I2C_F_OFFSET); /* 0.94 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 108000000 if (frequency < 400000) @@ -258,7 +256,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV112, KINETIS_I2C_F_OFFSET); /* 0.96 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 96000000 if (frequency < 400000) @@ -274,7 +272,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV96, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 90000000 if (frequency < 400000) @@ -290,7 +288,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV88, KINETIS_I2C_F_OFFSET); /* 1.02 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 80000000 if (frequency < 400000) @@ -306,7 +304,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV80, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 72000000 if (frequency < 400000) @@ -322,7 +320,7 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV72, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 64000000 if (frequency < 400000) @@ -338,39 +336,39 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV64, KINETIS_I2C_F_OFFSET); /* 1.0 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 60000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x2C, KINETIS_I2C_F_OFFSET); /* 104 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV576, KINETIS_I2C_F_OFFSET); /* 104 kHz */ } else if (frequency < 1000000) { - kinetis_i2c_putreg(priv, 0x1C, KINETIS_I2C_F_OFFSET); /* 416 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV144, KINETIS_I2C_F_OFFSET); /* 416 kHz */ } else { - kinetis_i2c_putreg(priv, 0x12, KINETIS_I2C_F_OFFSET); /* 938 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV64, KINETIS_I2C_F_OFFSET); /* 938 kHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 56000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x2B, KINETIS_I2C_F_OFFSET); /* 109 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV512, KINETIS_I2C_F_OFFSET); /* 109 kHz */ } else if (frequency < 1000000) { - kinetis_i2c_putreg(priv, 0x1C, KINETIS_I2C_F_OFFSET); /* 389 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV144, KINETIS_I2C_F_OFFSET); /* 389 kHz */ } else { - kinetis_i2c_putreg(priv, 0x0E, KINETIS_I2C_F_OFFSET); /* 1 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV56_1, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 54000000 if (frequency < 400000) @@ -386,115 +384,115 @@ static void kinetis_i2c_setfrequency(struct kinetis_i2cdev_s *priv, kinetis_i2c_putreg(priv, I2C_F_DIV56, KINETIS_I2C_F_OFFSET); /* 0.96 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 48000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x27, KINETIS_I2C_F_OFFSET); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV480, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - kinetis_i2c_putreg(priv, 0x1A, KINETIS_I2C_F_OFFSET); /* 400 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV112, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } else { - kinetis_i2c_putreg(priv, 0x0D, KINETIS_I2C_F_OFFSET); /* 1 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV48_1, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - kinetis_i2c_putreg(priv, 4, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(4), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 40000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x29, KINETIS_I2C_F_OFFSET); /* 104 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV384_2, KINETIS_I2C_F_OFFSET); /* 104 kHz */ } else if (frequency < 1000000) { - kinetis_i2c_putreg(priv, 0x19, KINETIS_I2C_F_OFFSET); /* 416 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV96, KINETIS_I2C_F_OFFSET); /* 416 kHz */ } else { - kinetis_i2c_putreg(priv, 0x0B, KINETIS_I2C_F_OFFSET); /* 1 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV40_2, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - kinetis_i2c_putreg(priv, 3, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(3), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 36000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x28, KINETIS_I2C_F_OFFSET); /* 113 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV320_2, KINETIS_I2C_F_OFFSET); /* 113 kHz */ } else if (frequency < 1000000) { - kinetis_i2c_putreg(priv, 0x19, KINETIS_I2C_F_OFFSET); /* 375 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV96, KINETIS_I2C_F_OFFSET); /* 375 kHz */ } else { - kinetis_i2c_putreg(priv, 0x0A, KINETIS_I2C_F_OFFSET); /* 1 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV36, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - kinetis_i2c_putreg(priv, 3, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(3), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 24000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x1F, KINETIS_I2C_F_OFFSET); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV240, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - kinetis_i2c_putreg(priv, 0x12, KINETIS_I2C_F_OFFSET); /* 375 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV64, KINETIS_I2C_F_OFFSET); /* 375 kHz */ } else - { - kinetis_i2c_putreg(priv, 0x02, KINETIS_I2C_F_OFFSET); /* 1 MHz */ + {161 + kinetis_i2c_putreg(priv, I2C_F_DIV24, KINETIS_I2C_F_OFFSET); /* 1 MHz */ } - kinetis_i2c_putreg(priv, 2, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(2), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 16000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x20, KINETIS_I2C_F_OFFSET); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV160_2, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else if (frequency < 1000000) { - kinetis_i2c_putreg(priv, 0x07, KINETIS_I2C_F_OFFSET); /* 400 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV40_1, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } else { - kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 800 MHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET); /* 800 MHz */ } - kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 8000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x14, KINETIS_I2C_F_OFFSET); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV80_1, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else { - kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 400 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET); /* 400 kHz */ } - kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 4000000 if (frequency < 400000) { - kinetis_i2c_putreg(priv, 0x07, KINETIS_I2C_F_OFFSET); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV40_1, KINETIS_I2C_F_OFFSET); /* 100 kHz */ } else { - kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 200 kHz */ + kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET); /* 200 kHz */ } - kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET); #elif BOARD_BUS_FREQ == 2000000 - kinetis_i2c_putreg(priv, 0x00, KINETIS_I2C_F_OFFSET); /* 100 kHz */ - kinetis_i2c_putreg(priv, 1, KINETIS_I2C_FLT_OFFSET); + kinetis_i2c_putreg(priv, I2C_F_DIV20, KINETIS_I2C_F_OFFSET); /* 100 kHz */ + kinetis_i2c_putreg(priv, I2C_FLT(1), KINETIS_I2C_FLT_OFFSET); #else # error "F_BUS must be 120, 108, 96, 9, 80, 72, 64, 60, 56, 54, 48, 40, 36, 24, 16, 8, 4 or 2 MHz" From e57891b41f43f6e278961bd4aa741f5871fa491f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 16 Aug 2016 12:17:23 -0600 Subject: [PATCH 069/214] Kinetis I2C: Review and extend I2C register definitions for K40 and K60 --- arch/arm/src/kinetis/chip/kinetis_i2c.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/kinetis/chip/kinetis_i2c.h b/arch/arm/src/kinetis/chip/kinetis_i2c.h index 6b376c95cea..71f7624a46b 100644 --- a/arch/arm/src/kinetis/chip/kinetis_i2c.h +++ b/arch/arm/src/kinetis/chip/kinetis_i2c.h @@ -127,7 +127,7 @@ # define I2C_F_MULT_4 (2 << I2C_F_MULT_SHIFT) /* From Table 51-54. I2C divider and hold values. Duplicate divider values differ in hold - * times + * times. Refer to the Table 51-54. in the K64 Sub-Family Reference Manual. */ #define I2C_F_DIV20 ((uint8_t)0x00) @@ -140,9 +140,9 @@ #define I2C_F_DIV36 ((uint8_t)0x0a) #define I2C_F_DIV40_1 ((uint8_t)0x07) #define I2C_F_DIV41 ((uint8_t)0x08) + #define I2C_F_DIV32 ((uint8_t)0x09) #define I2C_F_DIV36 ((uint8_t)0x0a) - #define I2C_F_DIV40_2 ((uint8_t)0x0b) #define I2C_F_DIV44 ((uint8_t)0x0c) #define I2C_F_DIV48_1 ((uint8_t)0x0d) @@ -240,7 +240,7 @@ /* I2C Programmable Input Glitch Filter register (8-bit) */ -#ifdef KINETIS_K20 +#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60) # define I2C_FLT_SHIFT (0) /* Bits 0-4: I2C programmable filter factor */ # define I2C_FLT_MASK (31 << I2C_FLT_SHIFT) # define I2C_FLT(n) ((uint8_t)(n) << I2C_FLT_SHIFT) From 8b99dd4cdb014a90c0971027f8d6b12b89306aae Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Tue, 16 Aug 2016 13:20:05 -0600 Subject: [PATCH 070/214] drivers/audio: Add Audio Tone Generator for NuttX --- drivers/audio/Kconfig | 13 +- drivers/audio/Make.defs | 4 + drivers/audio/tone.c | 946 +++++++++++++++++++++++++++++++++++++ include/nuttx/audio/tone.h | 97 ++++ 4 files changed, 1059 insertions(+), 1 deletion(-) create mode 100644 drivers/audio/tone.c create mode 100644 include/nuttx/audio/tone.h diff --git a/drivers/audio/Kconfig b/drivers/audio/Kconfig index 81c247a6420..20664dbe2b3 100644 --- a/drivers/audio/Kconfig +++ b/drivers/audio/Kconfig @@ -33,7 +33,18 @@ config AUDIO_I2SCHAR_TXTIMEOUT transfers. This is in units of system clock ticks (configurable). The special value of zero disables RX timeouts. Default: 0 -endif #AUDIO_I2SCHAR +endif # AUDIO_I2SCHAR + +config AUDIO_TONE + bool "Audio Tone Generator using PWM" + default n + depends on PWM && AUDIO_DEVICES + ---help--- + This driver enables the Audio Tone Generator for NuttX. + +if AUDIO_TONE + +endif # AUDIO_TONE config VS1053 bool "VS1053 codec chip" diff --git a/drivers/audio/Make.defs b/drivers/audio/Make.defs index f645deade79..5932714f6d6 100644 --- a/drivers/audio/Make.defs +++ b/drivers/audio/Make.defs @@ -62,6 +62,10 @@ ifeq ($(CONFIG_AUDIO_I2SCHAR),y) CSRCS += i2schar.c endif +ifeq ($(CONFIG_AUDIO_TONE),y) +CSRCS += tone.c +endif + # Include Audio driver support DEPPATH += --dep-path audio diff --git a/drivers/audio/tone.c b/drivers/audio/tone.c new file mode 100644 index 00000000000..8e401ab098d --- /dev/null +++ b/drivers/audio/tone.c @@ -0,0 +1,946 @@ +/**************************************************************************** + * drivers/audio/tone.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Alan Carvalho de Assis + * + * This driver is based on Tone Alarm driver from PX4 project. It was + * modified to become a NuttX driver and to use the Oneshot Timer API. + * + * The PX4 driver is here: + * https://github.com/PX4/Firmware/blob/master/src/drivers/stm32/tone_alarm/tone_alarm.cpp + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#ifdef CONFIG_AUDIO_TONE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Define tone modes */ + +#define MODE_NORMAL 1 +#define MODE_LEGATO 2 +#define MODE_STACCATO 3 + +/* Max tune string length*/ + +#define MAX_TUNE_LEN (1 * 256) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of the upper half driver */ + +struct tone_upperhalf_s +{ + uint8_t crefs; /* The number of times the device has been + * opened */ + volatile bool started; /* True: pulsed output is being generated */ + sem_t exclsem; /* Supports mutual exclusion */ + struct pwm_info_s tone; /* Pulsed output for Audio Tone */ + struct pwm_lowerhalf_s *devtone; + struct oneshot_lowerhalf_s *oneshot; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Buffer to store the tune */ + +static char tune_buf[MAX_TUNE_LEN]; + +/* Semitone offsets from C for the characters 'A'-'G' */ + +static const uint8_t g_note_tab[] = { 9, 11, 0, 2, 4, 5, 7 }; + +/* Global variable used by the tone generator */ + +static const char *g_tune; +static const char *g_next; +static uint8_t g_tempo; +static uint8_t g_note_mode; +static uint32_t g_note_length; +static uint32_t g_silence_length; +static uint8_t g_octave; +static bool g_repeat; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int tone_open(FAR struct file *filep); +static int tone_close(FAR struct file *filep); +static ssize_t tone_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); + +static int next_char(void); +static uint8_t next_number(void); +static uint8_t next_dots(void); +static void next_note(FAR struct tone_upperhalf_s *upper); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_toneops = +{ + tone_open, /* open */ + tone_close, /* close */ + tone_read, /* read */ + tone_write, /* write */ + 0, /* seek */ + 0 /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , 0 /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , 0 /* unlink */ +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_callback + ****************************************************************************/ + +static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower, + FAR void *arg) +{ + FAR struct tone_upperhalf_s *upper = (FAR struct tone_upperhalf_s *)arg; + + audinfo("Oneshot timer expired!\n"); + + /* Play the next note */ + + next_note(upper); +} + +/**************************************************************************** + * Name: note_to_freq + * + * Description: + * This function converts a note value in the range C1 to B7 to frequency. + * + ****************************************************************************/ + +static uint16_t note_to_freq(uint8_t note) +{ + /* Compute the frequency in Hz */ + + uint16_t freq = 880.0f * expf(logf(2.0f) * ((int)note - 46) / 12.0f); + + return freq; +} + +/**************************************************************************** + * Name: note_duration + * + * Description: + * This function calculates the duration in microseconds of play and + * silence for a note given the current tempo, length and mode and the + * number of dots following in the play string. + * + ****************************************************************************/ + +static uint32_t note_duration(FAR uint32_t *silence, uint32_t note_length, + uint32_t dots) +{ + uint32_t whole_note_period = (60 * 1000000 * 4) / g_tempo; + uint32_t note_period; + uint32_t dot_extension; + + if (note_length == 0) + { + note_length = 1; + } + + note_period = whole_note_period / note_length; + + switch (g_note_mode) + { + case MODE_NORMAL: + *silence = note_period / 8; + break; + + case MODE_STACCATO: + *silence = note_period / 4; + break; + + case MODE_LEGATO: + *silence = 0; + break; + + default: + auderr("Mode undefined!\n"); + break; + } + + note_period -= *silence; + dot_extension = note_period / 2; + + while (dots--) + { + note_period += dot_extension; + dot_extension /= 2; + } + + return note_period; +} + +/**************************************************************************** + * Name: rest_duration + * + * Description: + * This function calculates the duration in microseconds of a rest + * corresponding to a given note length. + * + ****************************************************************************/ + +static uint32_t rest_duration(uint32_t rest_length, uint32_t dots) +{ + uint32_t whole_note_period = (60 * 1000000 * 4) / g_tempo; + uint32_t rest_period; + uint32_t dot_extension; + + if (rest_length == 0) + { + rest_length = 1; + } + + rest_period = whole_note_period / rest_length; + + dot_extension = rest_period / 2; + + while (dots--) + { + rest_period += dot_extension; + dot_extension /= 2; + } + + return rest_period; +} + +/**************************************************************************** + * Name: start_note + ****************************************************************************/ + +static void start_note(FAR struct tone_upperhalf_s *upper, uint8_t note) +{ + FAR struct pwm_lowerhalf_s *tone = upper->devtone; + + upper->tone.frequency = note_to_freq(note); + upper->tone.duty = 50; + + tone->ops->start(tone, &upper->tone); + + return; +} + +/**************************************************************************** + * Name: stop_note + ****************************************************************************/ + +static void stop_note(FAR struct tone_upperhalf_s *upper) +{ + FAR struct pwm_lowerhalf_s *tone = upper->devtone; + + tone->ops->stop(tone); + + return; +} + +/**************************************************************************** + * Name: start_tune + * + * Description: + * This function starts playing the note. + * + ****************************************************************************/ + +static void start_tune(FAR struct tone_upperhalf_s *upper, const char *tune) +{ + FAR struct timespec ts; + + /* Kill any current playback */ + + ONESHOT_CANCEL(upper->oneshot, &ts); + + /* Record the tune */ + + g_tune = tune; + g_next = tune; + + /* Initialise player state */ + + g_tempo = 120; + g_note_length = 4; + g_note_mode = MODE_NORMAL; + g_octave = 4; + g_silence_length = 0; + g_repeat = false; + + /* Schedule a callback to start playing */ + + ts.tv_sec = 1; + ts.tv_nsec = 0; + + ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts); +} + +/**************************************************************************** + * Name: next_note + * + * Description: + * This function parses the next note out of the string and play it. + * + ****************************************************************************/ + +static void next_note(FAR struct tone_upperhalf_s *upper) +{ + uint32_t note; + uint32_t note_length; + uint32_t duration; + uint32_t sec; + uint32_t nsec; + FAR struct timespec ts; + + /* Do we have an inter-note gap to wait for? */ + + if (g_silence_length > 0) + { + stop_note(upper); + + duration = g_silence_length; + + /* Setup the time duration */ + + sec = duration / USEC_PER_SEC; + nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC; + + ts.tv_sec = (time_t) sec; + ts.tv_nsec = (unsigned long)nsec; + + ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts); + + g_silence_length = 0; + return; + } + + /* Make sure we still have a tune - may be removed by the write / ioctl + * handler */ + + if ((g_next == NULL) || (g_tune == NULL)) + { + stop_note(upper); + return; + } + + /* Parse characters out of the string until we have resolved a note */ + + note = 0; + note_length = g_note_length; + + while (note == 0) + { + /* We always need at least one character from the string */ + + int c = next_char(); + + if (c == 0) + { + goto tune_end; + } + + g_next++; + + switch (c) + { + uint8_t nt; + + /* Select note length */ + + case 'L': + g_note_length = next_number(); + if (g_note_length < 1) + { + auderr("note length too short!\n"); + goto tune_error; + } + break; + + /* Select octave */ + + case 'O': + g_octave = next_number(); + if (g_octave > 6) + { + g_octave = 6; + } + break; + + /* Decrease octave */ + + case '<': + if (g_octave > 0) + { + g_octave--; + } + break; + + /* Increase octave */ + + case '>': + if (g_octave < 6) + { + g_octave++; + } + break; + + /* Select inter-note gap */ + + case 'M': + c = next_char(); + + if (c == 0) + { + auderr("no character after M!\n"); + goto tune_error; + } + + g_next++; + + switch (c) + { + case 'N': + g_note_mode = MODE_NORMAL; + break; + + case 'L': + g_note_mode = MODE_LEGATO; + break; + + case 'S': + g_note_mode = MODE_STACCATO; + break; + + case 'F': + g_repeat = false; + break; + + case 'B': + g_repeat = true; + + default: + auderr("unknown symbol: %c!\n", c); + goto tune_error; + break; + } + + /* Pause for a note length */ + + case 'P': + + stop_note(upper); + + duration = rest_duration(next_number(), next_dots()); + + /* Setup the time duration */ + + sec = duration / USEC_PER_SEC; + nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC; + + ts.tv_sec = (time_t) sec; + ts.tv_nsec = (unsigned long)nsec; + + ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts); + + return; + + /* Change tempo */ + + case 'T': + nt = next_number(); + + if ((nt >= 32) && (nt <= 255)) + { + g_tempo = nt; + } + else + { + auderr("T is out of range 32-255!\n"); + goto tune_error; + } + break; + + /* Play an arbitrary note */ + + case 'N': + note = next_number(); + if (note > 84) + { + auderr("Note higher than 84!\n"); + goto tune_error; + } + + /* This is a rest - pause for the current note length */ + + if (note == 0) + { + duration = rest_duration(g_note_length, next_dots()); + + /* Setup the time duration */ + + sec = duration / USEC_PER_SEC; + nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC; + + ts.tv_sec = (time_t) sec; + ts.tv_nsec = (unsigned long)nsec; + + ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts); + + return; + } + break; + + /* Play a note in the current octave */ + + case 'A': + case 'B': + case 'C': + case 'D': + case 'E': + case 'F': + case 'G': + note = g_note_tab[c - 'A'] + (g_octave * 12) + 1; + + c = next_char(); + + switch (c) + { + /* Up a semitone */ + + case '#': + case '+': + if (note < 84) + { + note++; + } + + g_next++; + break; + + /* Down a semitone */ + + case '-': + if (note > 1) + { + note--; + } + + g_next++; + break; + + /* No next char here is OK */ + + default: + break; + } + + /* Shorthand length notation */ + + note_length = next_number(); + + if (note_length == 0) + { + note_length = g_note_length; + } + + break; + + default: + goto tune_error; + } + } + + /* Compute the duration of the note and the following silence (if any) */ + + duration = note_duration(&g_silence_length, note_length, next_dots()); + + /* Start playing the note */ + + start_note(upper, note); + + /* Setup time duration */ + + sec = duration / USEC_PER_SEC; + nsec = ((duration) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC; + + ts.tv_sec = (time_t) sec; + ts.tv_nsec = (unsigned long)nsec; + + /* And arrange a callback when the note should stop */ + + ONESHOT_START(upper->oneshot, oneshot_callback, upper, &ts); + + return; + + /* Tune looks bad (unexpected EOF, bad character, etc.) */ + +tune_error: + auderr("tune error\n"); + + /* Don't loop on error */ + + g_repeat = false; + + /* Stop (and potentially restart) the tune */ + +tune_end: + stop_note(upper); + + if (g_repeat) + { + start_tune(upper, g_tune); + } + else + { + g_tune = NULL; + } +} + +/**************************************************************************** + * Name: next_char + * + * Description: + * This function find the next character in the string, discard any + * whitespace and return the canonical (uppercase) version. + * + ****************************************************************************/ + +static int next_char(void) +{ + while (isspace(*g_next)) + { + g_next++; + } + + return toupper(*g_next); +} + +/**************************************************************************** + * Name: next_number + * + * Description: + * This function extract a number from the string, consuming all the digit + * characters. + * + ****************************************************************************/ + +static uint8_t next_number(void) +{ + uint8_t number = 0; + int c; + + for (;;) + { + c = next_char(); + + if (!isdigit(c)) + { + return number; + } + + g_next++; + number = (number * 10) + (c - '0'); + } + + return number; +} + +/**************************************************************************** + * Name: next_dots + * + * Description: + * This function consumes dot characters from the string, returning the + * number consumed. + * + ****************************************************************************/ + +static uint8_t next_dots(void) +{ + uint8_t dots = 0; + + while (next_char() == '.') + { + g_next++; + dots++; + } + + return dots; +} + +/**************************************************************************** + * Name: tone_open + * + * Description: + * This function is called whenever the PWM device is opened. + * + ****************************************************************************/ + +static int tone_open(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct tone_upperhalf_s *upper = inode->i_private; + uint8_t tmp; + int ret; + + audinfo("crefs: %d\n", upper->crefs); + + /* Get exclusive access to the device structures */ + + ret = sem_wait(&upper->exclsem); + if (ret < 0) + { + ret = -get_errno(); + goto errout; + } + + /* Increment the count of references to the device. If this the first time + * that the driver has been opened for this device, then initialize the + * device. */ + + tmp = upper->crefs + 1; + if (tmp == 0) + { + /* More than 255 opens; uint8_t overflows to zero */ + + ret = -EMFILE; + goto errout_with_sem; + } + + /* Save the new open count on success */ + + upper->crefs = tmp; + ret = OK; + +errout_with_sem: + sem_post(&upper->exclsem); + +errout: + return ret; +} + +/**************************************************************************** + * Name: tone_close + * + * Description: + * This function is called when the PWM device is closed. + * + ****************************************************************************/ + +static int tone_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct tone_upperhalf_s *upper = inode->i_private; + int ret; + + audinfo("crefs: %d\n", upper->crefs); + + /* Get exclusive access to the device structures */ + + ret = sem_wait(&upper->exclsem); + if (ret < 0) + { + ret = -get_errno(); + goto errout; + } + + /* Decrement the references to the driver. If the reference count will + * decrement to 0, then uninitialize the driver. */ + + if (upper->crefs > 1) + { + upper->crefs--; + } + + sem_post(&upper->exclsem); + ret = OK; + +errout: + return ret; +} + +/**************************************************************************** + * Name: tone_read + * + * Description: + * A dummy read method. This is provided only to satisfy the VFS layer. + * + ****************************************************************************/ + +static ssize_t tone_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + /* Return zero -- usually meaning end-of-file */ + + return 0; +} + +/**************************************************************************** + * Name: tone_write + * + * Description: + * A dummy write method. This is provided only to satisfy the VFS layer. + * + ****************************************************************************/ + +static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + + FAR struct inode *inode = filep->f_inode; + FAR struct tone_upperhalf_s *upper = inode->i_private; + + /* We need to receive a string #RRGGBB = 7 bytes */ + + if (buffer == NULL) + { + /* Well... nothing to do */ + + return -EINVAL; + } + + /* Copy music to internal buffer */ + + memcpy(tune_buf, buffer, buflen); + + /* Let the music play */ + + start_tune(upper, tune_buf); + + return buflen; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: tone_register + * + * Description: + * This function binds an instance of a "lower half" PWM driver with + * the "upper half" Audio Tone device and registers that device so that can + * be used by application code. + * + * + * Input parameters: + * path - The full path to the driver to be registers in the NuttX pseudo- + * filesystem. The recommended convention is to name of PWM driver + * as "/dev/tone0". + * tone - A pointer to an instance of lower half PWM + * drivers for the tone device. This instance will be bound to the Audio + * tone driver and must persists as long as that driver persists. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +int tone_register(FAR const char *path, FAR struct pwm_lowerhalf_s *tone, + FAR struct oneshot_lowerhalf_s *oneshot) +{ + FAR struct tone_upperhalf_s *upper; + + /* Allocate the upper-half data structure */ + + upper = + (FAR struct tone_upperhalf_s *)kmm_zalloc(sizeof(struct tone_upperhalf_s)); + + if (!upper) + { + auderr("ERROR: Allocation failed\n"); + return -ENOMEM; + } + + /* Initialize the PWM device structure (it was already zeroed by + * kmm_zalloc()). + */ + + sem_init(&upper->exclsem, 0, 1); + upper->devtone = tone; + upper->oneshot = oneshot; + + /* Register the PWM device */ + + audinfo("Registering %s\n", path); + return register_driver(path, &g_toneops, 0666, upper); +} + +#endif /* CONFIG_AUDIO_TONE */ diff --git a/include/nuttx/audio/tone.h b/include/nuttx/audio/tone.h new file mode 100644 index 00000000000..7f15dc69548 --- /dev/null +++ b/include/nuttx/audio/tone.h @@ -0,0 +1,97 @@ +/**************************************************************************** + * include/nuttx/audio/tone.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_AUDIO_TONE_H +#define __INCLUDE_NUTTX_AUDIO_TONE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include +#include + +#ifdef CONFIG_AUDIO_TONE + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: tone_register + * + * Description: + * This function binds an instance of a "lower half" PWM driver with + * the "upper half" Audio Tone device and registers that device so that can + * be used by application code. + * + * + * Input parameters: + * path - The full path to the driver to be registers in the NuttX pseudo- + * filesystem. The recommended convention is to name all PWM drivers + * as "/dev/tone0", "/dev/tone1", etc. where the driver path + * differs only in the "minor" number at the end of the device name. + * tone - A pointer to an instance of lower half PWM driver tone. This + * instance will be bound to the Audio Tone driver and must persists as + * long as that driver persists. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +int tone_register(FAR const char *path, FAR struct pwm_lowerhalf_s *tone, + FAR struct oneshot_lowerhalf_s *oneshot); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_AUDIO_TONE */ +#endif /* __INCLUDE_NUTTX_AUDIO_TONE_H */ From 92341600a7aa42ffea7f58edcaee02250535e31f Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Tue, 16 Aug 2016 13:28:42 -0600 Subject: [PATCH 071/214] configs/stm32f103-minimum: Add board configuration to initialize Audi Tone Generator --- .../stm32f103-minimum/audio_tone/Make.defs | 113 ++ .../stm32f103-minimum/audio_tone/defconfig | 1193 +++++++++++++++++ .../stm32f103-minimum/audio_tone/setenv.sh | 100 ++ configs/stm32f103-minimum/src/Makefile | 4 + configs/stm32f103-minimum/src/stm32_appinit.c | 6 + configs/stm32f103-minimum/src/stm32_tone.c | 154 +++ .../stm32f103-minimum/src/stm32f103_minimum.h | 12 + 7 files changed, 1582 insertions(+) create mode 100644 configs/stm32f103-minimum/audio_tone/Make.defs create mode 100644 configs/stm32f103-minimum/audio_tone/defconfig create mode 100644 configs/stm32f103-minimum/audio_tone/setenv.sh create mode 100644 configs/stm32f103-minimum/src/stm32_tone.c diff --git a/configs/stm32f103-minimum/audio_tone/Make.defs b/configs/stm32f103-minimum/audio_tone/Make.defs new file mode 100644 index 00000000000..32d375f62f0 --- /dev/null +++ b/configs/stm32f103-minimum/audio_tone/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f103-minimum/audio_tone/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f103-minimum/audio_tone/defconfig b/configs/stm32f103-minimum/audio_tone/defconfig new file mode 100644 index 00000000000..adc1509d28f --- /dev/null +++ b/configs/stm32f103-minimum/audio_tone/defconfig @@ -0,0 +1,1193 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +CONFIG_ARCH_CHIP_STM32F103C8=y +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +CONFIG_STM32_TIM2=y +CONFIG_STM32_TIM3=y +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +CONFIG_STM32_TIM2_NO_REMAP=y +# CONFIG_STM32_TIM2_FULL_REMAP is not set +# CONFIG_STM32_TIM2_PARTIAL_REMAP_1 is not set +# CONFIG_STM32_TIM2_PARTIAL_REMAP_2 is not set +CONFIG_STM32_TIM3_NO_REMAP=y +# CONFIG_STM32_TIM3_FULL_REMAP is not set +# CONFIG_STM32_TIM3_PARTIAL_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# +CONFIG_STM32_ONESHOT=y +# CONFIG_STM32_FREERUN is not set +CONFIG_STM32_TICKLESS_ONESHOT=3 +CONFIG_STM32_TIM2_PWM=y +CONFIG_STM32_TIM2_MODE=0 +CONFIG_STM32_TIM2_CHANNEL=2 +CONFIG_STM32_TIM2_CHMODE=0 +# CONFIG_STM32_TIM3_PWM is not set +# CONFIG_STM32_PWM_MULTICHAN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set +# CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32_TINY is not set +CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f103-minimum" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_ARCH_HAVE_TIMEKEEPING=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +CONFIG_ARCH_HAVE_PWM_PULSECOUNT=y +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +CONFIG_PWM=y +# CONFIG_PWM_PULSECOUNT is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +CONFIG_AUDIO_DEVICES=y +CONFIG_AUDIO_TONE=y +# CONFIG_VS1053 is not set +# CONFIG_AUDIO_WM8904 is not set +# CONFIG_AUDIO_NULL is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +CONFIG_AUDIO=y +# CONFIG_AUDIO_MULTI_SESSION is not set + +# +# Audio Buffer Configuration +# +# CONFIG_AUDIO_LARGE_BUFFERS is not set +CONFIG_AUDIO_NUM_BUFFERS=2 +CONFIG_AUDIO_BUFFER_NUMBYTES=8192 +# CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS is not set + +# +# Supported Audio Formats +# +# CONFIG_AUDIO_FORMAT_AC3 is not set +# CONFIG_AUDIO_FORMAT_DTS is not set +CONFIG_AUDIO_FORMAT_PCM=y +CONFIG_AUDIO_FORMAT_MP3=y +# CONFIG_AUDIO_FORMAT_MIDI is not set +# CONFIG_AUDIO_FORMAT_WMA is not set +# CONFIG_AUDIO_FORMAT_OGG_VORBIS is not set + +# +# Exclude Specific Audio Features +# +# CONFIG_AUDIO_EXCLUDE_VOLUME is not set +# CONFIG_AUDIO_EXCLUDE_BALANCE is not set +CONFIG_AUDIO_EXCLUDE_EQUALIZER=y +# CONFIG_AUDIO_EXCLUDE_TONE is not set +# CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME is not set +# CONFIG_AUDIO_EXCLUDE_STOP is not set +# CONFIG_AUDIO_EXCLUDE_FFORWARD is not set +CONFIG_AUDIO_EXCLUDE_REWIND=y +# CONFIG_AUDIO_CUSTOM_DEV_PATH is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_PWM is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLEBG=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# RFID Utilities +# +# CONFIG_RFIDUTILS_PICCTOMXT is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_NXPLAYER is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f103-minimum/audio_tone/setenv.sh b/configs/stm32f103-minimum/audio_tone/setenv.sh new file mode 100644 index 00000000000..665d744a6ed --- /dev/null +++ b/configs/stm32f103-minimum/audio_tone/setenv.sh @@ -0,0 +1,100 @@ +#!/bin/bash +# configs//stm32f103-minimum/audio_tone/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f103-minimum/src/Makefile b/configs/stm32f103-minimum/src/Makefile index 5056bd50c1f..9f98afc7aee 100644 --- a/configs/stm32f103-minimum/src/Makefile +++ b/configs/stm32f103-minimum/src/Makefile @@ -43,6 +43,10 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y) CSRCS += stm32_appinit.c endif +ifeq ($(CONFIG_AUDIO_TONE),y) +CSRCS += stm32_tone.c +endif + ifeq ($(CONFIG_WL_MFRC522),y) CSRCS += stm32_mfrc522.c endif diff --git a/configs/stm32f103-minimum/src/stm32_appinit.c b/configs/stm32f103-minimum/src/stm32_appinit.c index 30a8f682114..a5fe60b6164 100644 --- a/configs/stm32f103-minimum/src/stm32_appinit.c +++ b/configs/stm32f103-minimum/src/stm32_appinit.c @@ -86,6 +86,12 @@ int board_app_initialize(uintptr_t arg) #endif int ret = OK; +#ifdef CONFIG_AUDIO_TONE + /* Configure and initialize the tone generator. */ + + ret = stm32_tone_setup(); +#endif + #ifdef CONFIG_WL_MFRC522 ret = stm32_mfrc522initialize("/dev/rfid0"); #endif diff --git a/configs/stm32f103-minimum/src/stm32_tone.c b/configs/stm32f103-minimum/src/stm32_tone.c new file mode 100644 index 00000000000..d4928fddf6f --- /dev/null +++ b/configs/stm32f103-minimum/src/stm32_tone.c @@ -0,0 +1,154 @@ +/************************************************************************************ + * configs/stm32f103minimum/src/stm32_tone.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +#include +#include +#include +#include + +#include "chip.h" +#include "up_arch.h" +#include "stm32_pwm.h" +#include "stm32f103_minimum.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_TONE 1 + +/* TIMx used to generate PWM signal to Buzzer/Speaker */ + +#define TONE_PWM_TIMER 2 + +/* Oneshot timer resolution in microseconds */ + +#define OST_RES 10 + +#ifndef CONFIG_PWM +# undef HAVE_TONE +#endif + +#ifndef CONFIG_STM32_TIM2 +# undef HAVE_TONE +#endif + +#ifndef CONFIG_STM32_TIM2_PWM +# undef HAVE_TONE +#endif + +#ifndef CONFIG_STM32_TICKLESS_ONESHOT +# undef HAVE_TONE +#endif + +#ifdef HAVE_TONE + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_tone_setup + * + * Description: + * Configure and initialize the tone generator. + * + ************************************************************************************/ + +int stm32_tone_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *tone; + struct pwm_info_s info; + struct oneshot_lowerhalf_s *oneshot = NULL; + int ret; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + tone = stm32_pwminitialize(TONE_PWM_TIMER); + if (!tone) + { + auderr("Failed to get the STM32 PWM lower half to AUDIO TONE\n"); + return -ENODEV; + } + + /* Initialize TONE PWM */ + + tone->ops->setup(tone); + tone->ops->start(tone, &info); + + /* Initialize ONESHOT Timer (i.e. STM32_TICKLESS_ONESHOT = TIM3) */ + + oneshot = oneshot_initialize(CONFIG_STM32_TICKLESS_ONESHOT, OST_RES); + if (!oneshot) + { + auderr("Failed to initialize ONESHOT Timer!\n"); + return -ENODEV; + } + + /* Register the Audio Tone driver at "/dev/tone0" */ + + ret = tone_register("/dev/tone0", tone, oneshot); + if (ret < 0) + { + auderr("ERROR: tone_register failed: %d\n", ret); + return ret; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; +} + +#else +# error "HAVE_TONE is undefined" +#endif /* HAVE_TONE */ diff --git a/configs/stm32f103-minimum/src/stm32f103_minimum.h b/configs/stm32f103-minimum/src/stm32f103_minimum.h index 873734de89b..1116124d42e 100644 --- a/configs/stm32f103-minimum/src/stm32f103_minimum.h +++ b/configs/stm32f103-minimum/src/stm32f103_minimum.h @@ -114,6 +114,18 @@ void stm32_usbinitialize(void); int stm32_mfrc522initialize(FAR const char *devpath); #endif +/************************************************************************************ + * Name: stm32_tone_setup + * + * Description: + * Function used to initialize a PWM and Oneshot timers to Audio Tone Generator. + * + ************************************************************************************/ + +#ifdef CONFIG_AUDIO_TONE +int stm32_tone_setup(void); +#endif + #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_STM32F103_MINIMUM_SRC_STM32F103_MINIMUM_H */ From 17e5da96ea03c79187cdccbb002bc021c53a68cf Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 17 Aug 2016 07:14:59 -0600 Subject: [PATCH 072/214] SAMV7: DAC1 not available GMAC is enabled --- arch/arm/src/samv7/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig index c545647318d..fc4f5135076 100644 --- a/arch/arm/src/samv7/Kconfig +++ b/arch/arm/src/samv7/Kconfig @@ -102,7 +102,7 @@ config ARCH_CHIP_SAME70Q default n select ARCH_CHIP_SAME70 select SAMV7_HAVE_MCAN1 - select SAMV7_HAVE_DAC1 + select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0 select SAMV7_HAVE_EBI select SAMV7_HAVE_HSMCI0 select SAMV7_HAVE_SDRAMC @@ -119,7 +119,7 @@ config ARCH_CHIP_SAME70N default n select ARCH_CHIP_SAME70 select SAMV7_HAVE_MCAN1 - select SAMV7_HAVE_DAC1 + select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0 select SAMV7_HAVE_HSMCI0 select SAMV7_HAVE_SPI0 select SAMV7_HAVE_TWIHS2 @@ -152,7 +152,7 @@ config ARCH_CHIP_SAMV71Q default n select ARCH_CHIP_SAMV71 select SAMV7_HAVE_MCAN1 - select SAMV7_HAVE_DAC1 + select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0 select SAMV7_HAVE_EBI select SAMV7_HAVE_HSMCI0 select SAMV7_HAVE_SDRAMC @@ -169,7 +169,7 @@ config ARCH_CHIP_SAMV71N default n select ARCH_CHIP_SAMV71 select SAMV7_HAVE_MCAN1 - select SAMV7_HAVE_DAC1 + select SAMV7_HAVE_DAC1 if !SAMV7_EMAC0 select SAMV7_HAVE_HSMCI0 select SAMV7_HAVE_SPI0 select SAMV7_HAVE_TWIHS2 From 5d5851a5cd76b780f2caab974ebe39ded86ee9e0 Mon Sep 17 00:00:00 2001 From: Piotr Mienkowski Date: Wed, 17 Aug 2016 09:51:54 -0600 Subject: [PATCH 073/214] sam_tc_clockselect() reworked to calculate frequency error using smallest possible divisor minimizing the frequency error rather than largest possible divisor which maximized the error. --- README.txt | 6 +- arch/arm/src/samv7/sam_dac.c | 25 ++-- arch/arm/src/samv7/sam_freerun.c | 19 +-- arch/arm/src/samv7/sam_oneshot.c | 19 +-- arch/arm/src/samv7/sam_tc.c | 214 ++++++++++--------------------- arch/arm/src/samv7/sam_tc.h | 23 +--- 6 files changed, 104 insertions(+), 202 deletions(-) diff --git a/README.txt b/README.txt index 3617f874a72..108c5cd324e 100644 --- a/README.txt +++ b/README.txt @@ -908,9 +908,9 @@ Build Targets and Options distclean - Does 'clean' then also removes all configuration and context files. - This essentially restores the directory structure to its original, - unconfigured stated. + Does 'clean' then also removes all configuration, dependency, and + other context files. This essentially restores the directory structure + to its original, unconfigured stated. Application housekeeping targets. The APPDIR variable refers to the user application directory. A sample apps/ directory is included with NuttX, diff --git a/arch/arm/src/samv7/sam_dac.c b/arch/arm/src/samv7/sam_dac.c index 598201ce390..52443523d11 100644 --- a/arch/arm/src/samv7/sam_dac.c +++ b/arch/arm/src/samv7/sam_dac.c @@ -373,7 +373,8 @@ static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, int channel) { uint32_t mode; - uint32_t regval; + uint32_t tcclks; + uint32_t div; uint32_t freq_actual; ainfo("required frequency=%ld [Hz], channel=%d\n", @@ -381,15 +382,11 @@ static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, DEBUGASSERT(priv && (freq_required > 0) && (channel >= 0 && channel <= 2)); - /* Set the timer/counter waveform mode the the clock input. Use smallest - * MCK divisor of 8 to have highest clock resolution thus smallest frequency - * error. With 32 bit counter the lowest possible frequency of 1 Hz is easily - * supported. - */ + /* Calculate the best possible clock source and clock divisor value */ - /* TODO Add support for TC_CMR_TCCLKS_PCK6 to reduce frequency error */ + freq_actual = sam_tc_clockselect(freq_required, &tcclks, &div); - mode = (TC_CMR_TCCLKS_MCK8 | /* Use MCK/8 clock signal */ + mode = (tcclks | /* Use MCK/8 clock signal */ TC_CMR_WAVSEL_UPRC | /* UP mode w/ trigger on RC Compare */ TC_CMR_WAVE | /* Wave mode */ TC_CMR_ACPA_CLEAR | /* RA Compare Effect on TIOA: Clear */ @@ -404,21 +401,17 @@ static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, return -EINVAL; } - /* Calculate the actual counter value from this divider and the tc input - * frequency. - */ + /* Set up clock divisor */ - regval = BOARD_MCK_FREQUENCY / 8 / freq_required; - DEBUGASSERT(regval > 0); /* Will check for integer underflow */ + DEBUGASSERT(div >= 2); /* Minimum divider required by implementation */ /* Set up TC_RA and TC_RC. The frequency is determined by RA and RC: * TIOA is cleared on RA match; TIOA is set on RC match. */ - sam_tc_setregister(priv->tc, TC_REGA, regval >> 1); - sam_tc_setregister(priv->tc, TC_REGC, regval); + sam_tc_setregister(priv->tc, TC_REGA, div >> 1); + sam_tc_setregister(priv->tc, TC_REGC, div); - freq_actual = BOARD_MCK_FREQUENCY / 8 / regval; ainfo("configured frequency=%ld [Hz]\n", (long)freq_actual); /* And start the timer */ diff --git a/arch/arm/src/samv7/sam_freerun.c b/arch/arm/src/samv7/sam_freerun.c index 4db95112182..9374409b885 100644 --- a/arch/arm/src/samv7/sam_freerun.c +++ b/arch/arm/src/samv7/sam_freerun.c @@ -119,29 +119,24 @@ static void sam_freerun_handler(TC_HANDLE tch, void *arg, uint32_t sr) int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan, uint16_t resolution) { - uint32_t frequency; - uint32_t actual; + uint32_t freq_required; + uint32_t freq_actual; + uint32_t div; uint32_t cmr; - int ret; tmrinfo("chan=%d resolution=%d usec\n", chan, resolution); DEBUGASSERT(freerun && resolution > 0); /* Get the TC frequency the corresponds to the requested resolution */ - frequency = USEC_PER_SEC / (uint32_t)resolution; + freq_required = USEC_PER_SEC / (uint32_t)resolution; /* The pre-calculate values to use when we start the timer */ - ret = sam_tc_clockselect(frequency, &cmr, &actual); - if (ret < 0) - { - tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret); - return ret; - } + freq_actual = sam_tc_clockselect(freq_required, &cmr, &div); - tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n", - (unsigned long)frequency, (unsigned long)actual, + tmrinfo("freq required=%lu, freq actual=%lu, TC_CMR.TCCLKS=%08lx\n", + (unsigned long)freq_required, (unsigned long)freq_actual, (unsigned long)cmr); /* Allocate the timer/counter and select its mode of operation diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c index bc9c23b515e..5506d8ff8a8 100644 --- a/arch/arm/src/samv7/sam_oneshot.c +++ b/arch/arm/src/samv7/sam_oneshot.c @@ -147,29 +147,24 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, uint16_t resolution) { - uint32_t frequency; - uint32_t actual; + uint32_t freq_required; + uint32_t freq_actual; + uint32_t div; uint32_t cmr; - int ret; tmrinfo("chan=%d resolution=%d usec\n", chan, resolution); DEBUGASSERT(oneshot && resolution > 0); /* Get the TC frequency the corresponds to the requested resolution */ - frequency = USEC_PER_SEC / (uint32_t)resolution; + freq_required = USEC_PER_SEC / (uint32_t)resolution; /* The pre-calculate values to use when we start the timer */ - ret = sam_tc_clockselect(frequency, &cmr, &actual); - if (ret < 0) - { - tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret); - return ret; - } + freq_actual = sam_tc_clockselect(freq_required, &cmr, &div); - tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n", - (unsigned long)frequency, (unsigned long)actual, + tmrinfo("freq required=%lu, freq actual=%lu, TC_CMR.TCCLKS=%08lx\n", + (unsigned long)freq_required, (unsigned long)freq_actual, (unsigned long)cmr); /* Allocate the timer/counter and select its mode of operation diff --git a/arch/arm/src/samv7/sam_tc.c b/arch/arm/src/samv7/sam_tc.c index 691366af8f8..6f93458d8a5 100644 --- a/arch/arm/src/samv7/sam_tc.c +++ b/arch/arm/src/samv7/sam_tc.c @@ -213,8 +213,8 @@ static int sam_tc11_interrupt(int irq, void *context); static uint32_t sam_tc_mckfreq_lookup(uint32_t ftcin, int ndx); static inline uint32_t sam_tc_tcclks_lookup(int ndx); -static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks, - uint32_t *actual); +static uint32_t sam_tc_freq_err_abs(uint32_t freq_required, + uint32_t freq_input, uint32_t *div); static inline struct sam_chan_s *sam_tc_initialize(int channel); /**************************************************************************** @@ -1019,83 +1019,51 @@ static inline uint32_t sam_tc_tcclks_lookup(int ndx) } /**************************************************************************** - * Name: sam_tc_mcksrc + * Name: sam_tc_freq_err_abs * * Description: - * Finds the best MCK divisor given the timer frequency and MCK. The - * result is guaranteed to satisfy the following equation: - * - * (Ftcin / (div * 65536)) <= freq <= (Ftcin / div) - * - * where: - * freq - the desired frequency - * Ftcin - The timer/counter input frequency - * div - With DIV being the highest possible value. + * Calculate best possible frequency error given input frequency and + * required frequency knowing that input frequency can be divided by + * integer divisor. The divisor for which the given error was calculated + * is also returned. * * Input Parameters: - * frequency Desired timer frequency. - * tcclks TCCLKS field value for divisor. - * actual The actual freqency of the MCK + * freq_required Desired timer frequency + * freq_input TC module input frequency + * div Pointer to the divisor for which the error was + * calculated * * Returned Value: - * Zero (OK) if a proper divisor has been found, otherwise a negated errno - * value indicating the nature of the failure. + * Absolute value of the smallest possible frequency error * ****************************************************************************/ -static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks, - uint32_t *actual) +static uint32_t sam_tc_freq_err_abs(uint32_t freq_required, uint32_t freq_input, + uint32_t *div) { - uint32_t fselect; - uint32_t fnext; - int ndx = 0; + uint32_t freq_actual; + uint32_t freq_error; - tmrinfo("frequency=%d\n", frequency); + DEBUGASSERT(freq_input >= freq_required); + DEBUGASSERT(UINT32_MAX - freq_required/2 > freq_input); - /* Satisfy lower bound. That is, the value of the divider such that: - * - * frequency >= (tc_input_frequency * 65536) / divider. + /* Integer division will truncate result toward zero, make sure the result + * is rounded instead. */ - for (; ndx < TC_NDIVIDERS; ndx++) + *div = (freq_input + freq_required/2) / freq_required; + freq_actual = freq_input / *div; + + if (freq_required >= freq_actual) { - fselect = sam_tc_mckfreq_lookup(BOARD_MCK_FREQUENCY, ndx); - if (frequency >= (fselect >> 16)) - { - break; - } + freq_error = freq_required - freq_actual; + } + else + { + freq_error = freq_actual - freq_required; } - if (ndx >= TC_NDIVIDERS) - { - /* If no divisor can be found, return -ERANGE */ - - tmrerr("ERROR: Lower bound search failed\n"); - return -ERANGE; - } - - /* Try to maximize DIV while still satisfying upper bound. That the - * value of the divider such that: - * - * frequency < tc_input_frequency / divider. - */ - - for (; ndx < TC_NDIVIDERS; ndx++) - { - fnext = sam_tc_mckfreq_lookup(BOARD_MCK_FREQUENCY, ndx + 1); - if (frequency > fnext) - { - break; - } - - fselect = fnext; - } - - /* Return the actual frequency and the TCCLKS selection */ - - *actual = fselect; - *tcclks = sam_tc_tcclks_lookup(ndx); - return OK; + return freq_error; } /**************************************************************************** @@ -1644,120 +1612,80 @@ uint32_t sam_tc_divfreq(TC_HANDLE handle) * Name: sam_tc_clockselect * * Description: - * Finds the best MCK divisor given the timer frequency and MCK. The - * result is guaranteed to satisfy the following equation: - * - * (Ftcin / (div * 65536)) <= freq <= (Ftcin / div) - * - * where: - * freq - the desired frequency - * Ftcin - The timer/counter input frequency - * div - With DIV being the highest possible value. + * Finds the best clock source and clock divisor to configure required + * frequency. * * Input Parameters: - * frequency Desired timer frequency. - * tcclks TCCLKS field value for divisor. - * actual The actual freqency of the MCK + * frequency Desired timer frequency + * tcclks TC_CMRx.TCCLKS bit field (clock selection) value + * div The divisor value to be configured for the TC * * Returned Value: - * Zero (OK) if a proper divisor has been found, otherwise a negated errno - * value indicating the nature of the failure. + * Rhe actual frequency which will be configured with calculated + * parameters * ****************************************************************************/ -int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, - uint32_t *actual) +uint32_t sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, + uint32_t *div) { - uint32_t mck_actual; - uint32_t mck_tcclks; - uint32_t mck_error; - int ret; + uint32_t mck8_freq; + uint32_t mck8_error; + uint32_t tcclks_select; + uint32_t div_select; + uint32_t freq_actual; - /* Try to satisfy the requested frequency with the MCK or slow clock */ + /* Calculate frequency error for MCK clock. Use smallest possible MCK + * divisor of 8 to have highest clock resolution and thus smallest + * frequency error. With 32 bit counter the lowest possible frequency + * of 1 Hz is easily supported. + */ - ret = sam_tc_mcksrc(frequency, &mck_tcclks, &mck_actual); - if (ret < 0) - { - mck_error = UINT32_MAX; - } - else - { - /* Get the absolute value of the frequency error */ - - if (mck_actual > frequency) - { - mck_error = mck_actual - frequency; - } - else - { - mck_error = frequency - mck_actual; - } - } + mck8_freq = BOARD_MCK_FREQUENCY/8; + mck8_error = sam_tc_freq_err_abs(frequency, mck8_freq, &div_select); + tcclks_select = TC_CMR_TCCLKS_MCK8; + freq_actual = mck8_freq / div_select; /* See if we do better with PCK6 */ if (sam_pck_isenabled(PCK6)) { - uint32_t pck6_actual; + uint32_t pck6_freq; uint32_t pck6_error; + uint32_t pck6_div; /* Get the absolute value of the frequency error */ - pck6_actual = sam_pck_frequency(PCK6); - if (pck6_actual > frequency) - { - pck6_error = pck6_actual - frequency; - } - else - { - pck6_error = frequency - pck6_actual; - } + pck6_freq = sam_pck_frequency(PCK6); + pck6_error = sam_tc_freq_err_abs(frequency, pck6_freq, &pck6_div); /* Return the PCK6 selection if the error is smaller */ - if (pck6_error < mck_error) + if (pck6_error < mck8_error) { - /* Return the PCK selection */ - - if (actual) - { - tmrinfo("return actual=%lu\n", (unsigned long)fselect); - *actual = pck6_actual; - } - - /* Return the TCCLKS selection */ - - if (tcclks) - { - tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6); - *tcclks = TC_CMR_TCCLKS_PCK6; - } - - /* Return success */ - - return OK; + tcclks_select = TC_CMR_TCCLKS_PCK6; + div_select = pck6_div; + freq_actual = pck6_freq / pck6_div; } } - /* Return the MCK/slow clock selection */ - - if (actual) - { - tmrinfo("return actual=%lu\n", (unsigned long)mck_actual); - *actual = mck_actual; - } - /* Return the TCCLKS selection */ if (tcclks) { - tmrinfo("return tcclks=%08lx\n", (unsigned long)mck_tcclks); - *tcclks = mck_tcclks; + tmrinfo("return tcclks=%08lx\n", (unsigned long)tcclks_select); + *tcclks = tcclks_select; } - /* Return success */ + /* Return the divider value */ - return ret; + if (div) + { + tmrinfo("return div=%lu\n", (unsigned long)div_select); + *div = div_select; + } + + return freq_actual; } #endif /* CONFIG_SAMV7_TC0 || CONFIG_SAMV7_TC1 || CONFIG_SAMV7_TC2 || CONFIG_SAMV7_TC3 */ diff --git a/arch/arm/src/samv7/sam_tc.h b/arch/arm/src/samv7/sam_tc.h index d62ac212520..a2e25fdf874 100644 --- a/arch/arm/src/samv7/sam_tc.h +++ b/arch/arm/src/samv7/sam_tc.h @@ -319,29 +319,20 @@ uint32_t sam_tc_divfreq(TC_HANDLE handle); * Name: sam_tc_clockselect * * Description: - * Finds the best MCK divisor given the timer frequency and MCK. The - * result is guaranteed to satisfy the following equation: - * - * (Ftcin / (div * 65536)) <= freq <= (Ftcin / div) - * - * where: - * freq - the desired frequency - * Ftcin - The timer/counter input frequency - * div - With DIV being the highest possible value. + * Finds the best clock source and clock divisor to configure required + * frequency. * * Input Parameters: - * frequency Desired timer frequency. - * tcclks TCCLKS field value for divisor. - * actual The actual freqency of the MCK + * frequency desired timer frequency + * tcclks TC_CMRx.TCCLKS bit field (clock selection) value + * div the divisor value to be configured for the TC * * Returned Value: - * Zero (OK) if a proper divisor has been found, otherwise a negated errno - * value indicating the nature of the failure. + * the actual frequency which will be configured with calculated parameters * ****************************************************************************/ -int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, - uint32_t *actual); +uint32_t sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, uint32_t *div); #undef EXTERN #ifdef __cplusplus From 42ee88fe894fb9f3b96407ac092f2771020f6ed4 Mon Sep 17 00:00:00 2001 From: Konstantin Berezenko Date: Wed, 17 Aug 2016 11:01:44 -0700 Subject: [PATCH 074/214] STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function numbers --- arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h index ff75a5d0ad9..0fdaef01398 100644 --- a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h +++ b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h @@ -413,10 +413,11 @@ #define GPIO_I2C2_SMBA_1 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) #define GPIO_I2C2_SMBA_2 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN2) #define GPIO_I2C2_SMBA_3 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6) -#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F411) -# define GPIO_I2C2_SDA_4 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN3) +#if defined(CONFIG_STM32_STM32F411) +# define GPIO_I2C2_SDA_4 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN3) #endif #if defined(CONFIG_STM32_STM32F446) +# define GPIO_I2C2_SDA_4 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN3) # define GPIO_I2C2_SDA_5 (GPIO_ALT|GPIO_AF4|GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTC|GPIO_PIN12) #endif From a05d9c18daef757ec667b26ee89f83f30c2dd1b9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 20:11:15 +0200 Subject: [PATCH 075/214] Add connectivity line stm32 to be able to compile SYSCFG, add definitions for usb clock divs --- arch/arm/src/stm32/Kconfig | 2 +- arch/arm/src/stm32/chip/stm32f10xxx_rcc.h | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 3b7a1cf8cc8..05d96680458 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -2074,7 +2074,7 @@ config STM32_SPI6 config STM32_SYSCFG bool "SYSCFG" default y - depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX + depends on STM32_STM32L15XX || STM32_STM32F30XX || STM32_STM32F37XX || STM32_STM32F207 || STM32_STM32F40XX || STM32_CONNECTIVITYLINE config STM32_TIM1 bool "TIM1" diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h index 2828e85b2f3..4318b9d9cf7 100644 --- a/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h +++ b/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h @@ -172,9 +172,13 @@ #ifndef CONFIG_STM32_VALUELINE # define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB FS prescaler */ +# define RCC_CFGR_USBPREd0 (0) /* PLLCLK / 1 */ +# define RCC_CFGR_USBPREd15 (1) /* PLLCLK / 1.5 */ #endif #ifdef CONFIG_STM32_CONNECTIVITYLINE # define RCC_CFGR_OTGFSPRE (1 << 22) /* Bit 22: OTG FS prescaler */ +# define RCC_CFGR_OTGFSPREd2 (1) /* PLL_VCO (2x PLLCLK) / 2 */ +# define RCC_CFGR_OTGFSPREd3 (0) /* PLL_VCO (3x PLLCLK) / 3 */ #endif #define RCC_CFGR_MCO_SHIFT (24) /* Bits 27-24: Microcontroller Clock Output */ #define RCC_CFGR_MCO_MASK (15 << RCC_CFGR_MCO_SHIFT) From e7445f9556df63922c55f02db44dfc4eedb564ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 20:13:17 +0200 Subject: [PATCH 076/214] Add otgfs support (host only) --- configs/stm32butterfly2/include/board.h | 4 + configs/stm32butterfly2/nshnet/defconfig | 37 +++- configs/stm32butterfly2/src/Makefile | 8 + configs/stm32butterfly2/src/stm32_boot.c | 9 +- .../stm32butterfly2/src/stm32_butterfly2.h | 41 ++++- configs/stm32butterfly2/src/stm32_usb.c | 61 +++++++ configs/stm32butterfly2/src/stm32_usbhost.c | 170 ++++++++++++++++++ 7 files changed, 322 insertions(+), 8 deletions(-) create mode 100644 configs/stm32butterfly2/src/stm32_usb.c create mode 100644 configs/stm32butterfly2/src/stm32_usbhost.c diff --git a/configs/stm32butterfly2/include/board.h b/configs/stm32butterfly2/include/board.h index bb12930e197..761c0cf6a9d 100644 --- a/configs/stm32butterfly2/include/board.h +++ b/configs/stm32butterfly2/include/board.h @@ -81,6 +81,10 @@ #define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY #define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY +/* USB clock output is 47.9232MHz */ + +#define STM32_CFGR_OTGFSPRE RCC_CFGR_OTGFSPREd3 + /* APB2 clock (PCLK2) is HCLK */ #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index 826534dfc7d..c1ef03b861d 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -148,6 +148,9 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +# CONFIG_USBHOST_ISOC_DISABLE is not set # # STM32 Configuration Options @@ -377,11 +380,12 @@ CONFIG_STM32_ADC1=y # CONFIG_STM32_DAC2 is not set CONFIG_STM32_ETHMAC=y # CONFIG_STM32_I2C1 is not set -# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_OTGFS=y CONFIG_STM32_PWR=y CONFIG_STM32_SPI1=y # CONFIG_STM32_SPI2 is not set # CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y # CONFIG_STM32_TIM1 is not set # CONFIG_STM32_TIM2 is not set # CONFIG_STM32_TIM3 is not set @@ -474,6 +478,11 @@ CONFIG_STM32_ETH100MBPS=y # # USB FS Host Configuration # +CONFIG_STM32_OTGFS_RXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96 +CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_DESCSIZE=128 +# CONFIG_STM32_OTGFS_SOFINTR is not set # # USB HS Host Configuration @@ -865,7 +874,25 @@ CONFIG_USART2_2STOP=0 # CONFIG_USART2_DMA is not set # CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set -# CONFIG_USBHOST is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=100000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_RTL8187 is not set +# CONFIG_USBHOST_TRACE is not set # CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set @@ -1162,7 +1189,10 @@ CONFIG_EXAMPLES_BUTTONS_MAX=4 # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HIDKBD is not set +CONFIG_EXAMPLES_HIDKBD=y +CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 +CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 +CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" # CONFIG_EXAMPLES_IGMP is not set # CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_KEYPADTEST is not set @@ -1356,6 +1386,7 @@ CONFIG_NSH_STRERROR=y # CONFIG_NSH_CONSOLE=y # CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_USBKBD is not set CONFIG_NSH_ARCHINIT=y # diff --git a/configs/stm32butterfly2/src/Makefile b/configs/stm32butterfly2/src/Makefile index ad5f6f882d0..35fbfcd375a 100644 --- a/configs/stm32butterfly2/src/Makefile +++ b/configs/stm32butterfly2/src/Makefile @@ -45,6 +45,14 @@ ifeq ($(CONFIG_STM32_SPI1),y) CSRCS += stm32_spi.c endif +ifeq ($(CONFIG_STM32_OTGFS),y) +CSRCS += stm32_usb.c +endif + +ifeq ($(CONFIG_USBHOST),y) +CSRCS += stm32_usbhost.c +endif + ifeq ($(CONFIG_MMCSD),y) CSRCS += stm32_mmcsd.c endif diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c index 5f5ea750b3a..9bba1b7917e 100644 --- a/configs/stm32butterfly2/src/stm32_boot.c +++ b/configs/stm32butterfly2/src/stm32_boot.c @@ -52,6 +52,7 @@ void stm32_boardinitialize(void) { stm32_led_initialize(); stm32_spidev_initialize(); + stm32_usb_initialize(); } int board_app_initialize(uintptr_t arg) @@ -63,5 +64,11 @@ int board_app_initialize(uintptr_t arg) return rv; } - return 0; + if ((rv = stm32_usbhost_initialize()) < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", rv); + return rv; + } + + return 0; } diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h index dc0c46fbb01..849aed137a2 100644 --- a/configs/stm32butterfly2/src/stm32_butterfly2.h +++ b/configs/stm32butterfly2/src/stm32_butterfly2.h @@ -43,11 +43,18 @@ * Pre-processor Definitions ****************************************************************************/ +/* SD Card pins */ + #define GPIO_SD_CS (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ GPIO_OUTPUT_SET | GPIO_PORTA | GPIO_PIN4) #define GPIO_SD_CD (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_EXTI |\ GPIO_PORTB | GPIO_PIN9) +/* USB pins */ + +#define GPIO_OTGFS_PWRON (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ + GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN15) + /***************************************************************************** * Public Functions ****************************************************************************/ @@ -56,11 +63,11 @@ * Name: stm32_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins. + * Called to configure SPI chip select GPIO pins. * * Note: - * Here only CS pins are configured as SPI pins are configured by driver - * itself. + * Here only CS pins are configured as SPI pins are configured by driver + * itself. ****************************************************************************/ void stm32_spidev_initialize(void); @@ -69,9 +76,35 @@ void stm32_spidev_initialize(void); * Name: stm32_sdinitialize * * Description: - * Initializes SPI-based SD card + * Initializes SPI-based SD card * ****************************************************************************/ int stm32_sdinitialize(int minor); +/***************************************************************************** + * Name: stm32_usb_initialize + * + * Description: + * Initializes USB pins + ****************************************************************************/ + +#ifdef CONFIG_STM32_OTGFS +void stm32_usb_initialize(void); +#else +static inline void stm32_usb_initialize(void) {} +#endif + +/***************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Initializes USB host functionality. + ****************************************************************************/ + +#ifdef CONFIG_USBHOST +int stm32_usbhost_initialize(void); +#else +static inline int stm32_usbhost_initialize(void) {} +#endif + diff --git a/configs/stm32butterfly2/src/stm32_usb.c b/configs/stm32butterfly2/src/stm32_usb.c new file mode 100644 index 00000000000..b9185f58874 --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_usb.c @@ -0,0 +1,61 @@ +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_usb.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/***************************************************************************** + * Include Files + ****************************************************************************/ + +#include +#include + +#include "stm32_butterfly2.h" + +/***************************************************************************** + * Public Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_usb_initialize + * + * Description: + * Initializes USB pins + ****************************************************************************/ + +void stm32_usb_initialize(void) +{ + stm32_configgpio(GPIO_OTGFS_VBUS); + stm32_configgpio(GPIO_OTGFS_PWRON); +} + diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c new file mode 100644 index 00000000000..aff168ac915 --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_usbhost.c @@ -0,0 +1,170 @@ +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_usb.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/***************************************************************************** + * Include Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "stm32.h" +#include "stm32_butterfly2.h" +#include "stm32_otgfs.h" + +/***************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_STM32_OTGFS +#error "CONFIG_USBHOST requires CONFIG_STM32_OTGFS to be enabled" +#endif + +/***************************************************************************** + * Private Data + ****************************************************************************/ + +static struct usbhost_connection_s *g_usbconn; + +/***************************************************************************** + * Private Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: usbhost_detect + * + * Description: + * Wait for USB devices to be connected. + ****************************************************************************/ + +static void* usbhost_detect(void *arg) +{ + (void)arg; + + struct usbhost_hubport_s *hport; + + for (;;) + { + CONN_WAIT(g_usbconn, &hport); + + if (hport->connected) + { + CONN_ENUMERATE(g_usbconn, hport); + } + } + + return 0; +} + +/***************************************************************************** + * Public Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_usbhost_initialize + * + * Description: + * Initializes USB host functionality. + ****************************************************************************/ + +int stm32_usbhost_initialize(void) +{ + int rv; + +#ifdef CONFIG_USBHOST_MSC + if ((rv = usbhost_msc_initialize()) < 0) + { + uerr("ERROR: Failed to register mass storage class: %d\n", rv); + } +#endif + +#ifdef CONFIG_USBHOST_CDACM + if ((rv = usbhost_cdacm_initialize()) < 0) + { + uerr("ERROR: Failed to register CDC/ACM serial class: %d\n", rv); + } +#endif + +#ifdef CONFIG_USBHOST_HIDKBD + if ((rv = usbhost_kbdinit()) < 0) + { + uerr("ERROR: Failed to register the KBD class\n"); + } +#endif + + + if ((g_usbconn = stm32_otgfshost_initialize(0))) + { + pthread_attr_t pattr; + pthread_attr_init(&pattr); + pthread_attr_setstacksize(&pattr, 2048); + return pthread_create(NULL, &pattr, usbhost_detect, NULL); + } + + return -ENODEV; +} + +/***************************************************************************** + * Name: stm32_usbhost_vbusdrive + * + * Description: + * Enable/disable driving of VBUS 5V output. + * + * The application uses this field to control power to this port, and the + * core clears this bit on an overcurrent condition. + * + * Input Parameters: + * iface - For future growth to handle multiple USB host interface. + * Should be zero. + * enable - true: enable VBUS power; false: disable VBUS power + * + * Returned Value: + * None + ****************************************************************************/ + +void stm32_usbhost_vbusdrive(int iface, bool enable) +{ + DEBUGASSERT(iface == 0); + + stm32_gpiowrite(GPIO_OTGFS_PWRON, enable); +} + From 44e0a837a89c6872a9b413c4171a01c4a2595730 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 20:20:15 +0200 Subject: [PATCH 077/214] Add usb mouse and hub support --- configs/stm32butterfly2/src/stm32_usbhost.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c index aff168ac915..6bbefec07da 100644 --- a/configs/stm32butterfly2/src/stm32_usbhost.c +++ b/configs/stm32butterfly2/src/stm32_usbhost.c @@ -127,10 +127,23 @@ int stm32_usbhost_initialize(void) #ifdef CONFIG_USBHOST_HIDKBD if ((rv = usbhost_kbdinit()) < 0) { - uerr("ERROR: Failed to register the KBD class\n"); + uerr("ERROR: Failed to register the KBD class: %d\n", rv); } #endif +#ifdef CONFIG_USBHOST_HIDMOUSE + if ((rv = usbhost_mouse_init()) < 0) + { + uerr("ERROR: Failed to register the mouse class: %d\n", rv); + } +#endif + +#ifdef CONFIG_USBHOST_HUB + if ((rv = usbhost_hub_initialize()) < 0) + { + uerr("ERROR: Failed to register hub class: %d\n", rv); + } +#endif if ((g_usbconn = stm32_otgfshost_initialize(0))) { From 319ad528cdd744804b9e94c1ba072c69fc127eac Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 17 Aug 2016 12:34:54 -0600 Subject: [PATCH 078/214] Revert "sam_tc_clockselect() reworked to calculate frequency error using smallest possible divisor minimizing the frequency error rather than largest possible divisor which maximized the error." This reverts commit 5d5851a5cd76b780f2caab974ebe39ded86ee9e0. --- README.txt | 6 +- arch/arm/src/samv7/sam_dac.c | 25 ++-- arch/arm/src/samv7/sam_freerun.c | 19 ++- arch/arm/src/samv7/sam_oneshot.c | 19 ++- arch/arm/src/samv7/sam_tc.c | 214 +++++++++++++++++++++---------- arch/arm/src/samv7/sam_tc.h | 23 +++- 6 files changed, 202 insertions(+), 104 deletions(-) diff --git a/README.txt b/README.txt index 108c5cd324e..3617f874a72 100644 --- a/README.txt +++ b/README.txt @@ -908,9 +908,9 @@ Build Targets and Options distclean - Does 'clean' then also removes all configuration, dependency, and - other context files. This essentially restores the directory structure - to its original, unconfigured stated. + Does 'clean' then also removes all configuration and context files. + This essentially restores the directory structure to its original, + unconfigured stated. Application housekeeping targets. The APPDIR variable refers to the user application directory. A sample apps/ directory is included with NuttX, diff --git a/arch/arm/src/samv7/sam_dac.c b/arch/arm/src/samv7/sam_dac.c index 52443523d11..598201ce390 100644 --- a/arch/arm/src/samv7/sam_dac.c +++ b/arch/arm/src/samv7/sam_dac.c @@ -373,8 +373,7 @@ static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, int channel) { uint32_t mode; - uint32_t tcclks; - uint32_t div; + uint32_t regval; uint32_t freq_actual; ainfo("required frequency=%ld [Hz], channel=%d\n", @@ -382,11 +381,15 @@ static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, DEBUGASSERT(priv && (freq_required > 0) && (channel >= 0 && channel <= 2)); - /* Calculate the best possible clock source and clock divisor value */ + /* Set the timer/counter waveform mode the the clock input. Use smallest + * MCK divisor of 8 to have highest clock resolution thus smallest frequency + * error. With 32 bit counter the lowest possible frequency of 1 Hz is easily + * supported. + */ - freq_actual = sam_tc_clockselect(freq_required, &tcclks, &div); + /* TODO Add support for TC_CMR_TCCLKS_PCK6 to reduce frequency error */ - mode = (tcclks | /* Use MCK/8 clock signal */ + mode = (TC_CMR_TCCLKS_MCK8 | /* Use MCK/8 clock signal */ TC_CMR_WAVSEL_UPRC | /* UP mode w/ trigger on RC Compare */ TC_CMR_WAVE | /* Wave mode */ TC_CMR_ACPA_CLEAR | /* RA Compare Effect on TIOA: Clear */ @@ -401,17 +404,21 @@ static int dac_timer_init(struct sam_dac_s *priv, uint32_t freq_required, return -EINVAL; } - /* Set up clock divisor */ + /* Calculate the actual counter value from this divider and the tc input + * frequency. + */ - DEBUGASSERT(div >= 2); /* Minimum divider required by implementation */ + regval = BOARD_MCK_FREQUENCY / 8 / freq_required; + DEBUGASSERT(regval > 0); /* Will check for integer underflow */ /* Set up TC_RA and TC_RC. The frequency is determined by RA and RC: * TIOA is cleared on RA match; TIOA is set on RC match. */ - sam_tc_setregister(priv->tc, TC_REGA, div >> 1); - sam_tc_setregister(priv->tc, TC_REGC, div); + sam_tc_setregister(priv->tc, TC_REGA, regval >> 1); + sam_tc_setregister(priv->tc, TC_REGC, regval); + freq_actual = BOARD_MCK_FREQUENCY / 8 / regval; ainfo("configured frequency=%ld [Hz]\n", (long)freq_actual); /* And start the timer */ diff --git a/arch/arm/src/samv7/sam_freerun.c b/arch/arm/src/samv7/sam_freerun.c index 9374409b885..4db95112182 100644 --- a/arch/arm/src/samv7/sam_freerun.c +++ b/arch/arm/src/samv7/sam_freerun.c @@ -119,24 +119,29 @@ static void sam_freerun_handler(TC_HANDLE tch, void *arg, uint32_t sr) int sam_freerun_initialize(struct sam_freerun_s *freerun, int chan, uint16_t resolution) { - uint32_t freq_required; - uint32_t freq_actual; - uint32_t div; + uint32_t frequency; + uint32_t actual; uint32_t cmr; + int ret; tmrinfo("chan=%d resolution=%d usec\n", chan, resolution); DEBUGASSERT(freerun && resolution > 0); /* Get the TC frequency the corresponds to the requested resolution */ - freq_required = USEC_PER_SEC / (uint32_t)resolution; + frequency = USEC_PER_SEC / (uint32_t)resolution; /* The pre-calculate values to use when we start the timer */ - freq_actual = sam_tc_clockselect(freq_required, &cmr, &div); + ret = sam_tc_clockselect(frequency, &cmr, &actual); + if (ret < 0) + { + tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret); + return ret; + } - tmrinfo("freq required=%lu, freq actual=%lu, TC_CMR.TCCLKS=%08lx\n", - (unsigned long)freq_required, (unsigned long)freq_actual, + tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n", + (unsigned long)frequency, (unsigned long)actual, (unsigned long)cmr); /* Allocate the timer/counter and select its mode of operation diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c index 5506d8ff8a8..bc9c23b515e 100644 --- a/arch/arm/src/samv7/sam_oneshot.c +++ b/arch/arm/src/samv7/sam_oneshot.c @@ -147,24 +147,29 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, uint16_t resolution) { - uint32_t freq_required; - uint32_t freq_actual; - uint32_t div; + uint32_t frequency; + uint32_t actual; uint32_t cmr; + int ret; tmrinfo("chan=%d resolution=%d usec\n", chan, resolution); DEBUGASSERT(oneshot && resolution > 0); /* Get the TC frequency the corresponds to the requested resolution */ - freq_required = USEC_PER_SEC / (uint32_t)resolution; + frequency = USEC_PER_SEC / (uint32_t)resolution; /* The pre-calculate values to use when we start the timer */ - freq_actual = sam_tc_clockselect(freq_required, &cmr, &div); + ret = sam_tc_clockselect(frequency, &cmr, &actual); + if (ret < 0) + { + tmrerr("ERROR: sam_tc_clockselect failed: %d\n", ret); + return ret; + } - tmrinfo("freq required=%lu, freq actual=%lu, TC_CMR.TCCLKS=%08lx\n", - (unsigned long)freq_required, (unsigned long)freq_actual, + tmrinfo("frequency=%lu, actual=%lu, cmr=%08lx\n", + (unsigned long)frequency, (unsigned long)actual, (unsigned long)cmr); /* Allocate the timer/counter and select its mode of operation diff --git a/arch/arm/src/samv7/sam_tc.c b/arch/arm/src/samv7/sam_tc.c index 6f93458d8a5..691366af8f8 100644 --- a/arch/arm/src/samv7/sam_tc.c +++ b/arch/arm/src/samv7/sam_tc.c @@ -213,8 +213,8 @@ static int sam_tc11_interrupt(int irq, void *context); static uint32_t sam_tc_mckfreq_lookup(uint32_t ftcin, int ndx); static inline uint32_t sam_tc_tcclks_lookup(int ndx); -static uint32_t sam_tc_freq_err_abs(uint32_t freq_required, - uint32_t freq_input, uint32_t *div); +static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks, + uint32_t *actual); static inline struct sam_chan_s *sam_tc_initialize(int channel); /**************************************************************************** @@ -1019,51 +1019,83 @@ static inline uint32_t sam_tc_tcclks_lookup(int ndx) } /**************************************************************************** - * Name: sam_tc_freq_err_abs + * Name: sam_tc_mcksrc * * Description: - * Calculate best possible frequency error given input frequency and - * required frequency knowing that input frequency can be divided by - * integer divisor. The divisor for which the given error was calculated - * is also returned. + * Finds the best MCK divisor given the timer frequency and MCK. The + * result is guaranteed to satisfy the following equation: + * + * (Ftcin / (div * 65536)) <= freq <= (Ftcin / div) + * + * where: + * freq - the desired frequency + * Ftcin - The timer/counter input frequency + * div - With DIV being the highest possible value. * * Input Parameters: - * freq_required Desired timer frequency - * freq_input TC module input frequency - * div Pointer to the divisor for which the error was - * calculated + * frequency Desired timer frequency. + * tcclks TCCLKS field value for divisor. + * actual The actual freqency of the MCK * * Returned Value: - * Absolute value of the smallest possible frequency error + * Zero (OK) if a proper divisor has been found, otherwise a negated errno + * value indicating the nature of the failure. * ****************************************************************************/ -static uint32_t sam_tc_freq_err_abs(uint32_t freq_required, uint32_t freq_input, - uint32_t *div) +static int sam_tc_mcksrc(uint32_t frequency, uint32_t *tcclks, + uint32_t *actual) { - uint32_t freq_actual; - uint32_t freq_error; + uint32_t fselect; + uint32_t fnext; + int ndx = 0; - DEBUGASSERT(freq_input >= freq_required); - DEBUGASSERT(UINT32_MAX - freq_required/2 > freq_input); + tmrinfo("frequency=%d\n", frequency); - /* Integer division will truncate result toward zero, make sure the result - * is rounded instead. + /* Satisfy lower bound. That is, the value of the divider such that: + * + * frequency >= (tc_input_frequency * 65536) / divider. */ - *div = (freq_input + freq_required/2) / freq_required; - freq_actual = freq_input / *div; - - if (freq_required >= freq_actual) + for (; ndx < TC_NDIVIDERS; ndx++) { - freq_error = freq_required - freq_actual; - } - else - { - freq_error = freq_actual - freq_required; + fselect = sam_tc_mckfreq_lookup(BOARD_MCK_FREQUENCY, ndx); + if (frequency >= (fselect >> 16)) + { + break; + } } - return freq_error; + if (ndx >= TC_NDIVIDERS) + { + /* If no divisor can be found, return -ERANGE */ + + tmrerr("ERROR: Lower bound search failed\n"); + return -ERANGE; + } + + /* Try to maximize DIV while still satisfying upper bound. That the + * value of the divider such that: + * + * frequency < tc_input_frequency / divider. + */ + + for (; ndx < TC_NDIVIDERS; ndx++) + { + fnext = sam_tc_mckfreq_lookup(BOARD_MCK_FREQUENCY, ndx + 1); + if (frequency > fnext) + { + break; + } + + fselect = fnext; + } + + /* Return the actual frequency and the TCCLKS selection */ + + *actual = fselect; + *tcclks = sam_tc_tcclks_lookup(ndx); + return OK; } /**************************************************************************** @@ -1612,80 +1644,120 @@ uint32_t sam_tc_divfreq(TC_HANDLE handle) * Name: sam_tc_clockselect * * Description: - * Finds the best clock source and clock divisor to configure required - * frequency. + * Finds the best MCK divisor given the timer frequency and MCK. The + * result is guaranteed to satisfy the following equation: + * + * (Ftcin / (div * 65536)) <= freq <= (Ftcin / div) + * + * where: + * freq - the desired frequency + * Ftcin - The timer/counter input frequency + * div - With DIV being the highest possible value. * * Input Parameters: - * frequency Desired timer frequency - * tcclks TC_CMRx.TCCLKS bit field (clock selection) value - * div The divisor value to be configured for the TC + * frequency Desired timer frequency. + * tcclks TCCLKS field value for divisor. + * actual The actual freqency of the MCK * * Returned Value: - * Rhe actual frequency which will be configured with calculated - * parameters + * Zero (OK) if a proper divisor has been found, otherwise a negated errno + * value indicating the nature of the failure. * ****************************************************************************/ -uint32_t sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, - uint32_t *div) +int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, + uint32_t *actual) { - uint32_t mck8_freq; - uint32_t mck8_error; - uint32_t tcclks_select; - uint32_t div_select; - uint32_t freq_actual; + uint32_t mck_actual; + uint32_t mck_tcclks; + uint32_t mck_error; + int ret; - /* Calculate frequency error for MCK clock. Use smallest possible MCK - * divisor of 8 to have highest clock resolution and thus smallest - * frequency error. With 32 bit counter the lowest possible frequency - * of 1 Hz is easily supported. - */ + /* Try to satisfy the requested frequency with the MCK or slow clock */ - mck8_freq = BOARD_MCK_FREQUENCY/8; - mck8_error = sam_tc_freq_err_abs(frequency, mck8_freq, &div_select); - tcclks_select = TC_CMR_TCCLKS_MCK8; - freq_actual = mck8_freq / div_select; + ret = sam_tc_mcksrc(frequency, &mck_tcclks, &mck_actual); + if (ret < 0) + { + mck_error = UINT32_MAX; + } + else + { + /* Get the absolute value of the frequency error */ + + if (mck_actual > frequency) + { + mck_error = mck_actual - frequency; + } + else + { + mck_error = frequency - mck_actual; + } + } /* See if we do better with PCK6 */ if (sam_pck_isenabled(PCK6)) { - uint32_t pck6_freq; + uint32_t pck6_actual; uint32_t pck6_error; - uint32_t pck6_div; /* Get the absolute value of the frequency error */ - pck6_freq = sam_pck_frequency(PCK6); - pck6_error = sam_tc_freq_err_abs(frequency, pck6_freq, &pck6_div); + pck6_actual = sam_pck_frequency(PCK6); + if (pck6_actual > frequency) + { + pck6_error = pck6_actual - frequency; + } + else + { + pck6_error = frequency - pck6_actual; + } /* Return the PCK6 selection if the error is smaller */ - if (pck6_error < mck8_error) + if (pck6_error < mck_error) { - tcclks_select = TC_CMR_TCCLKS_PCK6; - div_select = pck6_div; - freq_actual = pck6_freq / pck6_div; + /* Return the PCK selection */ + + if (actual) + { + tmrinfo("return actual=%lu\n", (unsigned long)fselect); + *actual = pck6_actual; + } + + /* Return the TCCLKS selection */ + + if (tcclks) + { + tmrinfo("return tcclks=%08lx\n", (unsigned long)TC_CMR_TCCLKS_PCK6); + *tcclks = TC_CMR_TCCLKS_PCK6; + } + + /* Return success */ + + return OK; } } + /* Return the MCK/slow clock selection */ + + if (actual) + { + tmrinfo("return actual=%lu\n", (unsigned long)mck_actual); + *actual = mck_actual; + } + /* Return the TCCLKS selection */ if (tcclks) { - tmrinfo("return tcclks=%08lx\n", (unsigned long)tcclks_select); - *tcclks = tcclks_select; + tmrinfo("return tcclks=%08lx\n", (unsigned long)mck_tcclks); + *tcclks = mck_tcclks; } - /* Return the divider value */ + /* Return success */ - if (div) - { - tmrinfo("return div=%lu\n", (unsigned long)div_select); - *div = div_select; - } - - return freq_actual; + return ret; } #endif /* CONFIG_SAMV7_TC0 || CONFIG_SAMV7_TC1 || CONFIG_SAMV7_TC2 || CONFIG_SAMV7_TC3 */ diff --git a/arch/arm/src/samv7/sam_tc.h b/arch/arm/src/samv7/sam_tc.h index a2e25fdf874..d62ac212520 100644 --- a/arch/arm/src/samv7/sam_tc.h +++ b/arch/arm/src/samv7/sam_tc.h @@ -319,20 +319,29 @@ uint32_t sam_tc_divfreq(TC_HANDLE handle); * Name: sam_tc_clockselect * * Description: - * Finds the best clock source and clock divisor to configure required - * frequency. + * Finds the best MCK divisor given the timer frequency and MCK. The + * result is guaranteed to satisfy the following equation: + * + * (Ftcin / (div * 65536)) <= freq <= (Ftcin / div) + * + * where: + * freq - the desired frequency + * Ftcin - The timer/counter input frequency + * div - With DIV being the highest possible value. * * Input Parameters: - * frequency desired timer frequency - * tcclks TC_CMRx.TCCLKS bit field (clock selection) value - * div the divisor value to be configured for the TC + * frequency Desired timer frequency. + * tcclks TCCLKS field value for divisor. + * actual The actual freqency of the MCK * * Returned Value: - * the actual frequency which will be configured with calculated parameters + * Zero (OK) if a proper divisor has been found, otherwise a negated errno + * value indicating the nature of the failure. * ****************************************************************************/ -uint32_t sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, uint32_t *div); +int sam_tc_clockselect(uint32_t frequency, uint32_t *tcclks, + uint32_t *actual); #undef EXTERN #ifdef __cplusplus From 2ae38b6bc699a00c83914a819e2260f18befb126 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 21:34:51 +0200 Subject: [PATCH 079/214] Refactored: function names, coding style --- configs/stm32butterfly2/include/board.h | 9 +- configs/stm32butterfly2/src/stm32_adc.c | 28 +++-- configs/stm32butterfly2/src/stm32_boot.c | 42 +++++-- .../stm32butterfly2/src/stm32_butterfly2.h | 22 +++- configs/stm32butterfly2/src/stm32_leds.c | 107 ++++++++++++++---- configs/stm32butterfly2/src/stm32_mmcsd.c | 48 ++++---- configs/stm32butterfly2/src/stm32_spi.c | 12 +- configs/stm32butterfly2/src/stm32_usb.c | 3 +- configs/stm32butterfly2/src/stm32_usbhost.c | 7 +- 9 files changed, 185 insertions(+), 93 deletions(-) diff --git a/configs/stm32butterfly2/include/board.h b/configs/stm32butterfly2/include/board.h index 761c0cf6a9d..841c1d8ca0b 100644 --- a/configs/stm32butterfly2/include/board.h +++ b/configs/stm32butterfly2/include/board.h @@ -182,14 +182,6 @@ extern "C" { * Public Function Prototypes ******************************************************************************/ -/******************************************************************************* - * Name: stm32_led_initialize - * - * Description: - * Initializes board specific LEDS - ******************************************************************************/ -void stm32_led_initialize(void); - /******************************************************************************* * Name: stm32_boardinitialize * @@ -199,6 +191,7 @@ void stm32_led_initialize(void); * has been configured and mapped but before any devices have been * initialized. ******************************************************************************/ + EXTERN void stm32_boardinitialize(void); #undef EXTERN diff --git a/configs/stm32butterfly2/src/stm32_adc.c b/configs/stm32butterfly2/src/stm32_adc.c index 02fa3fe2387..148287c2488 100644 --- a/configs/stm32butterfly2/src/stm32_adc.c +++ b/configs/stm32butterfly2/src/stm32_adc.c @@ -1,4 +1,4 @@ -/******************************************************************************* +/***************************************************************************** * configs/stm32butterfly2/src/stm32_adc.c * * Copyright (C) 2016 Michał Łyszczek. All rights reserved. @@ -30,22 +30,28 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. - * - ******************************************************************************/ + ****************************************************************************/ -/******************************************************************************* +/***************************************************************************** * Included Files - ******************************************************************************/ + ****************************************************************************/ #include #include #include -#include -#include -/******************************************************************************* +#include "stm32_adc.h" + +/***************************************************************************** * Public Functions - ******************************************************************************/ + ****************************************************************************/ + +/***************************************************************************** + * Name: board_adc_setup + * + * Description: + * Function initializes channel 1 of adc1 and registers device as /dev/adc0 + ****************************************************************************/ int board_adc_setup(void) { @@ -60,8 +66,7 @@ int board_adc_setup(void) } stm32_configgpio(GPIO_ADC12_IN10); - adc = stm32_adcinitialize(1, channel, 1); - if (adc == NULL) + if ((adc = stm32_adcinitialize(1, channel, 1)) == NULL) { aerr("ERROR: Failed to get adc interface\n"); return -ENODEV; @@ -76,3 +81,4 @@ int board_adc_setup(void) initialized = true; return OK; } + diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c index 9bba1b7917e..e77a6edffc7 100644 --- a/configs/stm32butterfly2/src/stm32_boot.c +++ b/configs/stm32butterfly2/src/stm32_boot.c @@ -1,4 +1,4 @@ -/******************************************************************************* +/***************************************************************************** * configs/stm32butterfly2/src/boot.c * * Copyright (C) 2016 Michał Łyszczek. All rights reserved. @@ -30,23 +30,28 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. - * - ******************************************************************************/ + ****************************************************************************/ -/******************************************************************************* +/***************************************************************************** * Included Files - ******************************************************************************/ + ****************************************************************************/ #include #include #include -#include "stm32_gpio.h" #include "stm32_butterfly2.h" -/******************************************************************************* +/***************************************************************************** * Public Functions - ******************************************************************************/ + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_boardinitialize + * + * Description: + * Initializes low level pins for the drivers. + ****************************************************************************/ void stm32_boardinitialize(void) { @@ -55,20 +60,35 @@ void stm32_boardinitialize(void) stm32_usb_initialize(); } +/***************************************************************************** + * Name: board_app_initialize + * + * Description: + * Initializes upper half drivers with board specific settings + * + * Returned value: + * 0 on sucess or errno value of failed init function. + ****************************************************************************/ + int board_app_initialize(uintptr_t arg) { - int rv; - if ((rv = stm32_sdinitialize(CONFIG_NSH_MMCSDMINOR)) < 0) + int rv = 0; + +#ifdef CONFIG_MMCSD + if ((rv = stm32_mmcsd_initialize(CONFIG_NSH_MMCSDMINOR)) < 0) { syslog(LOG_ERR, "Failed to initialize SD slot %d: %d\n"); return rv; } +#endif +#ifdef CONFIG_USBHOST if ((rv = stm32_usbhost_initialize()) < 0) { syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", rv); return rv; } +#endif - return 0; + return rv; } diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h index 849aed137a2..0fa7fd5b197 100644 --- a/configs/stm32butterfly2/src/stm32_butterfly2.h +++ b/configs/stm32butterfly2/src/stm32_butterfly2.h @@ -30,7 +30,6 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. - * ****************************************************************************/ /***************************************************************************** @@ -59,6 +58,15 @@ * Public Functions ****************************************************************************/ +/***************************************************************************** + * Name: stm32_led_initialize + * + * Description: + * Initializes low level gpio pins for board LEDS + ****************************************************************************/ + +void stm32_led_initialize(void); + /***************************************************************************** * Name: stm32_spidev_initialize * @@ -70,17 +78,25 @@ * itself. ****************************************************************************/ +#ifdef CONFIG_STM32_SPI1 void stm32_spidev_initialize(void); +#else +static inline void stm32_spidev_initialize(void); +#endif /***************************************************************************** - * Name: stm32_sdinitialize + * Name: stm32_mmcsd_initialize * * Description: * Initializes SPI-based SD card * ****************************************************************************/ -int stm32_sdinitialize(int minor); +#ifdef CONFIG_MMCSD +int stm32_mmcsd_initialize(int minor); +#else +static inline int stm32_mmcsd_initialize(int minor); +#endif /***************************************************************************** * Name: stm32_usb_initialize diff --git a/configs/stm32butterfly2/src/stm32_leds.c b/configs/stm32butterfly2/src/stm32_leds.c index 46ac5e6ff4f..98f527e24cd 100644 --- a/configs/stm32butterfly2/src/stm32_leds.c +++ b/configs/stm32butterfly2/src/stm32_leds.c @@ -1,5 +1,5 @@ -/******************************************************************************* - * configs/stm32butterfly2/src/led.c +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_led.c * * Copyright (C) 2016 Michał Łyszczek. All rights reserved. * Author: Michał Łyszczek @@ -31,26 +31,22 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ******************************************************************************/ + ****************************************************************************/ -/******************************************************************************* +/***************************************************************************** * Included Files - ******************************************************************************/ - -#include - -#include -#include + ****************************************************************************/ #include -#include -#include +#include +#include +#include #include "stm32_gpio.h" -/******************************************************************************* +/***************************************************************************** * Pre-processor definitions - ******************************************************************************/ + ****************************************************************************/ #define GPIO_LED1 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN0) @@ -61,9 +57,9 @@ #define GPIO_LED4 (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz |\ GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN5) -/******************************************************************************* +/***************************************************************************** * Private Types - ******************************************************************************/ + ****************************************************************************/ /* Identifies led state */ enum led_state @@ -72,9 +68,16 @@ enum led_state LED_OFF = true }; -/******************************************************************************* +/***************************************************************************** * Private Functions - ******************************************************************************/ + ****************************************************************************/ + +/***************************************************************************** + * Name: led_state + * + * Description: + * Sets pack of leds to given state + ****************************************************************************/ static void led_state(enum led_state state, unsigned int leds) { @@ -87,7 +90,7 @@ static void led_state(enum led_state state, unsigned int leds) { stm32_gpiowrite(GPIO_LED2, state); } - + if (leds & BOARD_LED3_BIT) { stm32_gpiowrite(GPIO_LED3, state); @@ -99,9 +102,16 @@ static void led_state(enum led_state state, unsigned int leds) } } -/******************************************************************************* +/***************************************************************************** * Public Functions - ******************************************************************************/ + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_led_initialize + * + * Description: + * Initializes low level gpio pins for board LEDS + ****************************************************************************/ void stm32_led_initialize(void) { @@ -112,6 +122,17 @@ void stm32_led_initialize(void) } #ifdef CONFIG_ARCH_LEDS + +/***************************************************************************** + * Name: board_autoled_on + * + * Description: + * Drives board leds when specific RTOS state led occurs. + * + * Input parameters: + * led - This is actually an RTOS state not led number of anything like that + ****************************************************************************/ + void board_autoled_on(int led) { switch (led) @@ -145,6 +166,16 @@ void board_autoled_on(int led) } } +/***************************************************************************** + * Name: board_autoled_off + * + * Description: + * Drives board leds when specific RTOS state led ends + * + * Input parameters: + * led - This is actually an RTOS state not led number of anything like that + ****************************************************************************/ + void board_autoled_off(int led) { switch (led) @@ -172,11 +203,32 @@ void board_autoled_off(int led) } #endif +/***************************************************************************** + * Name: board_userled_initialize + * + * Description: + * This function should initialize leds for user use, but on RTOS start we + * initialize every led for use by RTOS and at end, when RTOS is fully + * booted up, we give control of these specific leds for user. So that's why + * this function is empty. + ****************************************************************************/ + void board_userled_initialize(void) { /* Already initialized by stm32_led_initialize. */ } +/***************************************************************************** + * Name: board_userled + * + * Description: + * Sets led to ledon state. + * + * Input parameters: + * led - Led to be set, indexed from 0 + * ledon - new state for the led. + ****************************************************************************/ + void board_userled(int led, bool ledon) { #ifndef CONFIG_ARCH_LEDS @@ -186,9 +238,19 @@ void board_userled(int led, bool ledon) } #endif unsigned int ledbit = 1 << led; - led_state(ledon, ledbit); + led_state(ledon, ledbit); } +/***************************************************************************** + * Name: board_userled_all + * + * Description: + * Sets whole ledset to given state. + * + * Input parameters: + * ledset - Led bits to be set on or off + ****************************************************************************/ + void board_userled_all(uint8_t ledset) { #ifdef CONFIG_ARCH_LEDS @@ -199,3 +261,4 @@ void board_userled_all(uint8_t ledset) led_state(led_OFF, ~ledset); #endif } + diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c index 104de4b2eec..a127fe16678 100644 --- a/configs/stm32butterfly2/src/stm32_mmcsd.c +++ b/configs/stm32butterfly2/src/stm32_mmcsd.c @@ -37,8 +37,6 @@ * Included Files ****************************************************************************/ -#include -#include #include #include #include @@ -72,15 +70,15 @@ static const int SD_SLOT_NO = 0; /* There is only one SD slot */ /* Media changed callback */ -static spi_mediachange_t mediachangeclbk; +static spi_mediachange_t g_chmediaclbk; /* Argument for media changed callback */ -static void *mediachangearg; +static void *chmediaarg; /* Semafor to inform stm32_cd_thread that card was inserted or pulled out */ -static sem_t cdsem; +static sem_t g_cdsem; /***************************************************************************** * Private Functions @@ -90,8 +88,8 @@ static sem_t cdsem; * Name: stm32_cd_thread * * Description: - * Working thread to call mediachanged function when card is inserted or - * pulled out. + * Working thread to call mediachanged function when card is inserted or + * pulled out. ****************************************************************************/ static void *stm32_cd_thread(void *arg) @@ -100,16 +98,16 @@ static void *stm32_cd_thread(void *arg) while (1) { - sem_wait(&cdsem); + sem_wait(&g_cdsem); - if (mediachangeclbk) + if (g_chmediaclbk) { /* Card doesn't seem to initialize properly without letting it to * rest for a millsecond or so. */ usleep(1 * 1000); - mediachangeclbk(mediachangearg); + g_chmediaclbk(chmediaarg); } } @@ -120,7 +118,7 @@ static void *stm32_cd_thread(void *arg) * Name: stm32_cd * * Description: - * Card detect interrupt handler. + * Card detect interrupt handler. ****************************************************************************/ static int stm32_cd(int irq, FAR void *context) @@ -128,8 +126,8 @@ static int stm32_cd(int irq, FAR void *context) static const int debounce_time = 100; /* [ms] */ static uint32_t now = 0; static uint32_t prev = 0; - struct timespec tp; + clock_gettime(CLOCK_MONOTONIC, &tp); now = tp.tv_sec * 1000 + tp.tv_nsec / 1000000; @@ -141,7 +139,7 @@ static int stm32_cd(int irq, FAR void *context) if (now - debounce_time > prev) { prev = now; - sem_post(&cdsem); + sem_post(&g_cdsem); } return OK; @@ -155,31 +153,32 @@ static int stm32_cd(int irq, FAR void *context) * Name: stm32_spi1register * * Description: - * Registers media change callback + * Registers media change callback ****************************************************************************/ int stm32_spi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, FAR void *arg) { - mediachangeclbk = callback; - mediachangearg = arg; + g_chmediaclbk = callback; + chmediaarg = arg; return OK; } /***************************************************************************** - * Name: stm32_sdinitialize + * Name: stm32_mmcsd_initialize * * Description: - * Initialize SPI-based SD card and card detect thread. + * Initialize SPI-based SD card and card detect thread. ****************************************************************************/ -int stm32_sdinitialize(int minor) +int stm32_mmcsd_initialize(int minor) { FAR struct spi_dev_s *spi; + struct sched_param schparam; + pthread_attr_t pattr; int rv; - spi = stm32_spibus_initialize(SD_SPI_PORT); - if (!spi) + if ((spi = stm32_spibus_initialize(SD_SPI_PORT)) == NULL) { ferr("failed to initialize SPI port %d\n", SD_SPI_PORT); return -ENODEV; @@ -193,15 +192,18 @@ int stm32_sdinitialize(int minor) } stm32_gpiosetevent(GPIO_SD_CD, true, true, true, stm32_cd); - sem_init(&cdsem, 0, 0); - pthread_attr_t pattr; + sem_init(&g_cdsem, 0, 0); pthread_attr_init(&pattr); + #ifdef CONFIG_DEBUG_FS pthread_attr_setstacksize(&pattr, 1024); #else pthread_attr_setstacksize(&pattr, 256); #endif + + schparam.sched_priority = 50; + pthread_attr_setschedparam(&pattr, &schedparam); pthread_create(NULL, &pattr, stm32_cd_thread, NULL); return OK; diff --git a/configs/stm32butterfly2/src/stm32_spi.c b/configs/stm32butterfly2/src/stm32_spi.c index de3f77538dc..35400e35506 100644 --- a/configs/stm32butterfly2/src/stm32_spi.c +++ b/configs/stm32butterfly2/src/stm32_spi.c @@ -36,8 +36,6 @@ * Included Files ****************************************************************************/ -#include -#include #include #include "stm32_butterfly2.h" @@ -52,11 +50,11 @@ * Name: stm32_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins. + * Called to configure SPI chip select GPIO pins. * * Note: - * Here only CS pins are configured as SPI pins are configured by driver - * itself. + * Here only CS pins are configured as SPI pins are configured by driver + * itself. ****************************************************************************/ void stm32_spidev_initialize(void) @@ -69,7 +67,7 @@ void stm32_spidev_initialize(void) * Name: stm32_spi1select * * Description: - * Function asserts given devid based on select + * Function asserts given devid based on select ****************************************************************************/ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, @@ -85,7 +83,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, * Name: stm32_spi1status * * Description: - * Return status of devid + * Return status of devid ****************************************************************************/ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) diff --git a/configs/stm32butterfly2/src/stm32_usb.c b/configs/stm32butterfly2/src/stm32_usb.c index b9185f58874..4556bec410f 100644 --- a/configs/stm32butterfly2/src/stm32_usb.c +++ b/configs/stm32butterfly2/src/stm32_usb.c @@ -37,8 +37,7 @@ * Include Files ****************************************************************************/ -#include -#include +#include "stm32_gpio.h" #include "stm32_butterfly2.h" diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c index 6bbefec07da..592e3e034c2 100644 --- a/configs/stm32butterfly2/src/stm32_usbhost.c +++ b/configs/stm32butterfly2/src/stm32_usbhost.c @@ -1,5 +1,5 @@ /***************************************************************************** - * configs/stm32butterfly2/src/stm32_usb.c + * configs/stm32butterfly2/src/stm32_usbhost.c * * Copyright (C) 2016 Michał Łyszczek. All rights reserved. * Author: Michał Łyszczek @@ -37,8 +37,6 @@ * Include Files ****************************************************************************/ -#include -#include #include #include #include @@ -79,7 +77,6 @@ static struct usbhost_connection_s *g_usbconn; static void* usbhost_detect(void *arg) { (void)arg; - struct usbhost_hubport_s *hport; for (;;) @@ -176,8 +173,6 @@ int stm32_usbhost_initialize(void) void stm32_usbhost_vbusdrive(int iface, bool enable) { - DEBUGASSERT(iface == 0); - stm32_gpiowrite(GPIO_OTGFS_PWRON, enable); } From efead3e5643534b309222db58b906f05453a64f3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 21:53:04 +0200 Subject: [PATCH 080/214] Add debug messages, some more code refactoring --- configs/stm32butterfly2/src/stm32_adc.c | 2 ++ configs/stm32butterfly2/src/stm32_leds.c | 1 + configs/stm32butterfly2/src/stm32_mmcsd.c | 9 ++++++++- configs/stm32butterfly2/src/stm32_spi.c | 4 ++++ configs/stm32butterfly2/src/stm32_usb.c | 3 +++ configs/stm32butterfly2/src/stm32_usbhost.c | 14 ++++++++++++++ 6 files changed, 32 insertions(+), 1 deletion(-) diff --git a/configs/stm32butterfly2/src/stm32_adc.c b/configs/stm32butterfly2/src/stm32_adc.c index 148287c2488..bb5eab419e8 100644 --- a/configs/stm32butterfly2/src/stm32_adc.c +++ b/configs/stm32butterfly2/src/stm32_adc.c @@ -65,6 +65,7 @@ int board_adc_setup(void) return OK; } + ainfo("INFO: Initializing ADC12_IN10\n"); stm32_configgpio(GPIO_ADC12_IN10); if ((adc = stm32_adcinitialize(1, channel, 1)) == NULL) { @@ -79,6 +80,7 @@ int board_adc_setup(void) } initialized = true; + ainfo("INFO: ADC12_IN10 initialized succesfully\n"); return OK; } diff --git a/configs/stm32butterfly2/src/stm32_leds.c b/configs/stm32butterfly2/src/stm32_leds.c index 98f527e24cd..5f4831f7912 100644 --- a/configs/stm32butterfly2/src/stm32_leds.c +++ b/configs/stm32butterfly2/src/stm32_leds.c @@ -37,6 +37,7 @@ * Included Files ****************************************************************************/ +#include #include #include #include diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c index a127fe16678..9fd3d8b21ca 100644 --- a/configs/stm32butterfly2/src/stm32_mmcsd.c +++ b/configs/stm32butterfly2/src/stm32_mmcsd.c @@ -37,10 +37,12 @@ * Included Files ****************************************************************************/ +#include #include #include #include #include +#include #include #include #include @@ -96,9 +98,11 @@ static void *stm32_cd_thread(void *arg) { (void)arg; + spiinfo("INFO: Runnig card detect thread\n"); while (1) { sem_wait(&g_cdsem); + spiinfo("INFO: Card has been inserted, initializing\n"); if (g_chmediaclbk) { @@ -159,6 +163,7 @@ static int stm32_cd(int irq, FAR void *context) int stm32_spi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, FAR void *arg) { + spiinfo("INFO: Registering spi1 device\n"); g_chmediaclbk = callback; chmediaarg = arg; return OK; @@ -178,6 +183,7 @@ int stm32_mmcsd_initialize(int minor) pthread_attr_t pattr; int rv; + spiinfo("INFO: Initializing mmcsd card\n"); if ((spi = stm32_spibus_initialize(SD_SPI_PORT)) == NULL) { ferr("failed to initialize SPI port %d\n", SD_SPI_PORT); @@ -203,9 +209,10 @@ int stm32_mmcsd_initialize(int minor) #endif schparam.sched_priority = 50; - pthread_attr_setschedparam(&pattr, &schedparam); + pthread_attr_setschedparam(&pattr, &schparam); pthread_create(NULL, &pattr, stm32_cd_thread, NULL); + spiinfo("INFO: mmcsd card has been initialized successfully\n"); return OK; } diff --git a/configs/stm32butterfly2/src/stm32_spi.c b/configs/stm32butterfly2/src/stm32_spi.c index 35400e35506..316fdee2085 100644 --- a/configs/stm32butterfly2/src/stm32_spi.c +++ b/configs/stm32butterfly2/src/stm32_spi.c @@ -36,6 +36,7 @@ * Included Files ****************************************************************************/ +#include #include #include "stm32_butterfly2.h" @@ -59,6 +60,7 @@ void stm32_spidev_initialize(void) { + spiinfo("INFO: Initializing spi gpio pins\n"); stm32_configgpio(GPIO_SD_CS); stm32_configgpio(GPIO_SD_CD); } @@ -73,6 +75,7 @@ void stm32_spidev_initialize(void) void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select) { + spiinfo("INFO: Selecting spi dev: %d, state: %d\n", devid, select); if (devid == SPIDEV_MMCSD) { stm32_gpiowrite(GPIO_SD_CS, !select); @@ -88,6 +91,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) { + spiinfo("INFO: Requesting info from spi dev: %d\n", devid); if (devid == SPIDEV_MMCSD) { if (stm32_gpioread(GPIO_SD_CD) == 0) diff --git a/configs/stm32butterfly2/src/stm32_usb.c b/configs/stm32butterfly2/src/stm32_usb.c index 4556bec410f..b7055bf1d65 100644 --- a/configs/stm32butterfly2/src/stm32_usb.c +++ b/configs/stm32butterfly2/src/stm32_usb.c @@ -37,6 +37,8 @@ * Include Files ****************************************************************************/ +#include + #include "stm32_gpio.h" #include "stm32_butterfly2.h" @@ -54,6 +56,7 @@ void stm32_usb_initialize(void) { + uinfo("INFO: Initializing usb otgfs gpio pins\n"); stm32_configgpio(GPIO_OTGFS_VBUS); stm32_configgpio(GPIO_OTGFS_PWRON); } diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c index 592e3e034c2..d7c7c13e819 100644 --- a/configs/stm32butterfly2/src/stm32_usbhost.c +++ b/configs/stm32butterfly2/src/stm32_usbhost.c @@ -37,10 +37,12 @@ * Include Files ****************************************************************************/ +#include #include #include #include #include +#include #include #include #include @@ -79,6 +81,7 @@ static void* usbhost_detect(void *arg) (void)arg; struct usbhost_hubport_s *hport; + uinfo("INFO: Starting usb detect thread\n"); for (;;) { CONN_WAIT(g_usbconn, &hport); @@ -108,6 +111,7 @@ int stm32_usbhost_initialize(void) int rv; #ifdef CONFIG_USBHOST_MSC + uinfo("INFO: Initializing USB MSC class\n"); if ((rv = usbhost_msc_initialize()) < 0) { uerr("ERROR: Failed to register mass storage class: %d\n", rv); @@ -115,6 +119,7 @@ int stm32_usbhost_initialize(void) #endif #ifdef CONFIG_USBHOST_CDACM + uinfo("INFO: Initializing CDCACM usb class\n"); if ((rv = usbhost_cdacm_initialize()) < 0) { uerr("ERROR: Failed to register CDC/ACM serial class: %d\n", rv); @@ -122,6 +127,7 @@ int stm32_usbhost_initialize(void) #endif #ifdef CONFIG_USBHOST_HIDKBD + uinfo("INFO: Initializing HID Keyboard usb class\n"); if ((rv = usbhost_kbdinit()) < 0) { uerr("ERROR: Failed to register the KBD class: %d\n", rv); @@ -129,6 +135,7 @@ int stm32_usbhost_initialize(void) #endif #ifdef CONFIG_USBHOST_HIDMOUSE + uinfo("INFO: Initializing HID Mouse usb class\n"); if ((rv = usbhost_mouse_init()) < 0) { uerr("ERROR: Failed to register the mouse class: %d\n", rv); @@ -136,6 +143,7 @@ int stm32_usbhost_initialize(void) #endif #ifdef CONFIG_USBHOST_HUB + uinfo("INFO: Initializing USB HUB class\n"); if ((rv = usbhost_hub_initialize()) < 0) { uerr("ERROR: Failed to register hub class: %d\n", rv); @@ -145,8 +153,14 @@ int stm32_usbhost_initialize(void) if ((g_usbconn = stm32_otgfshost_initialize(0))) { pthread_attr_t pattr; + struct sched_param schparam; + pthread_attr_init(&pattr); pthread_attr_setstacksize(&pattr, 2048); + + schparam.sched_priority = 50; + pthread_attr_setschedparam(&pattr, &schparam); + return pthread_create(NULL, &pattr, usbhost_detect, NULL); } From b85fe9f109672a14f8cbad6ac77d4dcdc9fa1169 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 22:00:45 +0200 Subject: [PATCH 081/214] Updated configuration for board without net --- configs/stm32butterfly2/nsh/defconfig | 172 +++++++++++++++++++++++--- 1 file changed, 152 insertions(+), 20 deletions(-) diff --git a/configs/stm32butterfly2/nsh/defconfig b/configs/stm32butterfly2/nsh/defconfig index 91c9c3ccc4b..ba6490f6a03 100644 --- a/configs/stm32butterfly2/nsh/defconfig +++ b/configs/stm32butterfly2/nsh/defconfig @@ -148,6 +148,9 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +# CONFIG_USBHOST_ISOC_DISABLE is not set # # STM32 Configuration Options @@ -365,7 +368,7 @@ CONFIG_STM32_HAVE_SPI3=y # CONFIG_STM32_HAVE_SPI6 is not set # CONFIG_STM32_HAVE_SAIPLL is not set # CONFIG_STM32_HAVE_I2SPLL is not set -# CONFIG_STM32_ADC1 is not set +CONFIG_STM32_ADC1=y # CONFIG_STM32_ADC2 is not set # CONFIG_STM32_BKP is not set # CONFIG_STM32_CAN1 is not set @@ -377,11 +380,12 @@ CONFIG_STM32_HAVE_SPI3=y # CONFIG_STM32_DAC2 is not set # CONFIG_STM32_ETHMAC is not set # CONFIG_STM32_I2C1 is not set -# CONFIG_STM32_OTGFS is not set +CONFIG_STM32_OTGFS=y CONFIG_STM32_PWR=y -# CONFIG_STM32_SPI1 is not set +CONFIG_STM32_SPI1=y # CONFIG_STM32_SPI2 is not set # CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y # CONFIG_STM32_TIM1 is not set # CONFIG_STM32_TIM2 is not set # CONFIG_STM32_TIM3 is not set @@ -396,11 +400,14 @@ CONFIG_STM32_USART2=y # CONFIG_STM32_UART5 is not set # CONFIG_STM32_IWDG is not set # CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y # CONFIG_STM32_NOEXT_VECTORS is not set # # Alternate Pin Mapping # +# CONFIG_STM32_SPI1_REMAP is not set CONFIG_STM32_USART2_REMAP=y # CONFIG_STM32_JTAG_DISABLE is not set CONFIG_STM32_JTAG_FULL_ENABLE=y @@ -409,6 +416,7 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCM_PROCFS is not set # # Timer Configuration @@ -419,6 +427,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set + +# +# ADC Configuration +# CONFIG_STM32_USART=y CONFIG_STM32_SERIALDRIVER=y @@ -440,12 +452,25 @@ CONFIG_STM32_USART2_SERIALDRIVER=y # CONFIG_STM32_FLOWCONTROL_BROKEN is not set # CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +# CONFIG_STM32_MII_MCO is not set +# CONFIG_STM32_MII_EXTCLK is not set # # USB FS Host Configuration # +CONFIG_STM32_OTGFS_RXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96 +CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_DESCSIZE=128 +# CONFIG_STM32_OTGFS_SOFINTR is not set # # USB HS Host Configuration @@ -534,13 +559,20 @@ CONFIG_ARCH_BOARD="stm32butterfly2" CONFIG_ARCH_HAVE_LEDS=y CONFIG_ARCH_LEDS=y CONFIG_ARCH_HAVE_BUTTONS=y -# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_BUTTONS=y # # Board-Specific Options # # CONFIG_BOARD_CRASHDUMP is not set -# CONFIG_LIB_BOARDCTL is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -554,7 +586,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y # CONFIG_SCHED_TICKLESS is not set CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set -# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_CLOCK_MONOTONIC=y # CONFIG_JULIAN_TIME is not set CONFIG_START_YEAR=1970 CONFIG_START_MONTH=0 @@ -669,7 +701,16 @@ CONFIG_RAMDISK=y # CONFIG_PWM is not set CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_I2C is not set -# CONFIG_SPI is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_HWFEATURES=y +# CONFIG_SPI_CRCGENERATION is not set +CONFIG_SPI_CS_CONTROL=y +# CONFIG_SPI_CS_DELAY_CONTROL is not set # CONFIG_I2S is not set # @@ -678,7 +719,14 @@ CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_TIMER is not set # CONFIG_RTC is not set # CONFIG_WATCHDOG is not set -# CONFIG_ANALOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set # CONFIG_AUDIO_DEVICES is not set # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set @@ -703,10 +751,34 @@ CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set # CONFIG_NCP5623C is not set -# CONFIG_MMCSD is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set # CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set # CONFIG_PIPES is not set # CONFIG_PM is not set # CONFIG_POWER is not set @@ -764,7 +836,24 @@ CONFIG_USART2_2STOP=0 # CONFIG_USART2_DMA is not set # CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set -# CONFIG_USBHOST is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=100000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set # CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set @@ -804,18 +893,34 @@ CONFIG_SYSLOG_CONSOLE=y # CONFIG_DISABLE_MOUNTPOINT is not set # CONFIG_FS_AUTOMOUNTER is not set # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_FS_READABLE is not set -# CONFIG_FS_WRITABLE is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y # CONFIG_FS_NAMED_SEMAPHORES is not set CONFIG_FS_MQUEUE_MPATH="/var/mqueue" # CONFIG_FS_RAMMAP is not set -# CONFIG_FS_FAT is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set # CONFIG_FS_TMPFS is not set # CONFIG_FS_SMARTFS is not set # CONFIG_FS_BINFS is not set -# CONFIG_FS_PROCFS is not set +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set # CONFIG_FS_UNIONFS is not set # @@ -878,6 +983,8 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 CONFIG_LIBC_STRERROR=y CONFIG_LIBC_STRERROR_SHORT=y # CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 CONFIG_ARCH_LOWPUTC=y # CONFIG_LIBC_LOCALTIME is not set # CONFIG_TIME_EXTENDED is not set @@ -887,6 +994,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 CONFIG_ARCH_HAVE_TLS=y # CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set # # Non-standard Library Support @@ -922,21 +1030,36 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_GROUPSIZE=4 +CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=4 # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HIDKBD is not set +CONFIG_EXAMPLES_HIDKBD=y +CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 +CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 +CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" # CONFIG_EXAMPLES_IGMP is not set # CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set -# CONFIG_EXAMPLES_MOUNT is not set +CONFIG_EXAMPLES_MOUNT=y +# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set +CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 +CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 +CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 # CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set @@ -965,6 +1088,7 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WEBSERVER is not set @@ -973,6 +1097,7 @@ CONFIG_EXAMPLES_NSH=y # File System Utilities # # CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set # # GPS Utilities @@ -988,6 +1113,7 @@ CONFIG_EXAMPLES_NSH=y # # Interpreters # +# CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set # CONFIG_INTERPRETERS_PCODE is not set @@ -1051,13 +1177,14 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_HELP is not set # CONFIG_NSH_DISABLE_HEXDUMP is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set -CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_IFUPDOWN is not set # CONFIG_NSH_DISABLE_KILL is not set # CONFIG_NSH_DISABLE_LOSETUP is not set -CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LOSMART is not set # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set @@ -1080,6 +1207,8 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_WGET is not set # CONFIG_NSH_DISABLE_XD is not set CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 # # Configure Command Options @@ -1087,6 +1216,7 @@ CONFIG_NSH_MMCSDMINOR=0 CONFIG_NSH_CMDOPT_DF_H=y CONFIG_NSH_CODECS_BUFSIZE=128 CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" CONFIG_NSH_FILEIOSIZE=1024 CONFIG_NSH_STRERROR=y @@ -1102,7 +1232,9 @@ CONFIG_NSH_STRERROR=y # CONFIG_NSH_CONSOLE=y # CONFIG_NSH_ALTCONDEV is not set -# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_USBKBD is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_SWMAC is not set # CONFIG_NSH_LOGIN is not set # CONFIG_NSH_CONSOLE_LOGIN is not set @@ -1120,7 +1252,7 @@ CONFIG_NSH_CONSOLE=y # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_SYSTEM_RAMTEST=y CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y From 9b3bbc0f09528a4cc487f666c696939d14fba551 Mon Sep 17 00:00:00 2001 From: Konstantin Berezenko Date: Wed, 17 Aug 2016 13:02:36 -0700 Subject: [PATCH 082/214] Change stm32 adc dma callback to send channel number instead of index --- arch/arm/src/stm32/stm32_adc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c index 31109fd8f50..2972ebaf9a6 100644 --- a/arch/arm/src/stm32/stm32_adc.c +++ b/arch/arm/src/stm32/stm32_adc.c @@ -1657,7 +1657,7 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg) for (i = 0; i < priv->nchannels; i++) { - priv->cb->au_receive(dev, priv->current, priv->dmabuffer[priv->current]); + priv->cb->au_receive(dev, priv->chanlist[priv->current], priv->dmabuffer[priv->current]); priv->current++; if (priv->current >= priv->nchannels) { From 2315ed85cc108d93a668932bfdbfd3f633c69785 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 22:03:24 +0200 Subject: [PATCH 083/214] Add missing guard for header file --- configs/stm32butterfly2/src/stm32_butterfly2.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h index 0fa7fd5b197..20d43a06dc7 100644 --- a/configs/stm32butterfly2/src/stm32_butterfly2.h +++ b/configs/stm32butterfly2/src/stm32_butterfly2.h @@ -32,6 +32,9 @@ * POSSIBILITY OF SUCH DAMAGE. ****************************************************************************/ +#ifndef __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H 1 +#define __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H + /***************************************************************************** * Included Files ****************************************************************************/ @@ -124,3 +127,5 @@ int stm32_usbhost_initialize(void); static inline int stm32_usbhost_initialize(void) {} #endif +#endif // __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H + From 5026c192b2114011276ed5f6fe10c21b6e106465 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 22:05:12 +0200 Subject: [PATCH 084/214] Add g_ prefix for global variable --- configs/stm32butterfly2/src/stm32_mmcsd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c index 9fd3d8b21ca..79a2c748b3c 100644 --- a/configs/stm32butterfly2/src/stm32_mmcsd.c +++ b/configs/stm32butterfly2/src/stm32_mmcsd.c @@ -76,7 +76,7 @@ static spi_mediachange_t g_chmediaclbk; /* Argument for media changed callback */ -static void *chmediaarg; +static void *g_chmediaarg; /* Semafor to inform stm32_cd_thread that card was inserted or pulled out */ @@ -111,7 +111,7 @@ static void *stm32_cd_thread(void *arg) */ usleep(1 * 1000); - g_chmediaclbk(chmediaarg); + g_chmediaclbk(g_chmediaarg); } } @@ -165,7 +165,7 @@ int stm32_spi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, { spiinfo("INFO: Registering spi1 device\n"); g_chmediaclbk = callback; - chmediaarg = arg; + g_chmediaarg = arg; return OK; } From 12e97600ee1c967f541b0749e311db6aa8f9896c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 22:07:10 +0200 Subject: [PATCH 085/214] Remove unncessary FAR pointers --- configs/stm32butterfly2/src/stm32_mmcsd.c | 8 ++++---- configs/stm32butterfly2/src/stm32_spi.c | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c index 79a2c748b3c..bbb4ccc1d84 100644 --- a/configs/stm32butterfly2/src/stm32_mmcsd.c +++ b/configs/stm32butterfly2/src/stm32_mmcsd.c @@ -125,7 +125,7 @@ static void *stm32_cd_thread(void *arg) * Card detect interrupt handler. ****************************************************************************/ -static int stm32_cd(int irq, FAR void *context) +static int stm32_cd(int irq, void *context) { static const int debounce_time = 100; /* [ms] */ static uint32_t now = 0; @@ -160,8 +160,8 @@ static int stm32_cd(int irq, FAR void *context) * Registers media change callback ****************************************************************************/ -int stm32_spi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, - FAR void *arg) +int stm32_spi1register(struct spi_dev_s *dev, spi_mediachange_t callback, + void *arg) { spiinfo("INFO: Registering spi1 device\n"); g_chmediaclbk = callback; @@ -178,7 +178,7 @@ int stm32_spi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback, int stm32_mmcsd_initialize(int minor) { - FAR struct spi_dev_s *spi; + struct spi_dev_s *spi; struct sched_param schparam; pthread_attr_t pattr; int rv; diff --git a/configs/stm32butterfly2/src/stm32_spi.c b/configs/stm32butterfly2/src/stm32_spi.c index 316fdee2085..64cae0c6e05 100644 --- a/configs/stm32butterfly2/src/stm32_spi.c +++ b/configs/stm32butterfly2/src/stm32_spi.c @@ -72,8 +72,8 @@ void stm32_spidev_initialize(void) * Function asserts given devid based on select ****************************************************************************/ -void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, - bool select) +void stm32_spi1select(struct spi_dev_s *dev, enum spi_dev_e devid, + bool select) { spiinfo("INFO: Selecting spi dev: %d, state: %d\n", devid, select); if (devid == SPIDEV_MMCSD) @@ -89,7 +89,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, * Return status of devid ****************************************************************************/ -uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +uint8_t stm32_spi1status(struct spi_dev_s *dev, enum spi_dev_e devid) { spiinfo("INFO: Requesting info from spi dev: %d\n", devid); if (devid == SPIDEV_MMCSD) From ead4b6014ea2bfa4605473835d41743385c2e4a7 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 17 Aug 2016 14:07:01 -0600 Subject: [PATCH 086/214] Trivial typo fix --- TODO | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TODO b/TODO index 2123ce52604..5372b0aec50 100644 --- a/TODO +++ b/TODO @@ -219,7 +219,7 @@ o Task/Scheduler (sched/) Description: Task control information is retained in simple lists. This is completely appropriate for small embedded systems where the number of tasks, N, is relatively small. Most list - operations are O(N). This could become as issue if N gets + operations are O(N). This could become an issue if N gets very large. In that case, these simple lists should be replaced with From bd5eb5233cab2b66d0672c1b0d86a3b8b10574cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Wed, 17 Aug 2016 22:13:27 +0200 Subject: [PATCH 087/214] Added check to make sure USBDEV is not set with USBHOST --- configs/stm32butterfly2/src/stm32_butterfly2.h | 4 ++-- configs/stm32butterfly2/src/stm32_usbhost.c | 6 +++++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h index 20d43a06dc7..d1e498e8cd4 100644 --- a/configs/stm32butterfly2/src/stm32_butterfly2.h +++ b/configs/stm32butterfly2/src/stm32_butterfly2.h @@ -32,8 +32,8 @@ * POSSIBILITY OF SUCH DAMAGE. ****************************************************************************/ -#ifndef __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H 1 -#define __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H +#ifndef __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H +#define __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H 1 /***************************************************************************** * Included Files diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c index d7c7c13e819..dfb8d0c4eb3 100644 --- a/configs/stm32butterfly2/src/stm32_usbhost.c +++ b/configs/stm32butterfly2/src/stm32_usbhost.c @@ -56,7 +56,11 @@ ****************************************************************************/ #ifndef CONFIG_STM32_OTGFS -#error "CONFIG_USBHOST requires CONFIG_STM32_OTGFS to be enabled" +# error "CONFIG_USBHOST requires CONFIG_STM32_OTGFS to be enabled" +#endif + +#ifdef CONFIG_USBDEV +# error "CONFIG_USBHOST cannot be set alongside CONFIG_USBDEV" #endif /***************************************************************************** From 229a2007346b554dc4794ecdcafa4d1aaae1afba Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Wed, 17 Aug 2016 16:34:49 -0600 Subject: [PATCH 088/214] Add NULL termination to tune string and fix missing break --- drivers/audio/tone.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/audio/tone.c b/drivers/audio/tone.c index 8e401ab098d..1be4c0acc3b 100644 --- a/drivers/audio/tone.c +++ b/drivers/audio/tone.c @@ -495,6 +495,7 @@ static void next_note(FAR struct tone_upperhalf_s *upper) case 'B': g_repeat = true; + break; default: auderr("unknown symbol: %c!\n", c); @@ -863,9 +864,9 @@ static ssize_t tone_read(FAR struct file *filep, FAR char *buffer, static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer, size_t buflen) { - FAR struct inode *inode = filep->f_inode; FAR struct tone_upperhalf_s *upper = inode->i_private; + int ndx; /* We need to receive a string #RRGGBB = 7 bytes */ @@ -876,10 +877,21 @@ static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer, return -EINVAL; } + if (buflen >= MAX_TUNE_LEN) + { + /* Too big to it inside internal buffer (with extra NUL terminator) */ + + return -EINVAL; + } + /* Copy music to internal buffer */ memcpy(tune_buf, buffer, buflen); + /* Failsafe NUL terminated string */ + + tune_buf[buflen] = '\0'; + /* Let the music play */ start_tune(upper, tune_buf); From d3a5bd4ba039005227f7fa598f05756b1ab6b1ea Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Wed, 17 Aug 2016 16:41:00 -0600 Subject: [PATCH 089/214] drivers/audio/tonic.: Remove dependency on LIBM for creating a static table with frequencies notes. --- .../stm32f103-minimum/audio_tone/defconfig | 2 +- drivers/audio/tone.c | 39 +++++++++---------- 2 files changed, 20 insertions(+), 21 deletions(-) diff --git a/configs/stm32f103-minimum/audio_tone/defconfig b/configs/stm32f103-minimum/audio_tone/defconfig index adc1509d28f..4089a1842e2 100644 --- a/configs/stm32f103-minimum/audio_tone/defconfig +++ b/configs/stm32f103-minimum/audio_tone/defconfig @@ -917,7 +917,7 @@ CONFIG_STDIO_BUFFER_SIZE=64 CONFIG_STDIO_LINEBUFFER=y CONFIG_NUNGET_CHARS=2 CONFIG_LIB_HOMEDIR="/" -CONFIG_LIBM=y +# CONFIG_LIBM is not set # CONFIG_NOPRINTF_FIELDWIDTH is not set # CONFIG_LIBC_FLOATINGPOINT is not set # CONFIG_LIBC_LONG_LONG is not set diff --git a/drivers/audio/tone.c b/drivers/audio/tone.c index 1be4c0acc3b..739f9b883a1 100644 --- a/drivers/audio/tone.c +++ b/drivers/audio/tone.c @@ -54,7 +54,6 @@ #include #include #include -#include #include #include #include @@ -114,6 +113,24 @@ static char tune_buf[MAX_TUNE_LEN]; static const uint8_t g_note_tab[] = { 9, 11, 0, 2, 4, 5, 7 }; +/* Notes in Frequency */ + +static const uint16_t g_notes_freq[84] = +{ + 0x0041, 0x0045, 0x0049, 0x004D, 0x0052, 0x0057, 0x005C, + 0x0061, 0x0067, 0x006E, 0x0074, 0x007B, 0x0082, 0x008A, + 0x0092, 0x009B, 0x00A4, 0x00AE, 0x00B8, 0x00C3, 0x00CF, + 0x00DC, 0x00E9, 0x00F6, 0x0105, 0x0115, 0x0125, 0x0137, + 0x0149, 0x015D, 0x0171, 0x0187, 0x019F, 0x01B8, 0x01D2, + 0x01ED, 0x020B, 0x022A, 0x024B, 0x026E, 0x0293, 0x02BA, + 0x02E3, 0x030F, 0x033E, 0x0370, 0x03A4, 0x03DB, 0x0416, + 0x0454, 0x0496, 0x04DC, 0x0526, 0x0574, 0x05C7, 0x061F, + 0x067D, 0x06E0, 0x0748, 0x07B7, 0x082D, 0x08A9, 0x092D, + 0x09B9, 0x0A4D, 0x0AE9, 0x0B8F, 0x0C3F, 0x0CFA, 0x0DC0, + 0x0E91, 0x0F6F, 0x105A, 0x1152, 0x125A, 0x1372, 0x149A, + 0x15D3, 0x171F, 0x187F, 0x19F4, 0x1B80, 0x1D22, 0x1EDE +}; + /* Global variable used by the tone generator */ static const char *g_tune; @@ -181,23 +198,6 @@ static void oneshot_callback(FAR struct oneshot_lowerhalf_s *lower, next_note(upper); } -/**************************************************************************** - * Name: note_to_freq - * - * Description: - * This function converts a note value in the range C1 to B7 to frequency. - * - ****************************************************************************/ - -static uint16_t note_to_freq(uint8_t note) -{ - /* Compute the frequency in Hz */ - - uint16_t freq = 880.0f * expf(logf(2.0f) * ((int)note - 46) / 12.0f); - - return freq; -} - /**************************************************************************** * Name: note_duration * @@ -294,7 +294,7 @@ static void start_note(FAR struct tone_upperhalf_s *upper, uint8_t note) { FAR struct pwm_lowerhalf_s *tone = upper->devtone; - upper->tone.frequency = note_to_freq(note); + upper->tone.frequency = g_notes_freq[note - 1]; upper->tone.duty = 50; tone->ops->start(tone, &upper->tone); @@ -866,7 +866,6 @@ static ssize_t tone_write(FAR struct file *filep, FAR const char *buffer, { FAR struct inode *inode = filep->f_inode; FAR struct tone_upperhalf_s *upper = inode->i_private; - int ndx; /* We need to receive a string #RRGGBB = 7 bytes */ From cbebd9c99baa175b115b773eab39360b26712eaf Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 17 Aug 2016 17:32:53 -0600 Subject: [PATCH 090/214] Lower case hex --- drivers/audio/tone.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/audio/tone.c b/drivers/audio/tone.c index 739f9b883a1..93d5324e902 100644 --- a/drivers/audio/tone.c +++ b/drivers/audio/tone.c @@ -117,18 +117,18 @@ static const uint8_t g_note_tab[] = { 9, 11, 0, 2, 4, 5, 7 }; static const uint16_t g_notes_freq[84] = { - 0x0041, 0x0045, 0x0049, 0x004D, 0x0052, 0x0057, 0x005C, - 0x0061, 0x0067, 0x006E, 0x0074, 0x007B, 0x0082, 0x008A, - 0x0092, 0x009B, 0x00A4, 0x00AE, 0x00B8, 0x00C3, 0x00CF, - 0x00DC, 0x00E9, 0x00F6, 0x0105, 0x0115, 0x0125, 0x0137, - 0x0149, 0x015D, 0x0171, 0x0187, 0x019F, 0x01B8, 0x01D2, - 0x01ED, 0x020B, 0x022A, 0x024B, 0x026E, 0x0293, 0x02BA, - 0x02E3, 0x030F, 0x033E, 0x0370, 0x03A4, 0x03DB, 0x0416, - 0x0454, 0x0496, 0x04DC, 0x0526, 0x0574, 0x05C7, 0x061F, - 0x067D, 0x06E0, 0x0748, 0x07B7, 0x082D, 0x08A9, 0x092D, - 0x09B9, 0x0A4D, 0x0AE9, 0x0B8F, 0x0C3F, 0x0CFA, 0x0DC0, - 0x0E91, 0x0F6F, 0x105A, 0x1152, 0x125A, 0x1372, 0x149A, - 0x15D3, 0x171F, 0x187F, 0x19F4, 0x1B80, 0x1D22, 0x1EDE + 0x0041, 0x0045, 0x0049, 0x004d, 0x0052, 0x0057, 0x005c, + 0x0061, 0x0067, 0x006e, 0x0074, 0x007b, 0x0082, 0x008a, + 0x0092, 0x009b, 0x00a4, 0x00ae, 0x00b8, 0x00c3, 0x00cf, + 0x00dc, 0x00e9, 0x00f6, 0x0105, 0x0115, 0x0125, 0x0137, + 0x0149, 0x015d, 0x0171, 0x0187, 0x019f, 0x01b8, 0x01d2, + 0x01ed, 0x020b, 0x022a, 0x024b, 0x026e, 0x0293, 0x02ba, + 0x02e3, 0x030f, 0x033e, 0x0370, 0x03a4, 0x03db, 0x0416, + 0x0454, 0x0496, 0x04dc, 0x0526, 0x0574, 0x05c7, 0x061f, + 0x067d, 0x06e0, 0x0748, 0x07b7, 0x082d, 0x08a9, 0x092d, + 0x09b9, 0x0a4d, 0x0ae9, 0x0b8f, 0x0c3f, 0x0cfa, 0x0dc0, + 0x0e91, 0x0f6f, 0x105a, 0x1152, 0x125a, 0x1372, 0x149a, + 0x15d3, 0x171f, 0x187f, 0x19f4, 0x1b80, 0x1d22, 0x1ede }; /* Global variable used by the tone generator */ From d369eeec951417968ee3287b923c1d0d80d1af2c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 18 Aug 2016 07:13:04 -0600 Subject: [PATCH 091/214] Remove a misleading comment --- arch/arm/src/stm32/chip/stm32_otghs.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32_otghs.h b/arch/arm/src/stm32/chip/stm32_otghs.h index 42b44222621..95b4772a37a 100644 --- a/arch/arm/src/stm32/chip/stm32_otghs.h +++ b/arch/arm/src/stm32/chip/stm32_otghs.h @@ -59,8 +59,6 @@ #define OTGHS_PID_MDATA (3) /* Non-control */ #define OTGHS_PID_SETUP (3) /* Control */ -/* If OTGHS2 is defined (FS mode of the HS module), then remap the OTGHS base address */ - /* Register Offsets *********************************************************************************/ /* Core global control and status registers */ From 3c58e8e9b44f290471eb546dfda55a63dc807df5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 18 Aug 2016 08:11:40 -0600 Subject: [PATCH 092/214] SAMA5: Add oneshot max_delay method --- arch/arm/src/sama5/sam_oneshot.c | 26 +++++++++++ arch/arm/src/sama5/sam_oneshot.h | 21 +++++++++ arch/arm/src/sama5/sam_oneshot_lowerhalf.c | 23 +++++++--- arch/arm/src/samv7/sam_oneshot.c | 52 +++++++++++----------- 4 files changed, 90 insertions(+), 32 deletions(-) diff --git a/arch/arm/src/sama5/sam_oneshot.c b/arch/arm/src/sama5/sam_oneshot.c index d9917071e1d..b8836069823 100644 --- a/arch/arm/src/sama5/sam_oneshot.c +++ b/arch/arm/src/sama5/sam_oneshot.c @@ -222,6 +222,32 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, return OK; } +/**************************************************************************** + * Name: sam_oneshot_max_delay + * + * Description: + * Return the maximum delay supported by the one shot timer (in + * microseconds). + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * sam_oneshot_initialize(); + * usec The location in which to return the maximum delay. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec) +{ + DEBUGASSERT(oneshot != NULL && usec != NULL); + *usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch); + return OK; +} + /**************************************************************************** * Name: sam_oneshot_start * diff --git a/arch/arm/src/sama5/sam_oneshot.h b/arch/arm/src/sama5/sam_oneshot.h index cc5c6976137..15431882fc0 100644 --- a/arch/arm/src/sama5/sam_oneshot.h +++ b/arch/arm/src/sama5/sam_oneshot.h @@ -131,6 +131,27 @@ extern "C" int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, uint16_t resolution); +/**************************************************************************** + * Name: sam_oneshot_max_delay + * + * Description: + * Return the maximum delay supported by the one shot timer (in + * microseconds). + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * sam_oneshot_initialize(); + * usec The location in which to return the maximum delay. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); + /**************************************************************************** * Name: sam_oneshot_start * diff --git a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c index 4a22cc9855d..e9737ea167d 100644 --- a/arch/arm/src/sama5/sam_oneshot_lowerhalf.c +++ b/arch/arm/src/sama5/sam_oneshot_lowerhalf.c @@ -172,12 +172,23 @@ static void sam_oneshot_handler(void *arg) static int sam_max_delay(FAR struct oneshot_lowerhalf_s *lower, FAR struct timespec *ts) { - DEBUGASSERT(lower != NULL && ts != NULL); + FAR struct sam_oneshot_lowerhalf_s *priv = + (FAR struct sam_oneshot_lowerhalf_s *)lower; + uint64_t usecs; + int ret; -#warning Missing logic - ts->tv_sec = INT_MAX; - ts->tv_nsec = LONG_MAX; - return -ENOSYS; + DEBUGASSERT(priv != NULL && ts != NULL); + ret = sam_oneshot_max_delay(&priv->oneshot, &usecs); + if (ret >= 0) + { + uint64_t sec = usecs / 1000000; + usecs -= 1000000 * sec; + + ts->tv_sec = (time_t)sec; + ts->tv_nsec = (long)(usecs * 1000); + } + + return ret; } /**************************************************************************** @@ -333,4 +344,4 @@ FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, } return &priv->lh; -} \ No newline at end of file +} diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c index bc9c23b515e..9a20ec17a76 100644 --- a/arch/arm/src/samv7/sam_oneshot.c +++ b/arch/arm/src/samv7/sam_oneshot.c @@ -223,6 +223,32 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, return OK; } +/**************************************************************************** + * Name: sam_oneshot_max_delay + * + * Description: + * Return the maximum delay supported by the one shot timer (in + * microseconds). + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * sam_oneshot_initialize(); + * usec The location in which to return the maximum delay. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec) +{ + DEBUGASSERT(oneshot != NULL && usec != NULL); + *usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch); + return OK; +} + /**************************************************************************** * Name: sam_oneshot_start * @@ -491,30 +517,4 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, return OK; } -/**************************************************************************** - * Name: sam_oneshot_max_delay - * - * Description: - * Return the maximum delay supported by the one shot timer (in - * microseconds). - * - * Input Parameters: - * oneshot Caller allocated instance of the oneshot state structure. This - * structure must have been previously initialized via a call to - * sam_oneshot_initialize(); - * usec The location in which to return the maximum delay. - * - * Returned Value: - * Zero (OK) is returned on success; a negated errno value is returned - * on failure. - * - ****************************************************************************/ - -int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec) -{ - DEBUGASSERT(oneshot && usec); - *usec = (0xffffull * USEC_PER_SEC) / (uint64_t)sam_tc_divfreq(oneshot->tch); - return OK; -} - #endif /* CONFIG_SAMV7_ONESHOT */ From 3d609f858be71c3caf9e15ec0fc63252f10bac57 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Thu, 18 Aug 2016 16:16:19 +0200 Subject: [PATCH 093/214] Fix warnings in 'non implemented' functions --- configs/stm32butterfly2/src/stm32_butterfly2.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h index d1e498e8cd4..00c611ffaa7 100644 --- a/configs/stm32butterfly2/src/stm32_butterfly2.h +++ b/configs/stm32butterfly2/src/stm32_butterfly2.h @@ -84,7 +84,7 @@ void stm32_led_initialize(void); #ifdef CONFIG_STM32_SPI1 void stm32_spidev_initialize(void); #else -static inline void stm32_spidev_initialize(void); +static inline void stm32_spidev_initialize(void) {} #endif /***************************************************************************** @@ -98,7 +98,7 @@ static inline void stm32_spidev_initialize(void); #ifdef CONFIG_MMCSD int stm32_mmcsd_initialize(int minor); #else -static inline int stm32_mmcsd_initialize(int minor); +static inline int stm32_mmcsd_initialize(int minor) { (void)minor; return 0; } #endif /***************************************************************************** @@ -124,7 +124,7 @@ static inline void stm32_usb_initialize(void) {} #ifdef CONFIG_USBHOST int stm32_usbhost_initialize(void); #else -static inline int stm32_usbhost_initialize(void) {} +static inline int stm32_usbhost_initialize(void) { return 0; } #endif #endif // __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H From a3e1bdde14b5a016d3e2c83a0d93c723ca05668f Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Thu, 18 Aug 2016 08:38:49 -0600 Subject: [PATCH 094/214] STM32 SPI: Fix STM32F3XXX SPI driver to read 8-bit correctly. --- arch/arm/src/stm32/stm32_spi.c | 35 ++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index b8400c6564f..d82b6eb3cb1 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -193,6 +193,9 @@ struct stm32_spidev_s /* Helpers */ static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offset); +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) +static inline uint8_t spi_getreg8(FAR struct stm32_spidev_s *priv, uint8_t offset); +#endif static inline void spi_putreg(FAR struct stm32_spidev_s *priv, uint8_t offset, uint16_t value); #if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) @@ -536,6 +539,28 @@ static inline uint16_t spi_getreg(FAR struct stm32_spidev_s *priv, uint8_t offse return getreg16(priv->spibase + offset); } +/************************************************************************************ + * Name: spi_getreg8 + * + * Description: + * Get the contents of the SPI register at offset + * + * Input Parameters: + * priv - private SPI device structure + * offset - offset to the register of interest + * + * Returned Value: + * The contents of the 16-bit register + * + ************************************************************************************/ + +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) +static inline uint8_t spi_getreg8(FAR struct stm32_spidev_s *priv, uint8_t offset) +{ + return getreg8(priv->spibase + offset); +} +#endif + /************************************************************************************ * Name: spi_putreg * @@ -615,9 +640,15 @@ static inline uint16_t spi_readword(FAR struct stm32_spidev_s *priv) * at the receiver side, as data can be lost if it is not in line." */ - /* REVISIT */ + if (priv->nbits < 9) + { + return (uint16_t)spi_getreg8(priv, STM32_SPI_DR_OFFSET); + } + else #endif - return spi_getreg(priv, STM32_SPI_DR_OFFSET); + { + return spi_getreg(priv, STM32_SPI_DR_OFFSET); + } } /************************************************************************************ From abcb00bf7d9322657fdf018bcde33d446f85eaf5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Thu, 18 Aug 2016 18:06:05 +0200 Subject: [PATCH 095/214] Add support for otgfs device class --- configs/stm32butterfly2/nshnet/defconfig | 282 ++++---------------- configs/stm32butterfly2/src/Makefile | 4 + configs/stm32butterfly2/src/stm32_boot.c | 1 + configs/stm32butterfly2/src/stm32_leds.c | 3 +- configs/stm32butterfly2/src/stm32_mmcsd.c | 1 - configs/stm32butterfly2/src/stm32_spi.c | 1 + configs/stm32butterfly2/src/stm32_usb.c | 1 - configs/stm32butterfly2/src/stm32_usbdev.c | 78 ++++++ configs/stm32butterfly2/src/stm32_usbhost.c | 1 - 9 files changed, 133 insertions(+), 239 deletions(-) create mode 100644 configs/stm32butterfly2/src/stm32_usbdev.c diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index c1ef03b861d..80beb804577 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -148,9 +148,6 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set -# CONFIG_USBHOST_BULK_DISABLE is not set -# CONFIG_USBHOST_INT_DISABLE is not set -# CONFIG_USBHOST_ISOC_DISABLE is not set # # STM32 Configuration Options @@ -378,7 +375,7 @@ CONFIG_STM32_ADC1=y # CONFIG_STM32_DMA2 is not set # CONFIG_STM32_DAC1 is not set # CONFIG_STM32_DAC2 is not set -CONFIG_STM32_ETHMAC=y +# CONFIG_STM32_ETHMAC is not set # CONFIG_STM32_I2C1 is not set CONFIG_STM32_OTGFS=y CONFIG_STM32_PWR=y @@ -407,7 +404,6 @@ CONFIG_STM32_SPI=y # # Alternate Pin Mapping # -CONFIG_STM32_ETH_REMAP=y # CONFIG_STM32_SPI1_REMAP is not set CONFIG_STM32_USART2_REMAP=y # CONFIG_STM32_JTAG_DISABLE is not set @@ -462,27 +458,9 @@ CONFIG_STM32_USART2_SERIALDRIVER=y CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set -# -# Ethernet MAC configuration -# -CONFIG_STM32_PHYADDR=1 -# CONFIG_STM32_PHYINIT is not set -CONFIG_STM32_MII=y -# CONFIG_STM32_MII_MCO is not set -CONFIG_STM32_MII_EXTCLK=y -# CONFIG_STM32_AUTONEG is not set -CONFIG_STM32_ETHFD=y -CONFIG_STM32_ETH100MBPS=y -# CONFIG_STM32_ETH_PTP is not set - # # USB FS Host Configuration # -CONFIG_STM32_OTGFS_RXFIFO_SIZE=128 -CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96 -CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128 -CONFIG_STM32_OTGFS_DESCSIZE=128 -# CONFIG_STM32_OTGFS_SOFINTR is not set # # USB HS Host Configuration @@ -580,6 +558,7 @@ CONFIG_ARCH_BUTTONS=y CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y # CONFIG_BOARDCTL_TSCTEST is not set CONFIG_BOARDCTL_ADCTEST=y # CONFIG_BOARDCTL_PWMTEST is not set @@ -777,46 +756,6 @@ CONFIG_MMCSD_SPIMODE=0 # CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set -CONFIG_NETDEVICES=y - -# -# General Ethernet MAC Driver Options -# -# CONFIG_NETDEV_LOOPBACK is not set -# CONFIG_NETDEV_TELNET is not set -# CONFIG_NETDEV_MULTINIC is not set -# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set -# CONFIG_NETDEV_LATEINIT is not set - -# -# External Ethernet MAC Device Support -# -# CONFIG_NET_DM90x0 is not set -# CONFIG_ENC28J60 is not set -# CONFIG_ENCX24J600 is not set -# CONFIG_NET_E1000 is not set -# CONFIG_NET_SLIP is not set -# CONFIG_NET_FTMAC100 is not set -# CONFIG_NET_VNET is not set - -# -# External Ethernet PHY Device Support -# -# CONFIG_ARCH_PHY_INTERRUPT is not set -# CONFIG_ETH0_PHY_NONE is not set -# CONFIG_ETH0_PHY_AM79C874 is not set -# CONFIG_ETH0_PHY_KS8721 is not set -# CONFIG_ETH0_PHY_KSZ8041 is not set -# CONFIG_ETH0_PHY_KSZ8051 is not set -# CONFIG_ETH0_PHY_KSZ8061 is not set -# CONFIG_ETH0_PHY_KSZ8081 is not set -# CONFIG_ETH0_PHY_KSZ90x1 is not set -CONFIG_ETH0_PHY_DP83848C=y -# CONFIG_ETH0_PHY_LAN8720 is not set -# CONFIG_ETH0_PHY_LAN8740 is not set -# CONFIG_ETH0_PHY_LAN8740A is not set -# CONFIG_ETH0_PHY_LAN8742A is not set -# CONFIG_ETH0_PHY_DM9161 is not set # CONFIG_PIPES is not set # CONFIG_PM is not set # CONFIG_POWER is not set @@ -824,7 +763,7 @@ CONFIG_ETH0_PHY_DP83848C=y # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set -# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_REMOVABLE=y CONFIG_SERIAL_CONSOLE=y # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set @@ -873,26 +812,42 @@ CONFIG_USART2_2STOP=0 # CONFIG_USART2_OFLOWCONTROL is not set # CONFIG_USART2_DMA is not set # CONFIG_PSEUDOTERM is not set -# CONFIG_USBDEV is not set -CONFIG_USBHOST=y -CONFIG_USBHOST_NPREALLOC=4 -CONFIG_USBHOST_HAVE_ASYNCH=y -# CONFIG_USBHOST_ASYNCH is not set -# CONFIG_USBHOST_HUB is not set -CONFIG_USBHOST_MSC=y -# CONFIG_USBHOST_CDCACM is not set -CONFIG_USBHOST_HIDKBD=y -CONFIG_HIDKBD_POLLUSEC=100000 -CONFIG_HIDKBD_DEFPRIO=50 -CONFIG_HIDKBD_STACKSIZE=1024 -CONFIG_HIDKBD_BUFSIZE=64 -CONFIG_HIDKBD_NPOLLWAITERS=2 -# CONFIG_HIDKBD_RAWSCANCODES is not set -# CONFIG_HIDKBD_ALLSCANCODES is not set -# CONFIG_HIDKBD_NODEBOUNCE is not set -# CONFIG_USBHOST_HIDMOUSE is not set -# CONFIG_USBHOST_RTL8187 is not set -# CONFIG_USBHOST_TRACE is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=3 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=257 +CONFIG_PL2303_TXBUFSIZE=193 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="NuttX" +CONFIG_PL2303_PRODUCTSTR="PL2303 Emulation" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set # CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set @@ -913,113 +868,9 @@ CONFIG_SYSLOG_CONSOLE=y # # Networking Support # -CONFIG_ARCH_HAVE_NET=y -CONFIG_ARCH_HAVE_PHY=y -CONFIG_NET=y -# CONFIG_NET_NOINTS is not set -# CONFIG_NET_PROMISCUOUS is not set - -# -# Driver buffer configuration -# -CONFIG_NET_MULTIBUFFER=y -CONFIG_NET_ETH_MTU=590 -CONFIG_NET_ETH_TCP_RECVWNDO=536 -CONFIG_NET_GUARDSIZE=2 - -# -# Data link support -# -# CONFIG_NET_MULTILINK is not set -CONFIG_NET_ETHERNET=y -# CONFIG_NET_LOOPBACK is not set -# CONFIG_NET_TUN is not set - -# -# Network Device Operations -# -# CONFIG_NETDEV_PHY_IOCTL is not set - -# -# Internet Protocol Selection -# -CONFIG_NET_IPv4=y -# CONFIG_NET_IPv6 is not set - -# -# Socket Support -# -CONFIG_NSOCKET_DESCRIPTORS=8 -CONFIG_NET_NACTIVESOCKETS=16 -# CONFIG_NET_SOCKOPTS is not set - -# -# Raw Socket Support -# -# CONFIG_NET_PKT is not set - -# -# Unix Domain Socket Support -# -# CONFIG_NET_LOCAL is not set - -# -# TCP/IP Networking -# -CONFIG_NET_TCP=y -# CONFIG_NET_TCPURGDATA is not set -CONFIG_NET_TCP_CONNS=8 -CONFIG_NET_MAX_LISTENPORTS=4 -CONFIG_NET_TCP_READAHEAD=y -# CONFIG_NET_TCP_WRITE_BUFFERS is not set -CONFIG_NET_TCP_RECVDELAY=0 -# CONFIG_NET_TCPBACKLOG is not set -# CONFIG_NET_TCP_SPLIT is not set -# CONFIG_NET_SENDFILE is not set - -# -# UDP Networking -# -# CONFIG_NET_UDP is not set - -# -# ICMP Networking Support -# -CONFIG_NET_ICMP=y -CONFIG_NET_ICMP_PING=y - -# -# IGMPv2 Client Support -# -# CONFIG_NET_IGMP is not set - -# -# ARP Configuration -# -CONFIG_NET_ARP=y -CONFIG_NET_ARPTAB_SIZE=16 -CONFIG_NET_ARP_MAXAGE=120 -CONFIG_NET_ARP_IPIN=y -CONFIG_NET_ARP_SEND=y -CONFIG_ARP_SEND_MAXTRIES=5 -CONFIG_ARP_SEND_DELAYMSEC=20 - -# -# Network I/O Buffer Support -# -CONFIG_NET_IOB=y -CONFIG_IOB_NBUFFERS=24 -CONFIG_IOB_BUFSIZE=196 -CONFIG_IOB_NCHAINS=8 -# CONFIG_NET_ARCH_INCR32 is not set -# CONFIG_NET_ARCH_CHKSUM is not set -# CONFIG_NET_STATISTICS is not set - -# -# Routing Table Configuration -# -# CONFIG_NET_ROUTE is not set -CONFIG_NET_HOSTNAME="kurwistm" +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set # # Crypto API @@ -1064,7 +915,6 @@ CONFIG_FS_PROCFS_REGISTER=y # CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set # CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set -# CONFIG_FS_PROCFS_EXCLUDE_NET is not set # CONFIG_FS_UNIONFS is not set # @@ -1137,7 +987,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set CONFIG_ARCH_HAVE_TLS=y # CONFIG_TLS is not set -CONFIG_LIBC_NETDB=y +# CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set # @@ -1189,10 +1039,7 @@ CONFIG_EXAMPLES_BUTTONS_MAX=4 # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -CONFIG_EXAMPLES_HIDKBD=y -CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 -CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 -CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" +# CONFIG_EXAMPLES_HIDKBD is not set # CONFIG_EXAMPLES_IGMP is not set # CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_KEYPADTEST is not set @@ -1204,7 +1051,6 @@ CONFIG_EXAMPLES_MOUNT=y CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 -# CONFIG_EXAMPLES_NETTEST is not set # CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set @@ -1233,11 +1079,11 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_USBSERIAL is not set -# CONFIG_EXAMPLES_USBTERM is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +CONFIG_EXAMPLES_USBTERM=y # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_XMLRPC is not set # # File System Utilities @@ -1276,14 +1122,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set -# CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set -CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_SMTP is not set -# CONFIG_NETUTILS_TELNETD is not set -# CONFIG_NETUTILS_WEBCLIENT is not set -# CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_XMLRPC is not set # # NSH Library @@ -1311,7 +1151,6 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set -# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1344,7 +1183,6 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_MV is not set # CONFIG_NSH_DISABLE_MW is not set # CONFIG_NSH_DISABLE_PS is not set -# CONFIG_NSH_DISABLE_PING is not set # CONFIG_NSH_DISABLE_PUT is not set # CONFIG_NSH_DISABLE_PWD is not set # CONFIG_NSH_DISABLE_RM is not set @@ -1385,32 +1223,9 @@ CONFIG_NSH_STRERROR=y # Console Configuration # CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set # CONFIG_NSH_ALTCONDEV is not set -# CONFIG_NSH_USBKBD is not set CONFIG_NSH_ARCHINIT=y - -# -# Networking Configuration -# -CONFIG_NSH_NETINIT=y -CONFIG_NSH_NETINIT_THREAD=y -CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 -CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 - -# -# IP Address Configuration -# - -# -# IPv4 Addresses -# -CONFIG_NSH_IPADDR=0x0a01010a -CONFIG_NSH_DRIPADDR=0x0a010101 -CONFIG_NSH_NETMASK=0xffffff00 -CONFIG_NSH_NOMAC=y -CONFIG_NSH_SWMAC=y -CONFIG_NSH_MACADDR=0x00e0deadbeef -CONFIG_NSH_MAX_ROUNDTRIP=20 # CONFIG_NSH_LOGIN is not set # CONFIG_NSH_CONSOLE_LOGIN is not set @@ -1428,7 +1243,6 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_NETDB is not set CONFIG_SYSTEM_RAMTEST=y CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y diff --git a/configs/stm32butterfly2/src/Makefile b/configs/stm32butterfly2/src/Makefile index 35fbfcd375a..480c84a8a47 100644 --- a/configs/stm32butterfly2/src/Makefile +++ b/configs/stm32butterfly2/src/Makefile @@ -53,6 +53,10 @@ ifeq ($(CONFIG_USBHOST),y) CSRCS += stm32_usbhost.c endif +ifeq ($(CONFIG_USBDEV),y) +CSRCS += stm32_usbdev.c +endif + ifeq ($(CONFIG_MMCSD),y) CSRCS += stm32_mmcsd.c endif diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c index e77a6edffc7..923a46f4a04 100644 --- a/configs/stm32butterfly2/src/stm32_boot.c +++ b/configs/stm32butterfly2/src/stm32_boot.c @@ -92,3 +92,4 @@ int board_app_initialize(uintptr_t arg) return rv; } + diff --git a/configs/stm32butterfly2/src/stm32_leds.c b/configs/stm32butterfly2/src/stm32_leds.c index 5f4831f7912..3b3ba2a852e 100644 --- a/configs/stm32butterfly2/src/stm32_leds.c +++ b/configs/stm32butterfly2/src/stm32_leds.c @@ -1,5 +1,5 @@ /***************************************************************************** - * configs/stm32butterfly2/src/stm32_led.c + * configs/stm32butterfly2/src/stm32_leds.c * * Copyright (C) 2016 Michał Łyszczek. All rights reserved. * Author: Michał Łyszczek @@ -30,7 +30,6 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. - * ****************************************************************************/ /***************************************************************************** diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c index bbb4ccc1d84..be1ef6519d0 100644 --- a/configs/stm32butterfly2/src/stm32_mmcsd.c +++ b/configs/stm32butterfly2/src/stm32_mmcsd.c @@ -30,7 +30,6 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. - * ****************************************************************************/ /***************************************************************************** diff --git a/configs/stm32butterfly2/src/stm32_spi.c b/configs/stm32butterfly2/src/stm32_spi.c index 64cae0c6e05..63e62cfb306 100644 --- a/configs/stm32butterfly2/src/stm32_spi.c +++ b/configs/stm32butterfly2/src/stm32_spi.c @@ -102,3 +102,4 @@ uint8_t stm32_spi1status(struct spi_dev_s *dev, enum spi_dev_e devid) return 0; } + diff --git a/configs/stm32butterfly2/src/stm32_usb.c b/configs/stm32butterfly2/src/stm32_usb.c index b7055bf1d65..e4ce41c2c25 100644 --- a/configs/stm32butterfly2/src/stm32_usb.c +++ b/configs/stm32butterfly2/src/stm32_usb.c @@ -30,7 +30,6 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. - * ****************************************************************************/ /***************************************************************************** diff --git a/configs/stm32butterfly2/src/stm32_usbdev.c b/configs/stm32butterfly2/src/stm32_usbdev.c new file mode 100644 index 00000000000..c0c63182184 --- /dev/null +++ b/configs/stm32butterfly2/src/stm32_usbdev.c @@ -0,0 +1,78 @@ +/***************************************************************************** + * configs/stm32butterfly2/src/stm32_usbdev.c + * + * Copyright (C) 2016 Michał Łyszczek. All rights reserved. + * Author: Michał Łyszczek + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + ****************************************************************************/ + +/***************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include "stm32_otgfs.h" + +/***************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef CONFIG_STM32_OTGFS +# error "CONFIG_USBDEV requires CONFIG_STM32_OTGFS to be enabled" +#endif + +#ifdef CONFIG_USBHOST +# error "CONFIG_USBDEV cannot be set alongside CONFIG_USBHOST" +#endif + +/***************************************************************************** + * Public Functions + ****************************************************************************/ + +/***************************************************************************** + * Name: stm32_usbsuspend + * + * Description: + * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver + * is used. This function is called whenever the USB enters or leaves + * suspend mode. This is an oportunity for the board logic to shutdown + * clocks, power, etc. while the USB is suspended. + * + * TODO: + * - Well... implement those features like clock shutdown. + ****************************************************************************/ + +void stm32_usbsuspend(struct usbdev_s *dev, bool resume) +{ + uinfo("INFO: usb %s", resume ? "resumed" : "suspended"); +} + diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c index dfb8d0c4eb3..9d42c69919f 100644 --- a/configs/stm32butterfly2/src/stm32_usbhost.c +++ b/configs/stm32butterfly2/src/stm32_usbhost.c @@ -30,7 +30,6 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. - * ****************************************************************************/ /***************************************************************************** From c53c3b1ddc0580d60031347e4096a72071391a22 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Thu, 18 Aug 2016 18:21:48 +0200 Subject: [PATCH 096/214] Add example configs for usbhost and usbdev --- configs/stm32butterfly2/nshusbdev/Make.defs | 117 ++ configs/stm32butterfly2/nshusbdev/defconfig | 1262 ++++++++++++++++++ configs/stm32butterfly2/nshusbdev/setenv.sh | 78 ++ configs/stm32butterfly2/nshusbhost/.config | 1254 +++++++++++++++++ configs/stm32butterfly2/nshusbhost/Make.defs | 117 ++ configs/stm32butterfly2/nshusbhost/defconfig | 1262 ++++++++++++++++++ configs/stm32butterfly2/nshusbhost/setenv.sh | 78 ++ 7 files changed, 4168 insertions(+) create mode 100644 configs/stm32butterfly2/nshusbdev/Make.defs create mode 100644 configs/stm32butterfly2/nshusbdev/defconfig create mode 100755 configs/stm32butterfly2/nshusbdev/setenv.sh create mode 100644 configs/stm32butterfly2/nshusbhost/.config create mode 100644 configs/stm32butterfly2/nshusbhost/Make.defs create mode 100644 configs/stm32butterfly2/nshusbhost/defconfig create mode 100755 configs/stm32butterfly2/nshusbhost/setenv.sh diff --git a/configs/stm32butterfly2/nshusbdev/Make.defs b/configs/stm32butterfly2/nshusbdev/Make.defs new file mode 100644 index 00000000000..55c08e0406d --- /dev/null +++ b/configs/stm32butterfly2/nshusbdev/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/viewtool-stm32f107/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = dfu.ld +else + LDSCRIPT = flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32butterfly2/nshusbdev/defconfig b/configs/stm32butterfly2/nshusbdev/defconfig new file mode 100644 index 00000000000..80beb804577 --- /dev/null +++ b/configs/stm32butterfly2/nshusbdev/defconfig @@ -0,0 +1,1262 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +# CONFIG_STM32_HAVE_TIM8 is not set +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_I2C1 is not set +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCM_PROCFS is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set +# CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32butterfly2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=1970 +CONFIG_START_MONTH=0 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=100 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +CONFIG_SCHED_CPULOAD=y +# CONFIG_SCHED_CPULOAD_EXTCLK is not set +CONFIG_SCHED_CPULOAD_TIMECONSTANT=2 +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_HWFEATURES=y +# CONFIG_SPI_CRCGENERATION is not set +CONFIG_SPI_CS_CONTROL=y +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_PSEUDOTERM is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=3 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=257 +CONFIG_PL2303_TXBUFSIZE=193 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="NuttX" +CONFIG_PL2303_PRODUCTSTR="PL2303 Emulation" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +CONFIG_SYSLOG_TIMESTAMP=y +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +CONFIG_LIBC_STRERROR_SHORT=y +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# NxWidgets/NxWM +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_GROUPSIZE=4 +CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=4 +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +CONFIG_EXAMPLES_MOUNT=y +# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set +CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 +CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 +CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +CONFIG_EXAMPLES_USBTERM=y +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_MOTD=y +# CONFIG_NSH_PLATFORM_MOTD is not set +CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you" + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_VI=y +CONFIG_SYSTEM_VI_COLS=64 +CONFIG_SYSTEM_VI_ROWS=16 +CONFIG_SYSTEM_VI_DEBUGLEVEL=0 +CONFIG_SYSTEM_VI_STACKSIZE=2048 +CONFIG_SYSTEM_VI_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32butterfly2/nshusbdev/setenv.sh b/configs/stm32butterfly2/nshusbdev/setenv.sh new file mode 100755 index 00000000000..8b5188cf969 --- /dev/null +++ b/configs/stm32butterfly2/nshusbdev/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/viewtool-stm32f107/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32butterfly2/nshusbhost/.config b/configs/stm32butterfly2/nshusbhost/.config new file mode 100644 index 00000000000..edcc91167f2 --- /dev/null +++ b/configs/stm32butterfly2/nshusbhost/.config @@ -0,0 +1,1254 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +# CONFIG_USBHOST_ISOC_DISABLE is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +# CONFIG_STM32_HAVE_TIM8 is not set +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_I2C1 is not set +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCM_PROCFS is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set +# CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# +CONFIG_STM32_OTGFS_RXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96 +CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_DESCSIZE=128 +# CONFIG_STM32_OTGFS_SOFINTR is not set + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32butterfly2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=1970 +CONFIG_START_MONTH=0 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=100 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +CONFIG_SCHED_CPULOAD=y +# CONFIG_SCHED_CPULOAD_EXTCLK is not set +CONFIG_SCHED_CPULOAD_TIMECONSTANT=2 +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_HWFEATURES=y +# CONFIG_SPI_CRCGENERATION is not set +CONFIG_SPI_CS_CONTROL=y +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=100000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +CONFIG_SYSLOG_TIMESTAMP=y +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +CONFIG_LIBC_STRERROR_SHORT=y +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# NxWidgets/NxWM +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_GROUPSIZE=4 +CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=4 +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +CONFIG_EXAMPLES_HIDKBD=y +CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 +CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 +CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +CONFIG_EXAMPLES_MOUNT=y +# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set +CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 +CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 +CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_MOTD=y +# CONFIG_NSH_PLATFORM_MOTD is not set +CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you" + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_USBKBD is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_VI=y +CONFIG_SYSTEM_VI_COLS=64 +CONFIG_SYSTEM_VI_ROWS=16 +CONFIG_SYSTEM_VI_DEBUGLEVEL=0 +CONFIG_SYSTEM_VI_STACKSIZE=2048 +CONFIG_SYSTEM_VI_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32butterfly2/nshusbhost/Make.defs b/configs/stm32butterfly2/nshusbhost/Make.defs new file mode 100644 index 00000000000..55c08e0406d --- /dev/null +++ b/configs/stm32butterfly2/nshusbhost/Make.defs @@ -0,0 +1,117 @@ +############################################################################ +# configs/viewtool-stm32f107/nsh/Make.defs +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_STM32_DFU),y) + LDSCRIPT = dfu.ld +else + LDSCRIPT = flash.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32butterfly2/nshusbhost/defconfig b/configs/stm32butterfly2/nshusbhost/defconfig new file mode 100644 index 00000000000..80beb804577 --- /dev/null +++ b/configs/stm32butterfly2/nshusbhost/defconfig @@ -0,0 +1,1262 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +# CONFIG_ARCH_CHIP_STM32F103C8 is not set +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +CONFIG_ARCH_CHIP_STM32F107VC=y +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +CONFIG_STM32_CONNECTIVITYLINE=y +# CONFIG_STM32_PERFORMANCELINE is not set +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +# CONFIG_STM32_MEDIUMDENSITY is not set +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +# CONFIG_STM32_HAVE_USBDEV is not set +CONFIG_STM32_HAVE_OTGFS=y +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +# CONFIG_STM32_HAVE_TIM8 is not set +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +# CONFIG_STM32_HAVE_ADC3 is not set +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +CONFIG_STM32_HAVE_CAN2=y +CONFIG_STM32_HAVE_DAC1=y +CONFIG_STM32_HAVE_DAC2=y +# CONFIG_STM32_HAVE_RNG is not set +CONFIG_STM32_HAVE_ETHMAC=y +# CONFIG_STM32_HAVE_I2C2 is not set +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +CONFIG_STM32_ADC1=y +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CAN2 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_DAC1 is not set +# CONFIG_STM32_DAC2 is not set +# CONFIG_STM32_ETHMAC is not set +# CONFIG_STM32_I2C1 is not set +CONFIG_STM32_OTGFS=y +CONFIG_STM32_PWR=y +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +CONFIG_STM32_SYSCFG=y +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_USART1 is not set +CONFIG_STM32_USART2=y +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_ADC=y +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +CONFIG_STM32_USART2_REMAP=y +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_CCM_PROCFS is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set + +# +# ADC Configuration +# +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set +# CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_CLOUDCTRL is not set +# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set +# CONFIG_ARCH_BOARD_SHENZHOU is not set +CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y +# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32butterfly2" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_ADCTEST=y +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +CONFIG_CLOCK_MONOTONIC=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=1970 +CONFIG_START_MONTH=0 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=100 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +CONFIG_SCHED_CPULOAD=y +# CONFIG_SCHED_CPULOAD_EXTCLK is not set +CONFIG_SCHED_CPULOAD_TIMECONSTANT=2 +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=1024 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +CONFIG_RAMDISK=y +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +CONFIG_SPI_CALLBACK=y +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_HWFEATURES=y +# CONFIG_SPI_CRCGENERATION is not set +CONFIG_SPI_CS_CONTROL=y +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +CONFIG_ANALOG=y +CONFIG_ADC=y +CONFIG_ADC_FIFOSIZE=8 +# CONFIG_ADC_NO_STARTUP_CONV is not set +# CONFIG_ADC_ADS1242 is not set +# CONFIG_ADC_ADS125X is not set +# CONFIG_ADC_PGA11X is not set +# CONFIG_DAC is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +CONFIG_MMCSD=y +CONFIG_MMCSD_NSLOTS=1 +# CONFIG_MMCSD_READONLY is not set +# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +CONFIG_MMCSD_HAVECARDDETECT=y +CONFIG_MMCSD_SPI=y +CONFIG_MMCSD_SPICLOCK=20000000 +CONFIG_MMCSD_SPIMODE=0 +# CONFIG_ARCH_HAVE_SDIO is not set +# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART2_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART2 Configuration +# +CONFIG_USART2_RXBUFSIZE=256 +CONFIG_USART2_TXBUFSIZE=256 +CONFIG_USART2_BAUD=115200 +CONFIG_USART2_BITS=8 +CONFIG_USART2_PARITY=0 +CONFIG_USART2_2STOP=0 +# CONFIG_USART2_IFLOWCONTROL is not set +# CONFIG_USART2_OFLOWCONTROL is not set +# CONFIG_USART2_DMA is not set +# CONFIG_PSEUDOTERM is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +# CONFIG_USBDEV_DUALSPEED is not set +# CONFIG_USBDEV_SELFPOWERED is not set +CONFIG_USBDEV_BUSPOWERED=y +CONFIG_USBDEV_MAXPOWER=500 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +# CONFIG_USBDEV_TRACE is not set + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +CONFIG_PL2303=y +# CONFIG_PL2303_CONSOLE is not set +CONFIG_PL2303_EPINTIN=1 +CONFIG_PL2303_EPBULKOUT=2 +CONFIG_PL2303_EPBULKIN=3 +CONFIG_PL2303_EP0MAXPACKET=64 +CONFIG_PL2303_NWRREQS=4 +CONFIG_PL2303_NRDREQS=4 +CONFIG_PL2303_BULKIN_REQLEN=96 +CONFIG_PL2303_RXBUFSIZE=257 +CONFIG_PL2303_TXBUFSIZE=193 +CONFIG_PL2303_VENDORID=0x067b +CONFIG_PL2303_PRODUCTID=0x2303 +CONFIG_PL2303_VENDORSTR="NuttX" +CONFIG_PL2303_PRODUCTSTR="PL2303 Emulation" +# CONFIG_CDCACM is not set +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +CONFIG_SYSLOG_TIMESTAMP=y +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=32 +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_LIBC_STRERROR=y +CONFIG_LIBC_STRERROR_SHORT=y +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# NxWidgets/NxWM +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +CONFIG_EXAMPLES_ADC=y +CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" +CONFIG_EXAMPLES_ADC_GROUPSIZE=4 +CONFIG_EXAMPLES_ADC_SWTRIG=y +CONFIG_EXAMPLES_BUTTONS=y +CONFIG_EXAMPLES_BUTTONS_MIN=0 +CONFIG_EXAMPLES_BUTTONS_MAX=4 +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +CONFIG_EXAMPLES_MOUNT=y +# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set +CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 +CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 +CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +CONFIG_EXAMPLES_USBSERIAL=y +CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 +CONFIG_EXAMPLES_USBTERM=y +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +CONFIG_NSH_MOTD=y +# CONFIG_NSH_PLATFORM_MOTD is not set +CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you" + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 +CONFIG_NSH_MMCSDSLOTNO=0 +CONFIG_NSH_MMCSDSPIPORTNO=0 + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_STRERROR=y + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_USBCONSOLE is not set +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_VI=y +CONFIG_SYSTEM_VI_COLS=64 +CONFIG_SYSTEM_VI_ROWS=16 +CONFIG_SYSTEM_VI_DEBUGLEVEL=0 +CONFIG_SYSTEM_VI_STACKSIZE=2048 +CONFIG_SYSTEM_VI_PRIORITY=100 +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32butterfly2/nshusbhost/setenv.sh b/configs/stm32butterfly2/nshusbhost/setenv.sh new file mode 100755 index 00000000000..8b5188cf969 --- /dev/null +++ b/configs/stm32butterfly2/nshusbhost/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/viewtool-stm32f107/nsh/setenv.sh +# +# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# These are the Cygwin paths to the locations where I installed the Atollic +# toolchain under windows. You will also have to edit this if you install +# the Atollic toolchain in any other location. /usr/bin is added before +# the Atollic bin path because there is are binaries named gcc.exe and g++.exe +# at those locations as well. +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin" +#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" From cfad547b8dfcb41cff98c0f7445adfd05ba7459e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 18 Aug 2016 11:29:48 -0600 Subject: [PATCH 097/214] Changes from review of PR 118 --- configs/Kconfig | 16 +- configs/stm32butterfly2/include/board.h | 5 +- configs/stm32butterfly2/nsh/Make.defs | 4 +- configs/stm32butterfly2/nsh/setenv.sh | 4 +- configs/stm32butterfly2/nshnet/Make.defs | 4 +- configs/stm32butterfly2/nshnet/setenv.sh | 4 +- configs/stm32butterfly2/nshusbdev/Make.defs | 4 +- configs/stm32butterfly2/nshusbdev/setenv.sh | 4 +- configs/stm32butterfly2/nshusbhost/.config | 1254 ----------------- configs/stm32butterfly2/nshusbhost/Make.defs | 4 +- configs/stm32butterfly2/nshusbhost/setenv.sh | 4 +- configs/stm32butterfly2/scripts/dfu.ld | 4 +- configs/stm32butterfly2/scripts/flash.ld | 4 +- configs/stm32butterfly2/src/stm32_adc.c | 1 - configs/stm32butterfly2/src/stm32_boot.c | 1 - .../stm32butterfly2/src/stm32_butterfly2.h | 2 +- configs/stm32butterfly2/src/stm32_buttons.c | 8 +- configs/stm32butterfly2/src/stm32_leds.c | 7 +- configs/stm32butterfly2/src/stm32_mmcsd.c | 5 +- configs/stm32butterfly2/src/stm32_spi.c | 6 +- configs/stm32butterfly2/src/stm32_usb.c | 2 +- configs/stm32butterfly2/src/stm32_usbdev.c | 1 - configs/stm32butterfly2/src/stm32_usbhost.c | 7 +- 23 files changed, 55 insertions(+), 1300 deletions(-) delete mode 100644 configs/stm32butterfly2/nshusbhost/.config diff --git a/configs/Kconfig b/configs/Kconfig index 7f0bd8f48d2..bf5f3a4859c 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -937,14 +937,14 @@ config ARCH_BOARD_SPARK MCU from STMicro. config ARCH_BOARD_STM32_BUTTERFLY2 - bool "Kamami STM32Butterfly2 development board" - depends on ARCH_CHIP_STM32F107VC - select ARCH_HAVE_LEDS - select ARCH_HAVE_BUTTONS - ---help--- - A configuration for the Kamami STM32Butterfly2 development board - based on STM32F107VC micro-controler chip with optional ETH - board. + bool "Kamami STM32Butterfly2 development board" + depends on ARCH_CHIP_STM32F107VC + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + ---help--- + A configuration for the Kamami STM32Butterfly2 development board + based on STM32F107VC micro-controler chip with optional ETH + board. config ARCH_BOARD_STM32_TINY bool "STM32-Tiny board" diff --git a/configs/stm32butterfly2/include/board.h b/configs/stm32butterfly2/include/board.h index 841c1d8ca0b..05a28cb94b8 100644 --- a/configs/stm32butterfly2/include/board.h +++ b/configs/stm32butterfly2/include/board.h @@ -173,7 +173,8 @@ #undef EXTERN #if defined(__cplusplus) #define EXTERN extern "C" -extern "C" { +extern "C" +{ #else #define EXTERN extern #endif @@ -192,7 +193,7 @@ extern "C" { * initialized. ******************************************************************************/ -EXTERN void stm32_boardinitialize(void); +void stm32_boardinitialize(void); #undef EXTERN #if defined(__cplusplus) diff --git a/configs/stm32butterfly2/nsh/Make.defs b/configs/stm32butterfly2/nsh/Make.defs index 55c08e0406d..fea26bcee89 100644 --- a/configs/stm32butterfly2/nsh/Make.defs +++ b/configs/stm32butterfly2/nsh/Make.defs @@ -1,7 +1,7 @@ ############################################################################ -# configs/viewtool-stm32f107/nsh/Make.defs +# configs/stm32butterfly2/nsh/Make.defs # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/nsh/setenv.sh b/configs/stm32butterfly2/nsh/setenv.sh index 8b5188cf969..da893d41e6a 100755 --- a/configs/stm32butterfly2/nsh/setenv.sh +++ b/configs/stm32butterfly2/nsh/setenv.sh @@ -1,7 +1,7 @@ #!/bin/bash -# configs/viewtool-stm32f107/nsh/setenv.sh +# configs/stm32butterfly2/nsh/setenv.sh # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/nshnet/Make.defs b/configs/stm32butterfly2/nshnet/Make.defs index 55c08e0406d..fea26bcee89 100644 --- a/configs/stm32butterfly2/nshnet/Make.defs +++ b/configs/stm32butterfly2/nshnet/Make.defs @@ -1,7 +1,7 @@ ############################################################################ -# configs/viewtool-stm32f107/nsh/Make.defs +# configs/stm32butterfly2/nsh/Make.defs # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/nshnet/setenv.sh b/configs/stm32butterfly2/nshnet/setenv.sh index 8b5188cf969..da893d41e6a 100755 --- a/configs/stm32butterfly2/nshnet/setenv.sh +++ b/configs/stm32butterfly2/nshnet/setenv.sh @@ -1,7 +1,7 @@ #!/bin/bash -# configs/viewtool-stm32f107/nsh/setenv.sh +# configs/stm32butterfly2/nsh/setenv.sh # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/nshusbdev/Make.defs b/configs/stm32butterfly2/nshusbdev/Make.defs index 55c08e0406d..fea26bcee89 100644 --- a/configs/stm32butterfly2/nshusbdev/Make.defs +++ b/configs/stm32butterfly2/nshusbdev/Make.defs @@ -1,7 +1,7 @@ ############################################################################ -# configs/viewtool-stm32f107/nsh/Make.defs +# configs/stm32butterfly2/nsh/Make.defs # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/nshusbdev/setenv.sh b/configs/stm32butterfly2/nshusbdev/setenv.sh index 8b5188cf969..da893d41e6a 100755 --- a/configs/stm32butterfly2/nshusbdev/setenv.sh +++ b/configs/stm32butterfly2/nshusbdev/setenv.sh @@ -1,7 +1,7 @@ #!/bin/bash -# configs/viewtool-stm32f107/nsh/setenv.sh +# configs/stm32butterfly2/nsh/setenv.sh # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/nshusbhost/.config b/configs/stm32butterfly2/nshusbhost/.config deleted file mode 100644 index edcc91167f2..00000000000 --- a/configs/stm32butterfly2/nshusbhost/.config +++ /dev/null @@ -1,1254 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# Nuttx/ Configuration -# - -# -# Build Setup -# -# CONFIG_EXPERIMENTAL is not set -# CONFIG_DEFAULT_SMALL is not set -CONFIG_HOST_LINUX=y -# CONFIG_HOST_OSX is not set -# CONFIG_HOST_WINDOWS is not set -# CONFIG_HOST_OTHER is not set - -# -# Build Configuration -# -CONFIG_APPS_DIR="../apps" -CONFIG_BUILD_FLAT=y -# CONFIG_BUILD_2PASS is not set - -# -# Binary Output Formats -# -# CONFIG_RRLOAD_BINARY is not set -CONFIG_INTELHEX_BINARY=y -# CONFIG_MOTOROLA_SREC is not set -CONFIG_RAW_BINARY=y -# CONFIG_UBOOT_UIMAGE is not set - -# -# Customize Header Files -# -# CONFIG_ARCH_STDINT_H is not set -# CONFIG_ARCH_STDBOOL_H is not set -# CONFIG_ARCH_MATH_H is not set -# CONFIG_ARCH_FLOAT_H is not set -# CONFIG_ARCH_STDARG_H is not set -# CONFIG_ARCH_DEBUG_H is not set - -# -# Debug Options -# -CONFIG_DEBUG_ALERT=y -# CONFIG_DEBUG_FEATURES is not set -CONFIG_ARCH_HAVE_STACKCHECK=y -# CONFIG_STACK_COLORATION is not set -CONFIG_ARCH_HAVE_HEAPCHECK=y -# CONFIG_HEAP_COLORATION is not set -# CONFIG_DEBUG_SYMBOLS is not set -CONFIG_ARCH_HAVE_CUSTOMOPT=y -# CONFIG_DEBUG_NOOPT is not set -# CONFIG_DEBUG_CUSTOMOPT is not set -CONFIG_DEBUG_FULLOPT=y - -# -# System Type -# -CONFIG_ARCH_ARM=y -# CONFIG_ARCH_AVR is not set -# CONFIG_ARCH_HC is not set -# CONFIG_ARCH_MIPS is not set -# CONFIG_ARCH_RGMP is not set -# CONFIG_ARCH_SH is not set -# CONFIG_ARCH_SIM is not set -# CONFIG_ARCH_X86 is not set -# CONFIG_ARCH_Z16 is not set -# CONFIG_ARCH_Z80 is not set -CONFIG_ARCH="arm" - -# -# ARM Options -# -# CONFIG_ARCH_CHIP_A1X is not set -# CONFIG_ARCH_CHIP_C5471 is not set -# CONFIG_ARCH_CHIP_CALYPSO is not set -# CONFIG_ARCH_CHIP_DM320 is not set -# CONFIG_ARCH_CHIP_EFM32 is not set -# CONFIG_ARCH_CHIP_IMX1 is not set -# CONFIG_ARCH_CHIP_IMX6 is not set -# CONFIG_ARCH_CHIP_KINETIS is not set -# CONFIG_ARCH_CHIP_KL is not set -# CONFIG_ARCH_CHIP_LM is not set -# CONFIG_ARCH_CHIP_TIVA is not set -# CONFIG_ARCH_CHIP_LPC11XX is not set -# CONFIG_ARCH_CHIP_LPC17XX is not set -# CONFIG_ARCH_CHIP_LPC214X is not set -# CONFIG_ARCH_CHIP_LPC2378 is not set -# CONFIG_ARCH_CHIP_LPC31XX is not set -# CONFIG_ARCH_CHIP_LPC43XX is not set -# CONFIG_ARCH_CHIP_NUC1XX is not set -# CONFIG_ARCH_CHIP_SAMA5 is not set -# CONFIG_ARCH_CHIP_SAMD is not set -# CONFIG_ARCH_CHIP_SAML is not set -# CONFIG_ARCH_CHIP_SAM34 is not set -# CONFIG_ARCH_CHIP_SAMV7 is not set -CONFIG_ARCH_CHIP_STM32=y -# CONFIG_ARCH_CHIP_STM32F7 is not set -# CONFIG_ARCH_CHIP_STM32L4 is not set -# CONFIG_ARCH_CHIP_STR71X is not set -# CONFIG_ARCH_CHIP_TMS570 is not set -# CONFIG_ARCH_CHIP_MOXART is not set -# CONFIG_ARCH_ARM7TDMI is not set -# CONFIG_ARCH_ARM926EJS is not set -# CONFIG_ARCH_ARM920T is not set -# CONFIG_ARCH_CORTEXM0 is not set -CONFIG_ARCH_CORTEXM3=y -# CONFIG_ARCH_CORTEXM4 is not set -# CONFIG_ARCH_CORTEXM7 is not set -# CONFIG_ARCH_CORTEXA5 is not set -# CONFIG_ARCH_CORTEXA8 is not set -# CONFIG_ARCH_CORTEXA9 is not set -# CONFIG_ARCH_CORTEXR4 is not set -# CONFIG_ARCH_CORTEXR4F is not set -# CONFIG_ARCH_CORTEXR5 is not set -# CONFIG_ARCH_CORTEX5F is not set -# CONFIG_ARCH_CORTEXR7 is not set -# CONFIG_ARCH_CORTEXR7F is not set -CONFIG_ARCH_FAMILY="armv7-m" -CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y -# CONFIG_ARMV7M_USEBASEPRI is not set -CONFIG_ARCH_HAVE_CMNVECTOR=y -# CONFIG_ARMV7M_CMNVECTOR is not set -# CONFIG_ARMV7M_LAZYFPU is not set -# CONFIG_ARCH_HAVE_FPU is not set -# CONFIG_ARCH_HAVE_DPFPU is not set -# CONFIG_ARCH_HAVE_TRUSTZONE is not set -CONFIG_ARM_HAVE_MPU_UNIFIED=y -# CONFIG_ARM_MPU is not set - -# -# ARMV7M Configuration Options -# -# CONFIG_ARMV7M_HAVE_ICACHE is not set -# CONFIG_ARMV7M_HAVE_DCACHE is not set -# CONFIG_ARMV7M_HAVE_ITCM is not set -# CONFIG_ARMV7M_HAVE_DTCM is not set -# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set -CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y -# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set -# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set -# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set -# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set -CONFIG_ARMV7M_HAVE_STACKCHECK=y -# CONFIG_ARMV7M_STACKCHECK is not set -# CONFIG_ARMV7M_ITMSYSLOG is not set -# CONFIG_SERIAL_TERMIOS is not set -# CONFIG_USBHOST_BULK_DISABLE is not set -# CONFIG_USBHOST_INT_DISABLE is not set -# CONFIG_USBHOST_ISOC_DISABLE is not set - -# -# STM32 Configuration Options -# -# CONFIG_ARCH_CHIP_STM32L151C6 is not set -# CONFIG_ARCH_CHIP_STM32L151C8 is not set -# CONFIG_ARCH_CHIP_STM32L151CB is not set -# CONFIG_ARCH_CHIP_STM32L151R6 is not set -# CONFIG_ARCH_CHIP_STM32L151R8 is not set -# CONFIG_ARCH_CHIP_STM32L151RB is not set -# CONFIG_ARCH_CHIP_STM32L151V6 is not set -# CONFIG_ARCH_CHIP_STM32L151V8 is not set -# CONFIG_ARCH_CHIP_STM32L151VB is not set -# CONFIG_ARCH_CHIP_STM32L152C6 is not set -# CONFIG_ARCH_CHIP_STM32L152C8 is not set -# CONFIG_ARCH_CHIP_STM32L152CB is not set -# CONFIG_ARCH_CHIP_STM32L152R6 is not set -# CONFIG_ARCH_CHIP_STM32L152R8 is not set -# CONFIG_ARCH_CHIP_STM32L152RB is not set -# CONFIG_ARCH_CHIP_STM32L152V6 is not set -# CONFIG_ARCH_CHIP_STM32L152V8 is not set -# CONFIG_ARCH_CHIP_STM32L152VB is not set -# CONFIG_ARCH_CHIP_STM32L162ZD is not set -# CONFIG_ARCH_CHIP_STM32L162VE is not set -# CONFIG_ARCH_CHIP_STM32F100C8 is not set -# CONFIG_ARCH_CHIP_STM32F100CB is not set -# CONFIG_ARCH_CHIP_STM32F100R8 is not set -# CONFIG_ARCH_CHIP_STM32F100RB is not set -# CONFIG_ARCH_CHIP_STM32F100RC is not set -# CONFIG_ARCH_CHIP_STM32F100RD is not set -# CONFIG_ARCH_CHIP_STM32F100RE is not set -# CONFIG_ARCH_CHIP_STM32F100V8 is not set -# CONFIG_ARCH_CHIP_STM32F100VB is not set -# CONFIG_ARCH_CHIP_STM32F100VC is not set -# CONFIG_ARCH_CHIP_STM32F100VD is not set -# CONFIG_ARCH_CHIP_STM32F100VE is not set -# CONFIG_ARCH_CHIP_STM32F102CB is not set -# CONFIG_ARCH_CHIP_STM32F103T8 is not set -# CONFIG_ARCH_CHIP_STM32F103TB is not set -# CONFIG_ARCH_CHIP_STM32F103C4 is not set -# CONFIG_ARCH_CHIP_STM32F103C8 is not set -# CONFIG_ARCH_CHIP_STM32F103CB is not set -# CONFIG_ARCH_CHIP_STM32F103R8 is not set -# CONFIG_ARCH_CHIP_STM32F103RB is not set -# CONFIG_ARCH_CHIP_STM32F103RC is not set -# CONFIG_ARCH_CHIP_STM32F103RD is not set -# CONFIG_ARCH_CHIP_STM32F103RE is not set -# CONFIG_ARCH_CHIP_STM32F103RG is not set -# CONFIG_ARCH_CHIP_STM32F103V8 is not set -# CONFIG_ARCH_CHIP_STM32F103VB is not set -# CONFIG_ARCH_CHIP_STM32F103VC is not set -# CONFIG_ARCH_CHIP_STM32F103VE is not set -# CONFIG_ARCH_CHIP_STM32F103ZE is not set -# CONFIG_ARCH_CHIP_STM32F105VB is not set -# CONFIG_ARCH_CHIP_STM32F105RB is not set -CONFIG_ARCH_CHIP_STM32F107VC=y -# CONFIG_ARCH_CHIP_STM32F205RG is not set -# CONFIG_ARCH_CHIP_STM32F207IG is not set -# CONFIG_ARCH_CHIP_STM32F207ZE is not set -# CONFIG_ARCH_CHIP_STM32F302K6 is not set -# CONFIG_ARCH_CHIP_STM32F302K8 is not set -# CONFIG_ARCH_CHIP_STM32F302CB is not set -# CONFIG_ARCH_CHIP_STM32F302CC is not set -# CONFIG_ARCH_CHIP_STM32F302RB is not set -# CONFIG_ARCH_CHIP_STM32F302RC is not set -# CONFIG_ARCH_CHIP_STM32F302VB is not set -# CONFIG_ARCH_CHIP_STM32F302VC is not set -# CONFIG_ARCH_CHIP_STM32F303K6 is not set -# CONFIG_ARCH_CHIP_STM32F303K8 is not set -# CONFIG_ARCH_CHIP_STM32F303C6 is not set -# CONFIG_ARCH_CHIP_STM32F303C8 is not set -# CONFIG_ARCH_CHIP_STM32F303CB is not set -# CONFIG_ARCH_CHIP_STM32F303CC is not set -# CONFIG_ARCH_CHIP_STM32F303RB is not set -# CONFIG_ARCH_CHIP_STM32F303RC is not set -# CONFIG_ARCH_CHIP_STM32F303RD is not set -# CONFIG_ARCH_CHIP_STM32F303RE is not set -# CONFIG_ARCH_CHIP_STM32F303VB is not set -# CONFIG_ARCH_CHIP_STM32F303VC is not set -# CONFIG_ARCH_CHIP_STM32F372C8 is not set -# CONFIG_ARCH_CHIP_STM32F372R8 is not set -# CONFIG_ARCH_CHIP_STM32F372V8 is not set -# CONFIG_ARCH_CHIP_STM32F372CB is not set -# CONFIG_ARCH_CHIP_STM32F372RB is not set -# CONFIG_ARCH_CHIP_STM32F372VB is not set -# CONFIG_ARCH_CHIP_STM32F372CC is not set -# CONFIG_ARCH_CHIP_STM32F372RC is not set -# CONFIG_ARCH_CHIP_STM32F372VC is not set -# CONFIG_ARCH_CHIP_STM32F373C8 is not set -# CONFIG_ARCH_CHIP_STM32F373R8 is not set -# CONFIG_ARCH_CHIP_STM32F373V8 is not set -# CONFIG_ARCH_CHIP_STM32F373CB is not set -# CONFIG_ARCH_CHIP_STM32F373RB is not set -# CONFIG_ARCH_CHIP_STM32F373VB is not set -# CONFIG_ARCH_CHIP_STM32F373CC is not set -# CONFIG_ARCH_CHIP_STM32F373RC is not set -# CONFIG_ARCH_CHIP_STM32F373VC is not set -# CONFIG_ARCH_CHIP_STM32F401RE is not set -# CONFIG_ARCH_CHIP_STM32F411RE is not set -# CONFIG_ARCH_CHIP_STM32F411VE is not set -# CONFIG_ARCH_CHIP_STM32F405RG is not set -# CONFIG_ARCH_CHIP_STM32F405VG is not set -# CONFIG_ARCH_CHIP_STM32F405ZG is not set -# CONFIG_ARCH_CHIP_STM32F407VE is not set -# CONFIG_ARCH_CHIP_STM32F407VG is not set -# CONFIG_ARCH_CHIP_STM32F407ZE is not set -# CONFIG_ARCH_CHIP_STM32F407ZG is not set -# CONFIG_ARCH_CHIP_STM32F407IE is not set -# CONFIG_ARCH_CHIP_STM32F407IG is not set -# CONFIG_ARCH_CHIP_STM32F427V is not set -# CONFIG_ARCH_CHIP_STM32F427Z is not set -# CONFIG_ARCH_CHIP_STM32F427I is not set -# CONFIG_ARCH_CHIP_STM32F429V is not set -# CONFIG_ARCH_CHIP_STM32F429Z is not set -# CONFIG_ARCH_CHIP_STM32F429I is not set -# CONFIG_ARCH_CHIP_STM32F429B is not set -# CONFIG_ARCH_CHIP_STM32F429N is not set -# CONFIG_ARCH_CHIP_STM32F446M is not set -# CONFIG_ARCH_CHIP_STM32F446R is not set -# CONFIG_ARCH_CHIP_STM32F446V is not set -# CONFIG_ARCH_CHIP_STM32F446Z is not set -# CONFIG_ARCH_CHIP_STM32F469A is not set -# CONFIG_ARCH_CHIP_STM32F469I is not set -# CONFIG_ARCH_CHIP_STM32F469B is not set -# CONFIG_ARCH_CHIP_STM32F469N is not set -CONFIG_STM32_FLASH_CONFIG_DEFAULT=y -# CONFIG_STM32_FLASH_CONFIG_4 is not set -# CONFIG_STM32_FLASH_CONFIG_6 is not set -# CONFIG_STM32_FLASH_CONFIG_8 is not set -# CONFIG_STM32_FLASH_CONFIG_B is not set -# CONFIG_STM32_FLASH_CONFIG_C is not set -# CONFIG_STM32_FLASH_CONFIG_D is not set -# CONFIG_STM32_FLASH_CONFIG_E is not set -# CONFIG_STM32_FLASH_CONFIG_F is not set -# CONFIG_STM32_FLASH_CONFIG_G is not set -# CONFIG_STM32_FLASH_CONFIG_I is not set -# CONFIG_STM32_STM32L15XX is not set -# CONFIG_STM32_ENERGYLITE is not set -CONFIG_STM32_STM32F10XX=y -# CONFIG_STM32_VALUELINE is not set -CONFIG_STM32_CONNECTIVITYLINE=y -# CONFIG_STM32_PERFORMANCELINE is not set -# CONFIG_STM32_USBACCESSLINE is not set -# CONFIG_STM32_HIGHDENSITY is not set -# CONFIG_STM32_MEDIUMDENSITY is not set -# CONFIG_STM32_LOWDENSITY is not set -# CONFIG_STM32_STM32F20XX is not set -# CONFIG_STM32_STM32F205 is not set -# CONFIG_STM32_STM32F207 is not set -# CONFIG_STM32_STM32F30XX is not set -# CONFIG_STM32_STM32F302 is not set -# CONFIG_STM32_STM32F303 is not set -# CONFIG_STM32_STM32F37XX is not set -# CONFIG_STM32_STM32F40XX is not set -# CONFIG_STM32_STM32F401 is not set -# CONFIG_STM32_STM32F411 is not set -# CONFIG_STM32_STM32F405 is not set -# CONFIG_STM32_STM32F407 is not set -# CONFIG_STM32_STM32F427 is not set -# CONFIG_STM32_STM32F429 is not set -# CONFIG_STM32_STM32F446 is not set -# CONFIG_STM32_STM32F469 is not set -# CONFIG_STM32_DFU is not set - -# -# STM32 Peripheral Support -# -# CONFIG_STM32_HAVE_CCM is not set -# CONFIG_STM32_HAVE_USBDEV is not set -CONFIG_STM32_HAVE_OTGFS=y -# CONFIG_STM32_HAVE_FSMC is not set -# CONFIG_STM32_HAVE_LTDC is not set -CONFIG_STM32_HAVE_USART3=y -CONFIG_STM32_HAVE_UART4=y -CONFIG_STM32_HAVE_UART5=y -# CONFIG_STM32_HAVE_USART6 is not set -# CONFIG_STM32_HAVE_UART7 is not set -# CONFIG_STM32_HAVE_UART8 is not set -CONFIG_STM32_HAVE_TIM1=y -# CONFIG_STM32_HAVE_TIM2 is not set -CONFIG_STM32_HAVE_TIM3=y -CONFIG_STM32_HAVE_TIM4=y -CONFIG_STM32_HAVE_TIM5=y -CONFIG_STM32_HAVE_TIM6=y -CONFIG_STM32_HAVE_TIM7=y -# CONFIG_STM32_HAVE_TIM8 is not set -# CONFIG_STM32_HAVE_TIM9 is not set -# CONFIG_STM32_HAVE_TIM10 is not set -# CONFIG_STM32_HAVE_TIM11 is not set -# CONFIG_STM32_HAVE_TIM12 is not set -# CONFIG_STM32_HAVE_TIM13 is not set -# CONFIG_STM32_HAVE_TIM14 is not set -# CONFIG_STM32_HAVE_TIM15 is not set -# CONFIG_STM32_HAVE_TIM16 is not set -# CONFIG_STM32_HAVE_TIM17 is not set -CONFIG_STM32_HAVE_ADC2=y -# CONFIG_STM32_HAVE_ADC3 is not set -# CONFIG_STM32_HAVE_ADC4 is not set -# CONFIG_STM32_HAVE_ADC1_DMA is not set -# CONFIG_STM32_HAVE_ADC2_DMA is not set -# CONFIG_STM32_HAVE_ADC3_DMA is not set -# CONFIG_STM32_HAVE_ADC4_DMA is not set -CONFIG_STM32_HAVE_CAN1=y -CONFIG_STM32_HAVE_CAN2=y -CONFIG_STM32_HAVE_DAC1=y -CONFIG_STM32_HAVE_DAC2=y -# CONFIG_STM32_HAVE_RNG is not set -CONFIG_STM32_HAVE_ETHMAC=y -# CONFIG_STM32_HAVE_I2C2 is not set -# CONFIG_STM32_HAVE_I2C3 is not set -CONFIG_STM32_HAVE_SPI2=y -CONFIG_STM32_HAVE_SPI3=y -# CONFIG_STM32_HAVE_SPI4 is not set -# CONFIG_STM32_HAVE_SPI5 is not set -# CONFIG_STM32_HAVE_SPI6 is not set -# CONFIG_STM32_HAVE_SAIPLL is not set -# CONFIG_STM32_HAVE_I2SPLL is not set -CONFIG_STM32_ADC1=y -# CONFIG_STM32_ADC2 is not set -# CONFIG_STM32_BKP is not set -# CONFIG_STM32_CAN1 is not set -# CONFIG_STM32_CAN2 is not set -# CONFIG_STM32_CRC is not set -# CONFIG_STM32_DMA1 is not set -# CONFIG_STM32_DMA2 is not set -# CONFIG_STM32_DAC1 is not set -# CONFIG_STM32_DAC2 is not set -# CONFIG_STM32_ETHMAC is not set -# CONFIG_STM32_I2C1 is not set -CONFIG_STM32_OTGFS=y -CONFIG_STM32_PWR=y -CONFIG_STM32_SPI1=y -# CONFIG_STM32_SPI2 is not set -# CONFIG_STM32_SPI3 is not set -CONFIG_STM32_SYSCFG=y -# CONFIG_STM32_TIM1 is not set -# CONFIG_STM32_TIM2 is not set -# CONFIG_STM32_TIM3 is not set -# CONFIG_STM32_TIM4 is not set -# CONFIG_STM32_TIM5 is not set -# CONFIG_STM32_TIM6 is not set -# CONFIG_STM32_TIM7 is not set -# CONFIG_STM32_USART1 is not set -CONFIG_STM32_USART2=y -# CONFIG_STM32_USART3 is not set -# CONFIG_STM32_UART4 is not set -# CONFIG_STM32_UART5 is not set -# CONFIG_STM32_IWDG is not set -# CONFIG_STM32_WWDG is not set -CONFIG_STM32_ADC=y -CONFIG_STM32_SPI=y -# CONFIG_STM32_NOEXT_VECTORS is not set - -# -# Alternate Pin Mapping -# -# CONFIG_STM32_SPI1_REMAP is not set -CONFIG_STM32_USART2_REMAP=y -# CONFIG_STM32_JTAG_DISABLE is not set -CONFIG_STM32_JTAG_FULL_ENABLE=y -# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set -# CONFIG_STM32_JTAG_SW_ENABLE is not set -# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set -# CONFIG_STM32_FORCEPOWER is not set -# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set -# CONFIG_STM32_CCM_PROCFS is not set - -# -# Timer Configuration -# -# CONFIG_STM32_ONESHOT is not set -# CONFIG_STM32_FREERUN is not set -# CONFIG_STM32_TIM1_CAP is not set -# CONFIG_STM32_TIM3_CAP is not set -# CONFIG_STM32_TIM4_CAP is not set -# CONFIG_STM32_TIM5_CAP is not set - -# -# ADC Configuration -# -CONFIG_STM32_USART=y -CONFIG_STM32_SERIALDRIVER=y - -# -# U[S]ART Configuration -# - -# -# U[S]ART Device Configuration -# -CONFIG_STM32_USART2_SERIALDRIVER=y -# CONFIG_STM32_USART2_1WIREDRIVER is not set -# CONFIG_USART2_RS485 is not set - -# -# Serial Driver Configuration -# -# CONFIG_SERIAL_DISABLE_REORDERING is not set -# CONFIG_STM32_FLOWCONTROL_BROKEN is not set -# CONFIG_STM32_USART_BREAKS is not set -# CONFIG_STM32_USART_SINGLEWIRE is not set - -# -# SPI Configuration -# -# CONFIG_STM32_SPI_INTERRUPTS is not set -# CONFIG_STM32_SPI_DMA is not set -CONFIG_STM32_HAVE_RTC_COUNTER=y -# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set - -# -# USB FS Host Configuration -# -CONFIG_STM32_OTGFS_RXFIFO_SIZE=128 -CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96 -CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128 -CONFIG_STM32_OTGFS_DESCSIZE=128 -# CONFIG_STM32_OTGFS_SOFINTR is not set - -# -# USB HS Host Configuration -# - -# -# USB Host Debug Configuration -# - -# -# USB Device Configuration -# - -# -# Architecture Options -# -# CONFIG_ARCH_NOINTC is not set -# CONFIG_ARCH_VECNOTIRQ is not set -# CONFIG_ARCH_DMA is not set -CONFIG_ARCH_HAVE_IRQPRIO=y -# CONFIG_ARCH_L2CACHE is not set -# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set -# CONFIG_ARCH_HAVE_ADDRENV is not set -# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set -# CONFIG_ARCH_HAVE_MULTICPU is not set -CONFIG_ARCH_HAVE_VFORK=y -# CONFIG_ARCH_HAVE_MMU is not set -CONFIG_ARCH_HAVE_MPU=y -# CONFIG_ARCH_NAND_HWECC is not set -# CONFIG_ARCH_HAVE_EXTCLK is not set -# CONFIG_ARCH_HAVE_POWEROFF is not set -CONFIG_ARCH_HAVE_RESET=y -# CONFIG_ARCH_USE_MPU is not set -# CONFIG_ARCH_IRQPRIO is not set -CONFIG_ARCH_STACKDUMP=y -# CONFIG_ENDIAN_BIG is not set -# CONFIG_ARCH_IDLE_CUSTOM is not set -# CONFIG_ARCH_HAVE_RAMFUNCS is not set -CONFIG_ARCH_HAVE_RAMVECTORS=y -# CONFIG_ARCH_RAMVECTORS is not set - -# -# Board Settings -# -CONFIG_BOARD_LOOPSPERMSEC=5483 -# CONFIG_ARCH_CALIBRATION is not set - -# -# Interrupt options -# -CONFIG_ARCH_HAVE_INTERRUPTSTACK=y -CONFIG_ARCH_INTERRUPTSTACK=0 -CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y -# CONFIG_ARCH_HIPRI_INTERRUPT is not set - -# -# Boot options -# -# CONFIG_BOOT_RUNFROMEXTSRAM is not set -CONFIG_BOOT_RUNFROMFLASH=y -# CONFIG_BOOT_RUNFROMISRAM is not set -# CONFIG_BOOT_RUNFROMSDRAM is not set -# CONFIG_BOOT_COPYTORAM is not set - -# -# Boot Memory Configuration -# -CONFIG_RAM_START=0x20000000 -CONFIG_RAM_SIZE=65536 -# CONFIG_ARCH_HAVE_SDRAM is not set - -# -# Board Selection -# -# CONFIG_ARCH_BOARD_CLOUDCTRL is not set -# CONFIG_ARCH_BOARD_OLIMEX_STM32P107 is not set -# CONFIG_ARCH_BOARD_SHENZHOU is not set -CONFIG_ARCH_BOARD_STM32_BUTTERFLY2=y -# CONFIG_ARCH_BOARD_VIEWTOOL_STM32F107 is not set -# CONFIG_ARCH_BOARD_CUSTOM is not set -CONFIG_ARCH_BOARD="stm32butterfly2" - -# -# Common Board Options -# -CONFIG_ARCH_HAVE_LEDS=y -CONFIG_ARCH_LEDS=y -CONFIG_ARCH_HAVE_BUTTONS=y -CONFIG_ARCH_BUTTONS=y - -# -# Board-Specific Options -# -# CONFIG_BOARD_CRASHDUMP is not set -CONFIG_LIB_BOARDCTL=y -# CONFIG_BOARDCTL_RESET is not set -# CONFIG_BOARDCTL_UNIQUEID is not set -# CONFIG_BOARDCTL_TSCTEST is not set -CONFIG_BOARDCTL_ADCTEST=y -# CONFIG_BOARDCTL_PWMTEST is not set -# CONFIG_BOARDCTL_GRAPHICS is not set -# CONFIG_BOARDCTL_IOCTL is not set - -# -# RTOS Features -# -# CONFIG_DISABLE_OS_API is not set - -# -# Clocks and Timers -# -CONFIG_ARCH_HAVE_TICKLESS=y -# CONFIG_SCHED_TICKLESS is not set -CONFIG_USEC_PER_TICK=10000 -# CONFIG_SYSTEM_TIME64 is not set -CONFIG_CLOCK_MONOTONIC=y -# CONFIG_JULIAN_TIME is not set -CONFIG_START_YEAR=1970 -CONFIG_START_MONTH=0 -CONFIG_START_DAY=1 -CONFIG_MAX_WDOGPARMS=2 -CONFIG_PREALLOC_WDOGS=8 -CONFIG_WDOG_INTRESERVE=1 -CONFIG_PREALLOC_TIMERS=4 - -# -# Tasks and Scheduling -# -# CONFIG_INIT_NONE is not set -CONFIG_INIT_ENTRYPOINT=y -# CONFIG_INIT_FILEPATH is not set -CONFIG_USER_ENTRYPOINT="nsh_main" -CONFIG_RR_INTERVAL=100 -# CONFIG_SCHED_SPORADIC is not set -CONFIG_TASK_NAME_SIZE=31 -CONFIG_MAX_TASKS=16 -# CONFIG_SCHED_HAVE_PARENT is not set -# CONFIG_SCHED_WAITPID is not set - -# -# Pthread Options -# -# CONFIG_MUTEX_TYPES is not set -CONFIG_NPTHREAD_KEYS=4 - -# -# Performance Monitoring -# -CONFIG_SCHED_CPULOAD=y -# CONFIG_SCHED_CPULOAD_EXTCLK is not set -CONFIG_SCHED_CPULOAD_TIMECONSTANT=2 -# CONFIG_SCHED_INSTRUMENTATION is not set - -# -# Files and I/O -# -CONFIG_DEV_CONSOLE=y -# CONFIG_FDCLONE_DISABLE is not set -# CONFIG_FDCLONE_STDIO is not set -CONFIG_SDCLONE_DISABLE=y -CONFIG_NFILE_DESCRIPTORS=8 -CONFIG_NFILE_STREAMS=8 -CONFIG_NAME_MAX=32 -# CONFIG_PRIORITY_INHERITANCE is not set - -# -# RTOS hooks -# -# CONFIG_BOARD_INITIALIZE is not set -# CONFIG_SCHED_STARTHOOK is not set -# CONFIG_SCHED_ATEXIT is not set -# CONFIG_SCHED_ONEXIT is not set -# CONFIG_SIG_EVTHREAD is not set - -# -# Signal Numbers -# -CONFIG_SIG_SIGUSR1=1 -CONFIG_SIG_SIGUSR2=2 -CONFIG_SIG_SIGALARM=3 -CONFIG_SIG_SIGCONDTIMEDOUT=16 -CONFIG_SIG_SIGWORK=17 - -# -# POSIX Message Queue Options -# -CONFIG_PREALLOC_MQ_MSGS=4 -CONFIG_MQ_MAXMSGSIZE=32 -# CONFIG_MODULE is not set - -# -# Work queue support -# -CONFIG_SCHED_WORKQUEUE=y -CONFIG_SCHED_HPWORK=y -CONFIG_SCHED_HPWORKPRIORITY=192 -CONFIG_SCHED_HPWORKPERIOD=50000 -CONFIG_SCHED_HPWORKSTACKSIZE=1024 -# CONFIG_SCHED_LPWORK is not set - -# -# Stack and heap information -# -CONFIG_IDLETHREAD_STACKSIZE=1024 -CONFIG_USERMAIN_STACKSIZE=2048 -CONFIG_PTHREAD_STACK_MIN=256 -CONFIG_PTHREAD_STACK_DEFAULT=2048 -# CONFIG_LIB_SYSCALL is not set - -# -# Device Drivers -# -# CONFIG_DISABLE_POLL is not set -CONFIG_DEV_NULL=y -# CONFIG_DEV_ZERO is not set -# CONFIG_DEV_URANDOM is not set -# CONFIG_DEV_LOOP is not set - -# -# Buffering -# -# CONFIG_DRVR_WRITEBUFFER is not set -# CONFIG_DRVR_READAHEAD is not set -CONFIG_RAMDISK=y -# CONFIG_CAN is not set -# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set -# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set -# CONFIG_PWM is not set -CONFIG_ARCH_HAVE_I2CRESET=y -# CONFIG_I2C is not set -CONFIG_SPI=y -# CONFIG_SPI_SLAVE is not set -CONFIG_SPI_EXCHANGE=y -# CONFIG_SPI_CMDDATA is not set -CONFIG_SPI_CALLBACK=y -# CONFIG_SPI_BITBANG is not set -CONFIG_SPI_HWFEATURES=y -# CONFIG_SPI_CRCGENERATION is not set -CONFIG_SPI_CS_CONTROL=y -# CONFIG_SPI_CS_DELAY_CONTROL is not set -# CONFIG_I2S is not set - -# -# Timer Driver Support -# -# CONFIG_TIMER is not set -# CONFIG_RTC is not set -# CONFIG_WATCHDOG is not set -CONFIG_ANALOG=y -CONFIG_ADC=y -CONFIG_ADC_FIFOSIZE=8 -# CONFIG_ADC_NO_STARTUP_CONV is not set -# CONFIG_ADC_ADS1242 is not set -# CONFIG_ADC_ADS125X is not set -# CONFIG_ADC_PGA11X is not set -# CONFIG_DAC is not set -# CONFIG_AUDIO_DEVICES is not set -# CONFIG_VIDEO_DEVICES is not set -# CONFIG_BCH is not set -# CONFIG_INPUT is not set - -# -# IO Expander/GPIO Support -# -# CONFIG_IOEXPANDER is not set -# CONFIG_DEV_GPIO is not set - -# -# LCD Driver Support -# -# CONFIG_LCD is not set -# CONFIG_SLCD is not set - -# -# LED Support -# -# CONFIG_USERLED is not set -# CONFIG_RGBLED is not set -# CONFIG_PCA9635PW is not set -# CONFIG_NCP5623C is not set -CONFIG_MMCSD=y -CONFIG_MMCSD_NSLOTS=1 -# CONFIG_MMCSD_READONLY is not set -# CONFIG_MMCSD_MULTIBLOCK_DISABLE is not set -# CONFIG_MMCSD_MMCSUPPORT is not set -CONFIG_MMCSD_HAVECARDDETECT=y -CONFIG_MMCSD_SPI=y -CONFIG_MMCSD_SPICLOCK=20000000 -CONFIG_MMCSD_SPIMODE=0 -# CONFIG_ARCH_HAVE_SDIO is not set -# CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set -# CONFIG_MODEM is not set -# CONFIG_MTD is not set -# CONFIG_EEPROM is not set -# CONFIG_PIPES is not set -# CONFIG_PM is not set -# CONFIG_POWER is not set -# CONFIG_SENSORS is not set -# CONFIG_SERCOMM_CONSOLE is not set -CONFIG_SERIAL=y -# CONFIG_DEV_LOWCONSOLE is not set -# CONFIG_SERIAL_REMOVABLE is not set -CONFIG_SERIAL_CONSOLE=y -# CONFIG_16550_UART is not set -# CONFIG_UART_SERIALDRIVER is not set -# CONFIG_UART0_SERIALDRIVER is not set -# CONFIG_UART1_SERIALDRIVER is not set -# CONFIG_UART2_SERIALDRIVER is not set -# CONFIG_UART3_SERIALDRIVER is not set -# CONFIG_UART4_SERIALDRIVER is not set -# CONFIG_UART5_SERIALDRIVER is not set -# CONFIG_UART6_SERIALDRIVER is not set -# CONFIG_UART7_SERIALDRIVER is not set -# CONFIG_UART8_SERIALDRIVER is not set -# CONFIG_SCI0_SERIALDRIVER is not set -# CONFIG_SCI1_SERIALDRIVER is not set -# CONFIG_USART0_SERIALDRIVER is not set -# CONFIG_USART1_SERIALDRIVER is not set -CONFIG_USART2_SERIALDRIVER=y -# CONFIG_USART3_SERIALDRIVER is not set -# CONFIG_USART4_SERIALDRIVER is not set -# CONFIG_USART5_SERIALDRIVER is not set -# CONFIG_USART6_SERIALDRIVER is not set -# CONFIG_USART7_SERIALDRIVER is not set -# CONFIG_USART8_SERIALDRIVER is not set -# CONFIG_OTHER_UART_SERIALDRIVER is not set -CONFIG_MCU_SERIAL=y -CONFIG_STANDARD_SERIAL=y -CONFIG_SERIAL_NPOLLWAITERS=2 -# CONFIG_SERIAL_IFLOWCONTROL is not set -# CONFIG_SERIAL_OFLOWCONTROL is not set -# CONFIG_SERIAL_DMA is not set -CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y -CONFIG_USART2_SERIAL_CONSOLE=y -# CONFIG_OTHER_SERIAL_CONSOLE is not set -# CONFIG_NO_SERIAL_CONSOLE is not set - -# -# USART2 Configuration -# -CONFIG_USART2_RXBUFSIZE=256 -CONFIG_USART2_TXBUFSIZE=256 -CONFIG_USART2_BAUD=115200 -CONFIG_USART2_BITS=8 -CONFIG_USART2_PARITY=0 -CONFIG_USART2_2STOP=0 -# CONFIG_USART2_IFLOWCONTROL is not set -# CONFIG_USART2_OFLOWCONTROL is not set -# CONFIG_USART2_DMA is not set -# CONFIG_PSEUDOTERM is not set -# CONFIG_USBDEV is not set -CONFIG_USBHOST=y -CONFIG_USBHOST_NPREALLOC=4 -CONFIG_USBHOST_HAVE_ASYNCH=y -# CONFIG_USBHOST_ASYNCH is not set -# CONFIG_USBHOST_HUB is not set -CONFIG_USBHOST_MSC=y -# CONFIG_USBHOST_CDCACM is not set -CONFIG_USBHOST_HIDKBD=y -CONFIG_HIDKBD_POLLUSEC=100000 -CONFIG_HIDKBD_DEFPRIO=50 -CONFIG_HIDKBD_STACKSIZE=1024 -CONFIG_HIDKBD_BUFSIZE=64 -CONFIG_HIDKBD_NPOLLWAITERS=2 -# CONFIG_HIDKBD_RAWSCANCODES is not set -# CONFIG_HIDKBD_ALLSCANCODES is not set -# CONFIG_HIDKBD_NODEBOUNCE is not set -# CONFIG_USBHOST_HIDMOUSE is not set -# CONFIG_USBHOST_TRACE is not set -# CONFIG_HAVE_USBTRACE is not set -# CONFIG_DRIVERS_WIRELESS is not set - -# -# System Logging -# -# CONFIG_ARCH_SYSLOG is not set -# CONFIG_RAMLOG is not set -# CONFIG_SYSLOG_INTBUFFER is not set -CONFIG_SYSLOG_TIMESTAMP=y -CONFIG_SYSLOG_SERIAL_CONSOLE=y -# CONFIG_SYSLOG_CHAR is not set -CONFIG_SYSLOG_CONSOLE=y -# CONFIG_SYSLOG_NONE is not set -# CONFIG_SYSLOG_FILE is not set -# CONFIG_SYSLOG_CHARDEV is not set - -# -# Networking Support -# -# CONFIG_ARCH_HAVE_NET is not set -# CONFIG_ARCH_HAVE_PHY is not set -# CONFIG_NET is not set - -# -# Crypto API -# -# CONFIG_CRYPTO is not set - -# -# File Systems -# - -# -# File system configuration -# -# CONFIG_DISABLE_MOUNTPOINT is not set -# CONFIG_FS_AUTOMOUNTER is not set -# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -CONFIG_FS_READABLE=y -CONFIG_FS_WRITABLE=y -# CONFIG_FS_NAMED_SEMAPHORES is not set -CONFIG_FS_MQUEUE_MPATH="/var/mqueue" -# CONFIG_FS_RAMMAP is not set -CONFIG_FS_FAT=y -CONFIG_FAT_LCNAMES=y -CONFIG_FAT_LFN=y -CONFIG_FAT_MAXFNAME=32 -# CONFIG_FS_FATTIME is not set -# CONFIG_FAT_FORCE_INDIRECT is not set -# CONFIG_FAT_DMAMEMORY is not set -# CONFIG_FAT_DIRECT_RETRY is not set -# CONFIG_FS_NXFFS is not set -# CONFIG_FS_ROMFS is not set -# CONFIG_FS_TMPFS is not set -# CONFIG_FS_SMARTFS is not set -# CONFIG_FS_BINFS is not set -CONFIG_FS_PROCFS=y -CONFIG_FS_PROCFS_REGISTER=y - -# -# Exclude individual procfs entries -# -# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set -# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set -# CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set -# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set -# CONFIG_FS_UNIONFS is not set - -# -# Graphics Support -# -# CONFIG_NX is not set - -# -# Memory Management -# -# CONFIG_MM_SMALL is not set -CONFIG_MM_REGIONS=1 -# CONFIG_ARCH_HAVE_HEAP2 is not set -# CONFIG_GRAN is not set - -# -# Audio Support -# -# CONFIG_AUDIO is not set - -# -# Wireless Support -# - -# -# Binary Loader -# -# CONFIG_BINFMT_DISABLE is not set -# CONFIG_BINFMT_EXEPATH is not set -# CONFIG_NXFLAT is not set -# CONFIG_ELF is not set -CONFIG_BUILTIN=y -# CONFIG_PIC is not set -# CONFIG_SYMTAB_ORDEREDBYNAME is not set - -# -# Library Routines -# - -# -# Standard C Library Options -# -CONFIG_STDIO_BUFFER_SIZE=64 -CONFIG_STDIO_LINEBUFFER=y -CONFIG_NUNGET_CHARS=2 -CONFIG_LIB_HOMEDIR="/" -# CONFIG_LIBM is not set -# CONFIG_NOPRINTF_FIELDWIDTH is not set -# CONFIG_LIBC_FLOATINGPOINT is not set -CONFIG_LIBC_LONG_LONG=y -# CONFIG_LIBC_IOCTL_VARIADIC is not set -CONFIG_LIB_RAND_ORDER=1 -# CONFIG_EOL_IS_CR is not set -# CONFIG_EOL_IS_LF is not set -# CONFIG_EOL_IS_BOTH_CRLF is not set -CONFIG_EOL_IS_EITHER_CRLF=y -# CONFIG_LIBC_EXECFUNCS is not set -CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 -CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 -CONFIG_LIBC_STRERROR=y -CONFIG_LIBC_STRERROR_SHORT=y -# CONFIG_LIBC_PERROR_STDOUT is not set -CONFIG_LIBC_TMPDIR="/tmp" -CONFIG_LIBC_MAX_TMPFILE=32 -CONFIG_ARCH_LOWPUTC=y -# CONFIG_LIBC_LOCALTIME is not set -# CONFIG_TIME_EXTENDED is not set -CONFIG_LIB_SENDFILE_BUFSIZE=512 -# CONFIG_ARCH_ROMGETC is not set -# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set -CONFIG_ARCH_HAVE_TLS=y -# CONFIG_TLS is not set -# CONFIG_LIBC_NETDB is not set -# CONFIG_NETDB_HOSTFILE is not set - -# -# Non-standard Library Support -# -# CONFIG_LIB_CRC64_FAST is not set -# CONFIG_LIB_KBDCODEC is not set -# CONFIG_LIB_SLCDCODEC is not set -# CONFIG_LIB_HEX2BIN is not set - -# -# Basic CXX Support -# -# CONFIG_C99_BOOL8 is not set -# CONFIG_HAVE_CXX is not set - -# -# Application Configuration -# - -# -# NxWidgets/NxWM -# - -# -# Built-In Applications -# -CONFIG_BUILTIN_PROXY_STACKSIZE=1024 - -# -# CAN Utilities -# - -# -# Examples -# -CONFIG_EXAMPLES_ADC=y -CONFIG_EXAMPLES_ADC_DEVPATH="/dev/adc0" -CONFIG_EXAMPLES_ADC_GROUPSIZE=4 -CONFIG_EXAMPLES_ADC_SWTRIG=y -CONFIG_EXAMPLES_BUTTONS=y -CONFIG_EXAMPLES_BUTTONS_MIN=0 -CONFIG_EXAMPLES_BUTTONS_MAX=4 -# CONFIG_EXAMPLES_CHAT is not set -# CONFIG_EXAMPLES_CONFIGDATA is not set -# CONFIG_EXAMPLES_DHCPD is not set -# CONFIG_EXAMPLES_ELF is not set -# CONFIG_EXAMPLES_FSTEST is not set -# CONFIG_EXAMPLES_FTPC is not set -# CONFIG_EXAMPLES_FTPD is not set -# CONFIG_EXAMPLES_HELLO is not set -CONFIG_EXAMPLES_HIDKBD=y -CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 -CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 -CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" -# CONFIG_EXAMPLES_IGMP is not set -# CONFIG_EXAMPLES_JSON is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set -# CONFIG_EXAMPLES_MEDIA is not set -# CONFIG_EXAMPLES_MM is not set -# CONFIG_EXAMPLES_MODBUS is not set -CONFIG_EXAMPLES_MOUNT=y -# CONFIG_EXAMPLES_MOUNT_BLOCKDEVICE is not set -CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 -CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 -CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 -# CONFIG_EXAMPLES_NRF24L01TERM is not set -CONFIG_EXAMPLES_NSH=y -# CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXFFS is not set -# CONFIG_EXAMPLES_NXHELLO is not set -# CONFIG_EXAMPLES_NXIMAGE is not set -# CONFIG_EXAMPLES_NXLINES is not set -# CONFIG_EXAMPLES_NXTERM is not set -# CONFIG_EXAMPLES_NXTEXT is not set -# CONFIG_EXAMPLES_OSTEST is not set -# CONFIG_EXAMPLES_PCA9635 is not set -# CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_PPPD is not set -# CONFIG_EXAMPLES_RGBLED is not set -# CONFIG_EXAMPLES_RGMP is not set -# CONFIG_EXAMPLES_SENDMAIL is not set -# CONFIG_EXAMPLES_SERIALBLASTER is not set -# CONFIG_EXAMPLES_SERIALRX is not set -# CONFIG_EXAMPLES_SERLOOP is not set -# CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART is not set -# CONFIG_EXAMPLES_SMART_TEST is not set -# CONFIG_EXAMPLES_SMP is not set -# CONFIG_EXAMPLES_TCPECHO is not set -# CONFIG_EXAMPLES_TELNETD is not set -# CONFIG_EXAMPLES_TIFF is not set -# CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_USBSERIAL is not set -# CONFIG_EXAMPLES_USBTERM is not set -# CONFIG_EXAMPLES_WATCHDOG is not set -# CONFIG_EXAMPLES_WEBSERVER is not set - -# -# File System Utilities -# -# CONFIG_FSUTILS_INIFILE is not set -# CONFIG_FSUTILS_PASSWD is not set - -# -# GPS Utilities -# -# CONFIG_GPSUTILS_MINMEA_LIB is not set - -# -# Graphics Support -# -# CONFIG_TIFF is not set -# CONFIG_GRAPHICS_TRAVELER is not set - -# -# Interpreters -# -# CONFIG_INTERPRETERS_BAS is not set -# CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_MICROPYTHON is not set -# CONFIG_INTERPRETERS_PCODE is not set - -# -# FreeModBus -# -# CONFIG_MODBUS is not set - -# -# Network Utilities -# -# CONFIG_NETUTILS_CHAT is not set -# CONFIG_NETUTILS_CODECS is not set -# CONFIG_NETUTILS_ESP8266 is not set -# CONFIG_NETUTILS_FTPC is not set -# CONFIG_NETUTILS_JSON is not set -# CONFIG_NETUTILS_SMTP is not set - -# -# NSH Library -# -CONFIG_NSH_LIBRARY=y -CONFIG_NSH_MOTD=y -# CONFIG_NSH_PLATFORM_MOTD is not set -CONFIG_NSH_MOTD_STRING="stm32butterfly2 welcoms you" - -# -# Command Line Configuration -# -CONFIG_NSH_READLINE=y -# CONFIG_NSH_CLE is not set -CONFIG_NSH_LINELEN=80 -# CONFIG_NSH_DISABLE_SEMICOLON is not set -# CONFIG_NSH_CMDPARMS is not set -CONFIG_NSH_MAXARGUMENTS=6 -# CONFIG_NSH_ARGCAT is not set -CONFIG_NSH_NESTDEPTH=3 -# CONFIG_NSH_DISABLEBG is not set -CONFIG_NSH_BUILTIN_APPS=y - -# -# Disable Individual commands -# -# CONFIG_NSH_DISABLE_ADDROUTE is not set -# CONFIG_NSH_DISABLE_BASENAME is not set -# CONFIG_NSH_DISABLE_CAT is not set -# CONFIG_NSH_DISABLE_CD is not set -# CONFIG_NSH_DISABLE_CP is not set -# CONFIG_NSH_DISABLE_CMP is not set -# CONFIG_NSH_DISABLE_DATE is not set -# CONFIG_NSH_DISABLE_DD is not set -# CONFIG_NSH_DISABLE_DF is not set -# CONFIG_NSH_DISABLE_DELROUTE is not set -# CONFIG_NSH_DISABLE_DIRNAME is not set -# CONFIG_NSH_DISABLE_ECHO is not set -# CONFIG_NSH_DISABLE_EXEC is not set -# CONFIG_NSH_DISABLE_EXIT is not set -# CONFIG_NSH_DISABLE_FREE is not set -# CONFIG_NSH_DISABLE_GET is not set -# CONFIG_NSH_DISABLE_HELP is not set -# CONFIG_NSH_DISABLE_HEXDUMP is not set -# CONFIG_NSH_DISABLE_IFCONFIG is not set -# CONFIG_NSH_DISABLE_IFUPDOWN is not set -# CONFIG_NSH_DISABLE_KILL is not set -# CONFIG_NSH_DISABLE_LOSETUP is not set -# CONFIG_NSH_DISABLE_LOSMART is not set -# CONFIG_NSH_DISABLE_LS is not set -# CONFIG_NSH_DISABLE_MB is not set -# CONFIG_NSH_DISABLE_MKDIR is not set -# CONFIG_NSH_DISABLE_MKFATFS is not set -# CONFIG_NSH_DISABLE_MKRD is not set -# CONFIG_NSH_DISABLE_MH is not set -# CONFIG_NSH_DISABLE_MOUNT is not set -# CONFIG_NSH_DISABLE_MV is not set -# CONFIG_NSH_DISABLE_MW is not set -# CONFIG_NSH_DISABLE_PS is not set -# CONFIG_NSH_DISABLE_PUT is not set -# CONFIG_NSH_DISABLE_PWD is not set -# CONFIG_NSH_DISABLE_RM is not set -# CONFIG_NSH_DISABLE_RMDIR is not set -# CONFIG_NSH_DISABLE_SET is not set -# CONFIG_NSH_DISABLE_SH is not set -# CONFIG_NSH_DISABLE_SLEEP is not set -# CONFIG_NSH_DISABLE_TIME is not set -# CONFIG_NSH_DISABLE_TEST is not set -# CONFIG_NSH_DISABLE_UMOUNT is not set -# CONFIG_NSH_DISABLE_UNAME is not set -# CONFIG_NSH_DISABLE_UNSET is not set -# CONFIG_NSH_DISABLE_USLEEP is not set -# CONFIG_NSH_DISABLE_WGET is not set -# CONFIG_NSH_DISABLE_XD is not set -CONFIG_NSH_MMCSDMINOR=0 -CONFIG_NSH_MMCSDSLOTNO=0 -CONFIG_NSH_MMCSDSPIPORTNO=0 - -# -# Configure Command Options -# -CONFIG_NSH_CMDOPT_DF_H=y -CONFIG_NSH_CODECS_BUFSIZE=128 -CONFIG_NSH_CMDOPT_HEXDUMP=y -CONFIG_NSH_PROC_MOUNTPOINT="/proc" -CONFIG_NSH_FILEIOSIZE=1024 -CONFIG_NSH_STRERROR=y - -# -# Scripting Support -# -# CONFIG_NSH_DISABLESCRIPT is not set -# CONFIG_NSH_DISABLE_ITEF is not set -# CONFIG_NSH_DISABLE_LOOPS is not set - -# -# Console Configuration -# -CONFIG_NSH_CONSOLE=y -# CONFIG_NSH_ALTCONDEV is not set -# CONFIG_NSH_USBKBD is not set -CONFIG_NSH_ARCHINIT=y -# CONFIG_NSH_LOGIN is not set -# CONFIG_NSH_CONSOLE_LOGIN is not set - -# -# Platform-specific Support -# -# CONFIG_PLATFORM_CONFIGDATA is not set - -# -# System Libraries and NSH Add-Ons -# -# CONFIG_SYSTEM_CLE is not set -# CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_FREE is not set -# CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_HEXED is not set -# CONFIG_SYSTEM_INSTALL is not set -CONFIG_SYSTEM_RAMTEST=y -CONFIG_READLINE_HAVE_EXTMATCH=y -CONFIG_SYSTEM_READLINE=y -CONFIG_READLINE_ECHO=y -CONFIG_READLINE_TABCOMPLETION=y -CONFIG_READLINE_MAX_BUILTINS=64 -CONFIG_READLINE_MAX_EXTCMDS=64 -# CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_UBLOXMODEM is not set -CONFIG_SYSTEM_VI=y -CONFIG_SYSTEM_VI_COLS=64 -CONFIG_SYSTEM_VI_ROWS=16 -CONFIG_SYSTEM_VI_DEBUGLEVEL=0 -CONFIG_SYSTEM_VI_STACKSIZE=2048 -CONFIG_SYSTEM_VI_PRIORITY=100 -# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32butterfly2/nshusbhost/Make.defs b/configs/stm32butterfly2/nshusbhost/Make.defs index 55c08e0406d..fea26bcee89 100644 --- a/configs/stm32butterfly2/nshusbhost/Make.defs +++ b/configs/stm32butterfly2/nshusbhost/Make.defs @@ -1,7 +1,7 @@ ############################################################################ -# configs/viewtool-stm32f107/nsh/Make.defs +# configs/stm32butterfly2/nsh/Make.defs # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/nshusbhost/setenv.sh b/configs/stm32butterfly2/nshusbhost/setenv.sh index 8b5188cf969..da893d41e6a 100755 --- a/configs/stm32butterfly2/nshusbhost/setenv.sh +++ b/configs/stm32butterfly2/nshusbhost/setenv.sh @@ -1,7 +1,7 @@ #!/bin/bash -# configs/viewtool-stm32f107/nsh/setenv.sh +# configs/stm32butterfly2/nsh/setenv.sh # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. +# Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/scripts/dfu.ld b/configs/stm32butterfly2/scripts/dfu.ld index 2658216b1be..b4a2d833183 100644 --- a/configs/stm32butterfly2/scripts/dfu.ld +++ b/configs/stm32butterfly2/scripts/dfu.ld @@ -1,7 +1,7 @@ /**************************************************************************** - * configs/viewtool-stm32f107/scripts/dfu.ld + * configs/stm32butterfly2/scripts/dfu.ld * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/scripts/flash.ld b/configs/stm32butterfly2/scripts/flash.ld index 8b6d9332abd..1050b3501f9 100644 --- a/configs/stm32butterfly2/scripts/flash.ld +++ b/configs/stm32butterfly2/scripts/flash.ld @@ -1,7 +1,7 @@ /**************************************************************************** - * configs/viewtool-stm32f107/scripts/flash.ld + * configs/stm32butterfly2/scripts/flash.ld * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/configs/stm32butterfly2/src/stm32_adc.c b/configs/stm32butterfly2/src/stm32_adc.c index bb5eab419e8..b75a4f01f27 100644 --- a/configs/stm32butterfly2/src/stm32_adc.c +++ b/configs/stm32butterfly2/src/stm32_adc.c @@ -83,4 +83,3 @@ int board_adc_setup(void) ainfo("INFO: ADC12_IN10 initialized succesfully\n"); return OK; } - diff --git a/configs/stm32butterfly2/src/stm32_boot.c b/configs/stm32butterfly2/src/stm32_boot.c index 923a46f4a04..e77a6edffc7 100644 --- a/configs/stm32butterfly2/src/stm32_boot.c +++ b/configs/stm32butterfly2/src/stm32_boot.c @@ -92,4 +92,3 @@ int board_app_initialize(uintptr_t arg) return rv; } - diff --git a/configs/stm32butterfly2/src/stm32_butterfly2.h b/configs/stm32butterfly2/src/stm32_butterfly2.h index 00c611ffaa7..d291a426a39 100644 --- a/configs/stm32butterfly2/src/stm32_butterfly2.h +++ b/configs/stm32butterfly2/src/stm32_butterfly2.h @@ -127,5 +127,5 @@ int stm32_usbhost_initialize(void); static inline int stm32_usbhost_initialize(void) { return 0; } #endif -#endif // __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H +#endif /* __CONFIGS_STM32_BUTTERFLY2_SRC_STM32_BUTTERFLY2_H */ diff --git a/configs/stm32butterfly2/src/stm32_buttons.c b/configs/stm32butterfly2/src/stm32_buttons.c index e09e477d78e..85e7a0751c4 100644 --- a/configs/stm32butterfly2/src/stm32_buttons.c +++ b/configs/stm32butterfly2/src/stm32_buttons.c @@ -59,8 +59,10 @@ * Private Declarations ****************************************************************************/ -static const uint32_t buttons[NUM_BUTTONS] = { - GPIO_JOY_O, GPIO_JOY_U, GPIO_JOY_D, GPIO_JOY_R, GPIO_JOY_L }; +static const uint32_t buttons[NUM_BUTTONS] = +{ + GPIO_JOY_O, GPIO_JOY_U, GPIO_JOY_D, GPIO_JOY_R, GPIO_JOY_L +}; /***************************************************************************** * Public Functions @@ -76,6 +78,7 @@ static const uint32_t buttons[NUM_BUTTONS] = { void board_button_initialize(void) { int i; + for (i = 0; i != NUM_BUTTONS; ++i) { stm32_configgpio(buttons[i]); @@ -104,4 +107,3 @@ uint8_t board_buttons(void) return rv; } - diff --git a/configs/stm32butterfly2/src/stm32_leds.c b/configs/stm32butterfly2/src/stm32_leds.c index 3b3ba2a852e..dae6352fa7b 100644 --- a/configs/stm32butterfly2/src/stm32_leds.c +++ b/configs/stm32butterfly2/src/stm32_leds.c @@ -62,6 +62,7 @@ ****************************************************************************/ /* Identifies led state */ + enum led_state { LED_ON = false, @@ -231,13 +232,16 @@ void board_userled_initialize(void) void board_userled(int led, bool ledon) { + unsigned int ledbit; + #ifndef CONFIG_ARCH_LEDS if (led == BOARD_LED4) { return; } #endif - unsigned int ledbit = 1 << led; + + ledbit = 1 << led; led_state(ledon, ledbit); } @@ -261,4 +265,3 @@ void board_userled_all(uint8_t ledset) led_state(led_OFF, ~ledset); #endif } - diff --git a/configs/stm32butterfly2/src/stm32_mmcsd.c b/configs/stm32butterfly2/src/stm32_mmcsd.c index be1ef6519d0..696ad7d0c56 100644 --- a/configs/stm32butterfly2/src/stm32_mmcsd.c +++ b/configs/stm32butterfly2/src/stm32_mmcsd.c @@ -135,8 +135,8 @@ static int stm32_cd(int irq, void *context) now = tp.tv_sec * 1000 + tp.tv_nsec / 1000000; /* When inserting card, card detect plate might bounce causing this - * interrupt to be called many time on single card insert/deinsert. Thus we - * are allowing only one interrupt every 100ms. + * interrupt to be called many time on single card insert/deinsert. Thus + * we are allowing only one interrupt every 100ms. */ if (now - debounce_time > prev) @@ -214,4 +214,3 @@ int stm32_mmcsd_initialize(int minor) spiinfo("INFO: mmcsd card has been initialized successfully\n"); return OK; } - diff --git a/configs/stm32butterfly2/src/stm32_spi.c b/configs/stm32butterfly2/src/stm32_spi.c index 63e62cfb306..fa2fd2e7628 100644 --- a/configs/stm32butterfly2/src/stm32_spi.c +++ b/configs/stm32butterfly2/src/stm32_spi.c @@ -61,6 +61,7 @@ void stm32_spidev_initialize(void) { spiinfo("INFO: Initializing spi gpio pins\n"); + stm32_configgpio(GPIO_SD_CS); stm32_configgpio(GPIO_SD_CD); } @@ -76,6 +77,7 @@ void stm32_spi1select(struct spi_dev_s *dev, enum spi_dev_e devid, bool select) { spiinfo("INFO: Selecting spi dev: %d, state: %d\n", devid, select); + if (devid == SPIDEV_MMCSD) { stm32_gpiowrite(GPIO_SD_CS, !select); @@ -92,6 +94,7 @@ void stm32_spi1select(struct spi_dev_s *dev, enum spi_dev_e devid, uint8_t stm32_spi1status(struct spi_dev_s *dev, enum spi_dev_e devid) { spiinfo("INFO: Requesting info from spi dev: %d\n", devid); + if (devid == SPIDEV_MMCSD) { if (stm32_gpioread(GPIO_SD_CD) == 0) @@ -100,6 +103,5 @@ uint8_t stm32_spi1status(struct spi_dev_s *dev, enum spi_dev_e devid) } } - return 0; + return 0; } - diff --git a/configs/stm32butterfly2/src/stm32_usb.c b/configs/stm32butterfly2/src/stm32_usb.c index e4ce41c2c25..fa84e88e32b 100644 --- a/configs/stm32butterfly2/src/stm32_usb.c +++ b/configs/stm32butterfly2/src/stm32_usb.c @@ -56,7 +56,7 @@ void stm32_usb_initialize(void) { uinfo("INFO: Initializing usb otgfs gpio pins\n"); + stm32_configgpio(GPIO_OTGFS_VBUS); stm32_configgpio(GPIO_OTGFS_PWRON); } - diff --git a/configs/stm32butterfly2/src/stm32_usbdev.c b/configs/stm32butterfly2/src/stm32_usbdev.c index c0c63182184..a538222ca03 100644 --- a/configs/stm32butterfly2/src/stm32_usbdev.c +++ b/configs/stm32butterfly2/src/stm32_usbdev.c @@ -75,4 +75,3 @@ void stm32_usbsuspend(struct usbdev_s *dev, bool resume) { uinfo("INFO: usb %s", resume ? "resumed" : "suspended"); } - diff --git a/configs/stm32butterfly2/src/stm32_usbhost.c b/configs/stm32butterfly2/src/stm32_usbhost.c index 9d42c69919f..2f44425eead 100644 --- a/configs/stm32butterfly2/src/stm32_usbhost.c +++ b/configs/stm32butterfly2/src/stm32_usbhost.c @@ -85,6 +85,7 @@ static void* usbhost_detect(void *arg) struct usbhost_hubport_s *hport; uinfo("INFO: Starting usb detect thread\n"); + for (;;) { CONN_WAIT(g_usbconn, &hport); @@ -115,6 +116,7 @@ int stm32_usbhost_initialize(void) #ifdef CONFIG_USBHOST_MSC uinfo("INFO: Initializing USB MSC class\n"); + if ((rv = usbhost_msc_initialize()) < 0) { uerr("ERROR: Failed to register mass storage class: %d\n", rv); @@ -123,6 +125,7 @@ int stm32_usbhost_initialize(void) #ifdef CONFIG_USBHOST_CDACM uinfo("INFO: Initializing CDCACM usb class\n"); + if ((rv = usbhost_cdacm_initialize()) < 0) { uerr("ERROR: Failed to register CDC/ACM serial class: %d\n", rv); @@ -131,6 +134,7 @@ int stm32_usbhost_initialize(void) #ifdef CONFIG_USBHOST_HIDKBD uinfo("INFO: Initializing HID Keyboard usb class\n"); + if ((rv = usbhost_kbdinit()) < 0) { uerr("ERROR: Failed to register the KBD class: %d\n", rv); @@ -139,6 +143,7 @@ int stm32_usbhost_initialize(void) #ifdef CONFIG_USBHOST_HIDMOUSE uinfo("INFO: Initializing HID Mouse usb class\n"); + if ((rv = usbhost_mouse_init()) < 0) { uerr("ERROR: Failed to register the mouse class: %d\n", rv); @@ -147,6 +152,7 @@ int stm32_usbhost_initialize(void) #ifdef CONFIG_USBHOST_HUB uinfo("INFO: Initializing USB HUB class\n"); + if ((rv = usbhost_hub_initialize()) < 0) { uerr("ERROR: Failed to register hub class: %d\n", rv); @@ -192,4 +198,3 @@ void stm32_usbhost_vbusdrive(int iface, bool enable) { stm32_gpiowrite(GPIO_OTGFS_PWRON, enable); } - From c4958587cc306d8c7efc3f79ba2e43760f8af3e7 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 18 Aug 2016 11:34:38 -0600 Subject: [PATCH 098/214] CONFIG_APPS_DIR should be commented out in all defconfig files --- configs/stm32butterfly2/nsh/defconfig | 2 +- configs/stm32butterfly2/nshnet/defconfig | 2 +- configs/stm32butterfly2/nshusbdev/defconfig | 2 +- configs/stm32butterfly2/nshusbhost/defconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/configs/stm32butterfly2/nsh/defconfig b/configs/stm32butterfly2/nsh/defconfig index ba6490f6a03..c45cf46a3cb 100644 --- a/configs/stm32butterfly2/nsh/defconfig +++ b/configs/stm32butterfly2/nsh/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -CONFIG_APPS_DIR="../apps" +# CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index 80beb804577..c9353da661e 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -CONFIG_APPS_DIR="../apps" +# CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set diff --git a/configs/stm32butterfly2/nshusbdev/defconfig b/configs/stm32butterfly2/nshusbdev/defconfig index 80beb804577..c9353da661e 100644 --- a/configs/stm32butterfly2/nshusbdev/defconfig +++ b/configs/stm32butterfly2/nshusbdev/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -CONFIG_APPS_DIR="../apps" +# CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set diff --git a/configs/stm32butterfly2/nshusbhost/defconfig b/configs/stm32butterfly2/nshusbhost/defconfig index 80beb804577..c9353da661e 100644 --- a/configs/stm32butterfly2/nshusbhost/defconfig +++ b/configs/stm32butterfly2/nshusbhost/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -CONFIG_APPS_DIR="../apps" +# CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set From ee700512cd09174f73caa4eeff4072feb52fd3bd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Thu, 18 Aug 2016 20:10:18 +0200 Subject: [PATCH 099/214] Fix wrong config for stm32butterfly2/nshusbhost --- configs/stm32butterfly2/nshusbhost/defconfig | 78 +++++++++----------- 1 file changed, 35 insertions(+), 43 deletions(-) diff --git a/configs/stm32butterfly2/nshusbhost/defconfig b/configs/stm32butterfly2/nshusbhost/defconfig index c9353da661e..bbaf4d92bde 100644 --- a/configs/stm32butterfly2/nshusbhost/defconfig +++ b/configs/stm32butterfly2/nshusbhost/defconfig @@ -148,6 +148,9 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USBHOST_BULK_DISABLE is not set +# CONFIG_USBHOST_INT_DISABLE is not set +# CONFIG_USBHOST_ISOC_DISABLE is not set # # STM32 Configuration Options @@ -461,6 +464,11 @@ CONFIG_STM32_HAVE_RTC_COUNTER=y # # USB FS Host Configuration # +CONFIG_STM32_OTGFS_RXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96 +CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128 +CONFIG_STM32_OTGFS_DESCSIZE=128 +# CONFIG_STM32_OTGFS_SOFINTR is not set # # USB HS Host Configuration @@ -558,7 +566,6 @@ CONFIG_ARCH_BUTTONS=y CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set -CONFIG_BOARDCTL_USBDEVCTRL=y # CONFIG_BOARDCTL_TSCTEST is not set CONFIG_BOARDCTL_ADCTEST=y # CONFIG_BOARDCTL_PWMTEST is not set @@ -763,7 +770,7 @@ CONFIG_MMCSD_SPIMODE=0 # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set -CONFIG_SERIAL_REMOVABLE=y +# CONFIG_SERIAL_REMOVABLE is not set CONFIG_SERIAL_CONSOLE=y # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set @@ -812,42 +819,25 @@ CONFIG_USART2_2STOP=0 # CONFIG_USART2_OFLOWCONTROL is not set # CONFIG_USART2_DMA is not set # CONFIG_PSEUDOTERM is not set -CONFIG_USBDEV=y - -# -# USB Device Controller Driver Options -# -# CONFIG_USBDEV_ISOCHRONOUS is not set -# CONFIG_USBDEV_DUALSPEED is not set -# CONFIG_USBDEV_SELFPOWERED is not set -CONFIG_USBDEV_BUSPOWERED=y -CONFIG_USBDEV_MAXPOWER=500 -# CONFIG_USBDEV_DMA is not set -# CONFIG_ARCH_USBDEV_STALLQUEUE is not set -# CONFIG_USBDEV_TRACE is not set - -# -# USB Device Class Driver Options -# -# CONFIG_USBDEV_COMPOSITE is not set -CONFIG_PL2303=y -# CONFIG_PL2303_CONSOLE is not set -CONFIG_PL2303_EPINTIN=1 -CONFIG_PL2303_EPBULKOUT=2 -CONFIG_PL2303_EPBULKIN=3 -CONFIG_PL2303_EP0MAXPACKET=64 -CONFIG_PL2303_NWRREQS=4 -CONFIG_PL2303_NRDREQS=4 -CONFIG_PL2303_BULKIN_REQLEN=96 -CONFIG_PL2303_RXBUFSIZE=257 -CONFIG_PL2303_TXBUFSIZE=193 -CONFIG_PL2303_VENDORID=0x067b -CONFIG_PL2303_PRODUCTID=0x2303 -CONFIG_PL2303_VENDORSTR="NuttX" -CONFIG_PL2303_PRODUCTSTR="PL2303 Emulation" -# CONFIG_CDCACM is not set -# CONFIG_USBMSC is not set -# CONFIG_USBHOST is not set +# CONFIG_USBDEV is not set +CONFIG_USBHOST=y +CONFIG_USBHOST_NPREALLOC=4 +CONFIG_USBHOST_HAVE_ASYNCH=y +# CONFIG_USBHOST_ASYNCH is not set +# CONFIG_USBHOST_HUB is not set +CONFIG_USBHOST_MSC=y +# CONFIG_USBHOST_CDCACM is not set +CONFIG_USBHOST_HIDKBD=y +CONFIG_HIDKBD_POLLUSEC=100000 +CONFIG_HIDKBD_DEFPRIO=50 +CONFIG_HIDKBD_STACKSIZE=1024 +CONFIG_HIDKBD_BUFSIZE=64 +CONFIG_HIDKBD_NPOLLWAITERS=2 +# CONFIG_HIDKBD_RAWSCANCODES is not set +# CONFIG_HIDKBD_ALLSCANCODES is not set +# CONFIG_HIDKBD_NODEBOUNCE is not set +# CONFIG_USBHOST_HIDMOUSE is not set +# CONFIG_USBHOST_TRACE is not set # CONFIG_HAVE_USBTRACE is not set # CONFIG_DRIVERS_WIRELESS is not set @@ -1039,7 +1029,10 @@ CONFIG_EXAMPLES_BUTTONS_MAX=4 # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HIDKBD is not set +CONFIG_EXAMPLES_HIDKBD=y +CONFIG_EXAMPLES_HIDKBD_DEFPRIO=50 +CONFIG_EXAMPLES_HIDKBD_STACKSIZE=1024 +CONFIG_EXAMPLES_HIDKBD_DEVNAME="/dev/kbda" # CONFIG_EXAMPLES_IGMP is not set # CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_KEYPADTEST is not set @@ -1079,9 +1072,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -CONFIG_EXAMPLES_USBSERIAL=y -CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 -CONFIG_EXAMPLES_USBTERM=y +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WEBSERVER is not set @@ -1223,8 +1215,8 @@ CONFIG_NSH_STRERROR=y # Console Configuration # CONFIG_NSH_CONSOLE=y -# CONFIG_NSH_USBCONSOLE is not set # CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_USBKBD is not set CONFIG_NSH_ARCHINIT=y # CONFIG_NSH_LOGIN is not set # CONFIG_NSH_CONSOLE_LOGIN is not set From 0f175039ad09ed9f402ae35fd0435c9f4e757374 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Fri, 19 Aug 2016 09:18:18 +0200 Subject: [PATCH 100/214] Fix compilation warnings for stm32 eth with certain configs --- arch/arm/src/stm32/stm32_eth.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index bced5def661..8c9e955b7b6 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -704,7 +704,11 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv); #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) static int stm32_phyintenable(FAR struct stm32_ethmac_s *priv); #endif +#if defined(CONFIG_STM32_AUTONEG) ||\ + defined(CONFIG_NETDEV_PHY_IOCTL) ||\ + defined(CONFIG_ETH0_PHY_DM9161) static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *value); +#endif static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t value); #ifdef CONFIG_ETH0_PHY_DM9161 static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv); @@ -3098,6 +3102,9 @@ static int stm32_phyintenable(struct stm32_ethmac_s *priv) * ****************************************************************************/ +#if defined(CONFIG_STM32_AUTONEG) ||\ + defined(CONFIG_NETDEV_PHY_IOCTL) ||\ + defined(CONFIG_ETH0_PHY_DM9161) static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *value) { volatile uint32_t timeout; @@ -3134,6 +3141,7 @@ static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *val return -ETIMEDOUT; } +#endif /**************************************************************************** * Function: stm32_phywrite @@ -3278,7 +3286,10 @@ static inline int stm32_dm9161(FAR struct stm32_ethmac_s *priv) static int stm32_phyinit(FAR struct stm32_ethmac_s *priv) { +#ifdef CONFIG_STM32_AUTOGEN volatile uint32_t timeout; +#endif + uint32_t regval; uint16_t phyval; int ret; From ae37c9859f94d20b8239da0813df0040a4b87429 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 19 Aug 2016 06:32:28 -0600 Subject: [PATCH 101/214] Cosmetic changes from review of PR 120 --- arch/arm/src/stm32/stm32_eth.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index 8c9e955b7b6..30357d1b373 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -704,9 +704,8 @@ static void stm32_rxdescinit(FAR struct stm32_ethmac_s *priv); #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) static int stm32_phyintenable(FAR struct stm32_ethmac_s *priv); #endif -#if defined(CONFIG_STM32_AUTONEG) ||\ - defined(CONFIG_NETDEV_PHY_IOCTL) ||\ - defined(CONFIG_ETH0_PHY_DM9161) +#if defined(CONFIG_STM32_AUTONEG) || defined(CONFIG_NETDEV_PHY_IOCTL) || \ + defined(CONFIG_ETH0_PHY_DM9161) static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *value); #endif static int stm32_phywrite(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t value); @@ -3102,9 +3101,8 @@ static int stm32_phyintenable(struct stm32_ethmac_s *priv) * ****************************************************************************/ -#if defined(CONFIG_STM32_AUTONEG) ||\ - defined(CONFIG_NETDEV_PHY_IOCTL) ||\ - defined(CONFIG_ETH0_PHY_DM9161) +#if defined(CONFIG_STM32_AUTONEG) || defined(CONFIG_NETDEV_PHY_IOCTL) || \ + defined(CONFIG_ETH0_PHY_DM9161) static int stm32_phyread(uint16_t phydevaddr, uint16_t phyregaddr, uint16_t *value) { volatile uint32_t timeout; From 72eb2ee27009dc8caa3318733831659cf300c873 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=81yszczek?= Date: Fri, 19 Aug 2016 18:05:07 +0200 Subject: [PATCH 102/214] Add missing eth support in stm32butterfly2/nshnet config --- configs/stm32butterfly2/nshnet/defconfig | 245 ++++++++++++++++++++++- 1 file changed, 234 insertions(+), 11 deletions(-) diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index c9353da661e..9bd2ad699a1 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -62,7 +62,7 @@ CONFIG_ARCH_ARM=y # CONFIG_ARCH_HC is not set # CONFIG_ARCH_MIPS is not set # CONFIG_ARCH_RGMP is not set -# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_RENESAS is not set # CONFIG_ARCH_SIM is not set # CONFIG_ARCH_X86 is not set # CONFIG_ARCH_Z16 is not set @@ -375,7 +375,7 @@ CONFIG_STM32_ADC1=y # CONFIG_STM32_DMA2 is not set # CONFIG_STM32_DAC1 is not set # CONFIG_STM32_DAC2 is not set -# CONFIG_STM32_ETHMAC is not set +CONFIG_STM32_ETHMAC=y # CONFIG_STM32_I2C1 is not set CONFIG_STM32_OTGFS=y CONFIG_STM32_PWR=y @@ -404,6 +404,7 @@ CONFIG_STM32_SPI=y # # Alternate Pin Mapping # +CONFIG_STM32_ETH_REMAP=y # CONFIG_STM32_SPI1_REMAP is not set CONFIG_STM32_USART2_REMAP=y # CONFIG_STM32_JTAG_DISABLE is not set @@ -458,6 +459,19 @@ CONFIG_STM32_USART2_SERIALDRIVER=y CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set +# +# Ethernet MAC configuration +# +CONFIG_STM32_PHYADDR=1 +# CONFIG_STM32_PHYINIT is not set +CONFIG_STM32_MII=y +# CONFIG_STM32_MII_MCO is not set +CONFIG_STM32_MII_EXTCLK=y +# CONFIG_STM32_AUTONEG is not set +CONFIG_STM32_ETHFD=y +CONFIG_STM32_ETH100MBPS=y +# CONFIG_STM32_ETH_PTP is not set + # # USB FS Host Configuration # @@ -578,6 +592,7 @@ CONFIG_ARCH_HAVE_TICKLESS=y CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set CONFIG_CLOCK_MONOTONIC=y +CONFIG_ARCH_HAVE_TIMEKEEPING=y # CONFIG_JULIAN_TIME is not set CONFIG_START_YEAR=1970 CONFIG_START_MONTH=0 @@ -697,17 +712,21 @@ CONFIG_SPI=y CONFIG_SPI_EXCHANGE=y # CONFIG_SPI_CMDDATA is not set CONFIG_SPI_CALLBACK=y -# CONFIG_SPI_BITBANG is not set -CONFIG_SPI_HWFEATURES=y -# CONFIG_SPI_CRCGENERATION is not set -CONFIG_SPI_CS_CONTROL=y +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_SPI_BITORDER is not set # CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set # CONFIG_I2S is not set # # Timer Driver Support # # CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set # CONFIG_RTC is not set # CONFIG_WATCHDOG is not set CONFIG_ANALOG=y @@ -756,7 +775,50 @@ CONFIG_MMCSD_SPIMODE=0 # CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set -# CONFIG_PIPES is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set +# CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +# CONFIG_ETH0_PHY_KSZ8081 is not set +# CONFIG_ETH0_PHY_KSZ90x1 is not set +CONFIG_ETH0_PHY_DP83848C=y +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +CONFIG_PIPES=y +CONFIG_DEV_PIPE_MAXSIZE=1024 +CONFIG_DEV_PIPE_SIZE=1024 +CONFIG_DEV_FIFO_SIZE=1024 # CONFIG_PM is not set # CONFIG_POWER is not set # CONFIG_SENSORS is not set @@ -868,9 +930,119 @@ CONFIG_SYSLOG_CONSOLE=y # # Networking Support # -# CONFIG_ARCH_HAVE_NET is not set -# CONFIG_ARCH_HAVE_PHY is not set -# CONFIG_NET is not set +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=1500 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +# CONFIG_NETDEV_PHY_IOCTL is not set + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +# CONFIG_NET_SOCKOPTS is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +CONFIG_NET_LOCAL=y +CONFIG_NET_LOCAL_STREAM=y +CONFIG_NET_LOCAL_DGRAM=y + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +# CONFIG_NET_TCP_WRITE_BUFFERS is not set +CONFIG_NET_TCP_RECVDELAY=0 +# CONFIG_NET_TCPBACKLOG is not set +CONFIG_NET_TCP_SPLIT=y +CONFIG_NET_TCP_SPLIT_SIZE=40 +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +# CONFIG_NET_BROADCAST is not set +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +CONFIG_NET_ARP_IPIN=y +# CONFIG_NET_ARP_SEND is not set + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=24 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +# CONFIG_NET_STATISTICS is not set + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="butterfly2" # # Crypto API @@ -900,6 +1072,7 @@ CONFIG_FAT_MAXFNAME=32 # CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set # CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set # CONFIG_FS_TMPFS is not set @@ -915,6 +1088,7 @@ CONFIG_FS_PROCFS_REGISTER=y # CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set # CONFIG_FS_PROCFS_EXCLUDE_CPULOAD is not set # CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_PROCFS_EXCLUDE_NET is not set # CONFIG_FS_UNIONFS is not set # @@ -987,8 +1161,9 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set CONFIG_ARCH_HAVE_TLS=y # CONFIG_TLS is not set -# CONFIG_LIBC_NETDB is not set +CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set +# CONFIG_NETDB_DNSCLIENT is not set # # Non-standard Library Support @@ -1033,7 +1208,9 @@ CONFIG_EXAMPLES_BUTTONS_MIN=0 CONFIG_EXAMPLES_BUTTONS_MAX=4 # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set @@ -1051,6 +1228,7 @@ CONFIG_EXAMPLES_MOUNT=y CONFIG_EXAMPLES_MOUNT_NSECTORS=2048 CONFIG_EXAMPLES_MOUNT_SECTORSIZE=512 CONFIG_EXAMPLES_MOUNT_RAMDEVNO=0 +# CONFIG_EXAMPLES_NETTEST is not set # CONFIG_EXAMPLES_NRF24L01TERM is not set CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set @@ -1063,8 +1241,10 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set # CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1079,11 +1259,16 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDGRAM is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set CONFIG_EXAMPLES_USBSERIAL=y CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 CONFIG_EXAMPLES_USBTERM=y +# CONFIG_EXAMPLES_USTREAM is not set # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_XMLRPC is not set # # File System Utilities @@ -1108,6 +1293,7 @@ CONFIG_EXAMPLES_USBTERM=y # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set # CONFIG_INTERPRETERS_PCODE is not set # @@ -1120,10 +1306,21 @@ CONFIG_EXAMPLES_USBTERM=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set # # NSH Library @@ -1151,6 +1348,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1177,12 +1375,14 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set # CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set # CONFIG_NSH_DISABLE_MV is not set # CONFIG_NSH_DISABLE_MW is not set # CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set # CONFIG_NSH_DISABLE_PUT is not set # CONFIG_NSH_DISABLE_PWD is not set # CONFIG_NSH_DISABLE_RM is not set @@ -1226,6 +1426,27 @@ CONFIG_NSH_CONSOLE=y # CONFIG_NSH_USBCONSOLE is not set # CONFIG_NSH_ALTCONDEV is not set CONFIG_NSH_ARCHINIT=y + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT=y +# CONFIG_NSH_NETINIT_THREAD is not set + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a010163 +CONFIG_NSH_DRIPADDR=0x0a010101 +CONFIG_NSH_NETMASK=0xffffff00 +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 # CONFIG_NSH_LOGIN is not set # CONFIG_NSH_CONSOLE_LOGIN is not set @@ -1243,6 +1464,7 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_NETDB is not set CONFIG_SYSTEM_RAMTEST=y CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y @@ -1252,6 +1474,7 @@ CONFIG_READLINE_MAX_BUILTINS=64 CONFIG_READLINE_MAX_EXTCMDS=64 # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_TEE is not set # CONFIG_SYSTEM_UBLOXMODEM is not set CONFIG_SYSTEM_VI=y CONFIG_SYSTEM_VI_COLS=64 From a5440fff647421838c654ffabb7fd254b78d1273 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 20 Aug 2016 09:08:59 -0600 Subject: [PATCH 103/214] Make all Analog IOCTL command values unique --- include/nuttx/analog/ads1242.h | 19 +++++++++++++------ include/nuttx/fs/ioctl.h | 5 +++-- 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/include/nuttx/analog/ads1242.h b/include/nuttx/analog/ads1242.h index ea98a63b240..d8a630bd207 100644 --- a/include/nuttx/analog/ads1242.h +++ b/include/nuttx/analog/ads1242.h @@ -51,13 +51,20 @@ ****************************************************************************/ /* IOCTL Commands ***********************************************************/ +/* Cmd: ANIOC_ADS2142_READ Arg: uint32_t *value + * Cmd: ANIOC_ADS2142_SET_GAIN Arg: uint8_t value + * Cmd: ANIOC_ADS2142_SET_POSITIVE_INPUT Arg: uint8_t value + * Cmd: ANIOC_ADS2142_SET_NEGATIVE_INPUT Arg: uint8_t value + * Cmd: ANIOC_ADS2142_IS_DATA_READY Arg: bool *value + * Cmd: ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB Arg: None + */ -#define ANIOC_ADS2142_READ _ANIOC(0x0001) /* Arg: uint32_t *value */ -#define ANIOC_ADS2142_SET_GAIN _ANIOC(0x0002) /* Arg: uint8_t value */ -#define ANIOC_ADS2142_SET_POSITIVE_INPUT _ANIOC(0x0003) /* Arg: uint8_t value */ -#define ANIOC_ADS2142_SET_NEGATIVE_INPUT _ANIOC(0x0004) /* Arg: uint8_t value */ -#define ANIOC_ADS2142_IS_DATA_READY _ANIOC(0x0005) /* Arg: bool *value */ -#define ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB _ANIOC(0x0006) /* Arg: None */ +#define ANIOC_ADS2142_READ _ANIOC(ANIOC_USER + 0) +#define ANIOC_ADS2142_SET_GAIN _ANIOC(ANIOC_USER + 1) +#define ANIOC_ADS2142_SET_POSITIVE_INPUT _ANIOC(ANIOC_USER + 2) +#define ANIOC_ADS2142_SET_NEGATIVE_INPUT _ANIOC(ANIOC_USER + 3) +#define ANIOC_ADS2142_IS_DATA_READY _ANIOC(ANIOC_USER + 4) +#define ANIOC_ADS2142_DO_SYSTEM_OFFSET_CALIB _ANIOC(ANIOC_USER + 5) /* ADS1242 REGISTER *********************************************************/ diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index 19fd8012b0f..b18f53e9692 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -254,8 +254,9 @@ #define ANIOC_TRIGGER _ANIOC(0x0001) /* Trigger one conversion * IN: None * OUT: None */ - -/* NuttX PWM ioctl definitions (see nuttx/drivers/pwm.h) ****************************/ +#define ANIOC_USER 0x0002 /* Device specific IOCTL commands + * may follow */ +/* NuttX PWM ioctl definitions (see nuttx/drivers/pwm.h) ********************/ #define _PWMIOCVALID(c) (_IOC_TYPE(c)==_PWMIOCBASE) #define _PWMIOC(nr) _IOC(_PWMIOCBASE,nr) From 6f833be9d59863b086ec6af259b18769c8b06d0b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 20 Aug 2016 11:36:02 -0600 Subject: [PATCH 104/214] Separate XorShift128 PRNG from /dev/urandom and make it generally available. --- drivers/dev_urandom.c | 77 +++++++------------ include/nuttx/lib/xorshift128.h | 98 ++++++++++++++++++++++++ libc/misc/Make.defs | 2 +- libc/misc/lib_xorshift128.c | 123 +++++++++++++++++++++++++++++++ sched/sched/sched_processtimer.c | 16 +--- 5 files changed, 254 insertions(+), 62 deletions(-) create mode 100644 include/nuttx/lib/xorshift128.h create mode 100644 libc/misc/lib_xorshift128.c diff --git a/drivers/dev_urandom.c b/drivers/dev_urandom.c index 4923544eae2..28bad840b46 100644 --- a/drivers/dev_urandom.c +++ b/drivers/dev_urandom.c @@ -51,6 +51,7 @@ #include #include +#include #include #include @@ -75,17 +76,13 @@ * Private Types ****************************************************************************/ -typedef union +struct xorshift128_state_s { - struct - { - uint32_t x; - uint32_t y; - uint32_t z; - uint32_t w; - }; - uint8_t u[16]; -} xorshift128_state_t; + uint32_t x; + uint32_t y; + uint32_t z; + uint32_t w; +}; /**************************************************************************** * Private Function Prototypes @@ -106,7 +103,7 @@ static int devurand_poll(FAR struct file *filep, FAR struct pollfd *fds, * Private Data ****************************************************************************/ -static const struct file_operations devurand_fops = +static const struct file_operations g_urand_fops = { NULL, /* open */ NULL, /* close */ @@ -122,37 +119,10 @@ static const struct file_operations devurand_fops = #endif }; -#ifdef CONFIG_DEV_URANDOM_XORSHIFT128 -static xorshift128_state_t prng; -#endif - /**************************************************************************** * Private Functions ****************************************************************************/ -/**************************************************************************** - * Name: xorshift128 - ****************************************************************************/ - -#ifdef CONFIG_DEV_URANDOM_XORSHIFT128 -static uint32_t xorshift128(void) -{ - uint32_t t = prng.x; - - t ^= t << 11; - t ^= t >> 8; - - prng.x = prng.y; - prng.y = prng.z; - prng.z = prng.w; - - prng.w ^= prng.w >> 19; - prng.w ^= t; - - return prng.w; -} -#endif - /**************************************************************************** * Name: congruential ****************************************************************************/ @@ -241,14 +211,26 @@ static ssize_t devurand_write(FAR struct file *filep, FAR const char *buffer, #ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL unsigned int seed = 0; - len = min(len, sizeof(unsigned int)); - memcpy(&seed, buffer, len); + if (len < sizeof(unsigned int)) + { + return -ERANGE; + } + + memcpy(&seed, buffer, sizeof(unsigned int)); srand(seed); - return len; + return sizeof(unsigned int); + #else - len = min(len, sizeof(prng.u)); - memcpy(&prng.u, buffer, len); - return len; + struct xorshift128_state_s seed; + + if (len < sizeof(struct xorshift128_state_s)) + { + return -ERANGE; + } + + memcpy(&seed, buffer, sizeof(struct xorshift128_state_s)); + xorshift128_seed(seed.w, seed.x, seed.y, seed.z); + return sizeof(struct xorshift128_state_s); #endif } @@ -292,13 +274,10 @@ void devurandom_register(void) #else /* Seed the PRNG */ - prng.w = 97; - prng.x = 101; - prng.y = prng.w << 17; - prng.z = prng.x << 25; + xorshift128_seed(97, 101, 97 << 17, 101 << 25); #endif - (void)register_driver("/dev/urandom", &devurand_fops, 0666, NULL); + (void)register_driver("/dev/urandom", &g_urand_fops, 0666, NULL); } #endif /* CONFIG_DEV_URANDOM && CONFIG_DEV_URANDOM_ARCH */ diff --git a/include/nuttx/lib/xorshift128.h b/include/nuttx/lib/xorshift128.h new file mode 100644 index 00000000000..f2952d44d70 --- /dev/null +++ b/include/nuttx/lib/xorshift128.h @@ -0,0 +1,98 @@ +/**************************************************************************** + * include/nuttx/lib/xorshift128.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: David S. Alessio + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This random number generator is simple, fast and portable. + * Ref: https://en.wikipedia.org/wiki/Xorshift + */ + +#ifndef __INCLUDE_NUTTX_LIB_XORSHIFT128_H +#define __INCLUDE_NUTTX_LIB_XORSHIFT128_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: xorshift128_seed + * + * Description: + * Seed the XorShift128 PRNG + * + * Input Parameters: + * w, x, y, z: Values for XorShift128 generation state. + * + * Returned Value: + * No + * + ****************************************************************************/ + +void xorshift128_seed(uint32_t w, uint32_t x, uint32_t y, uint32_t z); + +/**************************************************************************** + * Name: xorshift128 + * + * Description: + * Generate one 32-bit pseudo-random number + * + * Input Parameters: + * None + * + * Returned Value: + * The generated pseudo-random number + * + ****************************************************************************/ + +uint32_t xorshift128(void); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_LIB_XORSHIFT128_H */ diff --git a/libc/misc/Make.defs b/libc/misc/Make.defs index dbdb3495471..ec3c76b94da 100644 --- a/libc/misc/Make.defs +++ b/libc/misc/Make.defs @@ -36,7 +36,7 @@ # Add the internal C files to the build CSRCS += lib_stream.c lib_filesem.c lib_utsname.c -CSRCS += lib_tea_encrypt.c lib_tea_decrypt.c +CSRCS += lib_xorshift128.c lib_tea_encrypt.c lib_tea_decrypt.c # Support for platforms that do not have long long types diff --git a/libc/misc/lib_xorshift128.c b/libc/misc/lib_xorshift128.c new file mode 100644 index 00000000000..3c92309587f --- /dev/null +++ b/libc/misc/lib_xorshift128.c @@ -0,0 +1,123 @@ +/**************************************************************************** + * libc/misc/lib_xorshift.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: David S. Alessio + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This random number generator is simple, fast and portable. + * Ref: https://en.wikipedia.org/wiki/Xorshift + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct xorshift128_state_s +{ + uint32_t x; + uint32_t y; + uint32_t z; + uint32_t w; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct xorshift128_state_s g_prng; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: xorshift128_seed + * + * Description: + * Seed the XorShift128 PRNG + * + * Input Parameters: + * w, x, y, z: Values for XorShift128 generation state. + * + * Returned Value: + * No + * + ****************************************************************************/ + +void xorshift128_seed(uint32_t w, uint32_t x, uint32_t y, uint32_t z) +{ + /* Seed the PRNG */ + + g_prng.w = w; + g_prng.x = x; + g_prng.y = y; + g_prng.z = z; +} + +/**************************************************************************** + * Name: xorshift128 + * + * Description: + * Generate one 32-bit pseudo-random number + * + * Input Parameters: + * None + * + * Returned Value: + * The generated pseudo-random number + * + ****************************************************************************/ + +uint32_t xorshift128(void) +{ + uint32_t t; + + t = g_prng.x; + t ^= t << 11; + t ^= t >> 8; + + g_prng.x = g_prng.y; + g_prng.y = g_prng.z; + g_prng.z = g_prng.w; + + g_prng.w ^= g_prng.w >> 19; + g_prng.w ^= t; + + return g_prng.w; +} diff --git a/sched/sched/sched_processtimer.c b/sched/sched/sched_processtimer.c index 9b64abed1b8..62dce45b02f 100644 --- a/sched/sched/sched_processtimer.c +++ b/sched/sched/sched_processtimer.c @@ -50,14 +50,6 @@ #include "wdog/wdog.h" #include "clock/clock.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#ifndef CONFIG_SCHED_CPULOAD_TIMECONSTANT -# define CONFIG_SCHED_CPULOAD_TIMECONSTANT 2 -#endif - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -69,10 +61,10 @@ * Check for operations specific to scheduling policy of the currently * active task. * - * Inputs: + * Input Parameters: * None * - * Return Value: + * Returned Value: * None * ****************************************************************************/ @@ -134,10 +126,10 @@ static inline void sched_process_scheduler(void) * function periodically -- the calling interval must be * USEC_PER_TICK * - * Inputs: + * Input Parameters: * None * - * Return Value: + * Returned Value: * None * ****************************************************************************/ From 300361539ab9a2e64945a0cfbfaf096ab02396d4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 20 Aug 2016 12:47:07 -0600 Subject: [PATCH 105/214] sched/sched_cpuload_oneshot: Use the oneshot timer with optional entropy to measuer cPU load if so configured. --- arch/sim/src/up_oneshot.c | 2 +- configs/sim/src/sim_bringup.c | 14 +- include/nuttx/clock.h | 22 +++ sched/Kconfig | 40 +++- sched/sched/Make.defs | 3 + sched/sched/sched_cpuload_oneshot.c | 282 ++++++++++++++++++++++++++++ 6 files changed, 359 insertions(+), 4 deletions(-) create mode 100644 sched/sched/sched_cpuload_oneshot.c diff --git a/arch/sim/src/up_oneshot.c b/arch/sim/src/up_oneshot.c index c01bfea80e6..7481e40017b 100644 --- a/arch/sim/src/up_oneshot.c +++ b/arch/sim/src/up_oneshot.c @@ -173,7 +173,7 @@ static int sim_max_delay(FAR struct oneshot_lowerhalf_s *lower, DEBUGASSERT(lower != NULL && ts != NULL); ts->tv_sec = INT_MAX; - ts->tv_nsec = LONG_MAX; + ts->tv_nsec = 1000000000ul - 1; return OK; } diff --git a/configs/sim/src/sim_bringup.c b/configs/sim/src/sim_bringup.c index d222a5b722f..8f0d85c078e 100644 --- a/configs/sim/src/sim_bringup.c +++ b/configs/sim/src/sim_bringup.c @@ -45,6 +45,7 @@ #include #include +#include #include #include "up_internal.h" @@ -88,7 +89,7 @@ int sim_bringup(void) #endif #ifdef CONFIG_ONESHOT - /* Initialize the simulated analog joystick input device */ + /* Get an instance of the simulated oneshot timer */ oneshot = oneshot_initialize(0, 0); if (oneshot == NULL) @@ -96,13 +97,22 @@ int sim_bringup(void) _err("ERROR: oneshot_initialize faile\n"); } else - { + { +#ifdef CONFIG_CPULOAD_ONESHOT + /* Configure the oneshot timer to support CPU load measurement */ + + sched_oneshot_extclk(oneshot); + +#else + /* Initialize the simulated oneshot driver */ + ret = oneshot_register("/dev/oneshot", oneshot); if (ret < 0) { _err("ERROR: Failed to register oneshot at /dev/oneshot: %d\n", ret); } +#endif } #endif diff --git a/include/nuttx/clock.h b/include/nuttx/clock.h index b21c0384815..5684fef938c 100644 --- a/include/nuttx/clock.h +++ b/include/nuttx/clock.h @@ -329,6 +329,28 @@ int clock_systimespec(FAR struct timespec *ts); int clock_cpuload(int pid, FAR struct cpuload_s *cpuload); #endif +/**************************************************************************** + * Name: sched_oneshot_extclk + * + * Description: + * Configure to use a oneshot timer as described in + * include/nuttx/timers/oneshot.h to provid external clocking to assess + * the CPU load. + * + * Input Parameters: + * lower - An instance of the oneshot timer interface as defined in + * include/nuttx/timers/oneshot.h + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_CPULOAD_ONESHOT +struct oneshot_lowerhalf_s; +void sched_oneshot_extclk(FAR struct oneshot_lowerhalf_s *lower); +#endif + #undef EXTERN #ifdef __cplusplus } diff --git a/sched/Kconfig b/sched/Kconfig index 731baa801ef..ba64b3dcb57 100644 --- a/sched/Kconfig +++ b/sched/Kconfig @@ -582,10 +582,11 @@ config SCHED_CPULOAD_EXTCLK sched_process_cpuload() at each timer expiration with interrupts disabled. +if SCHED_CPULOAD_EXTCLK + config SCHED_CPULOAD_TICKSPERSEC int "External clock rate" default 100 - depends on SCHED_CPULOAD_EXTCLK ---help--- If an external clock is used to drive the sampling for the CPU load calculations, then this value must be provided. This value provides @@ -594,6 +595,43 @@ config SCHED_CPULOAD_TICKSPERSEC is the default frequency of the system time and, hence, the worst possible choice in most cases. +config CPULOAD_ONESHOT + bool "Use Oneshot timer" + default n + ---help--- + Use am MCU-specific oneshot timer as the external clock. The + oneshot timer must be configured by board specific logic which must + then call: + + void sched_oneshot_extclk(FAR struct oneshot_lowerhalf_s *lower); + + To start the CPU load measurement. See include/nuttx/clock.h + +config CPULOAD_ONESHOT_ENTROPY + int "Bits of entropy" + default 6 + range 0 30 + ---help--- + This is the number of bits of entropy that will be applied. The + oneshot will be set to this interval: + + CPULOAD_ONESHOT_NOMINAL - (CPULOAD_ONESHOT_ENTROPY / 2) + + error + nrand(CPULOAD_ONESHOT_ENTROPY) + + Where + + CPULOAD_ONESHOT_NOMINAL is CONFIG_SCHED_CPULOAD_TICKSPERSEC in + units of microseconds. + CPULOAD_ONESHOT_ENTROPY is (1 << CONFIG_CPULOAD_ONESHOT_ENTROPY), + and + 'error' is an error value that is retained from interval to + interval so that although individual intervals are randomized, + the average will still be CONFIG_SCHED_CPULOAD_TICKSPERSEC. + + This special value of zero disables entropy. + +endif # SCHED_CPULOAD_EXTCLK + config SCHED_CPULOAD_TIMECONSTANT int "CPU load time constant" default 2 diff --git a/sched/sched/Make.defs b/sched/sched/Make.defs index e690aeaa83a..353f26bb272 100644 --- a/sched/sched/Make.defs +++ b/sched/sched/Make.defs @@ -80,6 +80,9 @@ endif ifeq ($(CONFIG_SCHED_CPULOAD),y) CSRCS += sched_cpuload.c +ifeq ($(CONFIG_CPULOAD_ONESHOT),y) +CSRCS += sched_cpuload_oneshot.c +endif endif ifeq ($(CONFIG_SCHED_TICKLESS),y) diff --git a/sched/sched/sched_cpuload_oneshot.c b/sched/sched/sched_cpuload_oneshot.c new file mode 100644 index 00000000000..adf96311dff --- /dev/null +++ b/sched/sched/sched_cpuload_oneshot.c @@ -0,0 +1,282 @@ +/**************************************************************************** + * sched/sched/sched_cpuload_oneshot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "clock/clock.h" + +#ifdef CONFIG_CPULOAD_ONESHOT + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if !defined(CONFIG_SCHED_CPULOAD) || !defined(CONFIG_SCHED_CPULOAD_EXTCLK) +# error CONFIG_SCHED_CPULOAD and CONFIG_SCHED_CPULOAD_EXTCLK must be defined +#endif + +#ifndef CONFIG_SCHED_CPULOAD_TICKSPERSEC +# error CONFIG_SCHED_CPULOAD_TICKSPERSEC not defined +#endif + +#define CPULOAD_ONESHOT_NOMINAL (CONFIG_SCHED_CPULOAD_TICKSPERSEC * 1000) + +#if CPULOAD_ONESHOT_NOMINAL < 1 || CPULOAD_ONESHOT_NOMINAL > 0x7fffffff +# error CPULOAD_ONESHOT_NOMINAL is out of range +#endif + +#ifndef CONFIG_CPULOAD_ONESHOT_ENTROPY +# warning CONFIG_CPULOAD_ONESHOT_ENTROPY not defined +# define CONFIG_CPULOAD_ONESHOT_ENTROPY 0 +#endif + +#define CPULOAD_ONESHOT_ENTROPY (1 << CONFIG_CPULOAD_ONESHOT_ENTROPY) + +#if CPULOAD_ONESHOT_NOMINAL < CPULOAD_ONESHOT_ENTROPY +# error CPULOAD_ONESHOT_NOMINAL too small for CONFIG_CPULOAD_ONESHOT_ENTROPY +#endif + +#define CPULOAD_ONESHOT_ENTROPY_MASK (CPULOAD_ONESHOT_ENTROPY - 1) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct sched_oneshot_s +{ + FAR struct oneshot_lowerhalf_s *oneshot; +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + int32_t maxdelay; + int32_t error; +#endif +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void sched_oneshot_start(void); +static void sched_oneshot_callback(FAR struct oneshot_lowerhalf_s *lower, + FAR void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct sched_oneshot_s g_sched_oneshot; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sched_oneshot_start + * + * Description: + * [Re-]start the oneshot timer, applying entropy as configured + * + * Input Parameters: + * None + * lower - An instance of the lower half driver + * arg - The opaque argument provided when the interrupt was registered + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void sched_oneshot_start(void) +{ +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + struct timespec ts; + uint32_t entropy; + int32_t secs; +#endif + int32_t usecs; + + /* Get the next delay */ + +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + /* The one shot will be set to this interval: + * + * CPULOAD_ONESHOT_NOMINAL - (CPULOAD_ONESHOT_ENTROPY / 2) + error + * + nrand(CPULOAD_ONESHOT_ENTROPY) + */ + + usecs = (CPULOAD_ONESHOT_NOMINAL - CPULOAD_ONESHOT_ENTROPY / 2) + + g_sched_oneshot.error; + + /* Add the random value in the range 0..(CPULOAD_ONESHOT_ENTRY - 1) */ + + entropy = xorshift128(); + usecs += (int32_t)(entropy & CPULOAD_ONESHOT_ENTROPY_MASK); + + DEBUGASSERT(usecs > 0); /* Check for overflow to negative or zero */ + + /* Make sure that the accumulated value does not exceed the maximum delay */ + + if (usecs > g_sched_oneshot.maxdelay) + { + tmrwarn("WARNING: Truncating\n"); + usecs = g_sched_oneshot.maxdelay; + } + + /* Save the new error value */ + + g_sched_oneshot.error = CPULOAD_ONESHOT_NOMINAL + + g_sched_oneshot.error - usecs; +#else + /* No entropy */ + + usecs = CPULOAD_ONESHOT_NOMINAL; +#endif + + /* Then re-start the oneshot timer */ + + secs = usecs / 1000000; + usecs -= 100000 * secs; + + ts.tv_sec = secs; + ts.tv_nsec = 1000 * usecs; + + DEBUGVERIFY(ONESHOT_START(g_sched_oneshot.oneshot, sched_oneshot_callback, + NULL, &ts)); +} + +/**************************************************************************** + * Name: sched_oneshot_callback + * + * Description: + * This is the callback function that will be invoked when the oneshot + * timer expires. + * + * Input Parameters: + * lower - An instance of the lower half driver + * arg - The opaque argument provided when the interrupt was registered + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void sched_oneshot_callback(FAR struct oneshot_lowerhalf_s *lower, + FAR void *arg) +{ + /* Perform CPU load measurements */ + +#ifdef CONFIG_HAVE_WEAKFUNCTIONS + if (sched_process_cpuload != NULL) +#endif + { + sched_process_cpuload(); + } +#endif + + /* Then restart the oneshot */ + + sched_oneshot_start(); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sched_oneshot_extclk + * + * Description: + * Configure to use a oneshot timer as described in + * include/nuttx/timers/oneshot.h to provid external clocking to assess + * the CPU load. + * + * Input Parameters: + * lower - An instance of the oneshot timer interface as defined in + * include/nuttx/timers/oneshot.h + * + * Returned Value: + * None + * + ****************************************************************************/ + +void sched_oneshot_extclk(FAR struct oneshot_lowerhalf_s *lower) +{ +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + struct timespec ts; +#endif + + DEBUGASSERT(lower != NULL && lower->ops != NULL); + DEBUGASSERT(lower->ops->start != NULL); + +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + DEBUGASSERT(lower->ops->max_delay != NULL); + + /* Get the maximum delay */ + + DEBUGVERIFY(ONESHOT_MAX_DELAY(lower, &ts)); + if (ts.tv_sec >= 0) + { + g_sched_oneshot.maxdelay = INT32_MAX; + } + else + { + g_sched_oneshot.maxdelay = ts.tv_nsec / 1000; + } + + tmrinfo("madelay = %ld usec\n", (long)g_sched_oneshot.maxdelay); + DEBUGASSERT(CPULOAD_ONESHOT_NOMINAL < g_sched_oneshot.maxdelay); + + /* Seed the PRNG */ + + xorshift128_seed(97, 101, 97 << 17, 101 << 25); +#endif + + /* Then start the oneshot */ + + g_sched_oneshot.oneshot = lower; + sched_oneshot_start(); +} From 53b2de18eb63bede4a6552df63becf62412da5cb Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 20 Aug 2016 13:23:41 -0600 Subject: [PATCH 106/214] Trivial typo fix --- sched/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sched/Kconfig b/sched/Kconfig index ba64b3dcb57..bf40372785a 100644 --- a/sched/Kconfig +++ b/sched/Kconfig @@ -599,7 +599,7 @@ config CPULOAD_ONESHOT bool "Use Oneshot timer" default n ---help--- - Use am MCU-specific oneshot timer as the external clock. The + Use an MCU-specific oneshot timer as the external clock. The oneshot timer must be configured by board specific logic which must then call: From 757023a9095cd222edf28c9297b8dcbb9664dbb2 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 20 Aug 2016 17:27:41 -0600 Subject: [PATCH 107/214] XorShift128: Add some protection to handle the case where this logic could be called from the interrupt level. --- libc/misc/lib_xorshift128.c | 53 ++++++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) diff --git a/libc/misc/lib_xorshift128.c b/libc/misc/lib_xorshift128.c index 3c92309587f..e31867c572d 100644 --- a/libc/misc/lib_xorshift128.c +++ b/libc/misc/lib_xorshift128.c @@ -42,7 +42,19 @@ ****************************************************************************/ #include + #include +#include + +#include + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifndef CONFIG_CPULOAD_ONESHOT_ENTROPY +# define CONFIG_CPULOAD_ONESHOT_ENTROPY 0 +#endif /**************************************************************************** * Private Types @@ -82,12 +94,30 @@ static struct xorshift128_state_s g_prng; void xorshift128_seed(uint32_t w, uint32_t x, uint32_t y, uint32_t z) { + /* With CONFIG_CPULOAD_ONESHOT_ENTROPY > 0, this PRNG could be called from + * the interrupt handling state (currently is not). + */ + +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + irqstate_t flags; + + flags = enter_critical_section(); +#else + sched_lock(); +#endif + /* Seed the PRNG */ g_prng.w = w; g_prng.x = x; g_prng.y = y; g_prng.z = z; + +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + leave_critical_section(flags); +#else + sched_unlock(); +#endif } /**************************************************************************** @@ -106,8 +136,21 @@ void xorshift128_seed(uint32_t w, uint32_t x, uint32_t y, uint32_t z) uint32_t xorshift128(void) { + uint32_t ret; uint32_t t; + /* With CONFIG_CPULOAD_ONESHOT_ENTROPY > 0, this PRNG will be called from + * the interrupt handling state. + */ + +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + irqstate_t flags; + + flags = enter_critical_section(); +#else + sched_lock(); +#endif + t = g_prng.x; t ^= t << 11; t ^= t >> 8; @@ -119,5 +162,13 @@ uint32_t xorshift128(void) g_prng.w ^= g_prng.w >> 19; g_prng.w ^= t; - return g_prng.w; + ret = g_prng.w; + +#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + leave_critical_section(flags); +#else + sched_unlock(); +#endif + + return ret; } From 60b70f7dbb06572c8f34e584c9dcc438b78c8239 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 21 Aug 2016 07:47:53 -0600 Subject: [PATCH 108/214] Make xorshift128 re-entrant so that we do do have to suffer the overhad of serialization controls. --- drivers/dev_urandom.c | 64 ++++++++-------- include/nuttx/lib/xorshift128.h | 50 ++++++++----- libc/misc/lib_xorshift128.c | 112 +++++----------------------- sched/sched/sched_cpuload_oneshot.c | 8 +- 4 files changed, 91 insertions(+), 143 deletions(-) diff --git a/drivers/dev_urandom.c b/drivers/dev_urandom.c index 28bad840b46..e7022cb9f54 100644 --- a/drivers/dev_urandom.c +++ b/drivers/dev_urandom.c @@ -67,21 +67,19 @@ #endif #ifdef CONFIG_DEV_URANDOM_XORSHIFT128 -# define PRNG() xorshift128() +# define PRNG() do_xorshift128() #else /* CONFIG_DEV_URANDOM_CONGRUENTIAL */ -# define PRNG() congruential() +# define PRNG() do_congruential() #endif /**************************************************************************** * Private Types ****************************************************************************/ -struct xorshift128_state_s +union xorshift128_state_u { - uint32_t x; - uint32_t y; - uint32_t z; - uint32_t w; + struct xorshift128_state_s state; + uint8_t u[16]; }; /**************************************************************************** @@ -119,16 +117,31 @@ static const struct file_operations g_urand_fops = #endif }; +#ifdef CONFIG_DEV_URANDOM_XORSHIFT128 +static union xorshift128_state_u g_prng; +#endif + /**************************************************************************** * Private Functions ****************************************************************************/ /**************************************************************************** - * Name: congruential + * Name: do_xorshift128 + ****************************************************************************/ + +#ifdef CONFIG_DEV_URANDOM_XORSHIFT128 +static inline uint32_t do_xorshift128(void) +{ + return xorshift128(&g_prng.state); +} +#endif + +/**************************************************************************** + * Name: do_congruential ****************************************************************************/ #ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL -static uint32_t congruential(void) +static inline uint32_t do_congruential(void) { /* REVISIT: We could probably generate a 32-bit value with a single * call to nrand(). @@ -211,26 +224,14 @@ static ssize_t devurand_write(FAR struct file *filep, FAR const char *buffer, #ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL unsigned int seed = 0; - if (len < sizeof(unsigned int)) - { - return -ERANGE; - } - - memcpy(&seed, buffer, sizeof(unsigned int)); + len = min(len, sizeof(unsigned int)); + memcpy(&seed, buffer, len); srand(seed); - return sizeof(unsigned int); - + return len; #else - struct xorshift128_state_s seed; - - if (len < sizeof(struct xorshift128_state_s)) - { - return -ERANGE; - } - - memcpy(&seed, buffer, sizeof(struct xorshift128_state_s)); - xorshift128_seed(seed.w, seed.x, seed.y, seed.z); - return sizeof(struct xorshift128_state_s); + len = min(len, sizeof(g_prng.u)); + memcpy(&g_prng.u, buffer, len); + return len; #endif } @@ -269,12 +270,15 @@ static int devurand_poll(FAR struct file *filep, FAR struct pollfd *fds, void devurandom_register(void) { + /* Seed the PRNG */ + #ifdef CONFIG_DEV_URANDOM_CONGRUENTIAL srand(10197); #else - /* Seed the PRNG */ - - xorshift128_seed(97, 101, 97 << 17, 101 << 25); + g_prng.state.w = 97; + g_prng.state.x = 101; + g_prng.state.y = g_prng.state.w << 17; + g_prng.state.z = g_prng.state.x << 25; #endif (void)register_driver("/dev/urandom", &g_urand_fops, 0666, NULL); diff --git a/include/nuttx/lib/xorshift128.h b/include/nuttx/lib/xorshift128.h index f2952d44d70..b2eec4fc2b8 100644 --- a/include/nuttx/lib/xorshift128.h +++ b/include/nuttx/lib/xorshift128.h @@ -46,6 +46,28 @@ #include +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Default XorShift128 state initializer */ + +#define XORSHIFT128_INITIALIZER { 97, 101, 97 << 17, 101 << 25 } + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Provides the state of the XorShift128 PRNG */ + +struct xorshift128_state_s +{ + uint32_t x; + uint32_t y; + uint32_t z; + uint32_t w; +}; + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ @@ -58,37 +80,27 @@ extern "C" #define EXTERN extern #endif -/**************************************************************************** - * Name: xorshift128_seed - * - * Description: - * Seed the XorShift128 PRNG - * - * Input Parameters: - * w, x, y, z: Values for XorShift128 generation state. - * - * Returned Value: - * No - * - ****************************************************************************/ - -void xorshift128_seed(uint32_t w, uint32_t x, uint32_t y, uint32_t z); - /**************************************************************************** * Name: xorshift128 * * Description: - * Generate one 32-bit pseudo-random number + * Generate one 32-bit pseudo-random number. + * + * NOTE: Because the PRNG state is passed as a parameter, this function is + * fully re-entrant and may be called from an interrupt handler. + * + * The downside to this is that users of the PRNG might not get as much + * entropy as if it were a common state structure. * * Input Parameters: - * None + * state - The current XorShift128 state. * * Returned Value: * The generated pseudo-random number * ****************************************************************************/ -uint32_t xorshift128(void); +uint32_t xorshift128(FAR struct xorshift128_state_s *state); #undef EXTERN #ifdef __cplusplus diff --git a/libc/misc/lib_xorshift128.c b/libc/misc/lib_xorshift128.c index e31867c572d..912740771e3 100644 --- a/libc/misc/lib_xorshift128.c +++ b/libc/misc/lib_xorshift128.c @@ -43,10 +43,11 @@ #include +#include #include -#include +#include -#include +#include /**************************************************************************** * Private Types @@ -56,119 +57,46 @@ # define CONFIG_CPULOAD_ONESHOT_ENTROPY 0 #endif -/**************************************************************************** - * Private Types - ****************************************************************************/ - -struct xorshift128_state_s -{ - uint32_t x; - uint32_t y; - uint32_t z; - uint32_t w; -}; - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static struct xorshift128_state_s g_prng; - /**************************************************************************** * Public Functions ****************************************************************************/ -/**************************************************************************** - * Name: xorshift128_seed - * - * Description: - * Seed the XorShift128 PRNG - * - * Input Parameters: - * w, x, y, z: Values for XorShift128 generation state. - * - * Returned Value: - * No - * - ****************************************************************************/ - -void xorshift128_seed(uint32_t w, uint32_t x, uint32_t y, uint32_t z) -{ - /* With CONFIG_CPULOAD_ONESHOT_ENTROPY > 0, this PRNG could be called from - * the interrupt handling state (currently is not). - */ - -#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 - irqstate_t flags; - - flags = enter_critical_section(); -#else - sched_lock(); -#endif - - /* Seed the PRNG */ - - g_prng.w = w; - g_prng.x = x; - g_prng.y = y; - g_prng.z = z; - -#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 - leave_critical_section(flags); -#else - sched_unlock(); -#endif -} - /**************************************************************************** * Name: xorshift128 * * Description: - * Generate one 32-bit pseudo-random number + * Generate one 32-bit pseudo-random number. + * + * NOTE: Because the PRNG state is passed as a parameter, this function is + * fully re-entrant and may be called from an interrupt handler. + * + * The downside to this is that users of the PRNG might not get as much + * entropy as if it were a common state structure. * * Input Parameters: - * None + * state - The current XorShift128 state. * * Returned Value: * The generated pseudo-random number * ****************************************************************************/ -uint32_t xorshift128(void) +uint32_t xorshift128(FAR struct xorshift128_state_s *state) { - uint32_t ret; uint32_t t; - /* With CONFIG_CPULOAD_ONESHOT_ENTROPY > 0, this PRNG will be called from - * the interrupt handling state. - */ + DEBUGASSERT(state != NULL); -#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 - irqstate_t flags; - - flags = enter_critical_section(); -#else - sched_lock(); -#endif - - t = g_prng.x; + t = state->x; t ^= t << 11; t ^= t >> 8; - g_prng.x = g_prng.y; - g_prng.y = g_prng.z; - g_prng.z = g_prng.w; + state->x = state->y; + state->y = state->z; + state->z = state->w; - g_prng.w ^= g_prng.w >> 19; - g_prng.w ^= t; + state->w ^= state->w >> 19; + state->w ^= t; - ret = g_prng.w; - -#if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 - leave_critical_section(flags); -#else - sched_unlock(); -#endif - - return ret; + return state->w; } diff --git a/sched/sched/sched_cpuload_oneshot.c b/sched/sched/sched_cpuload_oneshot.c index adf96311dff..fba9e43f33a 100644 --- a/sched/sched/sched_cpuload_oneshot.c +++ b/sched/sched/sched_cpuload_oneshot.c @@ -91,6 +91,7 @@ struct sched_oneshot_s { FAR struct oneshot_lowerhalf_s *oneshot; #if CONFIG_CPULOAD_ONESHOT_ENTROPY > 0 + struct xorshift128_state_s prng; int32_t maxdelay; int32_t error; #endif @@ -153,7 +154,7 @@ static void sched_oneshot_start(void) /* Add the random value in the range 0..(CPULOAD_ONESHOT_ENTRY - 1) */ - entropy = xorshift128(); + entropy = xorshift128(&g_sched_oneshot.prng); usecs += (int32_t)(entropy & CPULOAD_ONESHOT_ENTROPY_MASK); DEBUGASSERT(usecs > 0); /* Check for overflow to negative or zero */ @@ -272,7 +273,10 @@ void sched_oneshot_extclk(FAR struct oneshot_lowerhalf_s *lower) /* Seed the PRNG */ - xorshift128_seed(97, 101, 97 << 17, 101 << 25); + g_sched_oneshot.prng.w = 97; + g_sched_oneshot.prng.x = 101; + g_sched_oneshot.prng.y = g_sched_oneshot.prng.w << 17; + g_sched_oneshot.prng.z = g_sched_oneshot.prng.x << 25; #endif /* Then start the oneshot */ From c7da88e3833ce870b03a9166f2fdac9483cbf366 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beat=20K=C3=BCng?= Date: Mon, 22 Aug 2016 08:35:01 +0200 Subject: [PATCH 109/214] CXXFLAGS: add -fcheck-new whenever -fno-exceptions is used This is to avoid GCC to optimize null-pointer checks away, in case the default operator new is used together with -fno-exceptions. --- configs/amber/hello/Make.defs | 2 +- configs/arduino-due/nsh/Make.defs | 2 +- configs/arduino-mega2560/hello/Make.defs | 2 +- configs/arduino-mega2560/nsh/Make.defs | 2 +- configs/avr32dev1/nsh/Make.defs | 2 +- configs/avr32dev1/ostest/Make.defs | 2 +- configs/c5471evm/httpd/Make.defs | 2 +- configs/c5471evm/nettest/Make.defs | 2 +- configs/c5471evm/nsh/Make.defs | 2 +- configs/cc3200-launchpad/nsh/Make.defs | 2 +- configs/cloudctrl/nsh/Make.defs | 2 +- configs/compal_e86/nsh_highram/Make.defs | 2 +- configs/compal_e88/nsh_highram/Make.defs | 2 +- configs/compal_e99/nsh_compalram/Make.defs | 2 +- configs/compal_e99/nsh_highram/Make.defs | 2 +- configs/demo9s12ne64/ostest/Make.defs | 2 +- configs/dk-tm4c129x/ipv6/Make.defs | 2 +- configs/dk-tm4c129x/nsh/Make.defs | 2 +- configs/ea3131/nsh/Make.defs | 2 +- configs/ea3131/pgnsh/Make.defs | 2 +- configs/ea3131/usbserial/Make.defs | 2 +- configs/ea3152/ostest/Make.defs | 2 +- configs/eagle100/httpd/Make.defs | 2 +- configs/eagle100/nettest/Make.defs | 2 +- configs/eagle100/nsh/Make.defs | 2 +- configs/eagle100/nxflat/Make.defs | 2 +- configs/eagle100/thttpd/Make.defs | 2 +- configs/efm32-g8xx-stk/nsh/Make.defs | 2 +- configs/efm32gg-stk3700/nsh/Make.defs | 2 +- configs/ekk-lm3s9b96/nsh/Make.defs | 2 +- configs/fire-stm32v2/nsh/Make.defs | 2 +- configs/freedom-k64f/netnsh/Make.defs | 2 +- configs/freedom-k64f/nsh/Make.defs | 2 +- configs/freedom-kl25z/minnsh/Make.defs | 2 +- configs/freedom-kl25z/nsh/Make.defs | 2 +- configs/freedom-kl26z/minnsh/Make.defs | 2 +- configs/freedom-kl26z/nsh/Make.defs | 2 +- configs/hymini-stm32v/buttons/Make.defs | 2 +- configs/hymini-stm32v/nsh/Make.defs | 2 +- configs/hymini-stm32v/nsh2/Make.defs | 2 +- configs/hymini-stm32v/usbmsc/Make.defs | 2 +- configs/hymini-stm32v/usbnsh/Make.defs | 2 +- configs/hymini-stm32v/usbserial/Make.defs | 2 +- configs/kwikstik-k40/ostest/Make.defs | 2 +- configs/launchxl-tms57004/nsh/Make.defs | 2 +- configs/lincoln60/netnsh/Make.defs | 2 +- configs/lincoln60/nsh/Make.defs | 2 +- configs/lincoln60/thttpd-binfs/Make.defs | 2 +- configs/lm3s6432-s2e/nsh/Make.defs | 2 +- configs/lm3s6965-ek/discover/Make.defs | 2 +- configs/lm3s6965-ek/nsh/Make.defs | 2 +- configs/lm3s6965-ek/nx/Make.defs | 2 +- configs/lm3s6965-ek/tcpecho/Make.defs | 2 +- configs/lm3s8962-ek/nsh/Make.defs | 2 +- configs/lm3s8962-ek/nx/Make.defs | 2 +- configs/lm4f120-launchpad/nsh/Make.defs | 2 +- configs/lpc4330-xplorer/nsh/Make.defs | 2 +- configs/lpc4337-ws/nsh/Make.defs | 2 +- configs/lpc4357-evb/nsh/Make.defs | 2 +- configs/lpc4370-link2/nsh/Make.defs | 2 +- configs/lpcxpresso-lpc1115/minnsh/Make.defs | 2 +- configs/lpcxpresso-lpc1115/nsh/Make.defs | 2 +- configs/lpcxpresso-lpc1768/dhcpd/Make.defs | 2 +- configs/lpcxpresso-lpc1768/nsh/Make.defs | 2 +- configs/lpcxpresso-lpc1768/nx/Make.defs | 2 +- configs/lpcxpresso-lpc1768/thttpd/Make.defs | 2 +- configs/lpcxpresso-lpc1768/usbmsc/Make.defs | 2 +- configs/maple/nsh/Make.defs | 2 +- configs/maple/nx/Make.defs | 2 +- configs/maple/usbnsh/Make.defs | 2 +- configs/mbed/hidkbd/Make.defs | 2 +- configs/mbed/nsh/Make.defs | 2 +- configs/mcu123-lpc214x/composite/Make.defs | 2 +- configs/mcu123-lpc214x/nsh/Make.defs | 2 +- configs/mcu123-lpc214x/usbmsc/Make.defs | 2 +- configs/mcu123-lpc214x/usbserial/Make.defs | 2 +- configs/micropendous3/hello/Make.defs | 2 +- configs/mikroe-stm32f4/fulldemo/Make.defs | 2 +- configs/mikroe-stm32f4/kostest/Make.defs | 2 +- configs/mikroe-stm32f4/nsh/Make.defs | 2 +- configs/mikroe-stm32f4/nx/Make.defs | 2 +- configs/mikroe-stm32f4/nxlines/Make.defs | 2 +- configs/mikroe-stm32f4/nxtext/Make.defs | 2 +- configs/mikroe-stm32f4/usbnsh/Make.defs | 2 +- configs/mirtoo/nsh/Make.defs | 2 +- configs/mirtoo/nxffs/Make.defs | 2 +- configs/moteino-mega/hello/Make.defs | 2 +- configs/moteino-mega/nsh/Make.defs | 2 +- configs/moxa/nsh/Make.defs | 2 +- configs/mx1ads/ostest/Make.defs | 2 +- configs/ne64badge/ostest/Make.defs | 2 +- configs/ntosd-dm320/nettest/Make.defs | 2 +- configs/ntosd-dm320/nsh/Make.defs | 2 +- configs/ntosd-dm320/poll/Make.defs | 2 +- configs/ntosd-dm320/thttpd/Make.defs | 2 +- configs/ntosd-dm320/udp/Make.defs | 2 +- configs/ntosd-dm320/webserver/Make.defs | 2 +- configs/nucleo-144/f746-evalos/Make.defs | 2 +- configs/nucleo-144/f746-nsh/Make.defs | 2 +- configs/nucleo-144/f767-evalos/Make.defs | 2 +- configs/nucleo-144/f767-nsh/Make.defs | 2 +- configs/nucleo-f303re/adc/Make.defs | 2 +- configs/nucleo-f303re/can/Make.defs | 2 +- configs/nucleo-f303re/nxlines/Make.defs | 2 +- configs/nucleo-f303re/pwm/Make.defs | 2 +- configs/nucleo-f303re/serialrx/Make.defs | 2 +- configs/nucleo-f303re/uavcan/Make.defs | 2 +- configs/nucleo-f4x1re/f401-nsh/Make.defs | 2 +- configs/nucleo-f4x1re/f411-nsh/Make.defs | 2 +- configs/nucleo-l476rg/nsh/Make.defs | 2 +- configs/nutiny-nuc120/nsh/Make.defs | 2 +- configs/olimex-efm32g880f128-stk/nsh/Make.defs | 2 +- configs/olimex-lpc-h3131/nsh/Make.defs | 2 +- configs/olimex-lpc1766stk/ftpc/Make.defs | 2 +- configs/olimex-lpc1766stk/hidkbd/Make.defs | 2 +- configs/olimex-lpc1766stk/hidmouse/Make.defs | 2 +- configs/olimex-lpc1766stk/nettest/Make.defs | 2 +- configs/olimex-lpc1766stk/nsh/Make.defs | 2 +- configs/olimex-lpc1766stk/nx/Make.defs | 2 +- configs/olimex-lpc1766stk/slip-httpd/Make.defs | 2 +- configs/olimex-lpc1766stk/thttpd-binfs/Make.defs | 2 +- configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs | 2 +- configs/olimex-lpc1766stk/usbmsc/Make.defs | 2 +- configs/olimex-lpc1766stk/usbserial/Make.defs | 2 +- configs/olimex-lpc1766stk/zmodem/Make.defs | 2 +- configs/olimex-lpc2378/nsh/Make.defs | 2 +- configs/olimex-stm32-e407/nsh/Make.defs | 2 +- configs/olimex-stm32-e407/usbnsh/Make.defs | 2 +- configs/olimex-stm32-h405/usbnsh/Make.defs | 2 +- configs/olimex-stm32-h407/nsh/Make.defs | 2 +- configs/olimex-stm32-p107/nsh/Make.defs | 2 +- configs/olimex-stm32-p207/nsh/Make.defs | 2 +- configs/olimex-strp711/nettest/Make.defs | 2 +- configs/olimex-strp711/nsh/Make.defs | 2 +- configs/olimexino-stm32/can/Make.defs | 2 +- configs/olimexino-stm32/composite/Make.defs | 2 +- configs/olimexino-stm32/nsh/Make.defs | 2 +- configs/olimexino-stm32/smallnsh/Make.defs | 2 +- configs/olimexino-stm32/tiny/Make.defs | 2 +- configs/open1788/knsh/Make.defs | 2 +- configs/open1788/nsh/Make.defs | 2 +- configs/open1788/nxlines/Make.defs | 2 +- configs/pcblogic-pic32mx/nsh/Make.defs | 2 +- configs/pcduino-a10/nsh/Make.defs | 2 +- configs/pic32mx-starterkit/nsh/Make.defs | 2 +- configs/pic32mx-starterkit/nsh2/Make.defs | 2 +- configs/pic32mx7mmb/nsh/Make.defs | 2 +- configs/pic32mz-starterkit/nsh/Make.defs | 2 +- configs/pirelli_dpl10/nsh_highram/Make.defs | 2 +- configs/rgmp/x86/cxxtest/Make.defs | 2 +- configs/rgmp/x86/helloxx/Make.defs | 2 +- configs/sabre-6quad/nsh/Make.defs | 2 +- configs/sabre-6quad/smp/Make.defs | 2 +- configs/sam3u-ek/knsh/Make.defs | 2 +- configs/sam3u-ek/nsh/Make.defs | 2 +- configs/sam3u-ek/nx/Make.defs | 2 +- configs/sam3u-ek/nxwm/Make.defs | 2 +- configs/sam4e-ek/nsh/Make.defs | 2 +- configs/sam4e-ek/nxwm/Make.defs | 2 +- configs/sam4e-ek/usbnsh/Make.defs | 2 +- configs/sam4l-xplained/nsh/Make.defs | 2 +- configs/sam4s-xplained-pro/nsh/Make.defs | 2 +- configs/sam4s-xplained/nsh/Make.defs | 2 +- configs/sama5d2-xult/nsh/Make.defs | 2 +- configs/sama5d3-xplained/bridge/Make.defs | 2 +- configs/sama5d3-xplained/nsh/Make.defs | 2 +- configs/sama5d3x-ek/demo/Make.defs | 2 +- configs/sama5d3x-ek/hello/Make.defs | 2 +- configs/sama5d3x-ek/norboot/Make.defs | 2 +- configs/sama5d3x-ek/nsh/Make.defs | 2 +- configs/sama5d3x-ek/nx/Make.defs | 2 +- configs/sama5d3x-ek/nxplayer/Make.defs | 2 +- configs/sama5d3x-ek/nxwm/Make.defs | 2 +- configs/sama5d3x-ek/ov2640/Make.defs | 2 +- configs/sama5d4-ek/at25boot/Make.defs | 2 +- configs/sama5d4-ek/bridge/Make.defs | 2 +- configs/sama5d4-ek/dramboot/Make.defs | 2 +- configs/sama5d4-ek/elf/Make.defs | 2 +- configs/sama5d4-ek/ipv6/Make.defs | 2 +- configs/sama5d4-ek/knsh/Make.defs | 2 +- configs/sama5d4-ek/nsh/Make.defs | 2 +- configs/sama5d4-ek/nxwm/Make.defs | 2 +- configs/sama5d4-ek/ramtest/Make.defs | 2 +- configs/samd20-xplained/nsh/Make.defs | 2 +- configs/samd21-xplained/nsh/Make.defs | 2 +- configs/same70-xplained/netnsh/Make.defs | 2 +- configs/same70-xplained/nsh/Make.defs | 2 +- configs/saml21-xplained/nsh/Make.defs | 2 +- configs/samv71-xult/knsh/Make.defs | 2 +- configs/samv71-xult/module/Make.defs | 2 +- configs/samv71-xult/mxtxplnd/Make.defs | 2 +- configs/samv71-xult/netnsh/Make.defs | 2 +- configs/samv71-xult/nsh/Make.defs | 2 +- configs/samv71-xult/nxwm/Make.defs | 2 +- configs/samv71-xult/vnc/Make.defs | 2 +- configs/samv71-xult/vnxwm/Make.defs | 2 +- configs/shenzhou/nsh/Make.defs | 2 +- configs/shenzhou/nxwm/Make.defs | 2 +- configs/shenzhou/thttpd/Make.defs | 2 +- configs/sim/bas/Make.defs | 2 +- configs/sim/configdata/Make.defs | 2 +- configs/sim/cxxtest/Make.defs | 2 +- configs/sim/minibasic/Make.defs | 2 +- configs/sim/mount/Make.defs | 2 +- configs/sim/mtdpart/Make.defs | 2 +- configs/sim/mtdrwb/Make.defs | 2 +- configs/sim/nettest/Make.defs | 2 +- configs/sim/nsh/Make.defs | 2 +- configs/sim/nsh2/Make.defs | 2 +- configs/sim/nx/Make.defs | 2 +- configs/sim/nx11/Make.defs | 2 +- configs/sim/nxffs/Make.defs | 2 +- configs/sim/nxlines/Make.defs | 2 +- configs/sim/nxwm/Make.defs | 2 +- configs/sim/ostest/Make.defs | 2 +- configs/sim/pashello/Make.defs | 2 +- configs/sim/touchscreen/Make.defs | 2 +- configs/sim/traveler/Make.defs | 2 +- configs/sim/udgram/Make.defs | 2 +- configs/sim/unionfs/Make.defs | 2 +- configs/sim/ustream/Make.defs | 2 +- configs/spark/composite/Make.defs | 2 +- configs/spark/nsh/Make.defs | 2 +- configs/spark/usbmsc/Make.defs | 2 +- configs/spark/usbnsh/Make.defs | 2 +- configs/spark/usbserial/Make.defs | 2 +- configs/stm3210e-eval/buttons/Make.defs | 2 +- configs/stm3210e-eval/composite/Make.defs | 2 +- configs/stm3210e-eval/nsh/Make.defs | 2 +- configs/stm3210e-eval/nsh2/Make.defs | 2 +- configs/stm3210e-eval/nx/Make.defs | 2 +- configs/stm3210e-eval/nxterm/Make.defs | 2 +- configs/stm3210e-eval/pm/Make.defs | 2 +- configs/stm3210e-eval/usbmsc/Make.defs | 2 +- configs/stm3210e-eval/usbserial/Make.defs | 2 +- configs/stm3220g-eval/dhcpd/Make.defs | 2 +- configs/stm3220g-eval/nettest/Make.defs | 2 +- configs/stm3220g-eval/nsh/Make.defs | 2 +- configs/stm3220g-eval/nsh2/Make.defs | 2 +- configs/stm3220g-eval/nxwm/Make.defs | 2 +- configs/stm3220g-eval/telnetd/Make.defs | 2 +- configs/stm3240g-eval/dhcpd/Make.defs | 2 +- configs/stm3240g-eval/discover/Make.defs | 2 +- configs/stm3240g-eval/knxwm/Make.defs | 2 +- configs/stm3240g-eval/nettest/Make.defs | 2 +- configs/stm3240g-eval/nsh/Make.defs | 2 +- configs/stm3240g-eval/nsh2/Make.defs | 2 +- configs/stm3240g-eval/nxterm/Make.defs | 2 +- configs/stm3240g-eval/nxwm/Make.defs | 2 +- configs/stm3240g-eval/telnetd/Make.defs | 2 +- configs/stm3240g-eval/webserver/Make.defs | 2 +- configs/stm3240g-eval/xmlrpc/Make.defs | 2 +- configs/stm32_tiny/nsh/Make.defs | 2 +- configs/stm32_tiny/usbnsh/Make.defs | 2 +- configs/stm32butterfly2/nsh/Make.defs | 2 +- configs/stm32butterfly2/nshnet/Make.defs | 2 +- configs/stm32butterfly2/nshusbdev/Make.defs | 2 +- configs/stm32butterfly2/nshusbhost/Make.defs | 2 +- configs/stm32f103-minimum/audio_tone/Make.defs | 2 +- configs/stm32f103-minimum/minnsh/Make.defs | 2 +- configs/stm32f103-minimum/nsh/Make.defs | 2 +- configs/stm32f103-minimum/rfid-rc522/Make.defs | 2 +- configs/stm32f103-minimum/usbnsh/Make.defs | 2 +- configs/stm32f3discovery/nsh/Make.defs | 2 +- configs/stm32f3discovery/usbnsh/Make.defs | 2 +- configs/stm32f411e-disco/nsh/Make.defs | 2 +- configs/stm32f429i-disco/extflash/Make.defs | 2 +- configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj | 2 +- configs/stm32f429i-disco/lcd/Make.defs | 2 +- configs/stm32f429i-disco/ltdc/Make.defs | 2 +- configs/stm32f429i-disco/nsh/Make.defs | 2 +- configs/stm32f429i-disco/usbmsc/Make.defs | 2 +- configs/stm32f429i-disco/usbnsh/Make.defs | 2 +- configs/stm32f4discovery/canard/Make.defs | 2 +- configs/stm32f4discovery/cxxtest/Make.defs | 2 +- configs/stm32f4discovery/elf/Make.defs | 2 +- configs/stm32f4discovery/ipv6/Make.defs | 2 +- configs/stm32f4discovery/kostest/Make.defs | 2 +- configs/stm32f4discovery/netnsh/Make.defs | 2 +- configs/stm32f4discovery/nsh/Make.defs | 2 +- configs/stm32f4discovery/nxlines/Make.defs | 2 +- configs/stm32f4discovery/pm/Make.defs | 2 +- configs/stm32f4discovery/posix_spawn/Make.defs | 2 +- configs/stm32f4discovery/pseudoterm/Make.defs | 2 +- configs/stm32f4discovery/rgbled/Make.defs | 2 +- configs/stm32f4discovery/uavcan/Make.defs | 2 +- configs/stm32f4discovery/usbnsh/Make.defs | 2 +- configs/stm32f4discovery/winbuild/Make.defs | 2 +- configs/stm32f746-ws/nsh/Make.defs | 2 +- configs/stm32f746g-disco/nsh/Make.defs | 2 +- configs/stm32l476vg-disco/nsh/Make.defs | 2 +- configs/stm32ldiscovery/nsh/Make.defs | 2 +- configs/stm32vldiscovery/nsh/Make.defs | 2 +- configs/sure-pic32mx/nsh/Make.defs | 2 +- configs/sure-pic32mx/usbnsh/Make.defs | 2 +- configs/teensy-2.0/hello/Make.defs | 2 +- configs/teensy-2.0/nsh/Make.defs | 2 +- configs/teensy-2.0/usbmsc/Make.defs | 2 +- configs/teensy-3.x/nsh/Make.defs | 2 +- configs/teensy-3.x/usbnsh/Make.defs | 2 +- configs/teensy-lc/nsh/Make.defs | 2 +- configs/tm4c123g-launchpad/nsh/Make.defs | 2 +- configs/tm4c1294-launchpad/ipv6/Make.defs | 2 +- configs/tm4c1294-launchpad/nsh/Make.defs | 2 +- configs/twr-k60n512/nsh/Make.defs | 2 +- configs/u-blox-c027/nsh/Make.defs | 2 +- configs/ubw32/nsh/Make.defs | 2 +- configs/viewtool-stm32f107/highpri/Make.defs | 2 +- configs/viewtool-stm32f107/netnsh/Make.defs | 2 +- configs/viewtool-stm32f107/nsh/Make.defs | 2 +- configs/zkit-arm-1769/hello/Make.defs | 2 +- configs/zkit-arm-1769/nsh/Make.defs | 2 +- configs/zkit-arm-1769/nxhello/Make.defs | 2 +- configs/zkit-arm-1769/thttpd/Make.defs | 2 +- configs/zp214xpa/nsh/Make.defs | 2 +- configs/zp214xpa/nxlines/Make.defs | 2 +- tools/ide_exporter.py | 2 +- 317 files changed, 317 insertions(+), 317 deletions(-) diff --git a/configs/amber/hello/Make.defs b/configs/amber/hello/Make.defs index d618c22cd3b..f29c795612d 100644 --- a/configs/amber/hello/Make.defs +++ b/configs/amber/hello/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/arduino-due/nsh/Make.defs b/configs/arduino-due/nsh/Make.defs index d31a08dd18a..b4601eb781b 100644 --- a/configs/arduino-due/nsh/Make.defs +++ b/configs/arduino-due/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/arduino-mega2560/hello/Make.defs b/configs/arduino-mega2560/hello/Make.defs index 9eb35f515d0..6371c1a5888 100644 --- a/configs/arduino-mega2560/hello/Make.defs +++ b/configs/arduino-mega2560/hello/Make.defs @@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/arduino-mega2560/nsh/Make.defs b/configs/arduino-mega2560/nsh/Make.defs index b007c01f8ab..b18a53d33cf 100644 --- a/configs/arduino-mega2560/nsh/Make.defs +++ b/configs/arduino-mega2560/nsh/Make.defs @@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/avr32dev1/nsh/Make.defs b/configs/avr32dev1/nsh/Make.defs index 6b1f20c0a3c..e6326948d03 100644 --- a/configs/avr32dev1/nsh/Make.defs +++ b/configs/avr32dev1/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -muse-rodata-section -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/avr32dev1/ostest/Make.defs b/configs/avr32dev1/ostest/Make.defs index d3265550b1e..148184d6e88 100644 --- a/configs/avr32dev1/ostest/Make.defs +++ b/configs/avr32dev1/ostest/Make.defs @@ -88,7 +88,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -muse-rodata-section -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/c5471evm/httpd/Make.defs b/configs/c5471evm/httpd/Make.defs index aa491bb2bc7..04559d8c881 100644 --- a/configs/c5471evm/httpd/Make.defs +++ b/configs/c5471evm/httpd/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/c5471evm/nettest/Make.defs b/configs/c5471evm/nettest/Make.defs index 0cd136c400e..e820990001c 100644 --- a/configs/c5471evm/nettest/Make.defs +++ b/configs/c5471evm/nettest/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/c5471evm/nsh/Make.defs b/configs/c5471evm/nsh/Make.defs index 9e22f8ef31c..a9cf4c6de9a 100644 --- a/configs/c5471evm/nsh/Make.defs +++ b/configs/c5471evm/nsh/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/cc3200-launchpad/nsh/Make.defs b/configs/cc3200-launchpad/nsh/Make.defs index cfd7bd23801..42caa758dc5 100644 --- a/configs/cc3200-launchpad/nsh/Make.defs +++ b/configs/cc3200-launchpad/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/cloudctrl/nsh/Make.defs b/configs/cloudctrl/nsh/Make.defs index c4fddea5763..e2befae18ee 100644 --- a/configs/cloudctrl/nsh/Make.defs +++ b/configs/cloudctrl/nsh/Make.defs @@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/compal_e86/nsh_highram/Make.defs b/configs/compal_e86/nsh_highram/Make.defs index 2ecbdabf7f2..c06a6821b16 100644 --- a/configs/compal_e86/nsh_highram/Make.defs +++ b/configs/compal_e86/nsh_highram/Make.defs @@ -104,7 +104,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/compal_e88/nsh_highram/Make.defs b/configs/compal_e88/nsh_highram/Make.defs index 707d08fb0c3..e9c3e239431 100644 --- a/configs/compal_e88/nsh_highram/Make.defs +++ b/configs/compal_e88/nsh_highram/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/compal_e99/nsh_compalram/Make.defs b/configs/compal_e99/nsh_compalram/Make.defs index 2920fb27d69..ce04422ec83 100644 --- a/configs/compal_e99/nsh_compalram/Make.defs +++ b/configs/compal_e99/nsh_compalram/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/compal_e99/nsh_highram/Make.defs b/configs/compal_e99/nsh_highram/Make.defs index 28c0f00c54a..7eaac99e8bb 100644 --- a/configs/compal_e99/nsh_highram/Make.defs +++ b/configs/compal_e99/nsh_highram/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/demo9s12ne64/ostest/Make.defs b/configs/demo9s12ne64/ostest/Make.defs index 10da8b273bc..ade31496484 100644 --- a/configs/demo9s12ne64/ostest/Make.defs +++ b/configs/demo9s12ne64/ostest/Make.defs @@ -93,7 +93,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/dk-tm4c129x/ipv6/Make.defs b/configs/dk-tm4c129x/ipv6/Make.defs index 4bfa5b11400..549d8e15041 100644 --- a/configs/dk-tm4c129x/ipv6/Make.defs +++ b/configs/dk-tm4c129x/ipv6/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/dk-tm4c129x/nsh/Make.defs b/configs/dk-tm4c129x/nsh/Make.defs index f4cb4a1c425..fedf001b9a7 100644 --- a/configs/dk-tm4c129x/nsh/Make.defs +++ b/configs/dk-tm4c129x/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/ea3131/nsh/Make.defs b/configs/ea3131/nsh/Make.defs index 34d4de104c9..e8936674638 100644 --- a/configs/ea3131/nsh/Make.defs +++ b/configs/ea3131/nsh/Make.defs @@ -80,7 +80,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/ea3131/pgnsh/Make.defs b/configs/ea3131/pgnsh/Make.defs index 6fc83590127..aa4ce223e72 100644 --- a/configs/ea3131/pgnsh/Make.defs +++ b/configs/ea3131/pgnsh/Make.defs @@ -80,7 +80,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/ea3131/usbserial/Make.defs b/configs/ea3131/usbserial/Make.defs index 197b58b394b..815235e27c6 100644 --- a/configs/ea3131/usbserial/Make.defs +++ b/configs/ea3131/usbserial/Make.defs @@ -80,7 +80,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/ea3152/ostest/Make.defs b/configs/ea3152/ostest/Make.defs index 633fbdaedf9..c905c78101f 100644 --- a/configs/ea3152/ostest/Make.defs +++ b/configs/ea3152/ostest/Make.defs @@ -80,7 +80,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/eagle100/httpd/Make.defs b/configs/eagle100/httpd/Make.defs index 285185d1e59..122c5ae5685 100644 --- a/configs/eagle100/httpd/Make.defs +++ b/configs/eagle100/httpd/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/eagle100/nettest/Make.defs b/configs/eagle100/nettest/Make.defs index 93d96b81d5d..98547e9e314 100644 --- a/configs/eagle100/nettest/Make.defs +++ b/configs/eagle100/nettest/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/eagle100/nsh/Make.defs b/configs/eagle100/nsh/Make.defs index 58144909900..5709148db69 100644 --- a/configs/eagle100/nsh/Make.defs +++ b/configs/eagle100/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/eagle100/nxflat/Make.defs b/configs/eagle100/nxflat/Make.defs index a3ded7f0c44..a4120633567 100644 --- a/configs/eagle100/nxflat/Make.defs +++ b/configs/eagle100/nxflat/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/eagle100/thttpd/Make.defs b/configs/eagle100/thttpd/Make.defs index e5405e96bc7..061b695fe7c 100644 --- a/configs/eagle100/thttpd/Make.defs +++ b/configs/eagle100/thttpd/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/efm32-g8xx-stk/nsh/Make.defs b/configs/efm32-g8xx-stk/nsh/Make.defs index d1fd99eca4c..c9feff08e21 100644 --- a/configs/efm32-g8xx-stk/nsh/Make.defs +++ b/configs/efm32-g8xx-stk/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/efm32gg-stk3700/nsh/Make.defs b/configs/efm32gg-stk3700/nsh/Make.defs index d1fd99eca4c..c9feff08e21 100644 --- a/configs/efm32gg-stk3700/nsh/Make.defs +++ b/configs/efm32gg-stk3700/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/ekk-lm3s9b96/nsh/Make.defs b/configs/ekk-lm3s9b96/nsh/Make.defs index 83c70458db4..7fdee356dcb 100644 --- a/configs/ekk-lm3s9b96/nsh/Make.defs +++ b/configs/ekk-lm3s9b96/nsh/Make.defs @@ -75,7 +75,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/fire-stm32v2/nsh/Make.defs b/configs/fire-stm32v2/nsh/Make.defs index 6c57737576b..a9dd58a11e6 100644 --- a/configs/fire-stm32v2/nsh/Make.defs +++ b/configs/fire-stm32v2/nsh/Make.defs @@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/freedom-k64f/netnsh/Make.defs b/configs/freedom-k64f/netnsh/Make.defs index 81ee818d815..aca1ad4843a 100644 --- a/configs/freedom-k64f/netnsh/Make.defs +++ b/configs/freedom-k64f/netnsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/freedom-k64f/nsh/Make.defs b/configs/freedom-k64f/nsh/Make.defs index c0f3c57b41e..4163c0a7f1f 100644 --- a/configs/freedom-k64f/nsh/Make.defs +++ b/configs/freedom-k64f/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/freedom-kl25z/minnsh/Make.defs b/configs/freedom-kl25z/minnsh/Make.defs index c3ff3df8144..453b86e4cfa 100644 --- a/configs/freedom-kl25z/minnsh/Make.defs +++ b/configs/freedom-kl25z/minnsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/freedom-kl25z/nsh/Make.defs b/configs/freedom-kl25z/nsh/Make.defs index eac2f1bdbc4..4eb098fbe9b 100644 --- a/configs/freedom-kl25z/nsh/Make.defs +++ b/configs/freedom-kl25z/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/freedom-kl26z/minnsh/Make.defs b/configs/freedom-kl26z/minnsh/Make.defs index ed7eb039329..380541961dc 100644 --- a/configs/freedom-kl26z/minnsh/Make.defs +++ b/configs/freedom-kl26z/minnsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/freedom-kl26z/nsh/Make.defs b/configs/freedom-kl26z/nsh/Make.defs index 2b9689badcf..4d982e93b7f 100644 --- a/configs/freedom-kl26z/nsh/Make.defs +++ b/configs/freedom-kl26z/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/hymini-stm32v/buttons/Make.defs b/configs/hymini-stm32v/buttons/Make.defs index 47431700b7d..8a2b9857ab3 100644 --- a/configs/hymini-stm32v/buttons/Make.defs +++ b/configs/hymini-stm32v/buttons/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/hymini-stm32v/nsh/Make.defs b/configs/hymini-stm32v/nsh/Make.defs index dd649da9384..c9945fc47a1 100644 --- a/configs/hymini-stm32v/nsh/Make.defs +++ b/configs/hymini-stm32v/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/hymini-stm32v/nsh2/Make.defs b/configs/hymini-stm32v/nsh2/Make.defs index 27b64cc342a..3d9cfeb6d0a 100644 --- a/configs/hymini-stm32v/nsh2/Make.defs +++ b/configs/hymini-stm32v/nsh2/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/hymini-stm32v/usbmsc/Make.defs b/configs/hymini-stm32v/usbmsc/Make.defs index f459f47fcb5..55dec5b6487 100644 --- a/configs/hymini-stm32v/usbmsc/Make.defs +++ b/configs/hymini-stm32v/usbmsc/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/hymini-stm32v/usbnsh/Make.defs b/configs/hymini-stm32v/usbnsh/Make.defs index 5df2960ed6a..4bd8b6ed893 100644 --- a/configs/hymini-stm32v/usbnsh/Make.defs +++ b/configs/hymini-stm32v/usbnsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/hymini-stm32v/usbserial/Make.defs b/configs/hymini-stm32v/usbserial/Make.defs index 8209827f16e..e7799b6b6c2 100644 --- a/configs/hymini-stm32v/usbserial/Make.defs +++ b/configs/hymini-stm32v/usbserial/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/kwikstik-k40/ostest/Make.defs b/configs/kwikstik-k40/ostest/Make.defs index b7632320e75..c1e82ed935e 100644 --- a/configs/kwikstik-k40/ostest/Make.defs +++ b/configs/kwikstik-k40/ostest/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/launchxl-tms57004/nsh/Make.defs b/configs/launchxl-tms57004/nsh/Make.defs index db2eff3d693..fffb827e255 100644 --- a/configs/launchxl-tms57004/nsh/Make.defs +++ b/configs/launchxl-tms57004/nsh/Make.defs @@ -70,7 +70,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-r4 -mbig-endian ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lincoln60/netnsh/Make.defs b/configs/lincoln60/netnsh/Make.defs index 991b367b280..509e132306c 100644 --- a/configs/lincoln60/netnsh/Make.defs +++ b/configs/lincoln60/netnsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lincoln60/nsh/Make.defs b/configs/lincoln60/nsh/Make.defs index 30722c1d3a5..d7d518c15cc 100644 --- a/configs/lincoln60/nsh/Make.defs +++ b/configs/lincoln60/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lincoln60/thttpd-binfs/Make.defs b/configs/lincoln60/thttpd-binfs/Make.defs index a9f026a8ee5..715f8f59658 100644 --- a/configs/lincoln60/thttpd-binfs/Make.defs +++ b/configs/lincoln60/thttpd-binfs/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm3s6432-s2e/nsh/Make.defs b/configs/lm3s6432-s2e/nsh/Make.defs index fda1b4dad91..09536ab68dd 100644 --- a/configs/lm3s6432-s2e/nsh/Make.defs +++ b/configs/lm3s6432-s2e/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm3s6965-ek/discover/Make.defs b/configs/lm3s6965-ek/discover/Make.defs index b3578aa89b1..cd1c5fbb773 100644 --- a/configs/lm3s6965-ek/discover/Make.defs +++ b/configs/lm3s6965-ek/discover/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm3s6965-ek/nsh/Make.defs b/configs/lm3s6965-ek/nsh/Make.defs index 035e23651bd..86704811fa5 100644 --- a/configs/lm3s6965-ek/nsh/Make.defs +++ b/configs/lm3s6965-ek/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm3s6965-ek/nx/Make.defs b/configs/lm3s6965-ek/nx/Make.defs index bfd85cbf544..b9daa76e007 100644 --- a/configs/lm3s6965-ek/nx/Make.defs +++ b/configs/lm3s6965-ek/nx/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm3s6965-ek/tcpecho/Make.defs b/configs/lm3s6965-ek/tcpecho/Make.defs index dbe06b64b0d..2b735fe8920 100644 --- a/configs/lm3s6965-ek/tcpecho/Make.defs +++ b/configs/lm3s6965-ek/tcpecho/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm3s8962-ek/nsh/Make.defs b/configs/lm3s8962-ek/nsh/Make.defs index 473080351af..eddb4e1b06b 100644 --- a/configs/lm3s8962-ek/nsh/Make.defs +++ b/configs/lm3s8962-ek/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm3s8962-ek/nx/Make.defs b/configs/lm3s8962-ek/nx/Make.defs index aa65554d0c3..49e399f502c 100644 --- a/configs/lm3s8962-ek/nx/Make.defs +++ b/configs/lm3s8962-ek/nx/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lm4f120-launchpad/nsh/Make.defs b/configs/lm4f120-launchpad/nsh/Make.defs index c9ff1c67c40..de827838bdc 100644 --- a/configs/lm4f120-launchpad/nsh/Make.defs +++ b/configs/lm4f120-launchpad/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpc4330-xplorer/nsh/Make.defs b/configs/lpc4330-xplorer/nsh/Make.defs index e5d4fc2f4f8..ec8fc2a59c8 100644 --- a/configs/lpc4330-xplorer/nsh/Make.defs +++ b/configs/lpc4330-xplorer/nsh/Make.defs @@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpc4337-ws/nsh/Make.defs b/configs/lpc4337-ws/nsh/Make.defs index 2192ced6f12..2800be7c26d 100644 --- a/configs/lpc4337-ws/nsh/Make.defs +++ b/configs/lpc4337-ws/nsh/Make.defs @@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpc4357-evb/nsh/Make.defs b/configs/lpc4357-evb/nsh/Make.defs index 544476cdd10..d0fe9706c8b 100644 --- a/configs/lpc4357-evb/nsh/Make.defs +++ b/configs/lpc4357-evb/nsh/Make.defs @@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpc4370-link2/nsh/Make.defs b/configs/lpc4370-link2/nsh/Make.defs index d4b811e51f7..0dfbced7738 100644 --- a/configs/lpc4370-link2/nsh/Make.defs +++ b/configs/lpc4370-link2/nsh/Make.defs @@ -94,7 +94,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpcxpresso-lpc1115/minnsh/Make.defs b/configs/lpcxpresso-lpc1115/minnsh/Make.defs index caef0baee28..5024dbe9ca5 100644 --- a/configs/lpcxpresso-lpc1115/minnsh/Make.defs +++ b/configs/lpcxpresso-lpc1115/minnsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpcxpresso-lpc1115/nsh/Make.defs b/configs/lpcxpresso-lpc1115/nsh/Make.defs index f04d2f6b4a2..aac34e079d1 100644 --- a/configs/lpcxpresso-lpc1115/nsh/Make.defs +++ b/configs/lpcxpresso-lpc1115/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpcxpresso-lpc1768/dhcpd/Make.defs b/configs/lpcxpresso-lpc1768/dhcpd/Make.defs index 0e863a3a679..9520c26d702 100644 --- a/configs/lpcxpresso-lpc1768/dhcpd/Make.defs +++ b/configs/lpcxpresso-lpc1768/dhcpd/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpcxpresso-lpc1768/nsh/Make.defs b/configs/lpcxpresso-lpc1768/nsh/Make.defs index f1d73a762ba..63cc8080b64 100644 --- a/configs/lpcxpresso-lpc1768/nsh/Make.defs +++ b/configs/lpcxpresso-lpc1768/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpcxpresso-lpc1768/nx/Make.defs b/configs/lpcxpresso-lpc1768/nx/Make.defs index 859d8b1ced1..8d38fdf494e 100644 --- a/configs/lpcxpresso-lpc1768/nx/Make.defs +++ b/configs/lpcxpresso-lpc1768/nx/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpcxpresso-lpc1768/thttpd/Make.defs b/configs/lpcxpresso-lpc1768/thttpd/Make.defs index eaf80e62697..8ce4329157f 100644 --- a/configs/lpcxpresso-lpc1768/thttpd/Make.defs +++ b/configs/lpcxpresso-lpc1768/thttpd/Make.defs @@ -79,7 +79,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/lpcxpresso-lpc1768/usbmsc/Make.defs b/configs/lpcxpresso-lpc1768/usbmsc/Make.defs index 540f585a1d3..783f3adbaca 100644 --- a/configs/lpcxpresso-lpc1768/usbmsc/Make.defs +++ b/configs/lpcxpresso-lpc1768/usbmsc/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/maple/nsh/Make.defs b/configs/maple/nsh/Make.defs index 4516544f1a0..38f114a8f42 100644 --- a/configs/maple/nsh/Make.defs +++ b/configs/maple/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/maple/nx/Make.defs b/configs/maple/nx/Make.defs index 3d223e0c770..bdd3f1ad2b9 100644 --- a/configs/maple/nx/Make.defs +++ b/configs/maple/nx/Make.defs @@ -78,7 +78,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/maple/usbnsh/Make.defs b/configs/maple/usbnsh/Make.defs index 8820947ef8f..a52241bf0c3 100644 --- a/configs/maple/usbnsh/Make.defs +++ b/configs/maple/usbnsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mbed/hidkbd/Make.defs b/configs/mbed/hidkbd/Make.defs index fc07f4425f0..564ab05bd6e 100644 --- a/configs/mbed/hidkbd/Make.defs +++ b/configs/mbed/hidkbd/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mbed/nsh/Make.defs b/configs/mbed/nsh/Make.defs index 24a6a056369..e51bd0cc197 100644 --- a/configs/mbed/nsh/Make.defs +++ b/configs/mbed/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mcu123-lpc214x/composite/Make.defs b/configs/mcu123-lpc214x/composite/Make.defs index 8d1cd5305ea..2d895b3b04e 100644 --- a/configs/mcu123-lpc214x/composite/Make.defs +++ b/configs/mcu123-lpc214x/composite/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/mcu123-lpc214x/nsh/Make.defs b/configs/mcu123-lpc214x/nsh/Make.defs index e7f4792f8a0..0ff9eb00870 100644 --- a/configs/mcu123-lpc214x/nsh/Make.defs +++ b/configs/mcu123-lpc214x/nsh/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/mcu123-lpc214x/usbmsc/Make.defs b/configs/mcu123-lpc214x/usbmsc/Make.defs index cbdb32871ac..3a8b2bb9e20 100644 --- a/configs/mcu123-lpc214x/usbmsc/Make.defs +++ b/configs/mcu123-lpc214x/usbmsc/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/mcu123-lpc214x/usbserial/Make.defs b/configs/mcu123-lpc214x/usbserial/Make.defs index 5e6d6aa799a..e5b9f6ea347 100644 --- a/configs/mcu123-lpc214x/usbserial/Make.defs +++ b/configs/mcu123-lpc214x/usbserial/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/micropendous3/hello/Make.defs b/configs/micropendous3/hello/Make.defs index 3319e5ddf08..cb4766fc67a 100644 --- a/configs/micropendous3/hello/Make.defs +++ b/configs/micropendous3/hello/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mikroe-stm32f4/fulldemo/Make.defs b/configs/mikroe-stm32f4/fulldemo/Make.defs index 6dbe0a0fa38..dea26ef1170 100644 --- a/configs/mikroe-stm32f4/fulldemo/Make.defs +++ b/configs/mikroe-stm32f4/fulldemo/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mikroe-stm32f4/kostest/Make.defs b/configs/mikroe-stm32f4/kostest/Make.defs index 15aaec72bcd..82008eeefbf 100644 --- a/configs/mikroe-stm32f4/kostest/Make.defs +++ b/configs/mikroe-stm32f4/kostest/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mikroe-stm32f4/nsh/Make.defs b/configs/mikroe-stm32f4/nsh/Make.defs index fbf03ea8531..6cfdaa94372 100644 --- a/configs/mikroe-stm32f4/nsh/Make.defs +++ b/configs/mikroe-stm32f4/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mikroe-stm32f4/nx/Make.defs b/configs/mikroe-stm32f4/nx/Make.defs index 6dbe0a0fa38..dea26ef1170 100644 --- a/configs/mikroe-stm32f4/nx/Make.defs +++ b/configs/mikroe-stm32f4/nx/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mikroe-stm32f4/nxlines/Make.defs b/configs/mikroe-stm32f4/nxlines/Make.defs index 6dbe0a0fa38..dea26ef1170 100644 --- a/configs/mikroe-stm32f4/nxlines/Make.defs +++ b/configs/mikroe-stm32f4/nxlines/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mikroe-stm32f4/nxtext/Make.defs b/configs/mikroe-stm32f4/nxtext/Make.defs index 6dbe0a0fa38..dea26ef1170 100644 --- a/configs/mikroe-stm32f4/nxtext/Make.defs +++ b/configs/mikroe-stm32f4/nxtext/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mikroe-stm32f4/usbnsh/Make.defs b/configs/mikroe-stm32f4/usbnsh/Make.defs index 6dbe0a0fa38..dea26ef1170 100644 --- a/configs/mikroe-stm32f4/usbnsh/Make.defs +++ b/configs/mikroe-stm32f4/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mirtoo/nsh/Make.defs b/configs/mirtoo/nsh/Make.defs index e7bff768910..9bd36ad8f77 100644 --- a/configs/mirtoo/nsh/Make.defs +++ b/configs/mirtoo/nsh/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mirtoo/nxffs/Make.defs b/configs/mirtoo/nxffs/Make.defs index 8943e8f1b60..ffffe47aa3b 100644 --- a/configs/mirtoo/nxffs/Make.defs +++ b/configs/mirtoo/nxffs/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/moteino-mega/hello/Make.defs b/configs/moteino-mega/hello/Make.defs index 75bb1f6e6b9..02037786d8f 100644 --- a/configs/moteino-mega/hello/Make.defs +++ b/configs/moteino-mega/hello/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/moteino-mega/nsh/Make.defs b/configs/moteino-mega/nsh/Make.defs index bb1d1deb7be..85b71ddc105 100644 --- a/configs/moteino-mega/nsh/Make.defs +++ b/configs/moteino-mega/nsh/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/moxa/nsh/Make.defs b/configs/moxa/nsh/Make.defs index 99cc86d7d83..900a83664f0 100644 --- a/configs/moxa/nsh/Make.defs +++ b/configs/moxa/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -mno-thumb-interwork -march=armv4 -Uarm -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -mno-thumb-interwork -march=armv4 -Uarm +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -mno-thumb-interwork -march=armv4 -Uarm ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/mx1ads/ostest/Make.defs b/configs/mx1ads/ostest/Make.defs index 8588969b68f..23c9179cce0 100644 --- a/configs/mx1ads/ostest/Make.defs +++ b/configs/mx1ads/ostest/Make.defs @@ -51,7 +51,7 @@ ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^g ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/ne64badge/ostest/Make.defs b/configs/ne64badge/ostest/Make.defs index 113d980e306..49ba82d8cff 100644 --- a/configs/ne64badge/ostest/Make.defs +++ b/configs/ne64badge/ostest/Make.defs @@ -93,7 +93,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/ntosd-dm320/nettest/Make.defs b/configs/ntosd-dm320/nettest/Make.defs index fb41fda0979..c743f36264f 100644 --- a/configs/ntosd-dm320/nettest/Make.defs +++ b/configs/ntosd-dm320/nettest/Make.defs @@ -82,7 +82,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/ntosd-dm320/nsh/Make.defs b/configs/ntosd-dm320/nsh/Make.defs index 1422acda541..419ca804a93 100644 --- a/configs/ntosd-dm320/nsh/Make.defs +++ b/configs/ntosd-dm320/nsh/Make.defs @@ -82,7 +82,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/ntosd-dm320/poll/Make.defs b/configs/ntosd-dm320/poll/Make.defs index e5f93d92783..669c2cac529 100644 --- a/configs/ntosd-dm320/poll/Make.defs +++ b/configs/ntosd-dm320/poll/Make.defs @@ -82,7 +82,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/ntosd-dm320/thttpd/Make.defs b/configs/ntosd-dm320/thttpd/Make.defs index a251e628852..37b034d1446 100644 --- a/configs/ntosd-dm320/thttpd/Make.defs +++ b/configs/ntosd-dm320/thttpd/Make.defs @@ -82,7 +82,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/ntosd-dm320/udp/Make.defs b/configs/ntosd-dm320/udp/Make.defs index 1cac1699e76..00e5539aa76 100644 --- a/configs/ntosd-dm320/udp/Make.defs +++ b/configs/ntosd-dm320/udp/Make.defs @@ -82,7 +82,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/ntosd-dm320/webserver/Make.defs b/configs/ntosd-dm320/webserver/Make.defs index 21f5c71070c..23c005a3ca2 100644 --- a/configs/ntosd-dm320/webserver/Make.defs +++ b/configs/ntosd-dm320/webserver/Make.defs @@ -82,7 +82,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/nucleo-144/f746-evalos/Make.defs b/configs/nucleo-144/f746-evalos/Make.defs index 62c52e12f47..1f22b4eee88 100644 --- a/configs/nucleo-144/f746-evalos/Make.defs +++ b/configs/nucleo-144/f746-evalos/Make.defs @@ -78,7 +78,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-144/f746-nsh/Make.defs b/configs/nucleo-144/f746-nsh/Make.defs index 758b9eadb85..a75af5d690b 100644 --- a/configs/nucleo-144/f746-nsh/Make.defs +++ b/configs/nucleo-144/f746-nsh/Make.defs @@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-144/f767-evalos/Make.defs b/configs/nucleo-144/f767-evalos/Make.defs index 3e25864217f..d4afca2f8a5 100644 --- a/configs/nucleo-144/f767-evalos/Make.defs +++ b/configs/nucleo-144/f767-evalos/Make.defs @@ -78,7 +78,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-144/f767-nsh/Make.defs b/configs/nucleo-144/f767-nsh/Make.defs index 9b667c97efc..43b4e474b6d 100644 --- a/configs/nucleo-144/f767-nsh/Make.defs +++ b/configs/nucleo-144/f767-nsh/Make.defs @@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f303re/adc/Make.defs b/configs/nucleo-f303re/adc/Make.defs index 2b8c2b19e5e..eed28984caf 100644 --- a/configs/nucleo-f303re/adc/Make.defs +++ b/configs/nucleo-f303re/adc/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f303re/can/Make.defs b/configs/nucleo-f303re/can/Make.defs index ddfedd78410..25136caf5d0 100644 --- a/configs/nucleo-f303re/can/Make.defs +++ b/configs/nucleo-f303re/can/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f303re/nxlines/Make.defs b/configs/nucleo-f303re/nxlines/Make.defs index 5364ea4d451..21739b986a9 100644 --- a/configs/nucleo-f303re/nxlines/Make.defs +++ b/configs/nucleo-f303re/nxlines/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f303re/pwm/Make.defs b/configs/nucleo-f303re/pwm/Make.defs index 4149c69beac..f6b4c964af5 100644 --- a/configs/nucleo-f303re/pwm/Make.defs +++ b/configs/nucleo-f303re/pwm/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f303re/serialrx/Make.defs b/configs/nucleo-f303re/serialrx/Make.defs index f0190d2363c..ec3b25496fe 100644 --- a/configs/nucleo-f303re/serialrx/Make.defs +++ b/configs/nucleo-f303re/serialrx/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f303re/uavcan/Make.defs b/configs/nucleo-f303re/uavcan/Make.defs index e29de03492b..21856722e55 100644 --- a/configs/nucleo-f303re/uavcan/Make.defs +++ b/configs/nucleo-f303re/uavcan/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f4x1re/f401-nsh/Make.defs b/configs/nucleo-f4x1re/f401-nsh/Make.defs index 097c20b21ed..3f23478c909 100644 --- a/configs/nucleo-f4x1re/f401-nsh/Make.defs +++ b/configs/nucleo-f4x1re/f401-nsh/Make.defs @@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-f4x1re/f411-nsh/Make.defs b/configs/nucleo-f4x1re/f411-nsh/Make.defs index 1b721211916..60c7c536f96 100644 --- a/configs/nucleo-f4x1re/f411-nsh/Make.defs +++ b/configs/nucleo-f4x1re/f411-nsh/Make.defs @@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nucleo-l476rg/nsh/Make.defs b/configs/nucleo-l476rg/nsh/Make.defs index 523dbd8c228..7e03d46bb38 100644 --- a/configs/nucleo-l476rg/nsh/Make.defs +++ b/configs/nucleo-l476rg/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/nutiny-nuc120/nsh/Make.defs b/configs/nutiny-nuc120/nsh/Make.defs index 22697765652..80ac8de12f1 100644 --- a/configs/nutiny-nuc120/nsh/Make.defs +++ b/configs/nutiny-nuc120/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-efm32g880f128-stk/nsh/Make.defs b/configs/olimex-efm32g880f128-stk/nsh/Make.defs index 3e8d7171f32..a6e5dfddc54 100644 --- a/configs/olimex-efm32g880f128-stk/nsh/Make.defs +++ b/configs/olimex-efm32g880f128-stk/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc-h3131/nsh/Make.defs b/configs/olimex-lpc-h3131/nsh/Make.defs index 4d167115d04..9bc12efad63 100644 --- a/configs/olimex-lpc-h3131/nsh/Make.defs +++ b/configs/olimex-lpc-h3131/nsh/Make.defs @@ -80,7 +80,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/ftpc/Make.defs b/configs/olimex-lpc1766stk/ftpc/Make.defs index b2b6be78a57..78632e87598 100644 --- a/configs/olimex-lpc1766stk/ftpc/Make.defs +++ b/configs/olimex-lpc1766stk/ftpc/Make.defs @@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/hidkbd/Make.defs b/configs/olimex-lpc1766stk/hidkbd/Make.defs index e86130ce63a..fa1320f7f31 100644 --- a/configs/olimex-lpc1766stk/hidkbd/Make.defs +++ b/configs/olimex-lpc1766stk/hidkbd/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/hidmouse/Make.defs b/configs/olimex-lpc1766stk/hidmouse/Make.defs index 6ff8eda3fa2..884d0492d7d 100644 --- a/configs/olimex-lpc1766stk/hidmouse/Make.defs +++ b/configs/olimex-lpc1766stk/hidmouse/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/nettest/Make.defs b/configs/olimex-lpc1766stk/nettest/Make.defs index 04883513dd2..809dbd614c1 100644 --- a/configs/olimex-lpc1766stk/nettest/Make.defs +++ b/configs/olimex-lpc1766stk/nettest/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/nsh/Make.defs b/configs/olimex-lpc1766stk/nsh/Make.defs index 6e49ebc9203..457bad7bf26 100644 --- a/configs/olimex-lpc1766stk/nsh/Make.defs +++ b/configs/olimex-lpc1766stk/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/nx/Make.defs b/configs/olimex-lpc1766stk/nx/Make.defs index 82c1d916f59..9bab788e75c 100644 --- a/configs/olimex-lpc1766stk/nx/Make.defs +++ b/configs/olimex-lpc1766stk/nx/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/slip-httpd/Make.defs b/configs/olimex-lpc1766stk/slip-httpd/Make.defs index 8f67068995c..072b3cab285 100644 --- a/configs/olimex-lpc1766stk/slip-httpd/Make.defs +++ b/configs/olimex-lpc1766stk/slip-httpd/Make.defs @@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs b/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs index 9bf88272e98..e4d75e7d2c7 100644 --- a/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs +++ b/configs/olimex-lpc1766stk/thttpd-binfs/Make.defs @@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs b/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs index f5553eecad3..4477c528a46 100644 --- a/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs +++ b/configs/olimex-lpc1766stk/thttpd-nxflat/Make.defs @@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/usbmsc/Make.defs b/configs/olimex-lpc1766stk/usbmsc/Make.defs index 01f55f9ce93..d6efed34aee 100644 --- a/configs/olimex-lpc1766stk/usbmsc/Make.defs +++ b/configs/olimex-lpc1766stk/usbmsc/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/usbserial/Make.defs b/configs/olimex-lpc1766stk/usbserial/Make.defs index 6d17a6ae497..81b8d75306c 100644 --- a/configs/olimex-lpc1766stk/usbserial/Make.defs +++ b/configs/olimex-lpc1766stk/usbserial/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc1766stk/zmodem/Make.defs b/configs/olimex-lpc1766stk/zmodem/Make.defs index a48683a8864..10efd86e2b2 100644 --- a/configs/olimex-lpc1766stk/zmodem/Make.defs +++ b/configs/olimex-lpc1766stk/zmodem/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-lpc2378/nsh/Make.defs b/configs/olimex-lpc2378/nsh/Make.defs index e623ef3b858..65a92de4843 100644 --- a/configs/olimex-lpc2378/nsh/Make.defs +++ b/configs/olimex-lpc2378/nsh/Make.defs @@ -91,7 +91,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/olimex-stm32-e407/nsh/Make.defs b/configs/olimex-stm32-e407/nsh/Make.defs index 5b53bc4e2ad..3a0c0531071 100644 --- a/configs/olimex-stm32-e407/nsh/Make.defs +++ b/configs/olimex-stm32-e407/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-stm32-e407/usbnsh/Make.defs b/configs/olimex-stm32-e407/usbnsh/Make.defs index a9a8ab39929..7c5392e9442 100644 --- a/configs/olimex-stm32-e407/usbnsh/Make.defs +++ b/configs/olimex-stm32-e407/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-stm32-h405/usbnsh/Make.defs b/configs/olimex-stm32-h405/usbnsh/Make.defs index f9dc1ee4059..1b869db74d0 100644 --- a/configs/olimex-stm32-h405/usbnsh/Make.defs +++ b/configs/olimex-stm32-h405/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-stm32-h407/nsh/Make.defs b/configs/olimex-stm32-h407/nsh/Make.defs index 41cbe333133..52dc40979c1 100644 --- a/configs/olimex-stm32-h407/nsh/Make.defs +++ b/configs/olimex-stm32-h407/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-stm32-p107/nsh/Make.defs b/configs/olimex-stm32-p107/nsh/Make.defs index 97e3247137a..b8706f2f514 100644 --- a/configs/olimex-stm32-p107/nsh/Make.defs +++ b/configs/olimex-stm32-p107/nsh/Make.defs @@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-stm32-p207/nsh/Make.defs b/configs/olimex-stm32-p207/nsh/Make.defs index 833e3f52a39..7006c8e7626 100644 --- a/configs/olimex-stm32-p207/nsh/Make.defs +++ b/configs/olimex-stm32-p207/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimex-strp711/nettest/Make.defs b/configs/olimex-strp711/nettest/Make.defs index 67f4f77d671..7d96acb8d2e 100644 --- a/configs/olimex-strp711/nettest/Make.defs +++ b/configs/olimex-strp711/nettest/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/olimex-strp711/nsh/Make.defs b/configs/olimex-strp711/nsh/Make.defs index d2750fb667f..6710edd75e6 100644 --- a/configs/olimex-strp711/nsh/Make.defs +++ b/configs/olimex-strp711/nsh/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/olimexino-stm32/can/Make.defs b/configs/olimexino-stm32/can/Make.defs index 48d67718ee2..73d3f408297 100644 --- a/configs/olimexino-stm32/can/Make.defs +++ b/configs/olimexino-stm32/can/Make.defs @@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimexino-stm32/composite/Make.defs b/configs/olimexino-stm32/composite/Make.defs index 690947c1104..f80bb51a7a9 100644 --- a/configs/olimexino-stm32/composite/Make.defs +++ b/configs/olimexino-stm32/composite/Make.defs @@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimexino-stm32/nsh/Make.defs b/configs/olimexino-stm32/nsh/Make.defs index 9fd3c82233e..15e08345e46 100644 --- a/configs/olimexino-stm32/nsh/Make.defs +++ b/configs/olimexino-stm32/nsh/Make.defs @@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimexino-stm32/smallnsh/Make.defs b/configs/olimexino-stm32/smallnsh/Make.defs index 53f2d3ce6b1..3d08a5e633e 100644 --- a/configs/olimexino-stm32/smallnsh/Make.defs +++ b/configs/olimexino-stm32/smallnsh/Make.defs @@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/olimexino-stm32/tiny/Make.defs b/configs/olimexino-stm32/tiny/Make.defs index b9e08679d27..eb7ea80ed55 100644 --- a/configs/olimexino-stm32/tiny/Make.defs +++ b/configs/olimexino-stm32/tiny/Make.defs @@ -90,7 +90,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/open1788/knsh/Make.defs b/configs/open1788/knsh/Make.defs index f4f93007ab3..288985bb88f 100644 --- a/configs/open1788/knsh/Make.defs +++ b/configs/open1788/knsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/open1788/nsh/Make.defs b/configs/open1788/nsh/Make.defs index 8b6db9259eb..a6cf37202ea 100644 --- a/configs/open1788/nsh/Make.defs +++ b/configs/open1788/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/open1788/nxlines/Make.defs b/configs/open1788/nxlines/Make.defs index fbe022bd306..f54f4c07d7c 100644 --- a/configs/open1788/nxlines/Make.defs +++ b/configs/open1788/nxlines/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/pcblogic-pic32mx/nsh/Make.defs b/configs/pcblogic-pic32mx/nsh/Make.defs index 00cf7c88e31..ed3b800bf6d 100644 --- a/configs/pcblogic-pic32mx/nsh/Make.defs +++ b/configs/pcblogic-pic32mx/nsh/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/pcduino-a10/nsh/Make.defs b/configs/pcduino-a10/nsh/Make.defs index 82094d510ec..1a9d6fc14ec 100644 --- a/configs/pcduino-a10/nsh/Make.defs +++ b/configs/pcduino-a10/nsh/Make.defs @@ -70,7 +70,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a8 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/pic32mx-starterkit/nsh/Make.defs b/configs/pic32mx-starterkit/nsh/Make.defs index 8cf55c2e12d..f770264923c 100644 --- a/configs/pic32mx-starterkit/nsh/Make.defs +++ b/configs/pic32mx-starterkit/nsh/Make.defs @@ -87,7 +87,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/pic32mx-starterkit/nsh2/Make.defs b/configs/pic32mx-starterkit/nsh2/Make.defs index 20f5175d09d..89dc5667e0f 100644 --- a/configs/pic32mx-starterkit/nsh2/Make.defs +++ b/configs/pic32mx-starterkit/nsh2/Make.defs @@ -87,7 +87,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/pic32mx7mmb/nsh/Make.defs b/configs/pic32mx7mmb/nsh/Make.defs index ec3f79738fc..5c3e08f7ecf 100644 --- a/configs/pic32mx7mmb/nsh/Make.defs +++ b/configs/pic32mx7mmb/nsh/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/pic32mz-starterkit/nsh/Make.defs b/configs/pic32mz-starterkit/nsh/Make.defs index ab082145f31..8d17ed253a4 100644 --- a/configs/pic32mz-starterkit/nsh/Make.defs +++ b/configs/pic32mz-starterkit/nsh/Make.defs @@ -97,7 +97,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/pirelli_dpl10/nsh_highram/Make.defs b/configs/pirelli_dpl10/nsh_highram/Make.defs index 4b95922be4f..6adb17f5a6f 100644 --- a/configs/pirelli_dpl10/nsh_highram/Make.defs +++ b/configs/pirelli_dpl10/nsh_highram/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/rgmp/x86/cxxtest/Make.defs b/configs/rgmp/x86/cxxtest/Make.defs index 1070975f213..b8ab2328bab 100644 --- a/configs/rgmp/x86/cxxtest/Make.defs +++ b/configs/rgmp/x86/cxxtest/Make.defs @@ -50,7 +50,7 @@ else ARCHOPTIMIZATION = -O2 endif -#ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +#ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHCXXFLAGS = -fno-builtin ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector ARCHPICFLAGS = -fpic diff --git a/configs/rgmp/x86/helloxx/Make.defs b/configs/rgmp/x86/helloxx/Make.defs index 458d1c5fac9..440c8591359 100644 --- a/configs/rgmp/x86/helloxx/Make.defs +++ b/configs/rgmp/x86/helloxx/Make.defs @@ -50,7 +50,7 @@ else ARCHOPTIMIZATION = -O2 endif -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHCPUFLAGS = -fno-builtin -nostdinc -fno-stack-protector ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef diff --git a/configs/sabre-6quad/nsh/Make.defs b/configs/sabre-6quad/nsh/Make.defs index cba549a9fb4..887064d0e11 100644 --- a/configs/sabre-6quad/nsh/Make.defs +++ b/configs/sabre-6quad/nsh/Make.defs @@ -70,7 +70,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sabre-6quad/smp/Make.defs b/configs/sabre-6quad/smp/Make.defs index b5ba0e4111d..11082623c45 100644 --- a/configs/sabre-6quad/smp/Make.defs +++ b/configs/sabre-6quad/smp/Make.defs @@ -70,7 +70,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam3u-ek/knsh/Make.defs b/configs/sam3u-ek/knsh/Make.defs index 7475431366b..1842df8708e 100644 --- a/configs/sam3u-ek/knsh/Make.defs +++ b/configs/sam3u-ek/knsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam3u-ek/nsh/Make.defs b/configs/sam3u-ek/nsh/Make.defs index f54ceca5849..17678fdb9da 100644 --- a/configs/sam3u-ek/nsh/Make.defs +++ b/configs/sam3u-ek/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam3u-ek/nx/Make.defs b/configs/sam3u-ek/nx/Make.defs index 07ec51c0539..5aa5e69611f 100644 --- a/configs/sam3u-ek/nx/Make.defs +++ b/configs/sam3u-ek/nx/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam3u-ek/nxwm/Make.defs b/configs/sam3u-ek/nxwm/Make.defs index dbd49e2239e..549c3eba8fc 100644 --- a/configs/sam3u-ek/nxwm/Make.defs +++ b/configs/sam3u-ek/nxwm/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam4e-ek/nsh/Make.defs b/configs/sam4e-ek/nsh/Make.defs index 7efd66cf1d8..1b6f323395e 100644 --- a/configs/sam4e-ek/nsh/Make.defs +++ b/configs/sam4e-ek/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam4e-ek/nxwm/Make.defs b/configs/sam4e-ek/nxwm/Make.defs index b267c099165..f4e26daac06 100644 --- a/configs/sam4e-ek/nxwm/Make.defs +++ b/configs/sam4e-ek/nxwm/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam4e-ek/usbnsh/Make.defs b/configs/sam4e-ek/usbnsh/Make.defs index 80e229163e1..55cc4176087 100644 --- a/configs/sam4e-ek/usbnsh/Make.defs +++ b/configs/sam4e-ek/usbnsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam4l-xplained/nsh/Make.defs b/configs/sam4l-xplained/nsh/Make.defs index 3459a329b7e..fc6a71ace89 100644 --- a/configs/sam4l-xplained/nsh/Make.defs +++ b/configs/sam4l-xplained/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam4s-xplained-pro/nsh/Make.defs b/configs/sam4s-xplained-pro/nsh/Make.defs index 6755b3e21eb..2dc8e2add39 100644 --- a/configs/sam4s-xplained-pro/nsh/Make.defs +++ b/configs/sam4s-xplained-pro/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sam4s-xplained/nsh/Make.defs b/configs/sam4s-xplained/nsh/Make.defs index 8bd815700e6..795c90796e2 100644 --- a/configs/sam4s-xplained/nsh/Make.defs +++ b/configs/sam4s-xplained/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d2-xult/nsh/Make.defs b/configs/sama5d2-xult/nsh/Make.defs index 50f6cf8d4a5..a8f40816379 100644 --- a/configs/sama5d2-xult/nsh/Make.defs +++ b/configs/sama5d2-xult/nsh/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3-xplained/bridge/Make.defs b/configs/sama5d3-xplained/bridge/Make.defs index 7ce0dad5266..430e2db50cc 100644 --- a/configs/sama5d3-xplained/bridge/Make.defs +++ b/configs/sama5d3-xplained/bridge/Make.defs @@ -76,7 +76,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3-xplained/nsh/Make.defs b/configs/sama5d3-xplained/nsh/Make.defs index e53e9803ae4..6b735d7a689 100644 --- a/configs/sama5d3-xplained/nsh/Make.defs +++ b/configs/sama5d3-xplained/nsh/Make.defs @@ -76,7 +76,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/demo/Make.defs b/configs/sama5d3x-ek/demo/Make.defs index 30196f10fdd..5f73055eded 100644 --- a/configs/sama5d3x-ek/demo/Make.defs +++ b/configs/sama5d3x-ek/demo/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/hello/Make.defs b/configs/sama5d3x-ek/hello/Make.defs index 534cbd06bc1..cdc2a9468fe 100644 --- a/configs/sama5d3x-ek/hello/Make.defs +++ b/configs/sama5d3x-ek/hello/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/norboot/Make.defs b/configs/sama5d3x-ek/norboot/Make.defs index a1685440e93..369190f32a0 100644 --- a/configs/sama5d3x-ek/norboot/Make.defs +++ b/configs/sama5d3x-ek/norboot/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/nsh/Make.defs b/configs/sama5d3x-ek/nsh/Make.defs index 8c63acfd6c0..2c369c9dcd7 100644 --- a/configs/sama5d3x-ek/nsh/Make.defs +++ b/configs/sama5d3x-ek/nsh/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/nx/Make.defs b/configs/sama5d3x-ek/nx/Make.defs index 4e0b8da8a90..fa74d1e559d 100644 --- a/configs/sama5d3x-ek/nx/Make.defs +++ b/configs/sama5d3x-ek/nx/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/nxplayer/Make.defs b/configs/sama5d3x-ek/nxplayer/Make.defs index 813d3a1460e..7dd1906749f 100644 --- a/configs/sama5d3x-ek/nxplayer/Make.defs +++ b/configs/sama5d3x-ek/nxplayer/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/nxwm/Make.defs b/configs/sama5d3x-ek/nxwm/Make.defs index 089d2b4500e..3d4884fc340 100644 --- a/configs/sama5d3x-ek/nxwm/Make.defs +++ b/configs/sama5d3x-ek/nxwm/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d3x-ek/ov2640/Make.defs b/configs/sama5d3x-ek/ov2640/Make.defs index b5090629e75..063a4799b21 100644 --- a/configs/sama5d3x-ek/ov2640/Make.defs +++ b/configs/sama5d3x-ek/ov2640/Make.defs @@ -96,7 +96,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/at25boot/Make.defs b/configs/sama5d4-ek/at25boot/Make.defs index 4bad9e5074a..a8019045b66 100644 --- a/configs/sama5d4-ek/at25boot/Make.defs +++ b/configs/sama5d4-ek/at25boot/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/bridge/Make.defs b/configs/sama5d4-ek/bridge/Make.defs index 254381fd843..c2bdf0c8944 100644 --- a/configs/sama5d4-ek/bridge/Make.defs +++ b/configs/sama5d4-ek/bridge/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/dramboot/Make.defs b/configs/sama5d4-ek/dramboot/Make.defs index f142b56bb93..2b02d60d63a 100644 --- a/configs/sama5d4-ek/dramboot/Make.defs +++ b/configs/sama5d4-ek/dramboot/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/elf/Make.defs b/configs/sama5d4-ek/elf/Make.defs index 9708ba3786a..689cb2060e5 100644 --- a/configs/sama5d4-ek/elf/Make.defs +++ b/configs/sama5d4-ek/elf/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/ipv6/Make.defs b/configs/sama5d4-ek/ipv6/Make.defs index 17e78d57bde..757635691c3 100644 --- a/configs/sama5d4-ek/ipv6/Make.defs +++ b/configs/sama5d4-ek/ipv6/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/knsh/Make.defs b/configs/sama5d4-ek/knsh/Make.defs index ece275b7711..b5a28fb3b82 100644 --- a/configs/sama5d4-ek/knsh/Make.defs +++ b/configs/sama5d4-ek/knsh/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/nsh/Make.defs b/configs/sama5d4-ek/nsh/Make.defs index c94054d06e6..5edb2dd191b 100644 --- a/configs/sama5d4-ek/nsh/Make.defs +++ b/configs/sama5d4-ek/nsh/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/nxwm/Make.defs b/configs/sama5d4-ek/nxwm/Make.defs index d839e3ded4f..d005e269db4 100644 --- a/configs/sama5d4-ek/nxwm/Make.defs +++ b/configs/sama5d4-ek/nxwm/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sama5d4-ek/ramtest/Make.defs b/configs/sama5d4-ek/ramtest/Make.defs index bc78ca4a8f3..84c24932615 100644 --- a/configs/sama5d4-ek/ramtest/Make.defs +++ b/configs/sama5d4-ek/ramtest/Make.defs @@ -80,7 +80,7 @@ endif ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16 ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samd20-xplained/nsh/Make.defs b/configs/samd20-xplained/nsh/Make.defs index 22caeba8118..4ae003c79ba 100644 --- a/configs/samd20-xplained/nsh/Make.defs +++ b/configs/samd20-xplained/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samd21-xplained/nsh/Make.defs b/configs/samd21-xplained/nsh/Make.defs index 6f5255b3430..75f1af4a00a 100644 --- a/configs/samd21-xplained/nsh/Make.defs +++ b/configs/samd21-xplained/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/same70-xplained/netnsh/Make.defs b/configs/same70-xplained/netnsh/Make.defs index f3e42f9a7aa..8650e3f22e0 100644 --- a/configs/same70-xplained/netnsh/Make.defs +++ b/configs/same70-xplained/netnsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/same70-xplained/nsh/Make.defs b/configs/same70-xplained/nsh/Make.defs index e607c4ace3c..e2079af0e50 100644 --- a/configs/same70-xplained/nsh/Make.defs +++ b/configs/same70-xplained/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/saml21-xplained/nsh/Make.defs b/configs/saml21-xplained/nsh/Make.defs index 25498abe9be..86e3dc31d7a 100644 --- a/configs/saml21-xplained/nsh/Make.defs +++ b/configs/saml21-xplained/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/knsh/Make.defs b/configs/samv71-xult/knsh/Make.defs index c5bbfe8f336..2a49ef7f598 100644 --- a/configs/samv71-xult/knsh/Make.defs +++ b/configs/samv71-xult/knsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/module/Make.defs b/configs/samv71-xult/module/Make.defs index 2900024e899..2c560c69cb3 100644 --- a/configs/samv71-xult/module/Make.defs +++ b/configs/samv71-xult/module/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/mxtxplnd/Make.defs b/configs/samv71-xult/mxtxplnd/Make.defs index e5463a1c116..0262a966f46 100644 --- a/configs/samv71-xult/mxtxplnd/Make.defs +++ b/configs/samv71-xult/mxtxplnd/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/netnsh/Make.defs b/configs/samv71-xult/netnsh/Make.defs index 4a0f316c078..f8467aad326 100644 --- a/configs/samv71-xult/netnsh/Make.defs +++ b/configs/samv71-xult/netnsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/nsh/Make.defs b/configs/samv71-xult/nsh/Make.defs index 27f54d8e3f2..0db76fae98b 100644 --- a/configs/samv71-xult/nsh/Make.defs +++ b/configs/samv71-xult/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/nxwm/Make.defs b/configs/samv71-xult/nxwm/Make.defs index d4b883d507d..dd07413a79c 100644 --- a/configs/samv71-xult/nxwm/Make.defs +++ b/configs/samv71-xult/nxwm/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/vnc/Make.defs b/configs/samv71-xult/vnc/Make.defs index 5185c94a9fb..3781b6f4dcf 100644 --- a/configs/samv71-xult/vnc/Make.defs +++ b/configs/samv71-xult/vnc/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/samv71-xult/vnxwm/Make.defs b/configs/samv71-xult/vnxwm/Make.defs index fe4fd97aeb3..740426e9da7 100644 --- a/configs/samv71-xult/vnxwm/Make.defs +++ b/configs/samv71-xult/vnxwm/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -fno-strict-aliasing ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/shenzhou/nsh/Make.defs b/configs/shenzhou/nsh/Make.defs index c97f815e94b..b795435bbc8 100644 --- a/configs/shenzhou/nsh/Make.defs +++ b/configs/shenzhou/nsh/Make.defs @@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/shenzhou/nxwm/Make.defs b/configs/shenzhou/nxwm/Make.defs index 44192707669..cf1fcc1dd3a 100644 --- a/configs/shenzhou/nxwm/Make.defs +++ b/configs/shenzhou/nxwm/Make.defs @@ -82,7 +82,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/shenzhou/thttpd/Make.defs b/configs/shenzhou/thttpd/Make.defs index 85999c82782..38560adc332 100644 --- a/configs/shenzhou/thttpd/Make.defs +++ b/configs/shenzhou/thttpd/Make.defs @@ -85,7 +85,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sim/bas/Make.defs b/configs/sim/bas/Make.defs index 984c46f9d70..5687f0150f2 100644 --- a/configs/sim/bas/Make.defs +++ b/configs/sim/bas/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/configdata/Make.defs b/configs/sim/configdata/Make.defs index d516d172e6c..e614279eb4b 100644 --- a/configs/sim/configdata/Make.defs +++ b/configs/sim/configdata/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/cxxtest/Make.defs b/configs/sim/cxxtest/Make.defs index 93eed54eb59..11437e27806 100644 --- a/configs/sim/cxxtest/Make.defs +++ b/configs/sim/cxxtest/Make.defs @@ -50,7 +50,7 @@ ARCHCPUFLAGS = -fno-builtin ifeq ($(CONFIG_UCLIBCXX_EXCEPTION),y) ARCHCPUFLAGSXX = -fno-builtin else - ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions + ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new endif ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef diff --git a/configs/sim/minibasic/Make.defs b/configs/sim/minibasic/Make.defs index d89368ccc21..602126df113 100644 --- a/configs/sim/minibasic/Make.defs +++ b/configs/sim/minibasic/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/mount/Make.defs b/configs/sim/mount/Make.defs index 59561182693..9c2a2801331 100644 --- a/configs/sim/mount/Make.defs +++ b/configs/sim/mount/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/mtdpart/Make.defs b/configs/sim/mtdpart/Make.defs index c5dd5f30d38..ab88231abde 100644 --- a/configs/sim/mtdpart/Make.defs +++ b/configs/sim/mtdpart/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/mtdrwb/Make.defs b/configs/sim/mtdrwb/Make.defs index f06e62656c0..e3830bd4aa8 100644 --- a/configs/sim/mtdrwb/Make.defs +++ b/configs/sim/mtdrwb/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nettest/Make.defs b/configs/sim/nettest/Make.defs index 8632791cacf..2dfff9a0998 100644 --- a/configs/sim/nettest/Make.defs +++ b/configs/sim/nettest/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nsh/Make.defs b/configs/sim/nsh/Make.defs index 78ac4ec4016..1103d89dcd4 100644 --- a/configs/sim/nsh/Make.defs +++ b/configs/sim/nsh/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nsh2/Make.defs b/configs/sim/nsh2/Make.defs index 9f3da86f0b8..aef35af6c3e 100644 --- a/configs/sim/nsh2/Make.defs +++ b/configs/sim/nsh2/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nx/Make.defs b/configs/sim/nx/Make.defs index bb509e3b153..31ebb6364dd 100644 --- a/configs/sim/nx/Make.defs +++ b/configs/sim/nx/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nx11/Make.defs b/configs/sim/nx11/Make.defs index dc93fc14ced..2d65818eecd 100644 --- a/configs/sim/nx11/Make.defs +++ b/configs/sim/nx11/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nxffs/Make.defs b/configs/sim/nxffs/Make.defs index 6ce3fda3651..1e7f8782d33 100644 --- a/configs/sim/nxffs/Make.defs +++ b/configs/sim/nxffs/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nxlines/Make.defs b/configs/sim/nxlines/Make.defs index f164762ec52..4e9f1ce0136 100644 --- a/configs/sim/nxlines/Make.defs +++ b/configs/sim/nxlines/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/nxwm/Make.defs b/configs/sim/nxwm/Make.defs index 7aa008b27f0..dd7ea36daef 100644 --- a/configs/sim/nxwm/Make.defs +++ b/configs/sim/nxwm/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/ostest/Make.defs b/configs/sim/ostest/Make.defs index a49679c244a..34004f0f494 100644 --- a/configs/sim/ostest/Make.defs +++ b/configs/sim/ostest/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/pashello/Make.defs b/configs/sim/pashello/Make.defs index b1ef6cd990b..ed195c6cc39 100644 --- a/configs/sim/pashello/Make.defs +++ b/configs/sim/pashello/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/touchscreen/Make.defs b/configs/sim/touchscreen/Make.defs index dcbfb013771..baac532bfd8 100644 --- a/configs/sim/touchscreen/Make.defs +++ b/configs/sim/touchscreen/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/traveler/Make.defs b/configs/sim/traveler/Make.defs index df548aee9e7..c07870fc694 100644 --- a/configs/sim/traveler/Make.defs +++ b/configs/sim/traveler/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/udgram/Make.defs b/configs/sim/udgram/Make.defs index d538b9b3efa..ccb4f92567d 100644 --- a/configs/sim/udgram/Make.defs +++ b/configs/sim/udgram/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/unionfs/Make.defs b/configs/sim/unionfs/Make.defs index 42334c65cf4..43838bb3679 100644 --- a/configs/sim/unionfs/Make.defs +++ b/configs/sim/unionfs/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/sim/ustream/Make.defs b/configs/sim/ustream/Make.defs index cf907378948..679e4c0ae80 100644 --- a/configs/sim/ustream/Make.defs +++ b/configs/sim/ustream/Make.defs @@ -47,7 +47,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCPUFLAGS = -fno-builtin -ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fno-rtti +ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHPICFLAGS = -fpic ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/spark/composite/Make.defs b/configs/spark/composite/Make.defs index 5fd6bfd19e8..b1d7614f8bb 100644 --- a/configs/spark/composite/Make.defs +++ b/configs/spark/composite/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/spark/nsh/Make.defs b/configs/spark/nsh/Make.defs index ba4d14904b0..9600e7d11a9 100644 --- a/configs/spark/nsh/Make.defs +++ b/configs/spark/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/spark/usbmsc/Make.defs b/configs/spark/usbmsc/Make.defs index 423f70ada71..64e116c29f3 100644 --- a/configs/spark/usbmsc/Make.defs +++ b/configs/spark/usbmsc/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/spark/usbnsh/Make.defs b/configs/spark/usbnsh/Make.defs index 8820947ef8f..a52241bf0c3 100644 --- a/configs/spark/usbnsh/Make.defs +++ b/configs/spark/usbnsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/spark/usbserial/Make.defs b/configs/spark/usbserial/Make.defs index 317945bc3a0..9cfb9024e5a 100644 --- a/configs/spark/usbserial/Make.defs +++ b/configs/spark/usbserial/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/buttons/Make.defs b/configs/stm3210e-eval/buttons/Make.defs index e460dc236ea..a0f63802978 100644 --- a/configs/stm3210e-eval/buttons/Make.defs +++ b/configs/stm3210e-eval/buttons/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/composite/Make.defs b/configs/stm3210e-eval/composite/Make.defs index 599b5d021a8..17c4fec622d 100644 --- a/configs/stm3210e-eval/composite/Make.defs +++ b/configs/stm3210e-eval/composite/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/nsh/Make.defs b/configs/stm3210e-eval/nsh/Make.defs index 34750c07481..b94472a6e66 100644 --- a/configs/stm3210e-eval/nsh/Make.defs +++ b/configs/stm3210e-eval/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/nsh2/Make.defs b/configs/stm3210e-eval/nsh2/Make.defs index 7ee439bba42..abbcfdfb1fc 100644 --- a/configs/stm3210e-eval/nsh2/Make.defs +++ b/configs/stm3210e-eval/nsh2/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/nx/Make.defs b/configs/stm3210e-eval/nx/Make.defs index 2cea907920b..acf41aac4c9 100644 --- a/configs/stm3210e-eval/nx/Make.defs +++ b/configs/stm3210e-eval/nx/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/nxterm/Make.defs b/configs/stm3210e-eval/nxterm/Make.defs index ef8c9bc3802..7d3044aa563 100644 --- a/configs/stm3210e-eval/nxterm/Make.defs +++ b/configs/stm3210e-eval/nxterm/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/pm/Make.defs b/configs/stm3210e-eval/pm/Make.defs index a4da9f3a8a7..76a1e828f59 100644 --- a/configs/stm3210e-eval/pm/Make.defs +++ b/configs/stm3210e-eval/pm/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/usbmsc/Make.defs b/configs/stm3210e-eval/usbmsc/Make.defs index 2f4e87a1988..b7b9f13c472 100644 --- a/configs/stm3210e-eval/usbmsc/Make.defs +++ b/configs/stm3210e-eval/usbmsc/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3210e-eval/usbserial/Make.defs b/configs/stm3210e-eval/usbserial/Make.defs index 5c49c1a1967..2ba8d703f15 100644 --- a/configs/stm3210e-eval/usbserial/Make.defs +++ b/configs/stm3210e-eval/usbserial/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3220g-eval/dhcpd/Make.defs b/configs/stm3220g-eval/dhcpd/Make.defs index 6f84793960f..64f7bf9de74 100644 --- a/configs/stm3220g-eval/dhcpd/Make.defs +++ b/configs/stm3220g-eval/dhcpd/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3220g-eval/nettest/Make.defs b/configs/stm3220g-eval/nettest/Make.defs index 525d5e47738..e1f71e4a39d 100644 --- a/configs/stm3220g-eval/nettest/Make.defs +++ b/configs/stm3220g-eval/nettest/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3220g-eval/nsh/Make.defs b/configs/stm3220g-eval/nsh/Make.defs index a55be90f7bc..cd1dd159e6d 100644 --- a/configs/stm3220g-eval/nsh/Make.defs +++ b/configs/stm3220g-eval/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3220g-eval/nsh2/Make.defs b/configs/stm3220g-eval/nsh2/Make.defs index 1872665fcf4..518cacac287 100644 --- a/configs/stm3220g-eval/nsh2/Make.defs +++ b/configs/stm3220g-eval/nsh2/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3220g-eval/nxwm/Make.defs b/configs/stm3220g-eval/nxwm/Make.defs index 0a94be44478..49eda2b97db 100644 --- a/configs/stm3220g-eval/nxwm/Make.defs +++ b/configs/stm3220g-eval/nxwm/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3220g-eval/telnetd/Make.defs b/configs/stm3220g-eval/telnetd/Make.defs index 34b07b3acca..8d6f5d5f137 100644 --- a/configs/stm3220g-eval/telnetd/Make.defs +++ b/configs/stm3220g-eval/telnetd/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/dhcpd/Make.defs b/configs/stm3240g-eval/dhcpd/Make.defs index df5aa899ba1..dccf4e50947 100644 --- a/configs/stm3240g-eval/dhcpd/Make.defs +++ b/configs/stm3240g-eval/dhcpd/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/discover/Make.defs b/configs/stm3240g-eval/discover/Make.defs index 7265cae8abb..78d1d036def 100644 --- a/configs/stm3240g-eval/discover/Make.defs +++ b/configs/stm3240g-eval/discover/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/knxwm/Make.defs b/configs/stm3240g-eval/knxwm/Make.defs index c138b17cf74..7fdc7b275d5 100644 --- a/configs/stm3240g-eval/knxwm/Make.defs +++ b/configs/stm3240g-eval/knxwm/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/nettest/Make.defs b/configs/stm3240g-eval/nettest/Make.defs index 3f2604c8b9d..ce352cf3d25 100644 --- a/configs/stm3240g-eval/nettest/Make.defs +++ b/configs/stm3240g-eval/nettest/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/nsh/Make.defs b/configs/stm3240g-eval/nsh/Make.defs index 3d371f1764d..36f5cf7875b 100644 --- a/configs/stm3240g-eval/nsh/Make.defs +++ b/configs/stm3240g-eval/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/nsh2/Make.defs b/configs/stm3240g-eval/nsh2/Make.defs index 01fd1a369df..fb47d90477b 100644 --- a/configs/stm3240g-eval/nsh2/Make.defs +++ b/configs/stm3240g-eval/nsh2/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/nxterm/Make.defs b/configs/stm3240g-eval/nxterm/Make.defs index 6c7e72d33c3..c38ffc8c404 100644 --- a/configs/stm3240g-eval/nxterm/Make.defs +++ b/configs/stm3240g-eval/nxterm/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/nxwm/Make.defs b/configs/stm3240g-eval/nxwm/Make.defs index adc137c72ff..14741aaf72d 100644 --- a/configs/stm3240g-eval/nxwm/Make.defs +++ b/configs/stm3240g-eval/nxwm/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/telnetd/Make.defs b/configs/stm3240g-eval/telnetd/Make.defs index 34a6989ef17..4e1bd7ee9d8 100644 --- a/configs/stm3240g-eval/telnetd/Make.defs +++ b/configs/stm3240g-eval/telnetd/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/webserver/Make.defs b/configs/stm3240g-eval/webserver/Make.defs index bf77efb4e8b..84bb35cc266 100644 --- a/configs/stm3240g-eval/webserver/Make.defs +++ b/configs/stm3240g-eval/webserver/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm3240g-eval/xmlrpc/Make.defs b/configs/stm3240g-eval/xmlrpc/Make.defs index f196d3b4f3a..2f5cd93509d 100644 --- a/configs/stm3240g-eval/xmlrpc/Make.defs +++ b/configs/stm3240g-eval/xmlrpc/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32_tiny/nsh/Make.defs b/configs/stm32_tiny/nsh/Make.defs index 61f1d54b581..34619c299d8 100644 --- a/configs/stm32_tiny/nsh/Make.defs +++ b/configs/stm32_tiny/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32_tiny/usbnsh/Make.defs b/configs/stm32_tiny/usbnsh/Make.defs index 0c87213a597..c15224fc72b 100644 --- a/configs/stm32_tiny/usbnsh/Make.defs +++ b/configs/stm32_tiny/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32butterfly2/nsh/Make.defs b/configs/stm32butterfly2/nsh/Make.defs index fea26bcee89..fdb1fc9867c 100644 --- a/configs/stm32butterfly2/nsh/Make.defs +++ b/configs/stm32butterfly2/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32butterfly2/nshnet/Make.defs b/configs/stm32butterfly2/nshnet/Make.defs index fea26bcee89..fdb1fc9867c 100644 --- a/configs/stm32butterfly2/nshnet/Make.defs +++ b/configs/stm32butterfly2/nshnet/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32butterfly2/nshusbdev/Make.defs b/configs/stm32butterfly2/nshusbdev/Make.defs index fea26bcee89..fdb1fc9867c 100644 --- a/configs/stm32butterfly2/nshusbdev/Make.defs +++ b/configs/stm32butterfly2/nshusbdev/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32butterfly2/nshusbhost/Make.defs b/configs/stm32butterfly2/nshusbhost/Make.defs index fea26bcee89..fdb1fc9867c 100644 --- a/configs/stm32butterfly2/nshusbhost/Make.defs +++ b/configs/stm32butterfly2/nshusbhost/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f103-minimum/audio_tone/Make.defs b/configs/stm32f103-minimum/audio_tone/Make.defs index 32d375f62f0..3ff4e7eb825 100644 --- a/configs/stm32f103-minimum/audio_tone/Make.defs +++ b/configs/stm32f103-minimum/audio_tone/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f103-minimum/minnsh/Make.defs b/configs/stm32f103-minimum/minnsh/Make.defs index b77741df255..8d3d4783053 100644 --- a/configs/stm32f103-minimum/minnsh/Make.defs +++ b/configs/stm32f103-minimum/minnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f103-minimum/nsh/Make.defs b/configs/stm32f103-minimum/nsh/Make.defs index b77741df255..8d3d4783053 100644 --- a/configs/stm32f103-minimum/nsh/Make.defs +++ b/configs/stm32f103-minimum/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f103-minimum/rfid-rc522/Make.defs b/configs/stm32f103-minimum/rfid-rc522/Make.defs index 1daec534a5b..9fa0444e455 100644 --- a/configs/stm32f103-minimum/rfid-rc522/Make.defs +++ b/configs/stm32f103-minimum/rfid-rc522/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f103-minimum/usbnsh/Make.defs b/configs/stm32f103-minimum/usbnsh/Make.defs index 9f134fbf132..79bc3fa2840 100644 --- a/configs/stm32f103-minimum/usbnsh/Make.defs +++ b/configs/stm32f103-minimum/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f3discovery/nsh/Make.defs b/configs/stm32f3discovery/nsh/Make.defs index 02c4d7cfb3e..932fa94560f 100644 --- a/configs/stm32f3discovery/nsh/Make.defs +++ b/configs/stm32f3discovery/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f3discovery/usbnsh/Make.defs b/configs/stm32f3discovery/usbnsh/Make.defs index 2c82f6ebcef..9ad12ec92d5 100644 --- a/configs/stm32f3discovery/usbnsh/Make.defs +++ b/configs/stm32f3discovery/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f411e-disco/nsh/Make.defs b/configs/stm32f411e-disco/nsh/Make.defs index b0f06ba60b3..1a3cbc6cb38 100644 --- a/configs/stm32f411e-disco/nsh/Make.defs +++ b/configs/stm32f411e-disco/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f429i-disco/extflash/Make.defs b/configs/stm32f429i-disco/extflash/Make.defs index c8cd4116d69..07fa3b5d009 100644 --- a/configs/stm32f429i-disco/extflash/Make.defs +++ b/configs/stm32f429i-disco/extflash/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj b/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj index fd3d5edc3ef..f4013fcd59d 100644 --- a/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj +++ b/configs/stm32f429i-disco/ide/ltcd/uvision/libcxx.uvproj @@ -274,7 +274,7 @@ 1 1 - -fno-builtin -fno-exceptions -fno-rtti -Wall -Wshadow -Wundef -g + -fno-builtin -fno-exceptions -fcheck-new -fno-rtti -Wall -Wshadow -Wundef -g CONFIG_WCHAR_BUILTIN ../../../../../libxx;../../../../../include;../../../../../include/cxx diff --git a/configs/stm32f429i-disco/lcd/Make.defs b/configs/stm32f429i-disco/lcd/Make.defs index fc3f4112f13..6e09dae1b91 100644 --- a/configs/stm32f429i-disco/lcd/Make.defs +++ b/configs/stm32f429i-disco/lcd/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f429i-disco/ltdc/Make.defs b/configs/stm32f429i-disco/ltdc/Make.defs index c98f7c48a4f..3f55428d2db 100644 --- a/configs/stm32f429i-disco/ltdc/Make.defs +++ b/configs/stm32f429i-disco/ltdc/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f429i-disco/nsh/Make.defs b/configs/stm32f429i-disco/nsh/Make.defs index a2b4778579c..53025b6f67b 100644 --- a/configs/stm32f429i-disco/nsh/Make.defs +++ b/configs/stm32f429i-disco/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f429i-disco/usbmsc/Make.defs b/configs/stm32f429i-disco/usbmsc/Make.defs index c8cd4116d69..07fa3b5d009 100644 --- a/configs/stm32f429i-disco/usbmsc/Make.defs +++ b/configs/stm32f429i-disco/usbmsc/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f429i-disco/usbnsh/Make.defs b/configs/stm32f429i-disco/usbnsh/Make.defs index c8cd4116d69..07fa3b5d009 100644 --- a/configs/stm32f429i-disco/usbnsh/Make.defs +++ b/configs/stm32f429i-disco/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/canard/Make.defs b/configs/stm32f4discovery/canard/Make.defs index 1f8f43ca282..081b85aadce 100644 --- a/configs/stm32f4discovery/canard/Make.defs +++ b/configs/stm32f4discovery/canard/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/cxxtest/Make.defs b/configs/stm32f4discovery/cxxtest/Make.defs index c31bef20e35..30fe1f2d373 100644 --- a/configs/stm32f4discovery/cxxtest/Make.defs +++ b/configs/stm32f4discovery/cxxtest/Make.defs @@ -85,7 +85,7 @@ ARCHCFLAGS = -fno-builtin ifeq ($(CONFIG_UCLIBCXX_EXCEPTION),y) ARCHCPUFLAGSXX = -fno-builtin else - ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions + ARCHCPUFLAGSXX = -fno-builtin -fno-exceptions -fcheck-new endif ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/stm32f4discovery/elf/Make.defs b/configs/stm32f4discovery/elf/Make.defs index 77d0869652f..aa901675810 100644 --- a/configs/stm32f4discovery/elf/Make.defs +++ b/configs/stm32f4discovery/elf/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/ipv6/Make.defs b/configs/stm32f4discovery/ipv6/Make.defs index 59e8e4a50aa..bb876684f9f 100644 --- a/configs/stm32f4discovery/ipv6/Make.defs +++ b/configs/stm32f4discovery/ipv6/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/kostest/Make.defs b/configs/stm32f4discovery/kostest/Make.defs index cdc6b370b8e..26abce54857 100644 --- a/configs/stm32f4discovery/kostest/Make.defs +++ b/configs/stm32f4discovery/kostest/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/netnsh/Make.defs b/configs/stm32f4discovery/netnsh/Make.defs index d229b8e7603..e8e90334947 100644 --- a/configs/stm32f4discovery/netnsh/Make.defs +++ b/configs/stm32f4discovery/netnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/nsh/Make.defs b/configs/stm32f4discovery/nsh/Make.defs index bf06630d058..02251501c88 100644 --- a/configs/stm32f4discovery/nsh/Make.defs +++ b/configs/stm32f4discovery/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/nxlines/Make.defs b/configs/stm32f4discovery/nxlines/Make.defs index 5b6ee054c44..f1cbc25e729 100644 --- a/configs/stm32f4discovery/nxlines/Make.defs +++ b/configs/stm32f4discovery/nxlines/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/pm/Make.defs b/configs/stm32f4discovery/pm/Make.defs index 61081de08a2..52cbca1fa23 100644 --- a/configs/stm32f4discovery/pm/Make.defs +++ b/configs/stm32f4discovery/pm/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/posix_spawn/Make.defs b/configs/stm32f4discovery/posix_spawn/Make.defs index 1d45cdd8d94..40929ec4ddf 100644 --- a/configs/stm32f4discovery/posix_spawn/Make.defs +++ b/configs/stm32f4discovery/posix_spawn/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/pseudoterm/Make.defs b/configs/stm32f4discovery/pseudoterm/Make.defs index d1dd82ebf0b..9ec926c48c6 100644 --- a/configs/stm32f4discovery/pseudoterm/Make.defs +++ b/configs/stm32f4discovery/pseudoterm/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/rgbled/Make.defs b/configs/stm32f4discovery/rgbled/Make.defs index bf06630d058..02251501c88 100644 --- a/configs/stm32f4discovery/rgbled/Make.defs +++ b/configs/stm32f4discovery/rgbled/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/uavcan/Make.defs b/configs/stm32f4discovery/uavcan/Make.defs index e911bdd2d53..3a0c6c6df35 100644 --- a/configs/stm32f4discovery/uavcan/Make.defs +++ b/configs/stm32f4discovery/uavcan/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/usbnsh/Make.defs b/configs/stm32f4discovery/usbnsh/Make.defs index 4ba2909b7a7..69574bbbd7c 100644 --- a/configs/stm32f4discovery/usbnsh/Make.defs +++ b/configs/stm32f4discovery/usbnsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f4discovery/winbuild/Make.defs b/configs/stm32f4discovery/winbuild/Make.defs index cfc4261cbf5..ecf9a22b123 100644 --- a/configs/stm32f4discovery/winbuild/Make.defs +++ b/configs/stm32f4discovery/winbuild/Make.defs @@ -64,7 +64,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f746-ws/nsh/Make.defs b/configs/stm32f746-ws/nsh/Make.defs index f2aa3a4d62b..cbf3bbdb2bb 100644 --- a/configs/stm32f746-ws/nsh/Make.defs +++ b/configs/stm32f746-ws/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32f746g-disco/nsh/Make.defs b/configs/stm32f746g-disco/nsh/Make.defs index 608dd2a00bb..cb8ea072510 100644 --- a/configs/stm32f746g-disco/nsh/Make.defs +++ b/configs/stm32f746g-disco/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32l476vg-disco/nsh/Make.defs b/configs/stm32l476vg-disco/nsh/Make.defs index 0819e438c21..836070c0d0d 100644 --- a/configs/stm32l476vg-disco/nsh/Make.defs +++ b/configs/stm32l476vg-disco/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32ldiscovery/nsh/Make.defs b/configs/stm32ldiscovery/nsh/Make.defs index fc936f8f9da..1d4b9050cca 100644 --- a/configs/stm32ldiscovery/nsh/Make.defs +++ b/configs/stm32ldiscovery/nsh/Make.defs @@ -76,7 +76,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/stm32vldiscovery/nsh/Make.defs b/configs/stm32vldiscovery/nsh/Make.defs index 3f02d1771a7..54853c23b57 100644 --- a/configs/stm32vldiscovery/nsh/Make.defs +++ b/configs/stm32vldiscovery/nsh/Make.defs @@ -77,7 +77,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sure-pic32mx/nsh/Make.defs b/configs/sure-pic32mx/nsh/Make.defs index 430f95a8f08..9134fd6b253 100644 --- a/configs/sure-pic32mx/nsh/Make.defs +++ b/configs/sure-pic32mx/nsh/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/sure-pic32mx/usbnsh/Make.defs b/configs/sure-pic32mx/usbnsh/Make.defs index 9eaf383f2df..3d1b7dee386 100644 --- a/configs/sure-pic32mx/usbnsh/Make.defs +++ b/configs/sure-pic32mx/usbnsh/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/teensy-2.0/hello/Make.defs b/configs/teensy-2.0/hello/Make.defs index 24cf2831919..d5eb3f9c4c8 100644 --- a/configs/teensy-2.0/hello/Make.defs +++ b/configs/teensy-2.0/hello/Make.defs @@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/teensy-2.0/nsh/Make.defs b/configs/teensy-2.0/nsh/Make.defs index 726fc73f85b..abf35b198be 100644 --- a/configs/teensy-2.0/nsh/Make.defs +++ b/configs/teensy-2.0/nsh/Make.defs @@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/teensy-2.0/usbmsc/Make.defs b/configs/teensy-2.0/usbmsc/Make.defs index 785aa0a9c62..f0518e9448a 100644 --- a/configs/teensy-2.0/usbmsc/Make.defs +++ b/configs/teensy-2.0/usbmsc/Make.defs @@ -73,7 +73,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/teensy-3.x/nsh/Make.defs b/configs/teensy-3.x/nsh/Make.defs index 597d2e8cf3e..f42e7beae3a 100644 --- a/configs/teensy-3.x/nsh/Make.defs +++ b/configs/teensy-3.x/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/teensy-3.x/usbnsh/Make.defs b/configs/teensy-3.x/usbnsh/Make.defs index e750c7b5705..0d0d0dfa56a 100644 --- a/configs/teensy-3.x/usbnsh/Make.defs +++ b/configs/teensy-3.x/usbnsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/teensy-lc/nsh/Make.defs b/configs/teensy-lc/nsh/Make.defs index f70645f9e8f..aa08be609c3 100644 --- a/configs/teensy-lc/nsh/Make.defs +++ b/configs/teensy-lc/nsh/Make.defs @@ -72,7 +72,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/tm4c123g-launchpad/nsh/Make.defs b/configs/tm4c123g-launchpad/nsh/Make.defs index c297559d64f..9414fd49837 100644 --- a/configs/tm4c123g-launchpad/nsh/Make.defs +++ b/configs/tm4c123g-launchpad/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/tm4c1294-launchpad/ipv6/Make.defs b/configs/tm4c1294-launchpad/ipv6/Make.defs index 13fa06838c2..286f00894f8 100644 --- a/configs/tm4c1294-launchpad/ipv6/Make.defs +++ b/configs/tm4c1294-launchpad/ipv6/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/tm4c1294-launchpad/nsh/Make.defs b/configs/tm4c1294-launchpad/nsh/Make.defs index bb91d3bb86c..a3773d93004 100644 --- a/configs/tm4c1294-launchpad/nsh/Make.defs +++ b/configs/tm4c1294-launchpad/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/twr-k60n512/nsh/Make.defs b/configs/twr-k60n512/nsh/Make.defs index e002cca1a05..948929aca67 100644 --- a/configs/twr-k60n512/nsh/Make.defs +++ b/configs/twr-k60n512/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/u-blox-c027/nsh/Make.defs b/configs/u-blox-c027/nsh/Make.defs index 7d08bc55687..938059a6f98 100644 --- a/configs/u-blox-c027/nsh/Make.defs +++ b/configs/u-blox-c027/nsh/Make.defs @@ -74,7 +74,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/ubw32/nsh/Make.defs b/configs/ubw32/nsh/Make.defs index 236169bdca8..27398b70bcc 100644 --- a/configs/ubw32/nsh/Make.defs +++ b/configs/ubw32/nsh/Make.defs @@ -71,7 +71,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/viewtool-stm32f107/highpri/Make.defs b/configs/viewtool-stm32f107/highpri/Make.defs index 485e163139d..ba912c3b509 100644 --- a/configs/viewtool-stm32f107/highpri/Make.defs +++ b/configs/viewtool-stm32f107/highpri/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/viewtool-stm32f107/netnsh/Make.defs b/configs/viewtool-stm32f107/netnsh/Make.defs index d36b7833579..0a39dda71c7 100644 --- a/configs/viewtool-stm32f107/netnsh/Make.defs +++ b/configs/viewtool-stm32f107/netnsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/viewtool-stm32f107/nsh/Make.defs b/configs/viewtool-stm32f107/nsh/Make.defs index 55c08e0406d..39eaa39e178 100644 --- a/configs/viewtool-stm32f107/nsh/Make.defs +++ b/configs/viewtool-stm32f107/nsh/Make.defs @@ -80,7 +80,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/zkit-arm-1769/hello/Make.defs b/configs/zkit-arm-1769/hello/Make.defs index 102dbfe1c4b..c1e80077427 100644 --- a/configs/zkit-arm-1769/hello/Make.defs +++ b/configs/zkit-arm-1769/hello/Make.defs @@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/zkit-arm-1769/nsh/Make.defs b/configs/zkit-arm-1769/nsh/Make.defs index c53eade8a42..d8a9f5a1f69 100644 --- a/configs/zkit-arm-1769/nsh/Make.defs +++ b/configs/zkit-arm-1769/nsh/Make.defs @@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/zkit-arm-1769/nxhello/Make.defs b/configs/zkit-arm-1769/nxhello/Make.defs index ae83d3bf59e..18df46e5804 100644 --- a/configs/zkit-arm-1769/nxhello/Make.defs +++ b/configs/zkit-arm-1769/nxhello/Make.defs @@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/zkit-arm-1769/thttpd/Make.defs b/configs/zkit-arm-1769/thttpd/Make.defs index a11c2868e80..018ce9ba7ad 100644 --- a/configs/zkit-arm-1769/thttpd/Make.defs +++ b/configs/zkit-arm-1769/thttpd/Make.defs @@ -84,7 +84,7 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef ARCHDEFINES = diff --git a/configs/zp214xpa/nsh/Make.defs b/configs/zp214xpa/nsh/Make.defs index 4e6db0acdc8..aa76faf4f3b 100644 --- a/configs/zp214xpa/nsh/Make.defs +++ b/configs/zp214xpa/nsh/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/configs/zp214xpa/nxlines/Make.defs b/configs/zp214xpa/nxlines/Make.defs index 75b8a40e0c0..e86090ca97f 100644 --- a/configs/zp214xpa/nxlines/Make.defs +++ b/configs/zp214xpa/nxlines/Make.defs @@ -86,7 +86,7 @@ else endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef diff --git a/tools/ide_exporter.py b/tools/ide_exporter.py index 2f139238dff..f90da6f2e6e 100755 --- a/tools/ide_exporter.py +++ b/tools/ide_exporter.py @@ -130,7 +130,7 @@ UVISION_GCC_PRJ_SETTINGS = {'root_group':'', 'ext_remap' : UVISION_GCC_EXT_REMAP, 'uv_file_type' : UVISION_FILE_TYPE_MAP, 'c_misc' : ('.//Carm', '-fno-builtin -Wall -Wstrict-prototypes -Wshadow -Wundef -g'), - 'cxx_misc' : ('.//Carm', '-fno-builtin -fno-exceptions -fno-rtti -Wall -Wshadow -Wundef -g'), + 'cxx_misc' : ('.//Carm', '-fno-builtin -fno-exceptions -fcheck-new -fno-rtti -Wall -Wshadow -Wundef -g'), 'ld_misc' : ('.//LDarm', '--entry=__start -lgcc'), 'cxx_def' : ('.//Carm', ''),} From 67851849da2a79a1a63997269af0aa2b6a70a7d3 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 22 Aug 2016 10:31:52 -0600 Subject: [PATCH 110/214] Upate ChangeLog --- ChangeLog | 24 ++++++++++++++++++++++++ libc/misc/lib_xorshift128.c | 8 -------- libxx/libxx_new.cxx | 2 +- libxx/libxx_newa.cxx | 2 +- 4 files changed, 26 insertions(+), 10 deletions(-) diff --git a/ChangeLog b/ChangeLog index 5b01e5e1425..35c2fc43b0c 100755 --- a/ChangeLog +++ b/ChangeLog @@ -12569,3 +12569,27 @@ (2016-08-13). * arch/arm/src/stm32: STM32F3 SPI: Cannot write always 16-bit value to DR register because of how the F3 implements data packing (2016-08-13). + * Kinetis: Add support for I2C and RTC. From v01d (phreakuencies) + (2016-08-13). + * teensy 3.x i2c. From v01d (phreakuencies) (2016-08-13). + * SH1106 0.96 OLED module support (SSD1306 compatible) + I2C fixes. + From v01d (phreakuencies) (2016-08-13). + * Add support for SAMV7 DACC module. From iotr Mienkowski (2016-08-15). + * Add oneshot board initialization to stm32f103-minimum. From Alan + Carvalho de Assis (2016-08-15). + * drivers/audio/tone.c: Add Audio Tone Generator for NuttX. From Alan + Carvalho de Assis (2016-08-16). + * configs/stm32f103-minimum: Add board configuration to initialize Audio + Tone Generator. From Alan Carvalho de Assis (2016-08-16). + * STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function + numbers. From Konstantin Berezenko (2016-08-17). + * STM32 DMA Fix: Change stm32 adc dma callback to send channel number + instead of index. From Konstantin Berezenko (2016-08-17). + * SAMA5: Add missing oneshot max_delay method (2016-08-18). + * configs/stm32bufferfly2: Add support for the Kamami stm32butterfly2 + development board with optional ETH phy. From Michał Łyszczek + (2016-08-19). + * libc/misc: Separate XorShift128 PRNG from /dev/urandom and make it + generally available (2016-08-20). + * sched/sched_cpuload_oneshot: Use the oneshot timer with optional + entropy to measure cPU load if so configured (2016-08-20). diff --git a/libc/misc/lib_xorshift128.c b/libc/misc/lib_xorshift128.c index 912740771e3..b74c04f4ef5 100644 --- a/libc/misc/lib_xorshift128.c +++ b/libc/misc/lib_xorshift128.c @@ -49,14 +49,6 @@ #include -/**************************************************************************** - * Private Types - ****************************************************************************/ - -#ifndef CONFIG_CPULOAD_ONESHOT_ENTROPY -# define CONFIG_CPULOAD_ONESHOT_ENTROPY 0 -#endif - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/libxx/libxx_new.cxx b/libxx/libxx_new.cxx index 423ab833b55..863321e6738 100644 --- a/libxx/libxx_new.cxx +++ b/libxx/libxx_new.cxx @@ -87,7 +87,7 @@ void *operator new(unsigned int nbytes) void *alloc = lib_malloc(nbytes); -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_ERROR if (alloc == 0) { // Oh my.. we are required to return a valid pointer and diff --git a/libxx/libxx_newa.cxx b/libxx/libxx_newa.cxx index a3b327eb63d..826017ad9ea 100644 --- a/libxx/libxx_newa.cxx +++ b/libxx/libxx_newa.cxx @@ -87,7 +87,7 @@ void *operator new[](unsigned int nbytes) void *alloc = lib_malloc(nbytes); -#ifdef CONFIG_DEBUG_FEATURES +#ifdef CONFIG_DEBUG_ERROR if (alloc == 0) { // Oh my.. we are required to return a valid pointer and From 3b6befcd16f42a9d74e775d26f48ba1258922ddd Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 23 Aug 2016 08:00:11 -0600 Subject: [PATCH 111/214] tools/mkfsdata.pl was still generating the old-style apps/include inclusion paths --- tools/mkfsdata.pl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/mkfsdata.pl b/tools/mkfsdata.pl index db4b61524eb..9a94f175c3c 100755 --- a/tools/mkfsdata.pl +++ b/tools/mkfsdata.pl @@ -41,7 +41,7 @@ opendir(DIR, "."); @files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR); closedir(DIR); -print(OUTPUT "#include \n\n"); +print(OUTPUT "#include \"netutils/httpd.h\"\n\n"); print(OUTPUT "#ifndef NULL\n#define NULL 0\n#endif\n\n"); foreach $file (@files) { From 338bf8c9e36da67bb3a64ed57d10b0c0684e1f62 Mon Sep 17 00:00:00 2001 From: Entinger Alexander Date: Tue, 23 Aug 2016 08:22:47 -0600 Subject: [PATCH 112/214] drivers/sensors: Add drvier for the LIS3MDL 3 axis magnetometer --- drivers/sensors/Kconfig | 7 + drivers/sensors/Make.defs | 5 + drivers/sensors/lis3mdl.c | 630 ++++++++++++++++++++++++++++++++ include/nuttx/sensors/lis3mdl.h | 178 +++++++++ 4 files changed, 820 insertions(+) create mode 100644 drivers/sensors/lis3mdl.c create mode 100644 include/nuttx/sensors/lis3mdl.h diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index 90218fe0eea..94a43a53c24 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -173,6 +173,13 @@ config I2C_LM75 bool default y if LM75 +config LIS3MDL + bool "STMicro LIS3MDL 3-Axis magnetometer support" + default n + select SPI + ---help--- + Enable driver support for the ST LIS3MDL 3-axis magnetometer. + config LM75 bool "STMicro LM-75 Temperature Sensor support" default n diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs index 21219588b39..4af5755c2cb 100644 --- a/drivers/sensors/Make.defs +++ b/drivers/sensors/Make.defs @@ -113,6 +113,11 @@ endif ifeq ($(CONFIG_MPL115A),y) CSRCS += mpl115a.c endif + +ifeq ($(CONFIG_LIS3MDL),y) + CSRCS += lis3mdl.c +endif + endif # CONFIG_SPI # Quadrature encoder upper half diff --git a/drivers/sensors/lis3mdl.c b/drivers/sensors/lis3mdl.c new file mode 100644 index 00000000000..eeccf352f3f --- /dev/null +++ b/drivers/sensors/lis3mdl.c @@ -0,0 +1,630 @@ +/**************************************************************************** + * drivers/sensors/lis3mdl.c + * Character driver for the LIS3MDL 3-Axis magnetometer. + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_LIS3MDL) + +/**************************************************************************** + * Private + ****************************************************************************/ + +struct lis3mdl_sensor_data_s +{ + int16_t x_mag; /* Measurement result for x axis */ + int16_t y_mag; /* Measurement result for y axis */ + int16_t z_mag; /* Measurement result for z axis */ + int16_t temperature; /* Measurement result for temperature sensor */ +}; + +struct lis3mdl_dev_s +{ + FAR struct lis3mdl_dev_s *flink; /* Supports a singly linked list of + * drivers */ + FAR struct spi_dev_s *spi; /* Pointer to the SPI instance */ + FAR struct lis3mdl_config_s *config; /* Pointer to the configuration + * of the LIS3MDL sensor */ + sem_t datasem; /* Manages exclusive access to this + * structure */ + struct lis3mdl_sensor_data_s data; /* The data as measured by the sensor */ + struct work_s work; /* The work queue is responsible for + * retrieving the data from the + * sensor after the arrival of new + * data was signalled in an interrupt */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void lis3mdl_read_register(FAR struct lis3mdl_dev_s *dev, + uint8_t const reg_addr, uint8_t * reg_data); +static void lis3mdl_write_register(FAR struct lis3mdl_dev_s *dev, + uint8_t const reg_addr, + uint8_t const reg_data); +static void lis3mdl_reset(FAR struct lis3mdl_dev_s *dev); +static void lis3mdl_read_measurement_data(FAR struct lis3mdl_dev_s *dev); +static void lis3mdl_read_magnetic_data(FAR struct lis3mdl_dev_s *dev, + uint16_t * x_mag, uint16_t * y_mag, + uint16_t * z_mag); +static void lis3mdl_read_temperature(FAR struct lis3mdl_dev_s *dev, + uint16_t * temperature); +static int lis3mdl_interrupt_handler(int irq, FAR void *context); +static void lis3mdl_worker(FAR void *arg); + +static int lis3mdl_open(FAR struct file *filep); +static int lis3mdl_close(FAR struct file *filep); +static ssize_t lis3mdl_read(FAR struct file *, FAR char *, size_t); +static ssize_t lis3mdl_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int lis3mdl_ioctl(FAR struct file *filep, int cmd, unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_lis3mdl_fops = +{ + lis3mdl_open, + lis3mdl_close, + lis3mdl_read, + lis3mdl_write, + NULL, + lis3mdl_ioctl +#ifndef CONFIG_DISABLE_POLL + , NULL +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL +#endif +}; + +/* Single linked list to store instances of drivers */ + +static struct lis3mdl_dev_s *g_lis3mdl_list = 0; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lis3mdl_read_register + ****************************************************************************/ + +static void lis3mdl_read_register(FAR struct lis3mdl_dev_s *dev, + uint8_t const reg_addr, uint8_t * reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to read - the MSB needs + * to be set to indicate the read indication. + */ + + SPI_SEND(dev->spi, reg_addr | 0x80); + + /* Write an idle byte while receiving the required data */ + + *reg_data = (uint8_t) (SPI_SEND(dev->spi, 0)); + + /* Set CS to high which deselects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: lis3mdl_write_register + ****************************************************************************/ + +static void lis3mdl_write_register(FAR struct lis3mdl_dev_s *dev, + uint8_t const reg_addr, + uint8_t const reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to read */ + + SPI_SEND(dev->spi, reg_addr); + + /* Transmit the content which should be written in the register */ + + SPI_SEND(dev->spi, reg_data); + + /* Set CS to high which deselects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: lis3mdl_reset + ****************************************************************************/ + +static void lis3mdl_reset(FAR struct lis3mdl_dev_s *dev) +{ + lis3mdl_write_register(dev, + LIS3MDL_CTRL_REG_2, LIS3MDL_CTRL_REG_2_SOFT_RST_bm); + + up_mdelay(100); +} + +/**************************************************************************** + * Name: lis3mdl_interrupt_handler + ****************************************************************************/ + +static void lis3mdl_read_measurement_data(FAR struct lis3mdl_dev_s *dev) +{ + /* Magnetic data */ + + uint16_t x_mag = 0, y_mag = 0, z_mag = 0; + + lis3mdl_read_magnetic_data(dev, &x_mag, &y_mag, &z_mag); + + /* Temperature */ + + uint16_t temperature = 0; + + lis3mdl_read_temperature(dev, &temperature); + + /* Aquire the semaphore before the data is copied */ + + int ret = sem_wait(&dev->datasem); + if (ret != OK) + { + snerr("Could not aquire dev->datasem: %d\n", ret); + return; + } + + /* Copy retrieve data to internal data structure */ + + dev->data.x_mag = (int16_t) (x_mag); + dev->data.y_mag = (int16_t) (y_mag); + dev->data.z_mag = (int16_t) (z_mag); + dev->data.temperature = (int16_t) (temperature); + + /* Give back the semaphore */ + + sem_post(&dev->datasem); +} + +/**************************************************************************** + * Name: lis3mdl_read_magnetic_data + ****************************************************************************/ + +static void lis3mdl_read_magnetic_data(FAR struct lis3mdl_dev_s *dev, + uint16_t * x_mag, uint16_t * y_mag, + uint16_t * z_mag) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to start reading 0x80 -> + * MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is set -> auto + * increment of address when reading multiple bytes. + */ + + SPI_SEND(dev->spi, (LIS3MDL_OUT_X_L_REG | 0x80 | 0x40)); /* RX */ + *x_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *x_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + *y_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *y_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + *z_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *z_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + /* Set CS to high which deselects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: lis3mdl_read_temperature + ****************************************************************************/ + +static void lis3mdl_read_temperature(FAR struct lis3mdl_dev_s *dev, + uint16_t * temperature) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to start reading 0x80 -> + * MSB is set -> Read Indication 0x40 -> MSB-1 (MS-Bit) is set -> auto + * increment of address when reading multiple bytes */ + + SPI_SEND(dev->spi, (LIS3MDL_TEMP_OUT_L_REG | 0x80 | 0x40)); + + /* RX */ + + *temperature = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *temperature |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + /* Set CS to high which deselects the LIS3MDL */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: lis3mdl_interrupt_handler + ****************************************************************************/ + +static int lis3mdl_interrupt_handler(int irq, FAR void *context) +{ + /* This function should be called upon a rising edge on the LIS3MDL DRDY pin + * since it signals that new data has been measured. */ + + FAR struct lis3mdl_dev_s *priv = 0; + int ret; + + /* Find out which LIS3MDL device caused the interrupt */ + + for (priv = g_lis3mdl_list; priv && priv->config->irq != irq; + priv = priv->flink); + DEBUGASSERT(priv != NULL); + + /* Task the worker with retrieving the latest sensor data. We should not do + * this in a interrupt since it might take too long. Also we cannot lock the + * SPI bus from within an interrupt. */ + + DEBUGASSERT(priv->work.worker == NULL); + ret = work_queue(HPWORK, &priv->work, lis3mdl_worker, priv, 0); + if (ret != 0) + { + snerr("Failed to queue work: %d\n", ret); + return ERROR; + } + else + { + return OK; + } +} + +/**************************************************************************** + * Name: lis3mdl_worker + ****************************************************************************/ + +static void lis3mdl_worker(FAR void *arg) +{ + FAR struct lis3mdl_dev_s *priv = (FAR struct lis3mdl_dev_s *)(arg); + DEBUGASSERT(priv != NULL); + + /* Read out the latest sensor data */ + + lis3mdl_read_measurement_data(priv); +} + +/**************************************************************************** + * Name: lis3mdl_open + ****************************************************************************/ +static int lis3mdl_open(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct lis3mdl_dev_s *priv = inode->i_private; + uint8_t reg_content; + uint8_t reg_addr; + + DEBUGASSERT(priv != NULL); + + /* Perform a reset */ + + lis3mdl_reset(priv); + + /* Enable * - the maximum full scale mode. * Full scale = +/- 1.6 mT (16 + * Gauss) */ + + lis3mdl_write_register(priv, + LIS3MDL_CTRL_REG_2, + LIS3MDL_CTRL_REG_2_FS_1_bm | + LIS3MDL_CTRL_REG_2_FS_0_bm); + + /* Enable - temperature sensor - ultra high performance mode (UMP) for X and + * Y - fast output data rates This results in a output data rate of 155 Hz + * for X and Y */ + + lis3mdl_write_register(priv, + LIS3MDL_CTRL_REG_1, + LIS3MDL_CTRL_REG_1_TEMP_EN_bm | + LIS3MDL_CTRL_REG_1_OM_1_bm | LIS3MDL_CTRL_REG_1_OM_0_bm + | LIS3MDL_CTRL_REG_1_FAST_ODR_bm); + + /* Enable * - ultra high performance mode (UMP) for Z * This should result to + * the same output data rate as for X and Y. */ + + lis3mdl_write_register(priv, + LIS3MDL_CTRL_REG_4, + LIS3MDL_CTRL_REG_4_OMZ_1_bm | + LIS3MDL_CTRL_REG_4_OMZ_0_bm); + + /* Enable * - block data update for magnetic sensor data * This should + * prevent race conditions when reading sensor data. */ + + lis3mdl_write_register(priv, LIS3MDL_CTRL_REG_5, LIS3MDL_CTRL_REG_5_BDU_bm); + + /* Enable continous conversion mode - the device starts measuring now. */ + + lis3mdl_write_register(priv, LIS3MDL_CTRL_REG_3, 0); + + /* Read measurement data to ensure DRDY is low */ + + lis3mdl_read_measurement_data(priv); + + /* Read back the content of all control registers for debug purposes */ + + reg_content = 0; + eg_addr = LIS3MDL_CTRL_REG_1; + for (; reg_addr <= LIS3MDL_CTRL_REG_5; reg_addr++) + { + lis3mdl_read_register(priv, reg_addr, ®_content); + snerr("R#%04x = %04x\n", reg_addr, reg_content); + } + + lis3mdl_read_register(priv, LIS3MDL_STATUS_REG, ®_content); + snerr("STATUS_REG = %04x\n", reg_content); + + return OK; +} + +/**************************************************************************** + * Name: lis3mdl_close + ****************************************************************************/ + +static int lis3mdl_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct lis3mdl_dev_s *priv = inode->i_private; + + DEBUGASSERT(priv != NULL); + + /* Perform a reset */ + + lis3mdl_reset(priv); + + return OK; +} + +/**************************************************************************** + * Name: lis3mdl_read + ****************************************************************************/ +static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct lis3mdl_dev_s *priv = inode->i_private; + FAR struct lis3mdl_sensor_data_s *data; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Check if enough memory was provided for the read call */ + + if (buflen < sizeof(FAR struct lis3mdl_sensor_data_s)) + { + snerr("Not enough memory for reading out a sensor data sample\n"); + return -ENOSYS; + } + + /* Aquire the semaphore before the data is copied */ + + ret = sem_wait(&priv->datasem); + if (ret != OK) + { + snerr("Could not aquire priv->datasem: %d\n", ret); + return ERROR; + } + + /* Copy the sensor data into the buffer */ + + data = (FAR struct lis3mdl_sensor_data_s *)buffer; + memset(data, 0, sizeof(FAR struct lis3mdl_sensor_data_s)); + + data->x_mag = priv->data.x_mag; + data->y_mag = priv->data.y_mag; + data->z_mag = priv->data.z_mag; + data->temperature = priv->data.temperature; + + /* Give back the semaphore */ + + sem_post(&priv->datasem); + + return sizeof(FAR struct lis3mdl_sensor_data_s); +} + +/**************************************************************************** + * Name: lis3mdl_write + ****************************************************************************/ + +static ssize_t lis3mdl_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + return -ENOSYS; +} + +/**************************************************************************** + * Name: lis3mdl_ioctl + ****************************************************************************/ + +static int lis3mdl_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + int ret = OK; + + switch (cmd) + { + /* Command was not recognized */ + + default: + snerr("Unrecognized cmd: %d\n", cmd); + ret = -ENOTTY; + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lis3mdl_register + * + * Description: + * Register the LIS3MDL character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/mag0" + * spi - An instance of the SPI interface to use to communicate with LIS3MDL + * config - configuration for the LIS3MDL driver. For details see description above. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct lis3mdl_config_s const *config) +{ + FAR struct lis3mdl_dev_s *priv; + int ret; + + /* Sanity check */ + + DEBUGASSERT(spi != NULL); + DEBUGASSERT(config != NULL); + + /* Initialize the LIS3MDL device structure */ + + priv = (FAR struct lis3mdl_dev_s *)kmm_malloc(sizeof(struct lis3mdl_dev_s)); + if (priv == NULL) + { + snerr("Failed to allocate instance\n"); + return -ENOMEM; + } + + priv->spi = spi; + priv->config = config; + + priv->work.worker = NULL; + + sem_init(&priv->datasem, 0, 1); /* Initialize sensor data access + * semaphore */ + + /* Setup SPI frequency and mode */ + + SPI_SETFREQUENCY(spi, LIS3MDL_SPI_FREQUENCY); + SPI_SETMODE(spi, LIS3MDL_SPI_MODE); + + /* Attach the interrupt handler */ + + ret = priv->config->attach(priv->config, &lis3mdl_interrupt_handler); + if (ret < 0) + { + snerr("Failed to attach interrupt\n"); + return -ENODEV; + } + + /* Register the character driver */ + + ret = register_driver(devpath, &g_lis3mdl_fops, 0666, priv); + if (ret < 0) + { + snerr("Failed to register driver: %d\n", ret); + kmm_free(priv); + sem_destroy(&priv->datasem); + return -ENODEV; + } + + /* Since we support multiple LIS3MDL devices are supported, we will need to + * add this new instance to a list of device instances so that it can be + * found by the interrupt handler based on the received IRQ number. */ + + priv->flink = g_lis3mdl_list; + g_lis3mdl_list = priv; + + return OK; +} + +#endif /* CONFIG_SPI && CONFIG_LIS3MDL */ diff --git a/include/nuttx/sensors/lis3mdl.h b/include/nuttx/sensors/lis3mdl.h new file mode 100644 index 00000000000..c7029058072 --- /dev/null +++ b/include/nuttx/sensors/lis3mdl.h @@ -0,0 +1,178 @@ +/**************************************************************************** + * include/nuttx/sensors/lis3mdl.h + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef NUTTX_INCLUDE_NUTTX_SENSORS_LIS3MDL_H_ +#define NUTTX_INCLUDE_NUTTX_SENSORS_LIS3MDL_H_ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_LIS3MDL) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LIS3MDL Register Definitions *********************************************/ + +#define LIS3MDL_WHO_AM_I_REG (0x0F) +#define LIS3MDL_CTRL_REG_1 (0x20) +#define LIS3MDL_CTRL_REG_2 (0x21) +#define LIS3MDL_CTRL_REG_3 (0x22) +#define LIS3MDL_CTRL_REG_4 (0x23) +#define LIS3MDL_CTRL_REG_5 (0x24) +#define LIS3MDL_STATUS_REG (0x27) +#define LIS3MDL_OUT_X_L_REG (0x28) +#define LIS3MDL_OUT_X_H_REG (0x29) +#define LIS3MDL_OUT_Y_L_REG (0x2A) +#define LIS3MDL_OUT_Y_H_REG (0x2B) +#define LIS3MDL_OUT_Z_L_REG (0x2C) +#define LIS3MDL_OUT_Z_H_REG (0x2D) +#define LIS3MDL_TEMP_OUT_L_REG (0x2E) +#define LIS3MDL_TEMP_OUT_H_REG (0x2F) +#define LIS3MDL_INT_CFG_REG (0x30) +#define LIS3MDL_INT_SRC_REG (0x31) +#define LIS3MDL_INT_THS_L_REG (0x32) +#define LIS3MDL_INT_THS_H_REG (0x33) + +/* LIS3MDL CTRL_REG_1 Bit Definitions ***************************************/ + +#define LIS3MDL_CTRL_REG_1_TEMP_EN_bm (1<<7) /* Enable the temperature sensor */ +#define LIS3MDL_CTRL_REG_1_OM_1_bm (1<<6) /* Select the operating mode of X and Y axis bit 1 */ +#define LIS3MDL_CTRL_REG_1_OM_0_bm (1<<5) /* Select the operating mode of X and Y axis bit 0 */ +#define LIS3MDL_CTRL_REG_1_DO2_bm (1<<4) /* Output data rate selection bit 2 */ +#define LIS3MDL_CTRL_REG_1_DO1_bm (1<<3) /* Output data rate selection bit 1 */ +#define LIS3MDL_CTRL_REG_1_DO0_bm (1<<2) /* Output data rate selection bit 2 */ +#define LIS3MDL_CTRL_REG_1_FAST_ODR_bm (1<<1) /* Enable higher output data rates */ + +/* LIS3MDL CTRL_REG_2 Bit Definitions ***************************************/ + +#define LIS3MDL_CTRL_REG_2_FS_1_bm (1<<6) /* Full scale selection bit 1 */ +#define LIS3MDL_CTRL_REG_2_FS_0_bm (1<<5) /* Full scale selection bit 0 */ +#define LIS3MDL_CTRL_REG_2_REBOOT_bm (1<<3) /* Reboot Memory Content */ +#define LIS3MDL_CTRL_REG_2_SOFT_RST_bm (1<<2) /* Soft Reset */ + +/* LIS3MDL CTRL_REG_4 Bit Definitions ***************************************/ + +#define LIS3MDL_CTRL_REG_4_OMZ_1_bm (1<<3) /* Select the operating mode of Z axis bit 1 */ +#define LIS3MDL_CTRL_REG_4_OMZ_0_bm (1<<2) /* Select the operating mode of Z axis bit 0 */ + +/* LIS3MDL CTRL_REG_5 Bit Definitions ***************************************/ + +#define LIS3MDL_CTRL_REG_5_BDU_bm (1<<6) /* Enable block data update for magnetic data (prevent race conditions while reading) */ + +/* SPI BUS PARAMETERS *******************************************************/ + +#define LIS3MDL_SPI_FREQUENCY (1000000) /* 1 MHz */ +#define LIS3MDL_SPI_MODE (SPIDEV_MODE3) /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the LIS3MDL + * driver. This structure provides information about the configuration + * of the sensor and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +struct lis3mdl_config_s +{ + /* Since multiple LIS3MDL can be connected to the same SPI bus we need + * to use multiple spi device ids which are employed by NuttX to select/ + * deselect the desired LIS3MDL chip via their chip select inputs. + */ + + int spi_devid; + + /* The IRQ number must be provided for each so LIS3MDL device so that + * their interrupts can be distinguished. + */ + + int irq; + + /* Attach the LIS3MDL interrupt handler to the GPIO interrupt of the + * concrete LIS3MDL instance. + */ + + int (*attach)(FAR struct lis3mdl_config_s *, xcpt_t); +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: lis3mdl_register + * + * Description: + * Register the LIS3MDL character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/mag0" + * spi - An instance of the SPI interface to use to communicate with LIS3MDL + * config - configuration for the LIS3MDL driver. For details see description above. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct lis3mdl_config_s const *config); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_SPI && CONFIG_LIS3MDL */ +#endif /* NUTTX_INCLUDE_NUTTX_SENSORS_LIS3MDL_H_ */ From b29287b02250e26bf44500755fbc6ed2d9cdb66b Mon Sep 17 00:00:00 2001 From: Entinger Alexander Date: Tue, 23 Aug 2016 10:48:08 -0600 Subject: [PATCH 113/214] drivers/sensors: Add driver for the MLX90393 3 axis magnetometer. --- drivers/sensors/Kconfig | 7 + drivers/sensors/Make.defs | 4 + drivers/sensors/lis3mdl.c | 20 +- drivers/sensors/mlx90393.c | 621 +++++++++++++++++++++++++++++++ include/nuttx/sensors/lis3mdl.h | 6 +- include/nuttx/sensors/mlx90393.h | 153 ++++++++ 6 files changed, 801 insertions(+), 10 deletions(-) create mode 100644 drivers/sensors/mlx90393.c create mode 100644 include/nuttx/sensors/mlx90393.h diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index 94a43a53c24..7b986320ca9 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -75,6 +75,13 @@ config MB7040_I2C_FREQUENCY range 1 400000 depends on MB7040 +config MLX90393 + bool "MLX90393 3-Axis Magnetometer" + default n + select SPI + ---help--- + Enable driver support for the Melex MLX90393 3-Axis magnetometer. + config MCP9844 bool "MCP9844 Temperature Sensor" default n diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs index 4af5755c2cb..b3908ce3921 100644 --- a/drivers/sensors/Make.defs +++ b/drivers/sensors/Make.defs @@ -89,6 +89,10 @@ ifeq ($(CONFIG_MCP9844),y) CSRCS += mcp9844.c endif +ifeq ($(CONFIG_MLX90393),y) + CSRCS += mlx90393.c +endif + ifeq ($(CONFIG_MS58XX),y) CSRCS += ms58xx.c endif diff --git a/drivers/sensors/lis3mdl.c b/drivers/sensors/lis3mdl.c index eeccf352f3f..767e7c4b28d 100644 --- a/drivers/sensors/lis3mdl.c +++ b/drivers/sensors/lis3mdl.c @@ -352,10 +352,10 @@ static int lis3mdl_interrupt_handler(int irq, FAR void *context) DEBUGASSERT(priv->work.worker == NULL); ret = work_queue(HPWORK, &priv->work, lis3mdl_worker, priv, 0); - if (ret != 0) + if (ret < 0) { snerr("Failed to queue work: %d\n", ret); - return ERROR; + return ret; } else { @@ -435,8 +435,9 @@ static int lis3mdl_open(FAR struct file *filep) /* Read back the content of all control registers for debug purposes */ reg_content = 0; - eg_addr = LIS3MDL_CTRL_REG_1; - for (; reg_addr <= LIS3MDL_CTRL_REG_5; reg_addr++) + for (reg_addr = LIS3MDL_CTRL_REG_1; + reg_addr <= LIS3MDL_CTRL_REG_5; + reg_addr++) { lis3mdl_read_register(priv, reg_addr, ®_content); snerr("R#%04x = %04x\n", reg_addr, reg_content); @@ -469,6 +470,7 @@ static int lis3mdl_close(FAR struct file *filep) /**************************************************************************** * Name: lis3mdl_read ****************************************************************************/ + static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer, size_t buflen) { @@ -490,10 +492,10 @@ static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer, /* Aquire the semaphore before the data is copied */ ret = sem_wait(&priv->datasem); - if (ret != OK) + if (ret < 0) { snerr("Could not aquire priv->datasem: %d\n", ret); - return ERROR; + return ret; } /* Copy the sensor data into the buffer */ @@ -556,8 +558,10 @@ static int lis3mdl_ioctl(FAR struct file *filep, int cmd, unsigned long arg) * * Input Parameters: * devpath - The full path to the driver to register. E.g., "/dev/mag0" - * spi - An instance of the SPI interface to use to communicate with LIS3MDL - * config - configuration for the LIS3MDL driver. For details see description above. + * spi - An instance of the SPI interface to use to communicate with + * LIS3MDL + * config - configuration for the LIS3MDL driver. For details see + * description above. * * Returned Value: * Zero (OK) on success; a negated errno value on failure. diff --git a/drivers/sensors/mlx90393.c b/drivers/sensors/mlx90393.c new file mode 100644 index 00000000000..6b776615f24 --- /dev/null +++ b/drivers/sensors/mlx90393.c @@ -0,0 +1,621 @@ +/**************************************************************************** + * drivers/sensors/mlx90393.c + * Character driver for the MLX90393 3-Axis magnetometer. + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_MLX90393) + +/**************************************************************************** + * Private + ****************************************************************************/ + +struct mlx90393_sensor_data_s +{ + int16_t x_mag; /* Measurement result for x axis */ + int16_t y_mag; /* Measurement result for y axis */ + int16_t z_mag; /* Measurement result for z axis */ + uint16_t temperature; /* Measurement result for temperature sensor */ +}; + +struct mlx90393_dev_s +{ + FAR struct mlx90393_dev_s *flink; /* Supports a singly linked list + * of drivers */ + FAR struct spi_dev_s *spi; /* Pointer to the SPI instance */ + FAR struct mlx90393_config_s *config; /* Pointer to the configuration of + * the MLX90393 sensor */ + + sem_t datasem; /* Manages exclusive access to + * this structure */ + struct mlx90393_sensor_data_s data; /* The data as measured by the + * sensor */ + struct work_s work; /* The work queue is responsible + * for retrieving the data from + * the sensor after the arrival of + * new data was signalled in an + * interrupt */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void mlx90393_start_burst_mode(FAR struct mlx90393_dev_s *dev); +static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev); +static void mlx90393_read_register(FAR struct mlx90393_dev_s *dev, + uint8_t const reg_addr, uint16_t *reg_data); +static void mlx90393_write_register(FAR struct mlx90393_dev_s *dev, + uint8_t const reg_addr, + uint16_t const reg_data); +static void mlx90393_reset(FAR struct mlx90393_dev_s *dev); +static int mlx90393_interrupt_handler(int irq, FAR void *context); +static void mlx90393_worker(FAR void *arg); + +static int mlx90393_open(FAR struct file *filep); +static int mlx90393_close(FAR struct file *filep); +static ssize_t mlx90393_read(FAR struct file *, FAR char *, size_t); +static ssize_t mlx90393_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int mlx90393_ioctl(FAR struct file *filep, int cmd, unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_mlx90393_fops = +{ + mlx90393_open, + mlx90393_close, + mlx90393_read, + mlx90393_write, + NULL, + mlx90393_ioctl +#ifndef CONFIG_DISABLE_POLL + , NULL +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL +#endif +}; + +/* Single linked list to store instances of drivers */ + +static struct mlx90393_dev_s *g_mlx90393_list = NULL; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mlx90393_start_burst_mode + ****************************************************************************/ + +static void mlx90393_start_burst_mode(FAR struct mlx90393_dev_s *dev) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Start Burst Mode (Continous Measurement on all channels) */ + + SPI_SEND(dev->spi, MLX90393_SB | MLX90393_ZYXT_bm); + + /* Write an idle byte to retrieve the status byte */ + + SPI_SEND(dev->spi, 0); + + /* Set CS to high which deselects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: mlx90393_read_measurement_data + ****************************************************************************/ + +static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev) +{ + int ret; + + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Issue command to read measurement data on all channels */ + + SPI_SEND(dev->spi, MLX90393_RM | MLX90393_ZYXT_bm); + + /* Write an idle byte to retrieve the status byte */ + + SPI_SEND(dev->spi, 0); + + /* The data is output in the following order: T (MSB), T (LSB), X (MSB), X + * (LSB), Y (MSB), Y (LSB), Z (MSB), Z (LSB) + */ + + uint16_t temperature = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + temperature |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + + uint16_t x_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + x_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + + uint16_t y_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + y_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + + uint16_t z_mag = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + z_mag |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + + /* Set CS to high which deselects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); + + /* Aquire the semaphore before the data is copied */ + + ret = sem_wait(&dev->datasem); + if (ret != OK) + { + sndbg("Could not aquire dev->datasem: %d\n", ret); + return; + } + + /* Copy retrieve data to internal data structure */ + + dev->data.temperature = temperature; + dev->data.x_mag = (int16_t) (x_mag); + dev->data.y_mag = (int16_t) (y_mag); + dev->data.z_mag = (int16_t) (z_mag); + + /* Give back the semaphore */ + + sem_post(&dev->datasem); +} + +/**************************************************************************** + * Name: mlx90393_start_burst_mode + ****************************************************************************/ + +static void mlx90393_reset(FAR struct mlx90393_dev_s *dev) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Issue reset command */ + + SPI_SEND(dev->spi, MLX90393_RT); + + /* Write an idle byte to retrieve the status byte */ + + SPI_SEND(dev->spi, 0); + + /* Set CS to high which deselects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); + + /* Wait a little so the device has time to perform a proper reset */ + + up_mdelay(100); +} + +/**************************************************************************** + * Name: mlx90393_read_register + ****************************************************************************/ + +static void mlx90393_read_register(FAR struct mlx90393_dev_s *dev, + uint8_t const reg_addr, uint16_t *reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Issue a read register command */ + + SPI_SEND(dev->spi, MLX90393_RR); + + /* Send the register address which needs to be left shifted by 2 */ + + SPI_SEND(dev->spi, (reg_addr << 2)); + + /* Write an idle byte to retrieve the status byte */ + + SPI_SEND(dev->spi, 0); + + *reg_data = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + *reg_data |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + + /* Set CS to high which deselects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: mlx90393_write_register + ****************************************************************************/ + +static void mlx90393_write_register(FAR struct mlx90393_dev_s *dev, + uint8_t const reg_addr, + uint16_t const reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Issue a write register command */ + + SPI_SEND(dev->spi, MLX90393_WR); + + /* Send the data high byte of the register */ + + SPI_SEND(dev->spi, (uint8_t) ((reg_data & 0xFF00) >> 8)); + + /* Send the data low byte of the register */ + + SPI_SEND(dev->spi, (uint8_t) (reg_data & 0x00FF)); + + /* Send the register address which needs to be left shifted by 2 */ + + SPI_SEND(dev->spi, (uint8_t) (reg_addr << 2)); + + /* Write an idle byte to retrieve the status byte */ + + SPI_SEND(dev->spi, 0); + + /* Set CS to high which deselects the MLX90393 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: mlx90393_interrupt_handler + ****************************************************************************/ + +static int mlx90393_interrupt_handler(int irq, FAR void *context) +{ + /* This function should be called upon a rising edge on the MLX90393 INT pin + * since it signals that new data has been measured. (INT = DRDY). + */ + + FAR struct mlx90393_dev_s *priv = 0; + int ret; + + /* Find out which MLX90396 device caused the interrupt */ + + for (priv = g_mlx90393_list; priv && priv->config->irq != irq; + priv = priv->flink); + DEBUGASSERT(priv != NULL); + + /* Task the worker with retrieving the latest sensor data. We should not do + * this in a interrupt since it might take too long. Also we cannot lock the + * SPI bus from within an interrupt. + */ + + DEBUGASSERT(priv->work.worker == NULL); + ret = work_queue(HPWORK, &priv->work, mlx90393_worker, priv, 0); + if (ret < 0) + { + sndbg("Failed to queue work: %d\n", ret); + return ret; + } + else + { + return OK; + } +} + +/**************************************************************************** + * Name: mlx90393_worker + ****************************************************************************/ + +static void mlx90393_worker(FAR void *arg) +{ + FAR struct mlx90393_dev_s *priv = (FAR struct mlx90393_dev_s *)(arg); + DEBUGASSERT(priv != NULL); + + /* Read out the latest sensor data */ + + mlx90393_read_measurement_data(priv); +} + +/**************************************************************************** + * Name: mlx90393_open + ****************************************************************************/ + +static int mlx90393_open(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct mlx90393_dev_s *priv = inode->i_private; + static int const NUM_REGS = 10; + int reg_addr; + + DEBUGASSERT(priv != NULL); + + /* Reset the device */ + + mlx90393_reset(priv); + + /* Read the content of ALL registers for debug purposes */ + + for (reg_addr = 0; reg_addr < NUM_REGS; reg_addr++) + { + uint16_t reg_content = 0; + mlx90393_read_register(priv, reg_addr, ®_content); + sndbg("R%d = %x\n", reg_addr, reg_content); + } + + /* Start the burst mode */ + + mlx90393_start_burst_mode(priv); + + return OK; +} + +/**************************************************************************** + * Name: mlx90393_close + ****************************************************************************/ + +static int mlx90393_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct mlx90393_dev_s *priv = inode->i_private; + + DEBUGASSERT(priv != NULL); + + /* Reset the device */ + + mlx90393_reset(priv); + + return OK; +} + +/**************************************************************************** + * Name: mlx90393_read + ****************************************************************************/ + +static ssize_t mlx90393_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct mlx90393_dev_s *priv = inode->i_private; + FAR struct mlx90393_sensor_data_s *data; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Check if enough memory was provided for the read call */ + + if (buflen < sizeof(FAR struct mlx90393_sensor_data_s)) + { + sndbg("Not enough memory for reading out a sensor data sample\n"); + return -ENOSYS; + } + + /* Copy the sensor data into the buffer */ + + /* Aquire the semaphore before the data is copied */ + + ret = sem_wait(&priv->datasem); + if (ret < 0) + { + sndbg("Could not aquire priv->datasem: %d\n", ret); + return ret; + } + + data = (FAR struct mlx90393_sensor_data_s *)buffer; + memset(data, 0, sizeof(FAR struct mlx90393_sensor_data_s)); + + data->x_mag = priv->data.x_mag; + data->y_mag = priv->data.y_mag; + data->z_mag = priv->data.z_mag; + data->temperature = priv->data.temperature; + + /* Give back the semaphore */ + + sem_post(&priv->datasem); + + return sizeof(FAR struct mlx90393_sensor_data_s); +} + +/**************************************************************************** + * Name: mlx90393_write + ****************************************************************************/ + +static ssize_t mlx90393_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + return -ENOSYS; +} + +/**************************************************************************** + * Name: mlx90393_ioctl + ****************************************************************************/ + +static int mlx90393_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + int ret = OK; + + switch (cmd) + { + /* Command was not recognized */ + + default: + sndbg("Unrecognized cmd: %d\n", cmd); + ret = -ENOTTY; + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mlx90393_register + * + * Description: + * Register the MLX90393 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/mag0" + * spi - An instance of the SPI interface to use to communicate with + * MLX90393 + * config - Describes the configuration of the MLX90393 part. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct mlx90393_config_s *config) +{ + FAR struct mlx90393_dev_s *priv; + int ret; + + /* Sanity check */ + + DEBUGASSERT(spi != NULL); + DEBUGASSERT(config != NULL); + + /* Initialize the MLX90393 device structure */ + + priv = (FAR struct mlx90393_dev_s *)kmm_malloc(sizeof(struct mlx90393_dev_s)); + if (priv == NULL) + { + dbg("Failed to allocate instance\n"); + return -ENOMEM; + } + + priv->spi = spi; + priv->config = config; + + priv->work.worker = NULL; + + sem_init(&priv->datasem, 0, 1); /* Initialize sensor data access + * semaphore */ + + /* Setup SPI frequency and mode */ + + SPI_SETFREQUENCY(spi, MLX90393_SPI_FREQUENCY); + SPI_SETMODE(spi, MLX90393_SPI_MODE); + + /* Attach the interrupt handler */ + + ret = priv->config->attach(priv->config, &mlx90393_interrupt_handler); + if (ret < 0) + { + dbg("Failed to attach interrupt\n"); + return -ENODEV; + } + + /* Register the character driver */ + + ret = register_driver(devpath, &g_mlx90393_fops, 0666, priv); + if (ret < 0) + { + dbg("Failed to register driver: %d\n", ret); + kmm_free(priv); + sem_destroy(&priv->datasem); + return -ENODEV; + } + + /* Since we support multiple MLX90393 devices are supported, we will need to + * add this new instance to a list of device instances so that it can be + * found by the interrupt handler based on the received IRQ number. */ + + priv->flink = g_mlx90393_list; + g_mlx90393_list = priv; + + return OK; +} + +#endif /* CONFIG_SPI && CONFIG_MLX90393 */ diff --git a/include/nuttx/sensors/lis3mdl.h b/include/nuttx/sensors/lis3mdl.h index c7029058072..b6a5c3ff046 100644 --- a/include/nuttx/sensors/lis3mdl.h +++ b/include/nuttx/sensors/lis3mdl.h @@ -158,8 +158,10 @@ extern "C" * * Input Parameters: * devpath - The full path to the driver to register. E.g., "/dev/mag0" - * spi - An instance of the SPI interface to use to communicate with LIS3MDL - * config - configuration for the LIS3MDL driver. For details see description above. + * spi - An instance of the SPI interface to use to communicate with + * LIS3MDL + * config - configuration for the LIS3MDL driver. For details see + * description above. * * Returned Value: * Zero (OK) on success; a negated errno value on failure. diff --git a/include/nuttx/sensors/mlx90393.h b/include/nuttx/sensors/mlx90393.h new file mode 100644 index 00000000000..39028580f4e --- /dev/null +++ b/include/nuttx/sensors/mlx90393.h @@ -0,0 +1,153 @@ +/**************************************************************************** + * include/nuttx/sensors/mlx90393.h + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef NUTTX_INCLUDE_NUTTX_SENSORS_MLX90393_H_ +#define NUTTX_INCLUDE_NUTTX_SENSORS_MLX90393_H_ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_MLX90393) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* MLX90393 Command Definitions *********************************************/ + +#define MLX90393_SB (0x10) /* SB = Start Burst Mode */ +#define MLX90393_SW (0x20) /* SW = Start Wake-up on Change Mode */ +#define MLX90393_SM (0x30) /* SB = Start Single Measurement Mode */ +#define MLX90393_RM (0x40) /* RM = Read Measurement */ +#define MLX90393_RR (0x50) /* RR = Read Register */ +#define MLX90393_WR (0x60) /* WR = Write Register */ +#define MLX90393_EX (0x80) /* EX = Exit Mode */ +#define MLX90393_HR (0xD0) /* HR = Memory Recall */ +#define MLX90393_HS (0xE0) /* HS = Memory Store */ +#define MLX90393_RT (0xF0) /* RT = Reset */ + +/* MLX90393 Sensor Selection Bit Definitions ********************************/ + +#define MLX90393_T_bm (1<<0) /* Temperature Sensor Bitmask */ +#define MLX90393_X_bm (1<<1) /* Magnetometer X-Axis Bitmask */ +#define MLX90393_Y_bm (1<<2) /* Magnetometer Y-Axis Bitmask */ +#define MLX90393_Z_bm (1<<3) /* Magnetometer Z-Axis Bitmask */ +#define MLX90393_ZYXT_bm (MLX90393_Z_bm | MLX90393_Y_bm | MLX90393_X_bm | MLX90393_T_bm) + +/* SPI BUS PARAMETERS *******************************************************/ + +#define MLX90393_SPI_FREQUENCY (1000000) /* 1 MHz */ +#define MLX90393_SPI_MODE (SPIDEV_MODE3) /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the MLX90393 + * driver. This structure provides information about the configuration + * of the sensor and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +struct mlx90393_config_s +{ + /* Since multiple MLX90393 can be connected to the same SPI bus we need + * to use multiple spi device ids which are employed by NuttX to select/ + * deselect the desired MLX90393 chip via their chip select inputs. + */ + + int spi_devid; + + /* The IRQ number must be provided for each so MLX90393 device so that + * their interrupts can be distinguished. + */ + + int irq; + + /* Attach the MLX90393 interrupt handler to the GPIO interrupt of the + * concrete MLX90393 instance. + */ + + int (*attach)(FAR struct mlx90393_config_s *, xcpt_t); +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: mlx90393_register + * + * Description: + * Register the MLX90393 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/mag0" + * spi - An instance of the SPI interface to use to communicate with + * MLX90393 + * config - Describes the configuration of the MLX90393 part. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct mlx90393_config_s *config); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_SPI && CONFIG_MLX90393 */ + +#endif /* NUTTX_INCLUDE_NUTTX_SENSORS_MLX90393_H_ */ From dd1f67989173078810ad9958532e018aa5bc66d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Beat=20K=C3=BCng?= Date: Tue, 23 Aug 2016 18:27:04 +0000 Subject: [PATCH 114/214] mtd: Add Fujistu MB85RS256B ramtron support contributed by flatlevel from https://github.com/PX4/NuttX/pull/79 --- drivers/mtd/ramtron.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/mtd/ramtron.c b/drivers/mtd/ramtron.c index 0152475b98b..ad448c8c7eb 100644 --- a/drivers/mtd/ramtron.c +++ b/drivers/mtd/ramtron.c @@ -264,6 +264,14 @@ static const struct ramtron_parts_s g_ramtron_parts[] = 3, /* addr_len */ 25000000 /* speed */ }, + { + "MB85RS256B", /* name */ + 0x05, /* id1 */ + 0x09, /* id2 */ + 32L*1024L, /* size */ + 3, /* addr_len */ + 25000000 /* speed */ + }, #ifdef CONFIG_RAMTRON_FRAM_NON_JEDEC { "FM25H20", /* name */ From 595f00e27195b0106c9a6fbd979bef03e0be0c37 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 23 Aug 2016 13:07:34 -0600 Subject: [PATCH 115/214] Add include/sensors/ioctl.h; make sure that all IOCTL values are unique to avoid all misuse. --- include/nuttx/sensors/bh1750fvi.h | 13 +--- include/nuttx/sensors/ioctl.h | 118 ++++++++++++++++++++++++++++++ include/nuttx/sensors/kxjt9.h | 11 +-- include/nuttx/sensors/lm75.h | 15 +--- include/nuttx/sensors/lm92.h | 20 +---- include/nuttx/sensors/lsm9ds1.h | 8 +- include/nuttx/sensors/mb7040.h | 8 +- include/nuttx/sensors/mcp9844.h | 7 +- include/nuttx/sensors/ms58xx.h | 10 +-- 9 files changed, 127 insertions(+), 83 deletions(-) create mode 100644 include/nuttx/sensors/ioctl.h diff --git a/include/nuttx/sensors/bh1750fvi.h b/include/nuttx/sensors/bh1750fvi.h index 4d5ae017c93..d7722ea209a 100644 --- a/include/nuttx/sensors/bh1750fvi.h +++ b/include/nuttx/sensors/bh1750fvi.h @@ -43,6 +43,7 @@ #include #include +#include #if defined(CONFIG_BH1750FVI) @@ -50,17 +51,7 @@ * Pre-processor Definitions ****************************************************************************/ -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_CHRM _SNIOC(0x0001) /* Contin. H-Res Mode Arg: None */ -#define SNIOC_CHRM2 _SNIOC(0x0002) /* Contin. H-Res Mode2 Arg: None */ -#define SNIOC_CLRM _SNIOC(0x0003) /* Contin. L-Res Mode Arg: None */ -#define SNIOC_OTHRM _SNIOC(0x0004) /* One Time H-Res Mode Arg: None */ -#define SNIOC_OTHRM2 _SNIOC(0x0005) /* One Time H-Res Mode2 Arg: None */ -#define SNIOC_OTLRM _SNIOC(0x0006) /* One Time L-Res Mode Arg: None */ -#define SNIOC_CHMEATIME _SNIOC(0x0007) /* Change Meas. Time Arg: uint8_t */ - -/* Device I2C Address*/ +/* Device I2C Address */ #define BH1750FVI_I2C_ADDR 0x23 diff --git a/include/nuttx/sensors/ioctl.h b/include/nuttx/sensors/ioctl.h new file mode 100644 index 00000000000..036042a926b --- /dev/null +++ b/include/nuttx/sensors/ioctl.h @@ -0,0 +1,118 @@ +/**************************************************************************** + * include/nuttx/input/ioctl.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_SENSORS_IOCTL_H +#define __INCLUDE_NUTTX_SENSORS_IOCTL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* IOCTL commands unique to the BH1750FVI */ + +#define SNIOC_CHRM _SNIOC(0x0001) /* Contin. H-Res Mode Arg: None */ +#define SNIOC_CHRM2 _SNIOC(0x0002) /* Contin. H-Res Mode2 Arg: None */ +#define SNIOC_CLRM _SNIOC(0x0003) /* Contin. L-Res Mode Arg: None */ +#define SNIOC_OTHRM _SNIOC(0x0004) /* One Time H-Res Mode Arg: None */ +#define SNIOC_OTHRM2 _SNIOC(0x0005) /* One Time H-Res Mode2 Arg: None */ +#define SNIOC_OTLRM _SNIOC(0x0006) /* One Time L-Res Mode Arg: None */ +#define SNIOC_CHMEATIME _SNIOC(0x0007) /* Change Meas. Time Arg: uint8_t */ + +/* IOCTL commands unique to the KXJT9 */ + +#define SNIOC_ENABLE _SNIOC(0x0008) /* Arg: None */ +#define SNIOC_DISABLE _SNIOC(0x0009) /* Arg: None */ +#define SNIOC_CONFIGURE _SNIOC(0x000a) /* Arg: enum kxtj9_odr_e value */ + +/* IOCTL commands common to the LM75, LM92 (and compatible parts) */ + +#define SNIOC_READCONF _SNIOC(0x000b) /* Arg: uint8_t* pointer */ +#define SNIOC_WRITECONF _SNIOC(0x000c) /* Arg: uint8_t value */ +#define SNIOC_SHUTDOWN _SNIOC(0x000d) /* Arg: None */ +#define SNIOC_POWERUP _SNIOC(0x000e) /* Arg: None */ +#define SNIOC_FAHRENHEIT _SNIOC(0x000f) /* Arg: None */ +#define SNIOC_CENTIGRADE _SNIOC(0x0010) /* Arg: None */ +#define SNIOC_READTHYS _SNIOC(0x0011) /* Arg: b16_t* pointer */ +#define SNIOC_WRITETHYS _SNIOC(0x0012) /* Arg: b16_t value */ + +/* IOCTL commands unique to the LM75 */ + +#define SNIOC_READTOS _SNIOC(0x0013) /* Arg: b16_t* pointer */ +#define SNIOC_WRITETOS _SNIOC(0x0014) /* Arg: b16_t value */ + +/* IOCTL commands unique to the LM92 */ + +#define SNIOC_READTCRIT _SNIOC(0x0015) /* Arg: b16_t* pointer */ +#define SNIOC_WRITETCRIT _SNIOC(0x0016) /* Arg: b16_t value */ +#define SNIOC_READTLOW _SNIOC(0x0017) /* Arg: b16_t* pointer */ +#define SNIOC_WRITETLOW _SNIOC(0x0018) /* Arg: b16_t value */ +#define SNIOC_READTHIGH _SNIOC(0x0019) /* Arg: b16_t* pointer */ +#define SNIOC_WRITETHIGH _SNIOC(0x001a) /* Arg: b16_t value */ +#define SNIOC_READID _SNIOC(0x001b) /* Arg: uint16_t* pointer */ + +/* IOCTL commands unique to the LSM9DS1 */ + +#define SNIOC_START _SNIOC(0x001c) /* Arg: None */ +#define SNIOC_STOP _SNIOC(0x001d) /* Arg: None */ +#define SNIOC_SETSAMPLERATE _SNIOC(0x001e) /* Arg: uint32_t value */ +#define SNIOC_SETFULLSCALE _SNIOC(0x001f) /* Arg: uint32_t value */ + +/* IOCTL commands unique to the MB7040 */ + +#define SNIOC_MEASURE _SNIOC(0x0020) /* Arg: None */ +#define SNIOC_RANGE _SNIOC(0x0021) /* Arg: int32_t* pointer */ +#define SNIOC_CHANGEADDR _SNIOC(0x0022) /* Arg: uint8_t value */ + +/* IOCTL commands unique to the MCP9844 */ + +#define SNIOC_READTEMP _SNIOC(0x0023) /* Arg: mcp9844_temp_arg_s* pointer */ +#define SNIOC_SETRESOLUTION _SNIOC(0x0024) /* Arg: uint16_t value */ + +/* IOCTL commands unique to the MS58XX */ + +#define SNIOC_MEASURE _SNIOC(0x0025) /* Arg: None */ +#define SNIOC_TEMPERATURE _SNIOC(0x0026) /* Arg: int32_t* pointer */ +#define SNIOC_PRESSURE _SNIOC(0x0027) /* Arg: int32_t* pointer */ +#define SNIOC_RESET _SNIOC(0x0028) /* Arg: None */ +#define SNIOC_OVERSAMPLING _SNIOC(0x0029) /* Arg: uint16_t value */ + +#endif /* __INCLUDE_NUTTX_SENSORS_IOCTL_H */ diff --git a/include/nuttx/sensors/kxjt9.h b/include/nuttx/sensors/kxjt9.h index 4ebb5836107..9c4f234b117 100644 --- a/include/nuttx/sensors/kxjt9.h +++ b/include/nuttx/sensors/kxjt9.h @@ -44,19 +44,10 @@ #include #include -#include +#include #if defined(CONFIG_I2C) && defined(CONFIG_SENSOR_KXTJ9) -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_ENABLE _SNIOC(0x0001) /* Arg: None */ -#define SNIOC_DISABLE _SNIOC(0x0002) /* Arg: None */ -#define SNIOC_CONFIGURE _SNIOC(0x0003) /* Arg: enum kxtj9_odr_e value */ - /**************************************************************************** * Public Types ****************************************************************************/ diff --git a/include/nuttx/sensors/lm75.h b/include/nuttx/sensors/lm75.h index 827620adab9..f12e2120a17 100644 --- a/include/nuttx/sensors/lm75.h +++ b/include/nuttx/sensors/lm75.h @@ -41,7 +41,7 @@ ****************************************************************************/ #include -#include +#include #if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) @@ -63,19 +63,6 @@ #define CONFIG_LM75_ADDR6 (CONFIG_LM75_BASEADDR + 6) #define CONFIG_LM75_ADDR7 (CONFIG_LM75_BASEADDR + 7) -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_READCONF _SNIOC(0x0001) /* Arg: uint8_t* pointer */ -#define SNIOC_WRITECONF _SNIOC(0x0002) /* Arg: uint8_t value */ -#define SNIOC_SHUTDOWN _SNIOC(0x0003) /* Arg: None */ -#define SNIOC_POWERUP _SNIOC(0x0004) /* Arg: None */ -#define SNIOC_FAHRENHEIT _SNIOC(0x0005) /* Arg: None */ -#define SNIOC_CENTIGRADE _SNIOC(0x0006) /* Arg: None */ -#define SNIOC_READTHYS _SNIOC(0x0007) /* Arg: b16_t* pointer */ -#define SNIOC_WRITETHYS _SNIOC(0x0008) /* Arg: b16_t value */ -#define SNIOC_READTOS _SNIOC(0x0009) /* Arg: b16_t* pointer */ -#define SNIOC_WRITETOS _SNIOC(0x000a) /* Arg: b16_t value */ - /* LM-75 Register Definitions ***********************************************/ /* LM-75 Registers addresses */ diff --git a/include/nuttx/sensors/lm92.h b/include/nuttx/sensors/lm92.h index 8b49a0da936..4bfa3423f0f 100644 --- a/include/nuttx/sensors/lm92.h +++ b/include/nuttx/sensors/lm92.h @@ -43,7 +43,7 @@ ****************************************************************************/ #include -#include +#include #if defined(CONFIG_I2C) && defined(CONFIG_LM92) @@ -61,24 +61,6 @@ #define CONFIG_LM92_ADDR2 (CONFIG_LM92_BASEADDR + 2) #define CONFIG_LM92_ADDR3 (CONFIG_LM92_BASEADDR + 3) -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_READCONF _SNIOC(0x0001) /* Arg: uint8_t* pointer */ -#define SNIOC_WRITECONF _SNIOC(0x0002) /* Arg: uint8_t value */ -#define SNIOC_SHUTDOWN _SNIOC(0x0003) /* Arg: None */ -#define SNIOC_POWERUP _SNIOC(0x0004) /* Arg: None */ -#define SNIOC_FAHRENHEIT _SNIOC(0x0005) /* Arg: None */ -#define SNIOC_CENTIGRADE _SNIOC(0x0006) /* Arg: None */ -#define SNIOC_READTHYS _SNIOC(0x0007) /* Arg: b16_t* pointer */ -#define SNIOC_WRITETHYS _SNIOC(0x0008) /* Arg: b16_t value */ -#define SNIOC_READTCRIT _SNIOC(0x0009) /* Arg: b16_t* pointer */ -#define SNIOC_WRITETCRIT _SNIOC(0x000a) /* Arg: b16_t value */ -#define SNIOC_READTLOW _SNIOC(0x000b) /* Arg: b16_t* pointer */ -#define SNIOC_WRITETLOW _SNIOC(0x000c) /* Arg: b16_t value */ -#define SNIOC_READTHIGH _SNIOC(0x000d) /* Arg: b16_t* pointer */ -#define SNIOC_WRITETHIGH _SNIOC(0x000e) /* Arg: b16_t value */ -#define SNIOC_READID _SNIOC(0x000f) /* Arg: uint16_t* pointer */ - /* LM92 Register Definitions ***********************************************/ /* LM92 Register Addresses */ diff --git a/include/nuttx/sensors/lsm9ds1.h b/include/nuttx/sensors/lsm9ds1.h index cf3ef1b3c76..dc7b103ef62 100644 --- a/include/nuttx/sensors/lsm9ds1.h +++ b/include/nuttx/sensors/lsm9ds1.h @@ -41,19 +41,13 @@ ****************************************************************************/ #include -#include +#include #if defined(CONFIG_I2C) && defined(CONFIG_SN_LSM9DS1) /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_START _SNIOC(0x0001) /* Arg: None */ -#define SNIOC_STOP _SNIOC(0x0002) /* Arg: None */ -#define SNIOC_SETSAMPLERATE _SNIOC(0x0003) /* Arg: uint32_t value */ -#define SNIOC_SETFULLSCALE _SNIOC(0x0004) /* Arg: uint32_t value */ /* I2C Addresses ************************************************************/ /* Accelerometer addresses */ diff --git a/include/nuttx/sensors/mb7040.h b/include/nuttx/sensors/mb7040.h index 0280ecadb6f..1c7ed9c51b8 100644 --- a/include/nuttx/sensors/mb7040.h +++ b/include/nuttx/sensors/mb7040.h @@ -41,7 +41,7 @@ ****************************************************************************/ #include -#include +#include #if defined(CONFIG_I2C) && defined(CONFIG_MB7040) @@ -57,12 +57,6 @@ * Enables support for the MB7040 driver */ -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_MEASURE _SNIOC(0x0001) /* Arg: None */ -#define SNIOC_RANGE _SNIOC(0x0002) /* Arg: int32_t* pointer */ -#define SNIOC_CHANGEADDR _SNIOC(0x0003) /* Arg: uint8_t value */ - /* I2C Addresses ************************************************************/ #define MB7040_DEFAULTADDR 0x70 /* Default I2C Address */ diff --git a/include/nuttx/sensors/mcp9844.h b/include/nuttx/sensors/mcp9844.h index 36bc5822a64..2ef65702fd4 100644 --- a/include/nuttx/sensors/mcp9844.h +++ b/include/nuttx/sensors/mcp9844.h @@ -41,7 +41,7 @@ ****************************************************************************/ #include -#include +#include #if defined(CONFIG_I2C) && defined(CONFIG_MCP9844) @@ -49,11 +49,6 @@ * Pre-processor Definitions ****************************************************************************/ -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_READTEMP _SNIOC(0x0001) /* Arg: mcp9844_temp_arg_s* pointer */ -#define SNIOC_SETRESOLUTION _SNIOC(0x0002) /* Arg: uint16_t value */ - /* MCP9844 Register Definitions *********************************************/ /* MCP9844 Registers addresses */ diff --git a/include/nuttx/sensors/ms58xx.h b/include/nuttx/sensors/ms58xx.h index 62525d31a63..fc2bf1c2c30 100644 --- a/include/nuttx/sensors/ms58xx.h +++ b/include/nuttx/sensors/ms58xx.h @@ -41,7 +41,7 @@ ****************************************************************************/ #include -#include +#include #if defined(CONFIG_I2C) && defined(CONFIG_MS58XX) @@ -58,14 +58,6 @@ * CONFIG_MS58XX_VDD */ -/* IOCTL Commands ***********************************************************/ - -#define SNIOC_MEASURE _SNIOC(0x0001) /* Arg: None */ -#define SNIOC_TEMPERATURE _SNIOC(0x0002) /* Arg: int32_t* pointer */ -#define SNIOC_PRESSURE _SNIOC(0x0003) /* Arg: int32_t* pointer */ -#define SNIOC_RESET _SNIOC(0x0004) /* Arg: None */ -#define SNIOC_OVERSAMPLING _SNIOC(0x0005) /* Arg: uint16_t value */ - /* I2C Address **************************************************************/ #define MS58XX_ADDR0 0x76 From 0044910e33d8c411efada2c60daae1879d66dcf0 Mon Sep 17 00:00:00 2001 From: Alexander Entinger Date: Wed, 24 Aug 2016 08:28:45 -0600 Subject: [PATCH 116/214] drivers/sensors: Add driver for the LIS3DSH 3 axis accelerometer. --- drivers/sensors/Kconfig | 7 + drivers/sensors/Make.defs | 4 + drivers/sensors/lis3dsh.c | 587 ++++++++++++++++++++++++++++++++ include/nuttx/sensors/lis3dsh.h | 277 +++++++++++++++ 4 files changed, 875 insertions(+) create mode 100644 drivers/sensors/lis3dsh.c create mode 100644 include/nuttx/sensors/lis3dsh.h diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index 7b986320ca9..8015d91f33e 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -38,6 +38,13 @@ config SENSOR_KXTJ9_I2C_BUS_SPEED endif # SENSOR_KXTJ9 +config LIS3DSH + bool "STMicro LIS3DSH 3-Axis acclerometer support" + default n + select SPI + ---help--- + Enable driver support for the STMicro LIS3DSH 3-Axis acclerometer. + config LIS331DL bool "ST LIS331DL device support" default n diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs index b3908ce3921..839ab654a13 100644 --- a/drivers/sensors/Make.defs +++ b/drivers/sensors/Make.defs @@ -53,6 +53,10 @@ ifeq ($(CONFIG_SENSOR_KXTJ9),y) CSRCS += kxjt9.c endif +ifeq ($(CONFIG_LIS3DSH),y) + CSRCS += lis3dsh.c +endif + ifeq ($(CONFIG_LIS331DL),y) CSRCS += lis331dl.c endif diff --git a/drivers/sensors/lis3dsh.c b/drivers/sensors/lis3dsh.c new file mode 100644 index 00000000000..1e0e3d8fd75 --- /dev/null +++ b/drivers/sensors/lis3dsh.c @@ -0,0 +1,587 @@ +/**************************************************************************** + * drivers/sensors/lis3dsh.c + * Character driver for the LIS3DSH 3-Axis acclerometer. + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * Thomas Ilk + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_LIS3DSH) + +/**************************************************************************** + * Private + ****************************************************************************/ + +struct lis3dsh_sensor_data_s +{ + int16_t x_acc; /* Measurement result for x axis */ + int16_t y_acc; /* Measurement result for y axis */ + int16_t z_acc; /* Measurement result for z axis */ +}; + +struct lis3dsh_dev_s +{ + FAR struct lis3dsh_dev_s *flink; /* Supports a singly linked list of + * drivers */ + FAR struct spi_dev_s *spi; /* Pointer to the SPI instance */ + FAR struct lis3dsh_config_s *config; /* Pointer to the configuration + * of the LIS3DSH sensor */ + sem_t datasem; /* Manages exclusive access to this + * structure */ + struct lis3dsh_sensor_data_s data; /* The data as measured by the sensor */ + struct work_s work; /* The work queue is responsible for + * retrieving the data from the + * sensor after the arrival of new + * data was signalled in an interrupt */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void lis3dsh_read_register(FAR struct lis3dsh_dev_s *dev, + uint8_t const reg_addr, uint8_t *reg_data); +static void lis3dsh_write_register(FAR struct lis3dsh_dev_s *dev, + uint8_t const reg_addr, + uint8_t const reg_data); +static void lis3dsh_reset(FAR struct lis3dsh_dev_s *dev); +static void lis3dsh_read_measurement_data(FAR struct lis3dsh_dev_s *dev); +static void lis3dsh_read_acclerometer_data(FAR struct lis3dsh_dev_s *dev, + uint16_t *x_acc, uint16_t *y_acc, + uint16_t *z_acc); +static int lis3dsh_interrupt_handler(int irq, FAR void *context); +static void lis3dsh_worker(FAR void *arg); + +static int lis3dsh_open(FAR struct file *filep); +static int lis3dsh_close(FAR struct file *filep); +static ssize_t lis3dsh_read(FAR struct file *, FAR char *buffer, + size_t buflen); +static ssize_t lis3dsh_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int lis3dsh_ioctl(FAR struct file *filep, int cmd, unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_lis3dsh_fops = +{ + lis3dsh_open, + lis3dsh_close, + lis3dsh_read, + lis3dsh_write, + NULL, + lis3dsh_ioctl +#ifndef CONFIG_DISABLE_POLL + , NULL +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL +#endif +}; + +/* Single linked list to store instances of drivers */ + +static struct lis3dsh_dev_s *g_lis3dsh_list = NULL; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lis3dsh_read_register + ****************************************************************************/ + +static void lis3dsh_read_register(FAR struct lis3dsh_dev_s *dev, + uint8_t const reg_addr, uint8_t * reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the LIS3DSH */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to read - the MSB needs + * to be set to indicate the read indication. + */ + + SPI_SEND(dev->spi, reg_addr | 0x80); + + /* Write an idle byte while receiving the required data */ + + *reg_data = (uint8_t) (SPI_SEND(dev->spi, 0)); + + /* Set CS to high which deselects the LIS3DSH */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: lis3dsh_write_register + ****************************************************************************/ + +static void lis3dsh_write_register(FAR struct lis3dsh_dev_s *dev, + uint8_t const reg_addr, + uint8_t const reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the LIS3DSH */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to read */ + + SPI_SEND(dev->spi, reg_addr); + + /* Transmit the content which should be written in the register */ + + SPI_SEND(dev->spi, reg_data); + + /* Set CS to high which deselects the LIS3DSH */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: lis3dsh_reset + ****************************************************************************/ + +static void lis3dsh_reset(FAR struct lis3dsh_dev_s *dev) +{ + lis3dsh_write_register(dev, LIS3DSH_CTRL_REG_6, LIS3DSH_CTRL_REG_6_BOOT_bm); + + up_mdelay(100); +} + +/**************************************************************************** + * Name: lis3dsh_read_measurement_data + ****************************************************************************/ + +static void lis3dsh_read_measurement_data(FAR struct lis3dsh_dev_s *dev) +{ + uint16_t x_acc = 0; + uint16_t y_acc = 0; + uint16_t z_acc = 0; + int ret; + + /* Read acclerometer data */ + + lis3dsh_read_acclerometer_data(dev, &x_acc, &y_acc, &z_acc); + + /* Aquire the semaphore before the data is copied */ + + ret = sem_wait(&dev->datasem); + if (ret != OK) + { + snerr("Could not aquire dev->datasem: %d\n", ret); + return; + } + + /* Copy retrieve data to internal data structure */ + + dev->data.x_acc = (int16_t)x_acc; + dev->data.y_acc = (int16_t)y_acc; + dev->data.z_acc = (int16_t)z_acc; + + /* Give back the semaphore */ + + sem_post(&dev->datasem); +} + +/**************************************************************************** + * Name: lis3dsh_read_acclerometer_data + ****************************************************************************/ + +static void lis3dsh_read_acclerometer_data(FAR struct lis3dsh_dev_s *dev, + uint16_t * x_acc, uint16_t * y_acc, + uint16_t * z_acc) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the LIS3DSH */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to start reading 0x80 -> + * MSB is set -> Read Indication. + */ + + SPI_SEND(dev->spi, (LIS3DSH_OUT_X_L_REG | 0x80)); + + /* RX */ + + *x_acc = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *x_acc |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + *y_acc = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *y_acc |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + *z_acc = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *z_acc |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + /* Set CS to high which deselects the LIS3DSH */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: lis3dsh_interrupt_handler + ****************************************************************************/ + +static int lis3dsh_interrupt_handler(int irq, FAR void *context) +{ + /* This function should be called upon a rising edge on the LIS3DSH new data + * interrupt pin since it signals that new data has been measured. + */ + + FAR struct lis3dsh_dev_s *priv = NULL; + int ret; + + /* Find out which device caused the interrupt */ + + for (priv = g_lis3dsh_list; priv && priv->config->irq != irq; + priv = priv->flink); + DEBUGASSERT(priv != NULL); + + /* Task the worker with retrieving the latest sensor data. We should not do + * this in a interrupt since it might take too long. Also we cannot lock the + * SPI bus from within an interrupt. + */ + + DEBUGASSERT(priv->work.worker == NULL); + ret = work_queue(HPWORK, &priv->work, lis3dsh_worker, priv, 0); + if (ret < 0) + { + snerr("Failed to queue work: %d\n", ret); + return ret; + } + + return OK; +} + +/**************************************************************************** + * Name: lis3dsh_worker + ****************************************************************************/ + +static void lis3dsh_worker(FAR void *arg) +{ + FAR struct lis3dsh_dev_s *priv = (FAR struct lis3dsh_dev_s *)(arg); + DEBUGASSERT(priv != NULL); + + /* Read out the latest sensor data */ + + lis3dsh_read_measurement_data(priv); +} + +/**************************************************************************** + * Name: lis3dsh_open + ****************************************************************************/ + +static int lis3dsh_open(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct lis3dsh_dev_s *priv = inode->i_private; + + DEBUGASSERT(priv != NULL); + + /* Perform a reset */ + + lis3dsh_reset(priv); + + /* Enable - the full scale range (FS = +/- 16 g) */ + + lis3dsh_write_register(priv, + LIS3DSH_CTRL_REG_5, LIS3DSH_CTRL_REG_5_FSCALE_2_bm); + + /* Enable - Auto increment of address when reading multiple bytes */ + + lis3dsh_write_register(priv, + LIS3DSH_CTRL_REG_6, LIS3DSH_CTRL_REG_6_ADD_INC_bm); + + /* Enable - Measurement of X-, Y-, and Z-axis - Block data update for + * accelerating data This should prevent race conditions when reading sensor + * data - fastest output data rate (ODR = 1600 Hz) */ + + lis3dsh_write_register(priv, + LIS3DSH_CTRL_REG_4, + LIS3DSH_CTRL_REG_4_XEN_bm | LIS3DSH_CTRL_REG_4_YEN_bm | + LIS3DSH_CTRL_REG_4_ZEN_bm | LIS3DSH_CTRL_REG_4_BDU_bm | + LIS3DSH_CTRL_REG_4_ODR_3_bm | LIS3DSH_CTRL_REG_4_ODR_0_bm); + + /* Enable - DRDY signal enable to INT 1 */ + + lis3dsh_write_register(priv, + LIS3DSH_CTRL_REG_3, + LIS3DSH_CTRL_REG_3_DR_EN_bm | LIS3DSH_CTRL_REG_3_IEA_bm | + LIS3DSH_CTRL_REG_3_IEL_bm | LIS3DSH_CTRL_REG_3_INT1_EN_bm); + + /* Read back the content of all control registers for debug purposes */ + + { + uint8_t reg_content = 0; + + lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_1, ®_content); + snerr("LIS3DSH_CTRL_REG_1 = %04x\n", reg_content); + lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_2, ®_content); + snerr("LIS3DSH_CTRL_REG_2 = %04x\n", reg_content); + lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_3, ®_content); + snerr("LIS3DSH_CTRL_REG_3 = %04x\n", reg_content); + lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_4, ®_content); + snerr("LIS3DSH_CTRL_REG_4 = %04x\n", reg_content); + lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_5, ®_content); + snerr("LIS3DSH_CTRL_REG_5 = %04x\n", reg_content); + lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_6, ®_content); + snerr("LIS3DSH_CTRL_REG_6 = %04x\n", reg_content); + lis3dsh_read_register(priv, LIS3DSH_STATUS_REG, ®_content); + snerr("STATUS_REG = %04x\n", reg_content); + } + + return OK; +} + +/**************************************************************************** + * Name: lis3dsh_close + ****************************************************************************/ + +static int lis3dsh_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct lis3dsh_dev_s *priv = inode->i_private; + + DEBUGASSERT(priv != NULL); + + /* Perform a reset */ + + lis3dsh_reset(priv); + + return OK; +} + +/**************************************************************************** + * Name: lis3dsh_read + ****************************************************************************/ + +static ssize_t lis3dsh_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct lis3dsh_dev_s *priv = inode->i_private; + FAR struct lis3dsh_sensor_data_s *data; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Check if enough memory was provided for the read call */ + + if (buflen < sizeof(FAR struct lis3dsh_sensor_data_s)) + { + snerr("Not enough memory for reading out a sensor data sample\n"); + return -ENOSYS; + } + + /* Aquire the semaphore before the data is copied */ + + ret = sem_wait(&priv->datasem); + if (ret != OK) + { + snerr("Could not aquire priv->datasem: %d\n", ret); + return ERROR; + } + + /* Copy the sensor data into the buffer */ + + data = (FAR struct lis3dsh_sensor_data_s *)buffer; + memset(data, 0, sizeof(FAR struct lis3dsh_sensor_data_s)); + + data->x_acc = priv->data.x_acc; + data->y_acc = priv->data.y_acc; + data->z_acc = priv->data.z_acc; + + /* Give back the semaphore */ + + sem_post(&priv->datasem); + + return sizeof(FAR struct lis3dsh_sensor_data_s); +} + +/**************************************************************************** + * Name: lis3dsh_write + ****************************************************************************/ + +static ssize_t lis3dsh_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + return -ENOSYS; +} + +/**************************************************************************** + * Name: lis3dsh_ioctl + ****************************************************************************/ + +static int lis3dsh_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + int ret = OK; + + switch (cmd) + { + /* Command was not recognized */ + + default: + snerr("Unrecognized cmd: %d\n", cmd); + ret = -ENOTTY; + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lis3dsh_register + * + * Description: + * Register the LIS3DSH character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/acc0" + * spi - An instance of the SPI interface to use to communicate with + * LIS3DSH + * config - configuration for the LIS3DSH driver. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct lis3dsh_config_s *config) +{ + FAR struct lis3dsh_dev_s *priv; + int ret; + + /* Sanity check */ + + DEBUGASSERT(spi != NULL); + DEBUGASSERT(config != NULL); + + /* Initialize the LIS3DSH device structure */ + + priv = (FAR struct lis3dsh_dev_s *)kmm_malloc(sizeof(struct lis3dsh_dev_s)); + if (priv == NULL) + { + snerr("Failed to allocate instance\n"); + return -ENOMEM; + } + + priv->spi = spi; + priv->config = config; + priv->work.worker = NULL; + + sem_init(&priv->datasem, 0, 1); /* Initialize sensor data access + * semaphore */ + + /* Setup SPI frequency and mode */ + + SPI_SETFREQUENCY(spi, LIS3DSH_SPI_FREQUENCY); + SPI_SETMODE(spi, LIS3DSH_SPI_MODE); + + /* Register the character driver */ + + ret = register_driver(devpath, &g_lis3dsh_fops, 0666, priv); + if (ret < 0) + { + snerr("Failed to register driver: %d\n", ret); + kmm_free(priv); + sem_destroy(&priv->datasem); + return -ENODEV; + } + + /* Since we support multiple LIS3DSH devices, we will need to add this new + * instance to a list of device instances so that it can be found by the + * interrupt handler based on the received IRQ number. + */ + + priv->flink = g_lis3dsh_list; + g_lis3dsh_list = priv; + + /* Attach the interrupt handler */ + + ret = priv->config->attach(priv->config, &lis3dsh_interrupt_handler); + if (ret < 0) + { + snerr("Failed to attach interrupt\n"); + return -ENODEV; + } + + return OK; +} + +#endif /* CONFIG_SPI && CONFIG_LIS3DSH */ diff --git a/include/nuttx/sensors/lis3dsh.h b/include/nuttx/sensors/lis3dsh.h new file mode 100644 index 00000000000..03797d730b1 --- /dev/null +++ b/include/nuttx/sensors/lis3dsh.h @@ -0,0 +1,277 @@ +/**************************************************************************** + * include/nuttx/sensors/lis3dsh.h + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * Thomas Ilk + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef NUTTX_INCLUDE_NUTTX_SENSORS_LIS3DSH_H_ +#define NUTTX_INCLUDE_NUTTX_SENSORS_LIS3DSH_H_ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_LIS3DSH) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* LIS3DSH Register Definitions **********************************************/ + +#define LIS3DSH_INFO_REG_1 (0x0D) +#define LIS3DSH_INFO_REG_2 (0x0E) +#define LIS3DSH_WHO_AM_I_REG (0x0F) +#define LIS3DSH_CTRL_REG_1 (0x21) +#define LIS3DSH_CTRL_REG_2 (0x22) +#define LIS3DSH_CTRL_REG_3 (0x23) +#define LIS3DSH_CTRL_REG_4 (0x20) +#define LIS3DSH_CTRL_REG_5 (0x24) +#define LIS3DSH_CTRL_REG_6 (0x25) +#define LIS3DSH_STATUS_REG (0x27) +#define LIS3DSH_OUT_T_REG (0x0C) +#define LIS3DSH_OFF_X_REG (0x10) +#define LIS3DSH_OFF_Y_REG (0x11) +#define LIS3DSH_OFF_Z_REG (0x12) +#define LIS3DSH_CS_X_REG (0x13) +#define LIS3DSH_CS_Y_REG (0x14) +#define LIS3DSH_CS_Z_REG (0x15) +#define LIS3DSH_LC_L_REG (0x16) +#define LIS3DSH_LC_H_REG (0x17) +#define LIS3DSH_STAT_REG (0x18) +#define LIS3DSH_PEAK1_REG (0x19) +#define LIS3DSH_PEAK2_REG (0x1A) +#define LIS3DSH_VFC_REG_1 (0x1B) +#define LIS3DSH_VFC_REG_2 (0x1C) +#define LIS3DSH_VFC_REG_3 (0x1D) +#define LIS3DSH_VFC_REG_4 (0x1E) +#define LIS3DSH_THRS3_REG (0x1F) +#define LIS3DSH_OUT_X_L_REG (0x28) +#define LIS3DSH_OUT_X_H_REG (0x29) +#define LIS3DSH_OUT_Y_L_REG (0x2A) +#define LIS3DSH_OUT_Y_H_REG (0x2B) +#define LIS3DSH_OUT_Z_L_REG (0x2C) +#define LIS3DSH_OUT_Z_H_REG (0x2D) +#define LIS3DSH_FIFO_CTRL_REG (0x2E) +#define LIS3DSH_FIFO_SRC_REG (0x2F) +#define LIS3DSH_FIFO_CTRL_REG (0x2E) +#define LIS3DSH_ST1_REG_1 (0x40) +#define LIS3DSH_ST1_REG_2 (0x41) +#define LIS3DSH_ST1_REG_3 (0x42) +#define LIS3DSH_ST1_REG_4 (0x43) +#define LIS3DSH_ST1_REG_5 (0x44) +#define LIS3DSH_ST1_REG_6 (0x45) +#define LIS3DSH_ST1_REG_7 (0x46) +#define LIS3DSH_ST1_REG_8 (0x47) +#define LIS3DSH_ST1_REG_9 (0x48) +#define LIS3DSH_ST1_REG_10 (0x49) +#define LIS3DSH_ST1_REG_11 (0x4A) +#define LIS3DSH_ST1_REG_12 (0x4B) +#define LIS3DSH_ST1_REG_13 (0x4C) +#define LIS3DSH_ST1_REG_14 (0x4D) +#define LIS3DSH_ST1_REG_15 (0x4E) +#define LIS3DSH_ST1_REG_16 (0x4F) +#define LIS3DSH_TIM4_1_REG (0x50) +#define LIS3DSH_TIM3_1_REG (0x51) +#define LIS3DSH_TIM2_1_REG_1 (0x52) +#define LIS3DSH_TIM2_1_REG_2 (0x53) +#define LIS3DSH_TIM1_1_REG_1 (0x54) +#define LIS3DSH_TIM1_1_REG_5 (0x55) +#define LIS3DSH_THRS2_1_REG (0x56) +#define LIS3DSH_THRS1_1_REG (0x57) +#define LIS3DSH_MASK1_B_REG (0x59) +#define LIS3DSH_MASK1_A_REG (0x5A) +#define LIS3DSH_SETT1_REG (0x5B) +#define LIS3DSH_PR1_REG (0x5C) +#define LIS3DSH_TC1_REG_1 (0x5D) +#define LIS3DSH_TC1_REG_2 (0x5E) +#define LIS3DSH_OUTS1_REG (0x5F) +#define LIS3DSH_ST2_REG_1 (0x60) +#define LIS3DSH_ST2_REG_2 (0x61) +#define LIS3DSH_ST2_REG_3 (0x62) +#define LIS3DSH_ST2_REG_4 (0x63) +#define LIS3DSH_ST2_REG_5 (0x64) +#define LIS3DSH_ST2_REG_6 (0x65) +#define LIS3DSH_ST2_REG_7 (0x66) +#define LIS3DSH_ST2_REG_8 (0x67) +#define LIS3DSH_ST2_REG_9 (0x68) +#define LIS3DSH_ST2_REG_10 (0x69) +#define LIS3DSH_ST2_REG_11 (0x6A) +#define LIS3DSH_ST2_REG_12 (0x6B) +#define LIS3DSH_ST2_REG_13 (0x6C) +#define LIS3DSH_ST2_REG_14 (0x6D) +#define LIS3DSH_ST2_REG_15 (0x6E) +#define LIS3DSH_ST2_REG_16 (0x6F) +#define LIS3DSH_TIM4_2_REG (0x70) +#define LIS3DSH_TIM3_2_REG (0x71) +#define LIS3DSH_TIM2_2_REG_1 (0x72) +#define LIS3DSH_TIM2_2_REG_2 (0x73) +#define LIS3DSH_TIM1_2_REG_1 (0x74) +#define LIS3DSH_TIM1_2_REG_5 (0x75) +#define LIS3DSH_THRS2_2_REG (0x76) +#define LIS3DSH_THRS1_2_REG (0x77) +#define LIS3DSH_DES2_REG (0x78) +#define LIS3DSH_MASK2_B_REG (0x79) +#define LIS3DSH_MASK2_A_REG (0x7A) +#define LIS3DSH_SETT2_REG (0x7B) +#define LIS3DSH_PR2_REG (0x7C) +#define LIS3DSH_TC2_REG_1 (0x7D) +#define LIS3DSH_TC2_REG_2 (0x7E) + +/* LIS3DSH CTRL_REG_3 Definitions **********************************************/ + +#define LIS3DSH_CTRL_REG_3_DR_EN_bm (1<<7) /* DRDY signal enable to INT 1 */ +#define LIS3DSH_CTRL_REG_3_IEA_bm (1<<6) /* Interrupt signal polarity */ +#define LIS3DSH_CTRL_REG_3_IEL_bm (1<<5) /* Interrupt signal latching */ +#define LIS3DSH_CTRL_REG_3_INT2_EN_bm (1<<4) /* Interrupt 2 enable / disable */ +#define LIS3DSH_CTRL_REG_3_INT1_EN_bm (1<<3) /* Interrupt 1 enable / disable */ +#define LIS3DSH_CTRL_REG_3_VFILT_bm (1<<2) /* Vector filter enable / disable */ +#define LIS3DSH_CTRL_REG_3_STRT_bm (1<<0) /* Enable soft reset */ + +/* LIS3DSH CTRL_REG_4 Definitions **********************************************/ + +#define LIS3DSH_CTRL_REG_4_ODR_3_bm (1<<7) /* Output data rate and power mode selection bit 3 */ +#define LIS3DSH_CTRL_REG_4_ODR_2_bm (1<<6) /* Output data rate and power mode selection bit 2 */ +#define LIS3DSH_CTRL_REG_4_ODR_1_bm (1<<5) /* Output data rate and power mode selection bit 1 */ +#define LIS3DSH_CTRL_REG_4_ODR_0_bm (1<<4) /* Output data rate and power mode selection bit 0 */ +#define LIS3DSH_CTRL_REG_4_BDU_bm (1<<3) /* Enable block data update for accelerating data */ +#define LIS3DSH_CTRL_REG_4_ZEN_bm (1<<2) /* Enable Z-axis */ +#define LIS3DSH_CTRL_REG_4_YEN_bm (1<<1) /* Enable Y-axis */ +#define LIS3DSH_CTRL_REG_4_XEN_bm (1<<0) /* Enable X-axis */ + +/* LIS3DSH CTRL_REG_5 Definitions **********************************************/ + +#define LIS3DSH_CTRL_REG_5_BW_2_bm (1<<7) /* Anti-aliasing filter bandwidth bit 2 */ +#define LIS3DSH_CTRL_REG_5_BW_1_bm (1<<6) /* Anti-aliasing filter bandwidth bit 1 */ +#define LIS3DSH_CTRL_REG_5_FSCALE_2_bm (1<<5) /* Full-scale selection bit 2 */ +#define LIS3DSH_CTRL_REG_5_FSCALE_1_bm (1<<4) /* Full-scale selection bit 1 */ +#define LIS3DSH_CTRL_REG_5_FSCALE_0_bm (1<<3) /* Full-scale selection bit 0 */ +#define LIS3DSH_CTRL_REG_5_ST_2_bm (1<<2) /* Enable self-test bit 2 */ +#define LIS3DSH_CTRL_REG_5_ST_1_bm (1<<1) /* Enable self-test bit 1 */ +#define LIS3DSH_CTRL_REG_5_SIM_bm (1<<0) /* Enable SPI 4-wire interface */ + +/* LIS3DSH CTRL_REG_6 Definitions **********************************************/ + +#define LIS3DSH_CTRL_REG_6_BOOT_bm (1<<7) /* Force reboot, cleared as soon as the reboot is finished. Active high */ +#define LIS3DSH_CTRL_REG_6_FIFO_EN_bm (1<<6) /* Enable FIFO */ +#define LIS3DSH_CTRL_REG_6_WTM_EN_bm (1<<5) /* Enable FIFO watermark level use */ +#define LIS3DSH_CTRL_REG_6_ADD_INC_bm (1<<4) /* Register address automatically incremented during a multiple byte access with a serial interface */ +#define LIS3DSH_CTRL_REG_6_P1_EMPTY_bm (1<<3) /* Enable FIFO empty indication on Int1 */ +#define LIS3DSH_CTRL_REG_6_P1_WTM_bm (1<<2) /* FIFO watermark interrupt Int1 */ +#define LIS3DSH_CTRL_REG_6_P1_OVERRUN_bm (1<<1) /* FIFO overrrun interrupt on Int1 */ +#define LIS3DSH_CTRL_REG_6_P2_BOOT_bm (1<<0) /* BOOT interrupt on Int2 */ + +/* SPI BUS PARAMETERS *******************************************************/ + +#define LIS3DSH_SPI_FREQUENCY (5000000) /* 5 MHz */ +#define LIS3DSH_SPI_MODE (SPIDEV_MODE3) /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the LIS3DSH + * driver. This structure provides information about the configuration + * of the sensor and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +struct lis3dsh_config_s +{ + /* Since multiple sensors can be connected to the same SPI bus we need + * to use multiple spi device ids which are employed by NuttX to select/ + * deselect the desired LIS3DSH chip via their chip select inputs. + */ + + int spi_devid; + + /* The IRQ number must be provided for each LIS3DSH device so that + * their interrupts can be distinguished. + */ + + int irq; + + /* Attach the LIS3DSH interrupt handler to the GPIO interrupt of the + * concrete LIS3DSH instance. + */ + + int (*attach)(FAR struct lis3dsh_config_s *, xcpt_t); +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: lis3dsh_register + * + * Description: + * Register the LIS3DSH character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/acc0" + * spi - An instance of the SPI interface to use to communicate with + * LIS3DSH + * config - configuration for the LIS3DSH driver. For details see + * description above. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct lis3dsh_config_s *config); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_SPI && CONFIG_LIS3DSH */ +#endif /* NUTTX_INCLUDE_NUTTX_SENSORS_LIS3DSH_H_ */ From 221fcfd8f1bd305ae213ca66d8e46f94164afc73 Mon Sep 17 00:00:00 2001 From: Alexander Entinger Date: Wed, 24 Aug 2016 09:41:04 -0600 Subject: [PATCH 117/214] drivers/sensors: Add driver for the Bosch BMG160 3 axis gyroscop. --- drivers/sensors/Kconfig | 7 + drivers/sensors/Make.defs | 4 + drivers/sensors/bmg160.c | 594 +++++++++++++++++++++++++++++++ drivers/sensors/lis3dsh.c | 42 +-- drivers/sensors/lis3mdl.c | 20 +- drivers/sensors/mlx90393.c | 20 +- include/nuttx/sensors/bmg160.h | 440 +++++++++++++++++++++++ include/nuttx/sensors/lis3dsh.h | 6 +- include/nuttx/sensors/lis3mdl.h | 6 +- include/nuttx/sensors/mlx90393.h | 6 +- 10 files changed, 1097 insertions(+), 48 deletions(-) create mode 100644 drivers/sensors/bmg160.c create mode 100644 include/nuttx/sensors/bmg160.h diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index 8015d91f33e..95e4a9c385e 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -18,6 +18,13 @@ config BH1750FVI ---help--- Enable driver support for the Rohm BH1750FVI light sensor. +config BMG160 + bool "Bosch BMG160 Gyroscope Sensor support" + default n + select SPI + ---help--- + Enable driver support for the Bosch BMG160 gyroscope sensor. + config BMP180 bool "Bosch BMP180 Barometer Sensor support" default n diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs index 839ab654a13..5527e98e4f7 100644 --- a/drivers/sensors/Make.defs +++ b/drivers/sensors/Make.defs @@ -73,6 +73,10 @@ ifeq ($(CONFIG_BH1750FVI),y) CSRCS += bh1750fvi.c endif +ifeq ($(CONFIG_BMG160),y) + CSRCS += bmg160.c +endif + ifeq ($(CONFIG_BMP180),y) CSRCS += bmp180.c endif diff --git a/drivers/sensors/bmg160.c b/drivers/sensors/bmg160.c new file mode 100644 index 00000000000..b27fbd87779 --- /dev/null +++ b/drivers/sensors/bmg160.c @@ -0,0 +1,594 @@ +/**************************************************************************** + * drivers/sensors/bmg160.c + * Character driver for the BMG160 3-Axis gyroscope. + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * Thomas Ilk + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_BMG160) + +/**************************************************************************** + * Private + ****************************************************************************/ + +struct bmg160_sensor_data_s +{ + int16_t x_gyr; /* Measurement result for x axis */ + int16_t y_gyr; /* Measurement result for y axis */ + int16_t z_gyr; /* Measurement result for z axis */ +}; + +struct bmg160_dev_s +{ + FAR struct bmg160_dev_s *flink; /* Supports a singly linked list of + * drivers */ + FAR struct spi_dev_s *spi; /* Pointer to the SPI instance */ + FAR struct bmg160_config_s *config; /* Pointer to the configuration of the + * BMG160 sensor */ + sem_t datasem; /* Manages exclusive access to this + * structure */ + struct bmg160_sensor_data_s data; /* The data as measured by the sensor */ + struct work_s work; /* The work queue is responsible for + * retrieving the data from the sensor + * after the arrival of new data was + * signalled in an interrupt */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void bmg160_read_register(FAR struct bmg160_dev_s *dev, + uint8_t const reg_addr, uint8_t * reg_data); +static void bmg160_write_register(FAR struct bmg160_dev_s *dev, + uint8_t const reg_addr, + uint8_t const reg_data); +static void bmg160_reset(FAR struct bmg160_dev_s *dev); +static void bmg160_read_measurement_data(FAR struct bmg160_dev_s *dev); +static void bmg160_read_gyroscope_data(FAR struct bmg160_dev_s *dev, + uint16_t * x_gyr, uint16_t * y_gyr, + uint16_t * z_gyr); +static int bmg160_interrupt_handler(int irq, FAR void *context); +static void bmg160_worker(FAR void *arg); + +static int bmg160_open(FAR struct file *filep); +static int bmg160_close(FAR struct file *filep); +static ssize_t bmg160_read(FAR struct file *, FAR char *, size_t); +static ssize_t bmg160_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int bmg160_ioctl(FAR struct file *filep, int cmd, unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_bmg160_fops = +{ + bmg160_open, + bmg160_close, + bmg160_read, + bmg160_write, + NULL, + bmg160_ioctl +#ifndef CONFIG_DISABLE_POLL + , NULL +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL +#endif +}; + +/* Single linked list to store instances of drivers */ + +static struct bmg160_dev_s *g_bmg160_list = NULL; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: bmg160_read_register + ****************************************************************************/ + +static void bmg160_read_register(FAR struct bmg160_dev_s *dev, + uint8_t const reg_addr, uint8_t * reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the BMG160 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to read - the MSB needs + * to be set to indicate the read indication. + */ + + SPI_SEND(dev->spi, reg_addr | 0x80); + + /* Write an idle byte while receiving the required data */ + + *reg_data = (uint8_t) (SPI_SEND(dev->spi, 0)); + + /* Set CS to high which deselects the BMG160 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: bmg160_write_register + ****************************************************************************/ + +static void bmg160_write_register(FAR struct bmg160_dev_s *dev, + uint8_t const reg_addr, + uint8_t const reg_data) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the BMG160 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to read */ + + SPI_SEND(dev->spi, reg_addr); + + /* Transmit the content which should be written in the register */ + + SPI_SEND(dev->spi, reg_data); + + /* Set CS to high which deselects the BMG160 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: bmg160_reset + ****************************************************************************/ + +static void bmg160_reset(FAR struct bmg160_dev_s *dev) +{ + bmg160_write_register(dev, BMG160_BGW_SOFTRESET_REG, 0xB6); + + up_mdelay(100); +} + +/**************************************************************************** + * Name: bmg160_read_measurement_data + ****************************************************************************/ + +static void bmg160_read_measurement_data(FAR struct bmg160_dev_s *dev) +{ + int ret; + + /* Read Gyroscope */ + + uint16_t x_gyr = 0, y_gyr = 0, z_gyr = 0; + + bmg160_read_gyroscope_data(dev, &x_gyr, &y_gyr, &z_gyr); + + /* Aquire the semaphore before the data is copied */ + + ret = sem_wait(&dev->datasem); + if (ret < 0) + { + snerr("ERROR: Could not aquire dev->datasem: %d\n", ret); + return; + } + + /* Copy retrieve data to internal data structure */ + + dev->data.x_gyr = (int16_t) (x_gyr); + dev->data.y_gyr = (int16_t) (y_gyr); + dev->data.z_gyr = (int16_t) (z_gyr); + + /* Give back the semaphore */ + + sem_post(&dev->datasem); +} + +/**************************************************************************** + * Name: bmg160_read_gyroscope_data + ****************************************************************************/ + +static void bmg160_read_gyroscope_data(FAR struct bmg160_dev_s *dev, + uint16_t * x_gyr, uint16_t * y_gyr, + uint16_t * z_gyr) +{ + /* Lock the SPI bus so that only one device can access it at the same time */ + + SPI_LOCK(dev->spi, true); + + /* Set CS to low which selects the BMG160 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, true); + + /* Transmit the register address from where we want to start reading. 0x80 + * -> MSB is set -> Read Indication. + */ + + SPI_SEND(dev->spi, (BMG160_RATE_X_LSB_REG | 0x80)); + + /* RX */ + + *x_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *x_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + *y_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *y_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + *z_gyr = ((uint16_t) (SPI_SEND(dev->spi, 0)) << 0); /* LSB */ + *z_gyr |= ((uint16_t) (SPI_SEND(dev->spi, 0)) << 8); /* MSB */ + + /* Set CS to high which deselects the BMG160 */ + + SPI_SELECT(dev->spi, dev->config->spi_devid, false); + + /* Unlock the SPI bus */ + + SPI_LOCK(dev->spi, false); +} + +/**************************************************************************** + * Name: bmg160_interrupt_handler + ****************************************************************************/ + +static int bmg160_interrupt_handler(int irq, FAR void *context) +{ + /* This function should be called upon a rising edge on the BMG160 new data + * interrupt pin since it signals that new data has been measured. + */ + + FAR struct bmg160_dev_s *priv = 0; + int ret; + + /* Find out which BMG160 device caused the interrupt */ + + for (priv = g_bmg160_list; priv && priv->config->irq != irq; + priv = priv->flink); + DEBUGASSERT(priv != NULL); + + /* Task the worker with retrieving the latest sensor data. We should not do + * this in a interrupt since it might take too long. Also we cannot lock the + * SPI bus from within an interrupt. + */ + + DEBUGASSERT(priv->work.worker == NULL); + ret = work_queue(HPWORK, &priv->work, bmg160_worker, priv, 0); + if (ret < 0) + { + snerr("ERROR: Failed to queue work: %d\n", ret); + return ret; + } + + return OK; +} + +/**************************************************************************** + * Name: bmg160_worker + ****************************************************************************/ + +static void bmg160_worker(FAR void *arg) +{ + FAR struct bmg160_dev_s *priv = (FAR struct bmg160_dev_s *)(arg); + DEBUGASSERT(priv != NULL); + + /* Read out the latest sensor data */ + + bmg160_read_measurement_data(priv); +} + +/**************************************************************************** + * Name: bmg160_open + ****************************************************************************/ + +static int bmg160_open(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct bmg160_dev_s *priv = inode->i_private; +#ifdef CONFIG_DEBUG_SENSORS_INFO + uint8_t reg_content; +#endif + + DEBUGASSERT(priv != NULL); + + /* Perform a reset */ + + bmg160_reset(priv); + + /* Configure the sensor for our needs */ + + /* Enable - the full scale range FS = +/- 250 °/s */ + + bmg160_write_register(priv, + BMG160_RANGE_REG, + BMG160_RANGE_REG_FIX_VAL_bm | BMG160_RANGE_REG_FSR_1_bm | + BMG160_RANGE_REG_FSR_0_bm); + + /* Enable - the fastest data output rate ODR = 2000 Hz -> BW = 230 Hz */ + + bmg160_write_register(priv, BMG160_BW_REG, BMG160_BW_REG_ODR_0_bm); + + /* Enable - new data interrupt 1 */ + + bmg160_write_register(priv, + BMG160_INT_EN_0_REG, BMG160_INT_EN_0_REG_DATA_EN_bm); + + /* Enable - active high level interrupt 1 - push-pull interrupt */ + + bmg160_write_register(priv, + BMG160_INT_EN_1_REG, BMG160_INT_EN_1_REG_INT1_LVL_bm); + + /* Enable - map new data interrupt to INT1 */ + + bmg160_write_register(priv, + BMG160_INT_MAP_1_REG, + BMG160_INT_MAP_1_REG_INT1_DATA_bm); + + /* Read measurement data to ensure DRDY is low */ + + bmg160_read_measurement_data(priv); + +#ifdef CONFIG_DEBUG_SENSORS_INFO + /* Read back the content of all control registers for debug purposes */ + + reg_content = 0; + bmg160_read_register(priv, BMG160_RANGE_REG, ®_content); + sninfo("BMG160_RANGE_REG = %04x\n", reg_content); + + bmg160_read_register(priv, BMG160_BW_REG, ®_content); + sninfo("BMG160_BW_REG = %04x\n", reg_content); + + bmg160_read_register(priv, BMG160_INT_EN_0_REG, ®_content); + sninfo("BMG160_INT_EN_0_REG = %04x\n", reg_content); + + bmg160_read_register(priv, BMG160_INT_EN_1_REG, ®_content); + sninfo("BMG160_INT_EN_1_REG = %04x\n", reg_content); + + bmg160_read_register(priv, BMG160_INT_MAP_1_REG, ®_content); + sninfo("BMG160_INT_MAP_1_REG = %04x\n", reg_content); +#endif + + return OK; +} + +/**************************************************************************** + * Name: bmg160_close + ****************************************************************************/ + +static int bmg160_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct bmg160_dev_s *priv = inode->i_private; + + DEBUGASSERT(priv != NULL); + + /* Perform a reset */ + + bmg160_reset(priv); + + return OK; +} + +/**************************************************************************** + * Name: bmg160_read + ****************************************************************************/ + +static ssize_t bmg160_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct bmg160_dev_s *priv = inode->i_private; + FAR struct bmg160_sensor_data_s *data; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Check if enough memory was provided for the read call */ + + if (buflen < sizeof(FAR struct bmg160_sensor_data_s)) + { + snerr("ERROR: Not enough memory for reading out a sensor data sample\n"); + return -ENOSYS; + } + + /* Aquire the semaphore before the data is copied */ + + ret = sem_wait(&priv->datasem); + if (ret < 0) + { + snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); + return ret; + } + + /* Copy the sensor data into the buffer */ + + data = (FAR struct bmg160_sensor_data_s *)buffer; + memset(data, 0, sizeof(FAR struct bmg160_sensor_data_s)); + + data->x_gyr = priv->data.x_gyr; + data->y_gyr = priv->data.y_gyr; + data->z_gyr = priv->data.z_gyr; + + /* Give back the semaphore */ + + sem_post(&priv->datasem); + + return sizeof(FAR struct bmg160_sensor_data_s); +} + +/**************************************************************************** + * Name: bmg160_write + ****************************************************************************/ + +static ssize_t bmg160_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + return -ENOSYS; +} + +/**************************************************************************** + * Name: bmg160_ioctl + ****************************************************************************/ + +static int bmg160_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + int ret = OK; + + switch (cmd) + { + /* Command was not recognized */ + + default: + snerr("ERROR: Unrecognized cmd: %d\n", cmd); + ret = -ENOTTY; + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: bmg160_register + * + * Description: + * Register the BMG160 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/gyr0" + * spi - An instance of the SPI interface to use to communicate with + * BMG160 + * config - configuration for the BMG160 driver. For details see + * description above. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int bmg160_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct bmg160_config_s *config) +{ + FAR struct bmg160_dev_s *priv; + int ret; + + /* Sanity check */ + + DEBUGASSERT(spi != NULL); + DEBUGASSERT(config != NULL); + + /* Initialize the BMG160 device structure */ + + priv = (FAR struct bmg160_dev_s *)kmm_malloc(sizeof(struct bmg160_dev_s)); + if (priv == NULL) + { + snerr("ERROR: Failed to allocate instance\n"); + return -ENOMEM; + } + + priv->spi = spi; + priv->config = config; + priv->work.worker = NULL; + + /* Initialize sensor data access semaphore */ + + sem_init(&priv->datasem, 0, 1); + + /* Setup SPI frequency and mode */ + + SPI_SETFREQUENCY(spi, BMG160_SPI_FREQUENCY); + SPI_SETMODE(spi, BMG160_SPI_MODE); + + /* Attach the interrupt handler */ + + ret = priv->config->attach(priv->config, &bmg160_interrupt_handler); + if (ret < 0) + { + snerr("ERROR: Failed to attach interrupt\n"); + return ret; + } + + /* Register the character driver */ + + ret = register_driver(devpath, &g_bmg160_fops, 0666, priv); + if (ret < 0) + { + snerr("ERROR: Failed to register driver: %d\n", ret); + kmm_free(priv); + sem_destroy(&priv->datasem); + return ret; + } + + /* Since we support multiple BMG160 devices, we will need to add this new + * instance to a list of device instances so that it can be found by the + * interrupt handler based on the received IRQ number. */ + + priv->flink = g_bmg160_list; + g_bmg160_list = priv; + + return OK; +} + +#endif /* CONFIG_SPI && CONFIG_BMG160 */ diff --git a/drivers/sensors/lis3dsh.c b/drivers/sensors/lis3dsh.c index 1e0e3d8fd75..a9aa3aa9db9 100644 --- a/drivers/sensors/lis3dsh.c +++ b/drivers/sensors/lis3dsh.c @@ -230,9 +230,9 @@ static void lis3dsh_read_measurement_data(FAR struct lis3dsh_dev_s *dev) /* Aquire the semaphore before the data is copied */ ret = sem_wait(&dev->datasem); - if (ret != OK) + if (ret < 0) { - snerr("Could not aquire dev->datasem: %d\n", ret); + snerr("ERROR: Could not aquire dev->datasem: %d\n", ret); return; } @@ -317,7 +317,7 @@ static int lis3dsh_interrupt_handler(int irq, FAR void *context) ret = work_queue(HPWORK, &priv->work, lis3dsh_worker, priv, 0); if (ret < 0) { - snerr("Failed to queue work: %d\n", ret); + snerr("ERROR: Failed to queue work: %d\n", ret); return ret; } @@ -382,24 +382,26 @@ static int lis3dsh_open(FAR struct file *filep) /* Read back the content of all control registers for debug purposes */ +#ifdef CONFIG_DEBUG_SENSORS_INFO { uint8_t reg_content = 0; lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_1, ®_content); - snerr("LIS3DSH_CTRL_REG_1 = %04x\n", reg_content); + sninfo("LIS3DSH_CTRL_REG_1 = %04x\n", reg_content); lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_2, ®_content); - snerr("LIS3DSH_CTRL_REG_2 = %04x\n", reg_content); + sninfo("LIS3DSH_CTRL_REG_2 = %04x\n", reg_content); lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_3, ®_content); - snerr("LIS3DSH_CTRL_REG_3 = %04x\n", reg_content); + sninfo("LIS3DSH_CTRL_REG_3 = %04x\n", reg_content); lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_4, ®_content); - snerr("LIS3DSH_CTRL_REG_4 = %04x\n", reg_content); + sninfo("LIS3DSH_CTRL_REG_4 = %04x\n", reg_content); lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_5, ®_content); - snerr("LIS3DSH_CTRL_REG_5 = %04x\n", reg_content); + sninfo("LIS3DSH_CTRL_REG_5 = %04x\n", reg_content); lis3dsh_read_register(priv, LIS3DSH_CTRL_REG_6, ®_content); - snerr("LIS3DSH_CTRL_REG_6 = %04x\n", reg_content); + sninfo("LIS3DSH_CTRL_REG_6 = %04x\n", reg_content); lis3dsh_read_register(priv, LIS3DSH_STATUS_REG, ®_content); - snerr("STATUS_REG = %04x\n", reg_content); + sninfo("STATUS_REG = %04x\n", reg_content); } +#endif return OK; } @@ -440,17 +442,17 @@ static ssize_t lis3dsh_read(FAR struct file *filep, FAR char *buffer, if (buflen < sizeof(FAR struct lis3dsh_sensor_data_s)) { - snerr("Not enough memory for reading out a sensor data sample\n"); + snerr("ERROR: Not enough memory for reading out a sensor data sample\n"); return -ENOSYS; } /* Aquire the semaphore before the data is copied */ ret = sem_wait(&priv->datasem); - if (ret != OK) + if (ret < 0) { - snerr("Could not aquire priv->datasem: %d\n", ret); - return ERROR; + snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); + return ret; } /* Copy the sensor data into the buffer */ @@ -492,7 +494,7 @@ static int lis3dsh_ioctl(FAR struct file *filep, int cmd, unsigned long arg) /* Command was not recognized */ default: - snerr("Unrecognized cmd: %d\n", cmd); + snerr("ERROR: Unrecognized cmd: %d\n", cmd); ret = -ENOTTY; break; } @@ -537,7 +539,7 @@ int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi, priv = (FAR struct lis3dsh_dev_s *)kmm_malloc(sizeof(struct lis3dsh_dev_s)); if (priv == NULL) { - snerr("Failed to allocate instance\n"); + snerr("ERROR: Failed to allocate instance\n"); return -ENOMEM; } @@ -558,10 +560,10 @@ int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi, ret = register_driver(devpath, &g_lis3dsh_fops, 0666, priv); if (ret < 0) { - snerr("Failed to register driver: %d\n", ret); + snerr("ERROR: Failed to register driver: %d\n", ret); kmm_free(priv); sem_destroy(&priv->datasem); - return -ENODEV; + return ret; } /* Since we support multiple LIS3DSH devices, we will need to add this new @@ -577,8 +579,8 @@ int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi, ret = priv->config->attach(priv->config, &lis3dsh_interrupt_handler); if (ret < 0) { - snerr("Failed to attach interrupt\n"); - return -ENODEV; + snerr("ERROR: Failed to attach interrupt: %d\n", ret); + return ret; } return OK; diff --git a/drivers/sensors/lis3mdl.c b/drivers/sensors/lis3mdl.c index 767e7c4b28d..bec3f14cd29 100644 --- a/drivers/sensors/lis3mdl.c +++ b/drivers/sensors/lis3mdl.c @@ -237,7 +237,7 @@ static void lis3mdl_read_measurement_data(FAR struct lis3mdl_dev_s *dev) int ret = sem_wait(&dev->datasem); if (ret != OK) { - snerr("Could not aquire dev->datasem: %d\n", ret); + snerr("ERROR: Could not aquire dev->datasem: %d\n", ret); return; } @@ -354,7 +354,7 @@ static int lis3mdl_interrupt_handler(int irq, FAR void *context) ret = work_queue(HPWORK, &priv->work, lis3mdl_worker, priv, 0); if (ret < 0) { - snerr("Failed to queue work: %d\n", ret); + snerr("ERROR: Failed to queue work: %d\n", ret); return ret; } else @@ -440,11 +440,11 @@ static int lis3mdl_open(FAR struct file *filep) reg_addr++) { lis3mdl_read_register(priv, reg_addr, ®_content); - snerr("R#%04x = %04x\n", reg_addr, reg_content); + sninfo("R#%04x = %04x\n", reg_addr, reg_content); } lis3mdl_read_register(priv, LIS3MDL_STATUS_REG, ®_content); - snerr("STATUS_REG = %04x\n", reg_content); + sninfo("STATUS_REG = %04x\n", reg_content); return OK; } @@ -485,7 +485,7 @@ static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer, if (buflen < sizeof(FAR struct lis3mdl_sensor_data_s)) { - snerr("Not enough memory for reading out a sensor data sample\n"); + snerr("ERROR: Not enough memory for reading out a sensor data sample\n"); return -ENOSYS; } @@ -494,7 +494,7 @@ static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer, ret = sem_wait(&priv->datasem); if (ret < 0) { - snerr("Could not aquire priv->datasem: %d\n", ret); + snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); return ret; } @@ -538,7 +538,7 @@ static int lis3mdl_ioctl(FAR struct file *filep, int cmd, unsigned long arg) /* Command was not recognized */ default: - snerr("Unrecognized cmd: %d\n", cmd); + snerr("ERROR: Unrecognized cmd: %d\n", cmd); ret = -ENOTTY; break; } @@ -584,7 +584,7 @@ int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi, priv = (FAR struct lis3mdl_dev_s *)kmm_malloc(sizeof(struct lis3mdl_dev_s)); if (priv == NULL) { - snerr("Failed to allocate instance\n"); + snerr("ERROR: Failed to allocate instance\n"); return -ENOMEM; } @@ -606,7 +606,7 @@ int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi, ret = priv->config->attach(priv->config, &lis3mdl_interrupt_handler); if (ret < 0) { - snerr("Failed to attach interrupt\n"); + snerr("ERROR: Failed to attach interrupt\n"); return -ENODEV; } @@ -615,7 +615,7 @@ int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi, ret = register_driver(devpath, &g_lis3mdl_fops, 0666, priv); if (ret < 0) { - snerr("Failed to register driver: %d\n", ret); + snerr("ERROR: Failed to register driver: %d\n", ret); kmm_free(priv); sem_destroy(&priv->datasem); return -ENODEV; diff --git a/drivers/sensors/mlx90393.c b/drivers/sensors/mlx90393.c index 6b776615f24..1eb9aac6414 100644 --- a/drivers/sensors/mlx90393.c +++ b/drivers/sensors/mlx90393.c @@ -218,7 +218,7 @@ static void mlx90393_read_measurement_data(FAR struct mlx90393_dev_s *dev) ret = sem_wait(&dev->datasem); if (ret != OK) { - sndbg("Could not aquire dev->datasem: %d\n", ret); + snerr("ERROR: Could not aquire dev->datasem: %d\n", ret); return; } @@ -381,7 +381,7 @@ static int mlx90393_interrupt_handler(int irq, FAR void *context) ret = work_queue(HPWORK, &priv->work, mlx90393_worker, priv, 0); if (ret < 0) { - sndbg("Failed to queue work: %d\n", ret); + snerr("ERROR: Failed to queue work: %d\n", ret); return ret; } else @@ -421,14 +421,16 @@ static int mlx90393_open(FAR struct file *filep) mlx90393_reset(priv); +#ifdef CONFIG_DEBUG_SENSORS_INFO /* Read the content of ALL registers for debug purposes */ for (reg_addr = 0; reg_addr < NUM_REGS; reg_addr++) { uint16_t reg_content = 0; mlx90393_read_register(priv, reg_addr, ®_content); - sndbg("R%d = %x\n", reg_addr, reg_content); + sninfo("R%d = %x\n", reg_addr, reg_content); } +#endif /* Start the burst mode */ @@ -473,7 +475,7 @@ static ssize_t mlx90393_read(FAR struct file *filep, FAR char *buffer, if (buflen < sizeof(FAR struct mlx90393_sensor_data_s)) { - sndbg("Not enough memory for reading out a sensor data sample\n"); + snerr("ERROR: Not enough memory for reading out a sensor data sample\n"); return -ENOSYS; } @@ -484,7 +486,7 @@ static ssize_t mlx90393_read(FAR struct file *filep, FAR char *buffer, ret = sem_wait(&priv->datasem); if (ret < 0) { - sndbg("Could not aquire priv->datasem: %d\n", ret); + snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); return ret; } @@ -526,7 +528,7 @@ static int mlx90393_ioctl(FAR struct file *filep, int cmd, unsigned long arg) /* Command was not recognized */ default: - sndbg("Unrecognized cmd: %d\n", cmd); + snerr("ERROR: Unrecognized cmd: %d\n", cmd); ret = -ENOTTY; break; } @@ -571,7 +573,7 @@ int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi, priv = (FAR struct mlx90393_dev_s *)kmm_malloc(sizeof(struct mlx90393_dev_s)); if (priv == NULL) { - dbg("Failed to allocate instance\n"); + snerr("ERROR: Failed to allocate instance\n"); return -ENOMEM; } @@ -593,7 +595,7 @@ int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi, ret = priv->config->attach(priv->config, &mlx90393_interrupt_handler); if (ret < 0) { - dbg("Failed to attach interrupt\n"); + snerr("ERROR: Failed to attach interrupt\n"); return -ENODEV; } @@ -602,7 +604,7 @@ int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi, ret = register_driver(devpath, &g_mlx90393_fops, 0666, priv); if (ret < 0) { - dbg("Failed to register driver: %d\n", ret); + snerr("ERROR: Failed to register driver: %d\n", ret); kmm_free(priv); sem_destroy(&priv->datasem); return -ENODEV; diff --git a/include/nuttx/sensors/bmg160.h b/include/nuttx/sensors/bmg160.h new file mode 100644 index 00000000000..a34c9e3ba0f --- /dev/null +++ b/include/nuttx/sensors/bmg160.h @@ -0,0 +1,440 @@ +/******************************************************************************************** + * include/nuttx/sensors/bmg160.h + * + * Copyright (C) 2016 DS-Automotion GmbH. All rights reserved. + * Author: Alexander Entinger + * Thomas Ilk + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __INCLUDE_NUTTX_SENSORS_BMG160_H +#define __INCLUDE_NUTTX_SENSORS_BMG160_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include +#include +#include +#include + +#if defined(CONFIG_SPI) && defined(CONFIG_BMG160) + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +/* BMG160 Register Definitions **************************************************************/ + +/* Chip ID */ + +#define BMG160_CHIP_ID_REG (0x00) /* Contains the chip identification code */ + +/* Data Register */ + +#define BMG160_RATE_X_LSB_REG (0x02) +#define BMG160_RATE_X_MSB_REG (0x03) +#define BMG160_RATE_Y_LSB_REG (0x04) +#define BMG160_RATE_Y_MSB_REG (0x05) +#define BMG160_RATE_Z_LSB_REG (0x06) +#define BMG160_RATE_Z_MSB_REG (0x07) +#define BMG160_TEMP_REG (0x08) + +/* Status Register */ + +#define BMG160_INT_STATUS_0_REG (0x09) /* Contains interrupt status bits */ +#define BMG160_INT_STATUS_1_REG (0x0A) /* Contains interrupt status bits */ +#define BMG160_INT_STATUS_2_REG (0x0B) /* Contains any motion interrupt status bits */ +#define BMG160_INT_STATUS_3_REG (0x0C) /* Contains high rate interrupt status bits */ +#define BMG160_FIFO_STATUS_REG (0x0E) /* Contains FIFO status flags */ + +/* Control Register */ + +#define BMG160_RANGE_REG (0x0F) /* enables to select FSR */ +#define BMG160_BW_REG (0x10) /* enables to select ODR */ +#define BMG160_LPM1_REG (0x11) /* Selection of the main power modes */ +#define BMG160_LPM2_REG (0x12) /* Configuration settings for fast power-up and external trigger */ +#define BMG160_RATE_HBW_REG (0x13) /* Angular rate data acquisition and data output format */ +#define BMG160_BGW_SOFTRESET_REG (0x14) /* Controls user triggered reset of the sensor */ + +/* Interrupt Status Register */ + +#define BMG160_INT_EN_0_REG (0x15) /* Controls which interrupts are enabled */ +#define BMG160_INT_EN_1_REG (0x16) /* Contains interrupt pin configuration */ +#define BMG160_INT_MAP_0_REG (0x17) /* Controls which interrupt signals are mapped to the INT1 pin */ +#define BMG160_INT_MAP_1_REG (0x18) /* Controls which interrupt signals are mapped to the INT1 pin and INT2 pin */ +#define BMG160_INT_MAP_2_REG (0x19) /* Controls which interrupt signals are mapped to the INT2 pin */ +#define BMG160_INT_ZERO_REG (0x1A) /* Contains the data source definition of those interrupts with selectable data source */ +#define BMG160_INT_ONE_REG (0x1B) /* Contains the data source definition of fast offset compensation and the any motion threshold */ +#define BMG160_INT_TWO_REG (0x1C) /* Contains the any motion configuration for x-, y- and z-axis */ +#define BMG160_INT_FOUR_REG (0x1E) +#define BMG160_INT_RST_LATCH_REG (0x21) /* Contains the interrupt reset bit and the interrupt mode selection */ + +/* Interrupt High Rate Configuration Register */ + +#define BMG160_HIGH_TH_X_REG (0x22) /* Contains the high rate threshold and high rate hysteresis setting for the x-axis */ +#define BMG160_HIGH_DUR_X_REG (0x23) /* Contains high rate duration setting for the x-axis */ +#define BMG160_HIGH_TH_Y_REG (0x24) /* Contains the high rate threshold and high rate hysteresis setting for the y-axis */ +#define BMG160_HIGH_DUR_Y_REG (0x25) /* Contains high rate duration setting for the y-axis */ +#define BMG160_HIGH_TH_Z_REG (0x26) /* Contains the high rate threshold and high rate hysteresis setting for the z-axis */ +#define BMG160_HIGH_DUR_Z_REG (0x27) /* Contains high rate duration setting for the z-axis */ + +/* Offset Register */ + +#define BMG160_SOC_REG (0x31) /* Contains the slow offset cancellation setting */ +#define BMG160_FOC_REG (0x32) /* Contains the fast offset cancellation setting */ + +/* NVM Control Register */ + +#define BMG160_TRIM_NVM_CTRL_REG (0x33) /* Contains the control settings for the few-time programmable non-volatile memory (NVM) */ + +/* Digital Interface Register */ + +#define BMG160_BGW_SPI3_WDT_REG (0x34) /* Contains settings for the digital interfaces */ + +/* Offset Configuration Register */ + +#define BMG160_OFC1_REG (0x36) /* Contains offset compensation values */ +#define BMG160_OFC2_REG (0x37) /* Contains offset compensation values for X-channel */ +#define BMG160_OFC3_REG (0x38) /* Contains offset compensation values for Y-channel */ +#define BMG160_OFC4_REG (0x39) /* Contains offset compensation values for Z-channel */ +#define BMG160_TRIM_GP0_REG (0x3A) /* Contains general purpose data register with NVM back-up */ +#define BMG160_TRIM_GP1_REG (0x3B) /* Contains general purpose data register with NVM back-up */ + +/* Self-test Register */ + +#define BMG160_BIST_REG (0x3C) /* Contains Built in Self-Test possibilities */ + +/* FIFO Register */ + +#define BMG160_FIFO_CONFIG_0_REG (0x3D) /* Contains the FIFO watermark level */ +#define BMG160_FIFO_CONFIG_1_REG (0x3E) /* Contains FIFO configuration settings. The FIFO buffer memory is cleared and + * the FIFO-full flag cleared when writing to FIFO_CONFIG_1 register */ +#define BMG160_FIFO_DATA_REG (0x3F) /* FIFO data readout register */ + +/* Control Register Definitions *************************************************************/ + +/* BMG160 RANGE_REG Definitions */ + +#define BMG160_RANGE_REG_FSR_0_bm (1 << 0) /* Full scale selection bit 0 */ +#define BMG160_RANGE_REG_FSR_1_bm (1 << 1) /* Full scale selection bit 1 */ +#define BMG160_RANGE_REG_FSR_2_bm (1 << 2) /* Full scale selection bit 2 */ +#define BMG160_RANGE_REG_FIX_VAL_bm (1 << 7) /* write 1 to 7th bit of Range Register */ + +/* BMG160 BW_REG Definitions */ + +#define BMG160_BW_REG_ODR_0_bm (1 << 0) /* Output data rate selection bit 0 */ +#define BMG160_BW_REG_ODR_1_bm (1 << 1) /* Output data rate selection bit 1 */ +#define BMG160_BW_REG_ODR_2_bm (1 << 2) /* Output data rate selection bit 2 */ + +/* BMG160 LPM1_REG Definitions */ + +#define BMG160_LPM1_REG_SP_bm (1 << 7) /* active suspend mode */ +#define BMG160_LPM1_REG_D_SP_bm (1 << 5) /* active deep suspend mode */ +#define BMG160_LPM1_REG_S_DUR_0_bm (1 << 1) /* Sleep duration selection bit 0 */ +#define BMG160_LPM1_REG_S_DUR_1_bm (1 << 2) /* Sleep duration selection bit 1 */ +#define BMG160_LPM1_REG_S_DUR_2_bm (1 << 3) /* Sleep duration selection bit 2 */ + +/* BMG160 LPM1_REG Definitions */ + +#define BMG160_LPM1_REG_AS_DUR_0_bm (1 << 0) /* Auto sleep duration selection bit 0 */ +#define BMG160_LPM1_REG_AS_DUR_1_bm (1 << 1) /* Auto sleep duration selection bit 1 */ +#define BMG160_LPM1_REG_AS_DUR_2_bm (1 << 2) /* Auto sleep duration selection bit 2 */ +#define BMG160_LPM1_REG_E_T_S_0_bm (1 << 4) /* External trigger selection bit 0 */ +#define BMG160_LPM1_REG_E_T_S_1_bm (1 << 5) /* External trigger selection bit 1 */ +#define BMG160_LPM1_REG_P_S_M_bm (1 << 6) /* Power save mode */ +#define BMG160_LPM1_REG_FAST_PU_bm (1 << 7) /* Fast power-up mode */ + +/* BMG160 RATE_HBW_REG Definitions */ + +#define BMG160_HBW_REG_DATA_HIGH_BW_bm (1 << 7) /* Enable unfiltered data reading */ +#define BMG160_HBW_REG_SHW_DIS_bm (1 << 6) /* Disable shadow mechanism for the rate data output register */ + + +/* Interrupt Status Register Definitions ****************************************************/ + +/* BMG160 INT_EN_0_REG Definitions */ + +#define BMG160_INT_EN_0_REG_DATA_EN_bm (1 << 7) /* Enable new data interrupt */ +#define BMG160_INT_EN_0_REG_FIFO_EN_bm (1 << 6) /* Enable FIFO interrupt */ +#define BMG160_INT_EN_0_REG_AUTO_OFF_EN_bm (1 << 1) /* Enable auto-offset compensation */ + +/* BMG160 INT_EN_1_REG Definitions */ + +#define BMG160_INT_EN_1_REG_INT2_OD_bm (1 << 3) /* Select open drive for INT2 */ +#define BMG160_INT_EN_1_REG_INT2_LVL_bm (1 << 2) /* Select active level '1' for INT2 */ +#define BMG160_INT_EN_1_REG_INT1_OD_bm (1 << 1) /* Select open drive for INT1 */ +#define BMG160_INT_EN_1_REG_INT1_LVL_bm (1 << 0) /* Select active level '1' for INT1 */ + +/* BMG160 INT_MAP_0_REG Definitions */ + +#define BMG160_INT_MAP_0_REG_INT1_HIGH_bm (1 << 3) /* Map high rate interrupt to INT1 pin */ +#define BMG160_INT_MAP_0_REG_INT1_ANY_bm (1 << 1) /* Map Any-Motion to INT1 pin */ + +/* BMG160 INT_MAP_1_REG Definitions */ + +#define BMG160_INT_MAP_1_REG_INT2_DATA_bm (1 << 7) /* Map new data interrupt to INT2 pin */ +#define BMG160_INT_MAP_1_REG_INT2_Fast_OFF_bm (1 << 6) /* Map Fast Offset interrupt to INT2 pin */ +#define BMG160_INT_MAP_1_REG_INT2_FIFO_bm (1 << 5) /* Map FIFO interrupt to INT2 pin */ +#define BMG160_INT_MAP_1_REG_INT2_AUTO_OFF_bm (1 << 4) /* Map Auto Offset tap interrupt to INT2 pin */ +#define BMG160_INT_MAP_1_REG_INT1_AUTO_OFF_bm (1 << 3) /* Map Auto Offset tap interrupt to INT1 pin */ +#define BMG160_INT_MAP_1_REG_INT1_FIFO_bm (1 << 2) /* Map FIFO interrupt to INT1 pin */ +#define BMG160_INT_MAP_1_REG_INT1_Fast_OFF_bm (1 << 1) /* Map Fast Offset interrupt to INT1 pin */ +#define BMG160_INT_MAP_1_REG_INT1_DATA_bm (1 << 0) /* Map new data interrupt to INT1 pin */ + +/* BMG160 INT_MAP_2_REG Definitions */ + +#define BMG160_INT_MAP_0_REG_INT2_HIGH_bm (1 << 3) /* Map high rate interrupt to INT2 pin */ +#define BMG160_INT_MAP_0_REG_INT2_ANY_bm (1 << 1) /* Map Any-Motion to INT2 pin */ + +/* BMG160 INT_ZERO_REG Definitions */ + +#define BMG160_INT_ZERO_REG_SLOW_OFF_UN_bm (1 << 5) /* Selects unfiltered data for slow offset compensation */ +#define BMG160_INT_ZERO_REG_HIGH_UN_D_bm (1 << 3) /* Selects unfiltered data for high rate interrupt */ +#define BMG160_INT_ZERO_REG_ANY_UN_D_bm (1 << 1) /* Selects unfiltered data for any motion interrupt + +/* BMG160 INT_ONE_REG Definitions */ + +#define BMG160_INT_ONE_REG_FAST_OFF_UN_bm (1 << 7) /* Selects unfiltered data for fast offset compensation */ + +/* BMG160 INT_TWO_REG Definitions */ + +#define BMG160_INT_TWO_REG_ANY_EN_Z_bm (1 << 2) /* Enables any motion interrupt for z-axis */ +#define BMG160_INT_TWO_REG_ANY_EN_Y_bm (1 << 1) /* Enables any motion interrupt for y-axis */ +#define BMG160_INT_TWO_REG_ANY_EN_X_bm (1 << 0) /* Enables any motion interrupt for x-axis */ + +/* BMG160 INT_FOUR_REG Definitions */ + +#define BMG160_INT_FOUR_REG_FIFO_WM_EN_bm (1 << 2) /* Enables fifo water mark level interrupt + +/* BMG160 INT_RST_LATCH_REG Definitions */ + +#define BMG160_INT_RST_LATCH_REG_RST_INT_bm (1 << 7) /* Clears any latched interrupts */ +#define BMG160_INT_RST_LATCH_REG_OFF_RST_bm (1 << 6) /* Resets the Offset value calculated with Fast-, Slow- and AutoOffset */ +#define BMG160_INT_RST_LATCH_REG_LATCH_STAT_bm (1 << 4) +#define BMG160_INT_RST_LATCH_REG_LATCH_INT_3_bm (1 << 3) /* Latch mode selection bit 3 */ +#define BMG160_INT_RST_LATCH_REG_LATCH_INT_2_bm (1 << 2) /* Latch mode selection bit 2 */ +#define BMG160_INT_RST_LATCH_REG_LATCH_INT_1_bm (1 << 1) /* Latch mode selection bit 1 */ +#define BMG160_INT_RST_LATCH_REG_LATCH_INT_0_bm (1 << 0) /* Latch mode selection bit 0 */ + +/* Interupt High Rate Configuration Register Definitions ************************************/ + +/* BMG160 HIGH_TH_X_REG Definitions */ + +#define BMG160_HIGH_TH_X_REG_HY_X_1_bm (1 << 7) +#define BMG160_HIGH_TH_X_REG_HY_X_0_bm (1 << 6) +#define BMG160_HIGH_TH_X_REG_TH_X_4_bm (1 << 5) +#define BMG160_HIGH_TH_X_REG_TH_X_3_bm (1 << 4) +#define BMG160_HIGH_TH_X_REG_TH_X_2_bm (1 << 3) +#define BMG160_HIGH_TH_X_REG_TH_X_1_bm (1 << 2) +#define BMG160_HIGH_TH_X_REG_TH_X_0_bm (1 << 1) +#define BMG160_HIGH_TH_X_REG_EN_X_1_bm (1 << 0) /* Enables high rate interrupt for x-axis */ + +/* BMG160 HIGH_DUR_X_REG Definitions */ + +#define BMG160_HIGH_DUR_X_REG_7_bm (1 << 7) +#define BMG160_HIGH_DUR_X_REG_6_bm (1 << 6) +#define BMG160_HIGH_DUR_X_REG_5_bm (1 << 5) +#define BMG160_HIGH_DUR_X_REG_4_bm (1 << 4) +#define BMG160_HIGH_DUR_X_REG_3_bm (1 << 3) +#define BMG160_HIGH_DUR_X_REG_2_bm (1 << 2) +#define BMG160_HIGH_DUR_X_REG_1_bm (1 << 1) +#define BMG160_HIGH_DUR_X_REG_0_bm (1 << 0) + +/* BMG160 HIGH_TH_Y_REG Definitions */ + +#define BMG160_HIGH_TH_Y_REG_HY_Y_1_bm (1 << 7) +#define BMG160_HIGH_TH_Y_REG_HY_Y_0_bm (1 << 6) +#define BMG160_HIGH_TH_Y_REG_TH_Y_4_bm (1 << 5) +#define BMG160_HIGH_TH_Y_REG_TH_Y_3_bm (1 << 4) +#define BMG160_HIGH_TH_Y_REG_TH_Y_2_bm (1 << 3) +#define BMG160_HIGH_TH_Y_REG_TH_Y_1_bm (1 << 2) +#define BMG160_HIGH_TH_Y_REG_TH_Y_0_bm (1 << 1) +#define BMG160_HIGH_TH_Y_REG_EN_Y_1_bm (1 << 0) /* Enables high rate interrupt for Y-axis */ + +/* BMG160 HIGH_DUR_Y_REG Definitions */ + +#define BMG160_HIGH_DUR_Y_REG_7_bm (1 << 7) +#define BMG160_HIGH_DUR_Y_REG_6_bm (1 << 6) +#define BMG160_HIGH_DUR_Y_REG_5_bm (1 << 5) +#define BMG160_HIGH_DUR_Y_REG_4_bm (1 << 4) +#define BMG160_HIGH_DUR_Y_REG_3_bm (1 << 3) +#define BMG160_HIGH_DUR_Y_REG_2_bm (1 << 2) +#define BMG160_HIGH_DUR_Y_REG_1_bm (1 << 1) +#define BMG160_HIGH_DUR_Y_REG_0_bm (1 << 0) + +/* BMG160 HIGH_TH_Z_REG Definitions */ + +#define BMG160_HIGH_TH_Z_REG_HY_Z_1_bm (1 << 7) +#define BMG160_HIGH_TH_Z_REG_HY_Z_0_bm (1 << 6) +#define BMG160_HIGH_TH_Z_REG_TH_Z_4_bm (1 << 5) +#define BMG160_HIGH_TH_Z_REG_TH_Z_3_bm (1 << 4) +#define BMG160_HIGH_TH_Z_REG_TH_Z_2_bm (1 << 3) +#define BMG160_HIGH_TH_Z_REG_TH_Z_1_bm (1 << 2) +#define BMG160_HIGH_TH_Z_REG_TH_Z_0_bm (1 << 1) +#define BMG160_HIGH_TH_Z_REG_EN_Z_1_bm (1 << 0) /* Enables high rate interrupt for Z-axis */ + +/* BMG160 HIGH_DUR_Z_REG Definitions */ + +#define BMG160_HIGH_DUR_Z_REG_7_bm (1 << 7) +#define BMG160_HIGH_DUR_Z_REG_6_bm (1 << 6) +#define BMG160_HIGH_DUR_Z_REG_5_bm (1 << 5) +#define BMG160_HIGH_DUR_Z_REG_4_bm (1 << 4) +#define BMG160_HIGH_DUR_Z_REG_3_bm (1 << 3) +#define BMG160_HIGH_DUR_Z_REG_2_bm (1 << 2) +#define BMG160_HIGH_DUR_Z_REG_1_bm (1 << 1) +#define BMG160_HIGH_DUR_Z_REG_0_bm (1 << 0) + +/* Offset Register Definitions **************************************************************/ + +/* BMG160 SOC_REG */ + +#define BMG160_SOC_REG_SLOW_OFF_EN_Z_bm (1 << 2) /* Enables slow offset compensation for z-axis */ +#define BMG160_SOC_REG_SLOW_OFF_EN_Y_bm (1 << 1) /* Enables slow offset compensation for y-axis */ +#define BMG160_SOC_REG_SLOW_OFF_EN_X_bm (1 << 0) /* Enables slow offset compensation for x-axis */ + +/* BMG160 FOC_REG */ + +#define BMG160_FOC_REG_FAST_OFF_EN_bm (1 << 2) /* Triggers the fast offset compensation for the enabled axes */ +#define BMG160_FOC_REG_FAST_OFF_EN_Z_bm (1 << 2) /* Enables fast offset compensation for z-axis */ +#define BMG160_FOC_REG_FAST_OFF_EN_Y_bm (1 << 1) /* Enables fast offset compensation for y-axis */ +#define BMG160_FOC_REG_FAST_OFF_EN_X_bm (1 << 0) /* Enables fast offset compensation for x-axis */ + +/* NVM Control Register Definitions *********************************************************/ + +/* BMG160 TRIM_NVM_CTRL_REG */ + +#define BMG160_TRIM_NVM_CTRL_REG_NVM_LOAD_bm (1 << 3) /* Triggers an update of all config registers form NVM, + * the NVM_RDY flag must be '1' prior to triggering the update */ +#define BMG160_TRIM_NVM_CTRL_REG_NVM_PROG_TRIG_bm (1 << 1) /* Triggers an NVM write operation; (see page 59, data sheet) + * the NVM_RDY flag must be '1' prior to triggering the update */ +#define BMG160_TRIM_NVM_CTRL_REG_NVM_PROG_MODE_bm (1 << 0) /* unlock NVM write operation */ + +/* Digital Interface Register Definitions ***************************************************/ + +/* BMG160 BGW_SPI3_WDT_REG */ + +#define BMG160_BGW_SPI3_WDT_REG_I2C_WDT_EN_bm (1 << 2) /* Enables watchdog at the SDA pin if I2C mode is selected */ +#define BMG160_BGW_SPI3_WDT_REG_I2C_WDT_SEL_bm (1 << 1) /* Select an I2C watchdog timer period of 50ms */ +#define BMG160_BGW_SPI3_WDT_REG_SPI3_bm (1 << 0) /* Enable 3-wire SPI mode */ + +/* Offset Configuration Register Definitions ************************************************/ + +/* FIFO Register Definitions ****************************************************************/ + +/* BMG160 FIFO_CONFIG_0_REG */ + +#define BMG160_FIFO_CONFIG_0_REG_TAG_bm (1 << 7) /* Enables FIFO tag (interrupt) */ + +/* BMG160 FIFO_CONFIG_1_REG */ + +#define BMG160_FIFO_CONFIG_1_REG_MODE_1_bm (1 << 7) /* FIFO mode selection bit 1 */ +#define BMG160_FIFO_CONFIG_1_REG_MODE_0_bm (1 << 6) /* FIFO mode selection bit 0 */ +#define BMG160_FIFO_CONFIG_1_REG_DATA_SEL_1_bm (1 << 1) /* FIFO data selection bit 1 */ +#define BMG160_FIFO_CONFIG_1_REG_DATA_SEL_0_bm (1 << 0) /* FIFO data selection bit 0 */ + +/* SPI BUS PARAMETERS ***********************************************************************/ + +#define BMG160_SPI_FREQUENCY (4000000) /* 4 MHz */ +#define BMG160_SPI_MODE (SPIDEV_MODE3) /* Device uses SPI Mode 3: CPOL=1, CPHA=1 */ + +/******************************************************************************************** + * Public Types + ********************************************************************************************/ + +/* A reference to a structure of this type must be passed to the BMG160 + * driver. This structure provides information about the configuration + * of the sensor and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +struct bmg160_config_s +{ + /* Since multiple BMG160 can be connected to the same SPI bus we need + * to use multiple spi device ids which are employed by NuttX to select/ + * deselect the desired BMG160 chip via their chip select inputs. + */ + + int spi_devid; + + /* The IRQ number must be provided for each BMG160 device so that + * their interrupts can be distinguished. + */ + + int irq; + + /* Attach the BMG160 interrupt handler to the GPIO interrupt of the + * concrete BMG160 instance. + */ + + int (*attach)(FAR struct bmg160_config_s *, xcpt_t); +}; + +/******************************************************************************************** + * Public Function Prototypes + ********************************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/******************************************************************************************** + * Name: bmg160_register + * + * Description: + * Register the BMG160 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/gyr0" + * spi - An instance of the SPI interface to use to communicate with BMG160 + * config - configuration for the BMG160 driver. For details see description above. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ********************************************************************************************/ + +int bmg160_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct bmg160_config_s *config); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_SPI && CONFIG_BMG160 */ +#endif /* __INCLUDE_NUTTX_SENSORS_BMG160_H */ diff --git a/include/nuttx/sensors/lis3dsh.h b/include/nuttx/sensors/lis3dsh.h index 03797d730b1..c059bb94332 100644 --- a/include/nuttx/sensors/lis3dsh.h +++ b/include/nuttx/sensors/lis3dsh.h @@ -34,8 +34,8 @@ * ****************************************************************************/ -#ifndef NUTTX_INCLUDE_NUTTX_SENSORS_LIS3DSH_H_ -#define NUTTX_INCLUDE_NUTTX_SENSORS_LIS3DSH_H_ +#ifndef __INCLUDE_NUTTX_SENSORS_LIS3DSH_H +#define __INCLUDE_NUTTX_SENSORS_LIS3DSH_H /**************************************************************************** * Included Files @@ -274,4 +274,4 @@ int lis3dsh_register(FAR const char *devpath, FAR struct spi_dev_s *spi, #endif #endif /* CONFIG_SPI && CONFIG_LIS3DSH */ -#endif /* NUTTX_INCLUDE_NUTTX_SENSORS_LIS3DSH_H_ */ +#endif /* __INCLUDE_NUTTX_SENSORS_LIS3DSH_H */ diff --git a/include/nuttx/sensors/lis3mdl.h b/include/nuttx/sensors/lis3mdl.h index b6a5c3ff046..e5acba39404 100644 --- a/include/nuttx/sensors/lis3mdl.h +++ b/include/nuttx/sensors/lis3mdl.h @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef NUTTX_INCLUDE_NUTTX_SENSORS_LIS3MDL_H_ -#define NUTTX_INCLUDE_NUTTX_SENSORS_LIS3MDL_H_ +#ifndef __INCLUDE_NUTTX_SENSORS_LIS3MDL_H +#define __INCLUDE_NUTTX_SENSORS_LIS3MDL_H /**************************************************************************** * Included Files @@ -177,4 +177,4 @@ int lis3mdl_register(FAR const char *devpath, FAR struct spi_dev_s *spi, #endif #endif /* CONFIG_SPI && CONFIG_LIS3MDL */ -#endif /* NUTTX_INCLUDE_NUTTX_SENSORS_LIS3MDL_H_ */ +#endif /* __INCLUDE_NUTTX_SENSORS_LIS3MDL_H */ diff --git a/include/nuttx/sensors/mlx90393.h b/include/nuttx/sensors/mlx90393.h index 39028580f4e..16ea5a73c68 100644 --- a/include/nuttx/sensors/mlx90393.h +++ b/include/nuttx/sensors/mlx90393.h @@ -33,8 +33,8 @@ * ****************************************************************************/ -#ifndef NUTTX_INCLUDE_NUTTX_SENSORS_MLX90393_H_ -#define NUTTX_INCLUDE_NUTTX_SENSORS_MLX90393_H_ +#ifndef __INCLUDE_NUTTX_SENSORS_MLX90393_H +#define __INCLUDE_NUTTX_SENSORS_MLX90393_H /**************************************************************************** * Included Files @@ -150,4 +150,4 @@ int mlx90393_register(FAR const char *devpath, FAR struct spi_dev_s *spi, #endif /* CONFIG_SPI && CONFIG_MLX90393 */ -#endif /* NUTTX_INCLUDE_NUTTX_SENSORS_MLX90393_H_ */ +#endif /* __INCLUDE_NUTTX_SENSORS_MLX90393_H */ From 6bc952a2ccfbe92c34e82e954f97dadab4702e25 Mon Sep 17 00:00:00 2001 From: Aleksandr Vyhovanec Date: Wed, 24 Aug 2016 10:10:33 -0600 Subject: [PATCH 118/214] STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and STM32F107RC. --- arch/arm/src/stm32/iar/stm32_vectors.S | 395 ++++++++++++++++++++++++- 1 file changed, 392 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/stm32/iar/stm32_vectors.S b/arch/arm/src/stm32/iar/stm32_vectors.S index 9b2c0432ba6..cb9069dbc19 100644 --- a/arch/arm/src/stm32/iar/stm32_vectors.S +++ b/arch/arm/src/stm32/iar/stm32_vectors.S @@ -176,7 +176,207 @@ __vector_table: #if defined(CONFIG_STM32_STM32L15XX) # include "chip/stm32l15xxx_vectors.h" #elif defined(CONFIG_STM32_STM32F10XX) -# include "chip/stm32f10xxx_vectors.h" + +# if defined(CONFIG_STM32_VALUELINE) + + DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */ + DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */ + DCD stm32_tamper /* Vector 16+2: Tamper interrupt */ + DCD stm32_rtc /* Vector 16+3: RTC Wakeup through EXTI line interrupt */ + DCD stm32_flash /* Vector 16+4: Flash global interrupt */ + DCD stm32_rcc /* Vector 16+5: RCC global interrupt */ + DCD stm32_exti0 /* Vector 16+6: EXTI Line 0 interrupt */ + DCD stm32_exti1 /* Vector 16+7: EXTI Line 1 interrupt */ + DCD stm32_exti2 /* Vector 16+8: EXTI Line 2 interrupt */ + DCD stm32_exti3 /* Vector 16+9: EXTI Line 3 interrupt */ + DCD stm32_exti4 /* Vector 16+10: EXTI Line 4 interrupt */ + DCD stm32_dma1ch1 /* Vector 16+11: DMA1 Channel 1 global interrupt */ + DCD stm32_dma1ch2 /* Vector 16+12: DMA1 Channel 2 global interrupt */ + DCD stm32_dma1ch3 /* Vector 16+13: DMA1 Channel 3 global interrupt */ + DCD stm32_dma1ch4 /* Vector 16+14: DMA1 Channel 4 global interrupt */ + DCD stm32_dma1ch5 /* Vector 16+15: DMA1 Channel 5 global interrupt */ + DCD stm32_dma1ch6 /* Vector 16+16: DMA1 Channel 6 global interrupt */ + DCD stm32_dma1ch7 /* Vector 16+17: DMA1 Channel 7 global interrupt */ + DCD stm32_adc1 /* Vector 16+18: ADC1 global interrupt */ + DCD stm32_reserved /* Vector 16+19: Reserved 0 */ + DCD stm32_reserved /* Vector 16+20: Reserved 1 */ + DCD stm32_reserved /* Vector 16+21: Reserved 2 */ + DCD stm32_reserved /* Vector 16+22: Reserved 3 */ + DCD stm32_exti95 /* Vector 16+23: EXTI Line[9:5] interrupts */ + DCD stm32_tim1brk /* Vector 16+24: TIM1 Break interrupt; TIM15 global interrupt */ + DCD stm32_tim1up /* Vector 16+25: TIM1 Update interrupt; TIM16 global interrupt */ + DCD stm32_tim1trgcom /* Vector 16+26: TIM1 Trigger and Commutation interrupts; TIM17 global interrupt */ + DCD stm32_tim1cc /* Vector 16+27: TIM1 Capture Compare interrupt */ + DCD stm32_tim2 /* Vector 16+28: TIM2 global interrupt */ + DCD stm32_tim3 /* Vector 16+29: TIM3 global interrupt */ + DCD stm32_tim4 /* Vector 16+30: TIM4 global interrupt */ + DCD stm32_i2c1ev /* Vector 16+31: I2C1 event interrupt */ + DCD stm32_i2c1er /* Vector 16+32: I2C1 error interrupt */ + DCD stm32_i2c2ev /* Vector 16+33: I2C2 event interrupt */ + DCD stm32_i2c2er /* Vector 16+34: I2C2 error interrupt */ + DCD stm32_spi1 /* Vector 16+35: SPI1 global interrupt */ + DCD stm32_spi2 /* Vector 16+36: SPI2 global interrupt */ + DCD stm32_usart1 /* Vector 16+37: USART1 global interrupt */ + DCD stm32_usart2 /* Vector 16+38: USART2 global interrupt */ + DCD stm32_usart3 /* Vector 16+39: USART3 global interrupt */ + DCD stm32_exti1510 /* Vector 16+40: EXTI Line[15:10] interrupts */ + DCD stm32_rtcalr /* Vector 16+41: RTC alarms (A and B) through EXTI line interrupt */ + DCD stm32_cec /* Vector 16+42: CEC global interrupt */ + DCD stm32_tim12 /* Vector 16+43: TIM12 global interrupt */ + DCD stm32_tim13 /* Vector 16+44: TIM13 global interrupt */ + DCD stm32_tim14 /* Vector 16+45: TIM14 global interrupt */ + DCD stm32_reserved /* Vector 16+46: Reserved 4 */ + DCD stm32_reserved /* Vector 16+47: Reserved 5 */ + DCD stm32_fsmc /* Vector 16+48: FSMC global interrupt */ + DCD stm32_reserved /* Vector 16+49: Reserved 6 */ + DCD stm32_tim5 /* Vector 16+50: TIM5 global interrupt */ + DCD stm32_spi3 /* Vector 16+51: SPI3 global interrupt */ + DCD stm32_uart4 /* Vector 16+52: USART2 global interrupt */ + DCD stm32_uart5 /* Vector 16+53: UART5 global interrupt */ + DCD stm32_tim6 /* Vector 16+54: TIM6 global interrupt */ + DCD stm32_tim7 /* Vector 16+55: TIM7 global interrupt */ + DCD stm32_dma2ch1 /* Vector 16+56: DMA2 Channel 1 global interrupt */ + DCD stm32_dma2ch2 /* Vector 16+57: DMA2 Channel 2 global interrupt */ + DCD stm32_dma2ch3 /* Vector 16+58: DMA2 Channel 3 global interrupt */ + DCD stm32_dma2ch45 /* Vector 16+59: DMA2 Channel 4 and 5 global interrupt */ + DCD stm32_dma2ch5 /* Vector 16+60: DMA2 Channel 5 global interrupt */ + +# elif defined(CONFIG_STM32_CONNECTIVITYLINE) + + DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */ + DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */ + DCD stm32_tamper /* Vector 16+2: Tamper interrupt */ + DCD stm32_rtc /* Vector 16+3: RTC global interrupt */ + DCD stm32_flash /* Vector 16+4: Flash global interrupt */ + DCD stm32_rcc /* Vector 16+5: RCC global interrupt */ + DCD stm32_exti0 /* Vector 16+6: EXTI Line 0 interrupt */ + DCD stm32_exti1 /* Vector 16+7: EXTI Line 1 interrupt */ + DCD stm32_exti2 /* Vector 16+8: EXTI Line 2 interrupt */ + DCD stm32_exti3 /* Vector 16+9: EXTI Line 3 interrupt */ + DCD stm32_exti4 /* Vector 16+10: EXTI Line 4 interrupt */ + DCD stm32_dma1ch1 /* Vector 16+11: DMA1 Channel 1 global interrupt */ + DCD stm32_dma1ch2 /* Vector 16+12: DMA1 Channel 2 global interrupt */ + DCD stm32_dma1ch3 /* Vector 16+13: DMA1 Channel 3 global interrupt */ + DCD stm32_dma1ch4 /* Vector 16+14: DMA1 Channel 4 global interrupt */ + DCD stm32_dma1ch5 /* Vector 16+15: DMA1 Channel 5 global interrupt */ + DCD stm32_dma1ch6 /* Vector 16+16: DMA1 Channel 6 global interrupt */ + DCD stm32_dma1ch7 /* Vector 16+17: DMA1 Channel 7 global interrupt */ + DCD stm32_adc12 /* Vector 16+18: ADC1 and ADC2 global interrupt */ + DCD stm32_can1tx /* Vector 16+19: CAN1 TX interrupts */ + DCD stm32_can1rx0 /* Vector 16+20: CAN1 RX0 interrupts */ + DCD stm32_can1rx /* Vector 16+21: CAN1 RX1 interrupt */ + DCD stm32_can1sce /* Vector 16+22: CAN1 SCE interrupt */ + DCD stm32_exti95 /* Vector 16+23: EXTI Line[9:5] interrupts */ + DCD stm32_tim1brk /* Vector 16+24: TIM1 Break interrupt */ + DCD stm32_tim1up /* Vector 16+25: TIM1 Update interrupt */ + DCD stm32_tim1trgcom /* Vector 16+26: TIM1 Trigger and Commutation interrupts */ + DCD stm32_tim1cc /* Vector 16+27: TIM1 Capture Compare interrupt */ + DCD stm32_tim2 /* Vector 16+28: TIM2 global interrupt */ + DCD stm32_tim3 /* Vector 16+29: TIM3 global interrupt */ + DCD stm32_tim4 /* Vector 16+30: TIM4 global interrupt */ + DCD stm32_i2c1ev /* Vector 16+31: I2C1 event interrupt */ + DCD stm32_i2c1er /* Vector 16+32: I2C1 error interrupt */ + DCD stm32_i2c2ev /* Vector 16+33: I2C2 event interrupt */ + DCD stm32_i2c2er /* Vector 16+34: I2C2 error interrupt */ + DCD stm32_spi1 /* Vector 16+35: SPI1 global interrupt */ + DCD stm32_spi2 /* Vector 16+36: SPI2 global interrupt */ + DCD stm32_usart1 /* Vector 16+37: USART1 global interrupt */ + DCD stm32_usart2 /* Vector 16+38: USART2 global interrupt */ + DCD stm32_usart3 /* Vector 16+39: USART3 global interrupt */ + DCD stm32_exti1510 /* Vector 16+40: EXTI Line[15:10] interrupts */ + DCD stm32_rtcalr /* Vector 16+41: RTC alarm through EXTI line interrupt */ + DCD stm32_otgfswkup /* Vector 16+42: USB On-The-Go FS Wakeup through EXTI line interrupt */ + DCD stm32_reserved /* Vector 16+43: Reserved 0 */ + DCD stm32_reserved /* Vector 16+44: Reserved 1 */ + DCD stm32_reserved /* Vector 16+45: Reserved 2 */ + DCD stm32_reserved /* Vector 16+46: Reserved 3 */ + DCD stm32_reserved /* Vector 16+47: Reserved 4 */ + DCD stm32_reserved /* Vector 16+48: Reserved 5 */ + DCD stm32_reserved /* Vector 16+49: Reserved 6 */ + DCD stm32_tim5 /* Vector 16+50: TIM5 global interrupt */ + DCD stm32_spi3 /* Vector 16+51: SPI3 global interrupt */ + DCD stm32_uart4 /* Vector 16+52: UART4 global interrupt */ + DCD stm32_uart5 /* Vector 16+53: UART5 global interrupt */ + DCD stm32_tim6 /* Vector 16+54: TIM6 global interrupt */ + DCD stm32_tim7 /* Vector 16+55: TIM7 global interrupt */ + DCD stm32_dma2ch1 /* Vector 16+56: DMA2 Channel 1 global interrupt */ + DCD stm32_dma2ch2 /* Vector 16+57: DMA2 Channel 2 global interrupt */ + DCD stm32_dma2ch3 /* Vector 16+58: DMA2 Channel 3 global interrupt */ + DCD stm32_dma2ch4 /* Vector 16+59: DMA2 Channel 4 global interrupt */ + DCD stm32_dma2ch5 /* Vector 16+60: DMA2 Channel 5 global interrupt */ + DCD stm32_eth /* Vector 16+61: Ethernet global interrupt */ + DCD stm32_ethwkup /* Vector 16+62: Ethernet Wakeup through EXTI line interrupt */ + DCD stm32_can2tx /* Vector 16+63: CAN2 TX interrupts */ + DCD stm32_can2rx0 /* Vector 16+64: CAN2 RX0 interrupts */ + DCD stm32_can2rx1 /* Vector 16+65: CAN2 RX1 interrupt */ + DCD stm32_can2sce /* Vector 16+66: CAN2 SCE interrupt */ + DCD stm32_otgfs /* Vector 16+67: USB On The Go FS global interrupt */ + +# else /* CONFIG_STM32_CONNECTIVITYLINE */ + + DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */ + DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */ + DCD stm32_tamper /* Vector 16+2: Tamper interrupt */ + DCD stm32_rtc /* Vector 16+3: RTC global interrupt */ + DCD stm32_flash /* Vector 16+4: Flash global interrupt */ + DCD stm32_rcc /* Vector 16+5: RCC global interrupt */ + DCD stm32_exti0 /* Vector 16+6: EXTI Line 0 interrupt */ + DCD stm32_exti1 /* Vector 16+7: EXTI Line 1 interrupt */ + DCD stm32_exti2 /* Vector 16+8: EXTI Line 2 interrupt */ + DCD stm32_exti3 /* Vector 16+9: EXTI Line 3 interrupt */ + DCD stm32_exti4 /* Vector 16+10: EXTI Line 4 interrupt */ + DCD stm32_dma1ch1 /* Vector 16+11: DMA1 Channel 1 global interrupt */ + DCD stm32_dma1ch2 /* Vector 16+12: DMA1 Channel 2 global interrupt */ + DCD stm32_dma1ch3 /* Vector 16+13: DMA1 Channel 3 global interrupt */ + DCD stm32_dma1ch4 /* Vector 16+14: DMA1 Channel 4 global interrupt */ + DCD stm32_dma1ch5 /* Vector 16+15: DMA1 Channel 5 global interrupt */ + DCD stm32_dma1ch6 /* Vector 16+16: DMA1 Channel 6 global interrupt */ + DCD stm32_dma1ch7 /* Vector 16+17: DMA1 Channel 7 global interrupt */ + DCD stm32_adc12 /* Vector 16+18: ADC1 and ADC2 global interrupt */ + DCD stm32_usbhpcantx /* Vector 16+19: USB High Priority or CAN TX interrupts*/ + DCD stm32_usblpcanrx0 /* Vector 16+20: USB Low Priority or CAN RX0 interrupts*/ + DCD stm32_can1rx1 /* Vector 16+21: CAN1 RX1 interrupt */ + DCD stm32_can1sce /* Vector 16+22: CAN1 SCE interrupt */ + DCD stm32_exti95 /* Vector 16+23: EXTI Line[9:5] interrupts */ + DCD stm32_tim1brk /* Vector 16+24: TIM1 Break interrupt */ + DCD stm32_tim1up /* Vector 16+25: TIM1 Update interrupt */ + DCD stm32_tim1rtgcom /* Vector 16+26: TIM1 Trigger and Commutation interrupts */ + DCD stm32_tim1cc /* Vector 16+27: TIM1 Capture Compare interrupt */ + DCD stm32_tim2 /* Vector 16+28: TIM2 global interrupt */ + DCD stm32_tim3 /* Vector 16+29: TIM3 global interrupt */ + DCD stm32_tim4 /* Vector 16+30: TIM4 global interrupt */ + DCD stm32_i2c1ev /* Vector 16+31: I2C1 event interrupt */ + DCD stm32_i2c1er /* Vector 16+32: I2C1 error interrupt */ + DCD stm32_i2c2ev /* Vector 16+33: I2C2 event interrupt */ + DCD stm32_i2c2er /* Vector 16+34: I2C2 error interrupt */ + DCD stm32_spi1 /* Vector 16+35: SPI1 global interrupt */ + DCD stm32_spi2 /* Vector 16+36: SPI2 global interrupt */ + DCD stm32_usart1 /* Vector 16+37: USART1 global interrupt */ + DCD stm32_usart2 /* Vector 16+38: USART2 global interrupt */ + DCD stm32_usart3 /* Vector 16+39: USART3 global interrupt */ + DCD stm32_exti1510 /* Vector 16+40: EXTI Line[15:10] interrupts */ + DCD stm32_rtcalr /* Vector 16+41: RTC alarm through EXTI line interrupt */ + DCD stm32_usbwkup /* Vector 16+42: USB wakeup from suspend through EXTI line interrupt*/ + DCD stm32_tim8brk /* Vector 16+43: TIM8 Break interrupt */ + DCD stm32_tim8up /* Vector 16+44: TIM8 Update interrupt */ + DCD stm32_tim8trgcom /* Vector 16+45: TIM8 Trigger and Commutation interrupts */ + DCD stm32_tim8cc /* Vector 16+46: TIM8 Capture Compare interrupt */ + DCD stm32_adc3 /* Vector 16+47: ADC3 global interrupt */ + DCD stm32_fsmc /* Vector 16+48: FSMC global interrupt */ + DCD stm32_sdio /* Vector 16+49: SDIO global interrupt */ + DCD stm32_tim5 /* Vector 16+50: TIM5 global interrupt */ + DCD stm32_spi3 /* Vector 16+51: SPI3 global interrupt */ + DCD stm32_uart4 /* Vector 16+52: UART4 global interrupt */ + DCD stm32_uart5 /* Vector 16+53: UART5 global interrupt */ + DCD stm32_tim6 /* Vector 16+54: TIM6 global interrupt */ + DCD stm32_tim7 /* Vector 16+55: TIM7 global interrupt */ + DCD stm32_dma2ch1 /* Vector 16+56: DMA2 Channel 1 global interrupt */ + DCD stm32_dma2ch2 /* Vector 16+57: DMA2 Channel 2 global interrupt */ + DCD stm32_dma2ch3 /* Vector 16+58: DMA2 Channel 3 global interrupt */ + DCD stm32_dma2ch45 /* Vector 16+59: DMA2 Channel 4&5 global interrupt */ + +# endif /* CONFIG_STM32_CONNECTIVITYLINE */ + #elif defined(CONFIG_STM32_STM32F20XX) DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */ DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */ @@ -278,7 +478,7 @@ __vector_table: * .text ************************************************************************************/ - SECTION .text:CODE:NOROOT(2) + SECTION .text:CODE:NOROOT(8) handlers: HANDLER stm32_reserved, STM32_IRQ_RESERVED /* Unexpected/reserved vector */ @@ -304,8 +504,196 @@ handlers: #if defined(CONFIG_STM32_STM32L15XX) # include "chip/stm32l15xxx_vectors.h" #elif defined(CONFIG_STM32_STM32F10XX) -# include "chip/stm32f10xxx_vectors.h" + + +# if defined(CONFIG_STM32_VALUELINE) + + HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */ + HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */ + HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper interrupt */ + HANDLER stm32_rtc, STM32_IRQ_RTC /* Vector 16+3: RTC Wakeup through EXTI line interrupt */ + HANDLER stm32_flash, STM32_IRQ_FLASH /* Vector 16+4: Flash global interrupt */ + HANDLER stm32_rcc, STM32_IRQ_RCC /* Vector 16+5: RCC global interrupt */ + HANDLER stm32_exti0, STM32_IRQ_EXTI0 /* Vector 16+6: EXTI Line 0 interrupt */ + HANDLER stm32_exti1, STM32_IRQ_EXTI1 /* Vector 16+7: EXTI Line 1 interrupt */ + HANDLER stm32_exti2, STM32_IRQ_EXTI2 /* Vector 16+8: EXTI Line 2 interrupt */ + HANDLER stm32_exti3, STM32_IRQ_EXTI3 /* Vector 16+9: EXTI Line 3 interrupt */ + HANDLER stm32_exti4, STM32_IRQ_EXTI4 /* Vector 16+10: EXTI Line 4 interrupt */ + HANDLER stm32_dma1ch1, STM32_IRQ_DMA1CH1 /* Vector 16+11: DMA1 Channel 1 global interrupt */ + HANDLER stm32_dma1ch2, STM32_IRQ_DMA1CH2 /* Vector 16+12: DMA1 Channel 2 global interrupt */ + HANDLER stm32_dma1ch3, STM32_IRQ_DMA1CH3 /* Vector 16+13: DMA1 Channel 3 global interrupt */ + HANDLER stm32_dma1ch4, STM32_IRQ_DMA1CH4 /* Vector 16+14: DMA1 Channel 4 global interrupt */ + HANDLER stm32_dma1ch5, STM32_IRQ_DMA1CH5 /* Vector 16+15: DMA1 Channel 5 global interrupt */ + HANDLER stm32_dma1ch6, STM32_IRQ_DMA1CH6 /* Vector 16+16: DMA1 Channel 6 global interrupt */ + HANDLER stm32_dma1ch7, STM32_IRQ_DMA1CH7 /* Vector 16+17: DMA1 Channel 7 global interrupt */ + HANDLER stm32_adc1, STM32_IRQ_ADC1 /* Vector 16+18: ADC1 global interrupt */ + HANDLER stm32_exti95, STM32_IRQ_EXTI95 /* Vector 16+23: EXTI Line[9:5] interrupts */ + HANDLER stm32_tim1brk, STM32_IRQ_TIM1BRK /* Vector 16+24: TIM1 Break interrupt; TIM15 global interrupt */ + HANDLER stm32_tim1up, STM32_IRQ_TIM1UP /* Vector 16+25: TIM1 Update interrupt; TIM16 global interrupt */ + HANDLER stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM /* Vector 16+26: TIM1 Trigger and Commutation interrupts; TIM17 global interrupt */ + HANDLER stm32_tim1cc, STM32_IRQ_TIM1CC /* Vector 16+27: TIM1 Capture Compare interrupt */ + HANDLER stm32_tim2, STM32_IRQ_TIM2 /* Vector 16+28: TIM2 global interrupt */ + HANDLER stm32_tim3, STM32_IRQ_TIM3 /* Vector 16+29: TIM3 global interrupt */ + HANDLER stm32_tim4, STM32_IRQ_TIM4 /* Vector 16+30: TIM4 global interrupt */ + HANDLER stm32_i2c1ev, STM32_IRQ_I2C1EV /* Vector 16+31: I2C1 event interrupt */ + HANDLER stm32_i2c1er, STM32_IRQ_I2C1ER /* Vector 16+32: I2C1 error interrupt */ + HANDLER stm32_i2c2ev, STM32_IRQ_I2C2EV /* Vector 16+33: I2C2 event interrupt */ + HANDLER stm32_i2c2er, STM32_IRQ_I2C2ER /* Vector 16+34: I2C2 error interrupt */ + HANDLER stm32_spi1, STM32_IRQ_SPI1 /* Vector 16+35: SPI1 global interrupt */ + HANDLER stm32_spi2, STM32_IRQ_SPI2 /* Vector 16+36: SPI2 global interrupt */ + HANDLER stm32_usart1, STM32_IRQ_USART1 /* Vector 16+37: USART1 global interrupt */ + HANDLER stm32_usart2, STM32_IRQ_USART2 /* Vector 16+38: USART2 global interrupt */ + HANDLER stm32_usart3, STM32_IRQ_USART3 /* Vector 16+39: USART3 global interrupt */ + HANDLER stm32_exti1510, STM32_IRQ_EXTI1510 /* Vector 16+40: EXTI Line[15:10] interrupts */ + HANDLER stm32_rtcalr, STM32_IRQ_RTCALR /* Vector 16+41: RTC alarms (A and B) through EXTI line interrupt */ + HANDLER stm32_cec, STM32_IRQ_CEC /* Vector 16+42: CEC global interrupt */ + HANDLER stm32_tim12, STM32_IRQ_TIM12 /* Vector 16+43: TIM12 global interrupt */ + HANDLER stm32_tim13, STM32_IRQ_TIM13 /* Vector 16+44: TIM13 global interrupt */ + HANDLER stm32_tim14, STM32_IRQ_TIM14 /* Vector 16+45: TIM14 global interrupt */ + HANDLER stm32_fsmc, STM32_IRQ_FSMC /* Vector 16+48: FSMC global interrupt */ + HANDLER stm32_tim5, STM32_IRQ_TIM5 /* Vector 16+50: TIM5 global interrupt */ + HANDLER stm32_spi3, STM32_IRQ_SPI3 /* Vector 16+51: SPI3 global interrupt */ + HANDLER stm32_uart4, STM32_IRQ_UART4 /* Vector 16+52: USART2 global interrupt */ + HANDLER stm32_uart5, STM32_IRQ_UART5 /* Vector 16+53: UART5 global interrupt */ + HANDLER stm32_tim6, STM32_IRQ_TIM6 /* Vector 16+54: TIM6 global interrupt */ + HANDLER stm32_tim7, STM32_IRQ_TIM7 /* Vector 16+55: TIM7 global interrupt */ + HANDLER stm32_dma2ch1, STM32_IRQ_DMA2CH1 /* Vector 16+56: DMA2 Channel 1 global interrupt */ + HANDLER stm32_dma2ch2, STM32_IRQ_DMA2CH2 /* Vector 16+57: DMA2 Channel 2 global interrupt */ + HANDLER stm32_dma2ch3, STM32_IRQ_DMA2CH3 /* Vector 16+58: DMA2 Channel 3 global interrupt */ + HANDLER stm32_dma2ch45, STM32_IRQ_DMA2CH45 /* Vector 16+59: DMA2 Channel 4 and 5 global interrupt */ + HANDLER stm32_dma2ch5, STM32_IRQ_DMA2CH5 /* Vector 16+60: DMA2 Channel 5 global interrupt */ + +# elif defined(CONFIG_STM32_CONNECTIVITYLINE) + + HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */ + HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */ + HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper interrupt */ + HANDLER stm32_rtc, STM32_IRQ_RTC /* Vector 16+3: RTC global interrupt */ + HANDLER stm32_flash, STM32_IRQ_FLASH /* Vector 16+4: Flash global interrupt */ + HANDLER stm32_rcc, STM32_IRQ_RCC /* Vector 16+5: RCC global interrupt */ + HANDLER stm32_exti0, STM32_IRQ_EXTI0 /* Vector 16+6: EXTI Line 0 interrupt */ + HANDLER stm32_exti1, STM32_IRQ_EXTI1 /* Vector 16+7: EXTI Line 1 interrupt */ + HANDLER stm32_exti2, STM32_IRQ_EXTI2 /* Vector 16+8: EXTI Line 2 interrupt */ + HANDLER stm32_exti3, STM32_IRQ_EXTI3 /* Vector 16+9: EXTI Line 3 interrupt */ + HANDLER stm32_exti4, STM32_IRQ_EXTI4 /* Vector 16+10: EXTI Line 4 interrupt */ + HANDLER stm32_dma1ch1, STM32_IRQ_DMA1CH1 /* Vector 16+11: DMA1 Channel 1 global interrupt */ + HANDLER stm32_dma1ch2, STM32_IRQ_DMA1CH2 /* Vector 16+12: DMA1 Channel 2 global interrupt */ + HANDLER stm32_dma1ch3, STM32_IRQ_DMA1CH3 /* Vector 16+13: DMA1 Channel 3 global interrupt */ + HANDLER stm32_dma1ch4, STM32_IRQ_DMA1CH4 /* Vector 16+14: DMA1 Channel 4 global interrupt */ + HANDLER stm32_dma1ch5, STM32_IRQ_DMA1CH5 /* Vector 16+15: DMA1 Channel 5 global interrupt */ + HANDLER stm32_dma1ch6, STM32_IRQ_DMA1CH6 /* Vector 16+16: DMA1 Channel 6 global interrupt */ + HANDLER stm32_dma1ch7, STM32_IRQ_DMA1CH7 /* Vector 16+17: DMA1 Channel 7 global interrupt */ + HANDLER stm32_adc12, STM32_IRQ_ADC12 /* Vector 16+18: ADC1 and ADC2 global interrupt */ + HANDLER stm32_can1tx, STM32_IRQ_CAN1TX /* Vector 16+19: CAN1 TX interrupts */ + HANDLER stm32_can1rx0, STM32_IRQ_CAN1RX0 /* Vector 16+20: CAN1 RX0 interrupts */ + HANDLER stm32_can1rx, STM32_IRQ_CAN1RX1 /* Vector 16+21: CAN1 RX1 interrupt */ + HANDLER stm32_can1sce, STM32_IRQ_CAN1SCE /* Vector 16+22: CAN1 SCE interrupt */ + HANDLER stm32_exti95, STM32_IRQ_EXTI95 /* Vector 16+23: EXTI Line[9:5] interrupts */ + HANDLER stm32_tim1brk, STM32_IRQ_TIM1BRK /* Vector 16+24: TIM1 Break interrupt */ + HANDLER stm32_tim1up, STM32_IRQ_TIM1UP /* Vector 16+25: TIM1 Update interrupt */ + HANDLER stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM /* Vector 16+26: TIM1 Trigger and Commutation interrupts */ + HANDLER stm32_tim1cc, STM32_IRQ_TIM1CC /* Vector 16+27: TIM1 Capture Compare interrupt */ + HANDLER stm32_tim2, STM32_IRQ_TIM2 /* Vector 16+28: TIM2 global interrupt */ + HANDLER stm32_tim3, STM32_IRQ_TIM3 /* Vector 16+29: TIM3 global interrupt */ + HANDLER stm32_tim4, STM32_IRQ_TIM4 /* Vector 16+30: TIM4 global interrupt */ + HANDLER stm32_i2c1ev, STM32_IRQ_I2C1EV /* Vector 16+31: I2C1 event interrupt */ + HANDLER stm32_i2c1er, STM32_IRQ_I2C1ER /* Vector 16+32: I2C1 error interrupt */ + HANDLER stm32_i2c2ev, STM32_IRQ_I2C2EV /* Vector 16+33: I2C2 event interrupt */ + HANDLER stm32_i2c2er, STM32_IRQ_I2C2ER /* Vector 16+34: I2C2 error interrupt */ + HANDLER stm32_spi1, STM32_IRQ_SPI1 /* Vector 16+35: SPI1 global interrupt */ + HANDLER stm32_spi2, STM32_IRQ_SPI2 /* Vector 16+36: SPI2 global interrupt */ + HANDLER stm32_usart1, STM32_IRQ_USART1 /* Vector 16+37: USART1 global interrupt */ + HANDLER stm32_usart2, STM32_IRQ_USART2 /* Vector 16+38: USART2 global interrupt */ + HANDLER stm32_usart3, STM32_IRQ_USART3 /* Vector 16+39: USART3 global interrupt */ + HANDLER stm32_exti1510, STM32_IRQ_EXTI1510 /* Vector 16+40: EXTI Line[15:10] interrupts */ + HANDLER stm32_rtcalr, STM32_IRQ_RTCALRM /* Vector 16+41: RTC alarm through EXTI line interrupt */ + HANDLER stm32_otgfswkup, STM32_IRQ_OTGFSWKUP /* Vector 16+42: USB On-The-Go FS Wakeup through EXTI line interrupt */ + HANDLER stm32_tim5, STM32_IRQ_TIM5 /* Vector 16+50: TIM5 global interrupt */ + HANDLER stm32_spi3, STM32_IRQ_SPI3 /* Vector 16+51: SPI3 global interrupt */ + HANDLER stm32_uart4 , STM32_IRQ_UART4 /* Vector 16+52: UART4 global interrupt */ + HANDLER stm32_uart5, STM32_IRQ_UART5 /* Vector 16+53: UART5 global interrupt */ + HANDLER stm32_tim6, STM32_IRQ_TIM6 /* Vector 16+54: TIM6 global interrupt */ + HANDLER stm32_tim7, STM32_IRQ_TIM7 /* Vector 16+55: TIM7 global interrupt */ + HANDLER stm32_dma2ch1, STM32_IRQ_DMA2CH1 /* Vector 16+56: DMA2 Channel 1 global interrupt */ + HANDLER stm32_dma2ch2, STM32_IRQ_DMA2CH2 /* Vector 16+57: DMA2 Channel 2 global interrupt */ + HANDLER stm32_dma2ch3, STM32_IRQ_DMA2CH3 /* Vector 16+58: DMA2 Channel 3 global interrupt */ + HANDLER stm32_dma2ch4, STM32_IRQ_DMA2CH4 /* Vector 16+59: DMA2 Channel 4 global interrupt */ + HANDLER stm32_dma2ch5, STM32_IRQ_DMA2CH5 /* Vector 16+60: DMA2 Channel 5 global interrupt */ + HANDLER stm32_eth, STM32_IRQ_ETH /* Vector 16+61: Ethernet global interrupt */ + HANDLER stm32_ethwkup, STM32_IRQ_ETHWKUP /* Vector 16+62: Ethernet Wakeup through EXTI line interrupt */ + HANDLER stm32_can2tx, STM32_IRQ_CAN2TX /* Vector 16+63: CAN2 TX interrupts */ + HANDLER stm32_can2rx0, STM32_IRQ_CAN2RX0 /* Vector 16+64: CAN2 RX0 interrupts */ + HANDLER stm32_can2rx1, STM32_IRQ_CAN2RX1 /* Vector 16+65: CAN2 RX1 interrupt */ + HANDLER stm32_can2sce, STM32_IRQ_CAN2SCE /* Vector 16+66: CAN2 SCE interrupt */ + HANDLER stm32_otgfs, STM32_IRQ_OTGFS /* Vector 16+67: USB On The Go FS global interrupt */ + +# else /* CONFIG_STM32_CONNECTIVITYLINE */ + + HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */ + HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */ + HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper interrupt */ + HANDLER stm32_rtc, STM32_IRQ_RTC /* Vector 16+3: RTC global interrupt */ + HANDLER stm32_flash, STM32_IRQ_FLASH /* Vector 16+4: Flash global interrupt */ + HANDLER stm32_rcc, STM32_IRQ_RCC /* Vector 16+5: RCC global interrupt */ + HANDLER stm32_exti0, STM32_IRQ_EXTI0 /* Vector 16+6: EXTI Line 0 interrupt */ + HANDLER stm32_exti1, STM32_IRQ_EXTI1 /* Vector 16+7: EXTI Line 1 interrupt */ + HANDLER stm32_exti2, STM32_IRQ_EXTI2 /* Vector 16+8: EXTI Line 2 interrupt */ + HANDLER stm32_exti3, STM32_IRQ_EXTI3 /* Vector 16+9: EXTI Line 3 interrupt */ + HANDLER stm32_exti4, STM32_IRQ_EXTI4 /* Vector 16+10: EXTI Line 4 interrupt */ + HANDLER stm32_dma1ch1, STM32_IRQ_DMA1CH1 /* Vector 16+11: DMA1 Channel 1 global interrupt */ + HANDLER stm32_dma1ch2, STM32_IRQ_DMA1CH2 /* Vector 16+12: DMA1 Channel 2 global interrupt */ + HANDLER stm32_dma1ch3, STM32_IRQ_DMA1CH3 /* Vector 16+13: DMA1 Channel 3 global interrupt */ + HANDLER stm32_dma1ch4, STM32_IRQ_DMA1CH4 /* Vector 16+14: DMA1 Channel 4 global interrupt */ + HANDLER stm32_dma1ch5, STM32_IRQ_DMA1CH5 /* Vector 16+15: DMA1 Channel 5 global interrupt */ + HANDLER stm32_dma1ch6, STM32_IRQ_DMA1CH6 /* Vector 16+16: DMA1 Channel 6 global interrupt */ + HANDLER stm32_dma1ch7, STM32_IRQ_DMA1CH7 /* Vector 16+17: DMA1 Channel 7 global interrupt */ + HANDLER stm32_adc12, STM32_IRQ_ADC12 /* Vector 16+18: ADC1 and ADC2 global interrupt */ + HANDLER stm32_usbhpcantx, STM32_IRQ_USBHPCANTX /* Vector 16+19: USB High Priority or CAN TX interrupts*/ + HANDLER stm32_usblpcanrx0, STM32_IRQ_USBLPCANRX0 /* Vector 16+20: USB Low Priority or CAN RX0 interrupts*/ + HANDLER stm32_can1rx1, STM32_IRQ_CAN1RX1 /* Vector 16+21: CAN1 RX1 interrupt */ + HANDLER stm32_can1sce, STM32_IRQ_CAN1SCE /* Vector 16+22: CAN1 SCE interrupt */ + HANDLER stm32_exti95, STM32_IRQ_EXTI95 /* Vector 16+23: EXTI Line[9:5] interrupts */ + HANDLER stm32_tim1brk, STM32_IRQ_TIM1BRK /* Vector 16+24: TIM1 Break interrupt */ + HANDLER stm32_tim1up, STM32_IRQ_TIM1UP /* Vector 16+25: TIM1 Update interrupt */ + HANDLER stm32_tim1rtgcom, STM32_IRQ_TIM1TRGCOM /* Vector 16+26: TIM1 Trigger and Commutation interrupts */ + HANDLER stm32_tim1cc, STM32_IRQ_TIM1CC /* Vector 16+27: TIM1 Capture Compare interrupt */ + HANDLER stm32_tim2, STM32_IRQ_TIM2 /* Vector 16+28: TIM2 global interrupt */ + HANDLER stm32_tim3, STM32_IRQ_TIM3 /* Vector 16+29: TIM3 global interrupt */ + HANDLER stm32_tim4, STM32_IRQ_TIM4 /* Vector 16+30: TIM4 global interrupt */ + HANDLER stm32_i2c1ev, STM32_IRQ_I2C1EV /* Vector 16+31: I2C1 event interrupt */ + HANDLER stm32_i2c1er, STM32_IRQ_I2C1ER /* Vector 16+32: I2C1 error interrupt */ + HANDLER stm32_i2c2ev, STM32_IRQ_I2C2EV /* Vector 16+33: I2C2 event interrupt */ + HANDLER stm32_i2c2er, STM32_IRQ_I2C2ER /* Vector 16+34: I2C2 error interrupt */ + HANDLER stm32_spi1, STM32_IRQ_SPI1 /* Vector 16+35: SPI1 global interrupt */ + HANDLER stm32_spi2, STM32_IRQ_SPI2 /* Vector 16+36: SPI2 global interrupt */ + HANDLER stm32_usart1, STM32_IRQ_USART1 /* Vector 16+37: USART1 global interrupt */ + HANDLER stm32_usart2, STM32_IRQ_USART2 /* Vector 16+38: USART2 global interrupt */ + HANDLER stm32_usart3, STM32_IRQ_USART3 /* Vector 16+39: USART3 global interrupt */ + HANDLER stm32_exti1510, STM32_IRQ_EXTI1510 /* Vector 16+40: EXTI Line[15:10] interrupts */ + HANDLER stm32_rtcalr, STM32_IRQ_RTCALRM /* Vector 16+41: RTC alarm through EXTI line interrupt */ + HANDLER stm32_usbwkup, STM32_IRQ_USBWKUP /* Vector 16+42: USB wakeup from suspend through EXTI line interrupt*/ + HANDLER stm32_tim8brk, STM32_IRQ_TIM8BRK /* Vector 16+43: TIM8 Break interrupt */ + HANDLER stm32_tim8up, STM32_IRQ_TIM8UP /* Vector 16+44: TIM8 Update interrupt */ + HANDLER stm32_tim8trgcom, STM32_IRQ_TIM8TRGCOM /* Vector 16+45: TIM8 Trigger and Commutation interrupts */ + HANDLER stm32_tim8cc, STM32_IRQ_TIM8CC /* Vector 16+46: TIM8 Capture Compare interrupt */ + HANDLER stm32_adc3, STM32_IRQ_ADC3 /* Vector 16+47: ADC3 global interrupt */ + HANDLER stm32_fsmc, STM32_IRQ_FSMC /* Vector 16+48: FSMC global interrupt */ + HANDLER stm32_sdio, STM32_IRQ_SDIO /* Vector 16+49: SDIO global interrupt */ + HANDLER stm32_tim5, STM32_IRQ_TIM5 /* Vector 16+50: TIM5 global interrupt */ + HANDLER stm32_spi3, STM32_IRQ_SPI3 /* Vector 16+51: SPI3 global interrupt */ + HANDLER stm32_uart4, STM32_IRQ_UART4 /* Vector 16+52: UART4 global interrupt */ + HANDLER stm32_uart5, STM32_IRQ_UART5 /* Vector 16+53: UART5 global interrupt */ + HANDLER stm32_tim6, STM32_IRQ_TIM6 /* Vector 16+54: TIM6 global interrupt */ + HANDLER stm32_tim7, STM32_IRQ_TIM7 /* Vector 16+55: TIM7 global interrupt */ + HANDLER stm32_dma2ch1, STM32_IRQ_DMA2CH1 /* Vector 16+56: DMA2 Channel 1 global interrupt */ + HANDLER stm32_dma2ch2, STM32_IRQ_DMA2CH2 /* Vector 16+57: DMA2 Channel 2 global interrupt */ + HANDLER stm32_dma2ch3, STM32_IRQ_DMA2CH3 /* Vector 16+58: DMA2 Channel 3 global interrupt */ + HANDLER stm32_dma2ch45, STM32_IRQ_DMA2CH45 /* Vector 16+59: DMA2 Channel 4&5 global interrupt */ + +# endif /* CONFIG_STM32_CONNECTIVITYLINE */ + #elif defined(CONFIG_STM32_STM32F20XX) + HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */ HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */ HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper and time stamp interrupts */ @@ -387,6 +775,7 @@ handlers: HANDLER stm32_dcmi, STM32_IRQ_DCMI /* Vector 16+78: DCMI global interrupt */ HANDLER stm32_cryp, STM32_IRQ_CRYP /* Vector 16+79: CRYP crypto global interrupt */ HANDLER stm32_hash, STM32_IRQ_HASH /* Vector 16+80: Hash and Rng global interrupt */ + #elif defined(CONFIG_STM32_STM32F30XX) # include "chip/stm32f30xxx_vectors.h" #elif defined(CONFIG_STM32_STM32F37XX) From 7021b143ce42784823e0f45ca285d48fdb161cd9 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 24 Aug 2016 10:16:41 -0600 Subject: [PATCH 119/214] Add POSIX type sig_atomic_t --- include/signal.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/signal.h b/include/signal.h index bd8ee9f3176..576691a168d 100644 --- a/include/signal.h +++ b/include/signal.h @@ -194,6 +194,12 @@ typedef uint32_t sigset_t; /* Bit set of 32 signals */ #define __SIGSET_T_DEFINED 1 +/* Possibly volatile-qualified integer type of an object that can be accessed + * as an atomic entity, even in the presence of asynchronous interrupts. + */ + +typedef volatile int sig_atomic_t; + /* This defines the type of the siginfo si_value field */ union sigval From c8c45751398203b72adcf1542d083ef9fa744d23 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 24 Aug 2016 10:25:09 -0600 Subject: [PATCH 120/214] isatty() should be prototypes in unstid.h, not termios.h. --- include/termios.h | 3 --- include/unistd.h | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/include/termios.h b/include/termios.h index 14cb8f656d8..00ff32e5c66 100644 --- a/include/termios.h +++ b/include/termios.h @@ -298,9 +298,6 @@ int tcsendbreak(int fd, int duration); int tcsetattr(int fd, int options, FAR const struct termios *termiosp); -/* Check if a file descriptor corresponds to a terminal I/O file */ - -int isatty(int fd); #undef EXTERN #ifdef __cplusplus diff --git a/include/unistd.h b/include/unistd.h index 909df0b3383..7361b412eae 100644 --- a/include/unistd.h +++ b/include/unistd.h @@ -165,6 +165,10 @@ ssize_t write(int fd, FAR const void *buf, size_t nbytes); ssize_t pread(int fd, FAR void *buf, size_t nbytes, off_t offset); ssize_t pwrite(int fd, FAR const void *buf, size_t nbytes, off_t offset); +/* Check if a file descriptor corresponds to a terminal I/O file */ + +int isatty(int fd); + /* Memory management */ #if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_MM_PGALLOC) && \ From 4ebace37a902895cdd4e00991c5365608ccecb3a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 24 Aug 2016 10:34:56 -0600 Subject: [PATCH 121/214] Fix typos in LPC43 serial driver. Found by Vytautas Lukenskas --- arch/arm/src/lpc43xx/lpc43_serial.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/src/lpc43xx/lpc43_serial.c b/arch/arm/src/lpc43xx/lpc43_serial.c index 56e03bbea03..82ec6d690ef 100644 --- a/arch/arm/src/lpc43xx/lpc43_serial.c +++ b/arch/arm/src/lpc43xx/lpc43_serial.c @@ -170,7 +170,7 @@ static struct up_dev_s g_uart0priv = .bits = CONFIG_USART0_BITS, .stopbits2 = CONFIG_USART0_2STOP, #if defined(CONFIG_USART0_RS485MODE) && defined(CONFIG_USART0_RS485_DTRDIR) - .dtrdir = true; + .dtrdir = true, #endif }; @@ -205,7 +205,7 @@ static struct up_dev_s g_uart1priv = .bits = CONFIG_UART1_BITS, .stopbits2 = CONFIG_UART1_2STOP, #if defined(CONFIG_UART1_RS485MODE) && defined(CONFIG_UART1_RS485_DTRDIR) - .dtrdir = true; + .dtrdir = true, #endif }; @@ -240,7 +240,7 @@ static struct up_dev_s g_uart2priv = .bits = CONFIG_USART2_BITS, .stopbits2 = CONFIG_USART2_2STOP, #if defined(CONFIG_USART2_RS485MODE) && defined(CONFIG_USART2_RS485_DTRDIR) - .dtrdir = true; + .dtrdir = true, #endif }; @@ -275,7 +275,7 @@ static struct up_dev_s g_uart3priv = .bits = CONFIG_USART3_BITS, .stopbits2 = CONFIG_USART3_2STOP, #if defined(CONFIG_USART3_RS485MODE) && defined(CONFIG_USART3_RS485_DTRDIR) - .dtrdir = true; + .dtrdir = true, #endif }; From 909486da4736637fcd6ab41d264662b6b96e49f2 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 24 Aug 2016 13:07:40 -0600 Subject: [PATCH 122/214] Update to NuttX C coding style document with additions discussing long comments on the right side of a statement or data definition. --- Documentation/NuttXCCodingStandard.html | 40 ++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 4 deletions(-) diff --git a/Documentation/NuttXCCodingStandard.html b/Documentation/NuttXCCodingStandard.html index e3b3103297a..5403d6c3216 100644 --- a/Documentation/NuttXCCodingStandard.html +++ b/Documentation/NuttXCCodingStandard.html @@ -12,7 +12,7 @@

NuttX C Coding Standard

-

Last Updated: July 28, 2015

+

Last Updated: August 24, 2016

@@ -498,8 +498,8 @@

Comments to the Right of Statements. - Comments to the right of statements in C source files are discouraged - If such comments are used, they should at least be aligned so that the comment begins in the same comment on each line. + Comments to the right of statements in C source files are discouraged. + If such comments are used, they should be (1) very short so that they do not exceed the line width (typically 78 characters), (2) fit on one line, and (3) be aligned so that the comment begins in the same comment on each line.

@@ -538,7 +538,7 @@

Comments to the Right of Data Definitions. - Comments to the right of a declaration with an enumeration or structure, on the other hand, are encourage. + Comments to the right of a declaration with an enumeration or structure, on the other hand, are encouraged, provided that the comments are short and do not exceed the maximum line width (usually 78 characters). Columnar alignment of comments is very desireable (but often cannot be achieved without violating the line width).

@@ -586,6 +586,38 @@ struct animals_s
+

+ Long Comments on the Right. + Long comments on the right of statements or data definitions must be short and fit on the same line without exceeding the maximum line length. + If a longer comment is needed, then it should appear about the statement of definition rather than to the right of the definition. +

+
+ + + +
+

Incorrect

+
    +  dog = cat; /* This assignment will convert what was at one time a lowly dog into a ferocious feline. */
+
 +
+

Acceptable

+
    +  dog = cat;       /* This assignment will convert what was at one time a
+                    * lowly dog into a ferocious feline. */
+
 +
+

Preferred

+
    +  /* This assignment will convert what was at one time a lowly dog into a ferocious feline. */
+
+  dog = cat;
+
 +
+

+ Note that if the comment is continued on multiple lines, the comment alignment and multi-line comment rules still apply with one exception: The closing */ appears on the same line as the final text of the comment. This exception to the rule is enforced to keep the statements and definitions from becoming to spread out. +

+

Block comments. Block comments are only used to delimit groupings with the overall file organization and should not be used unless the usage is consistent with delimiting logical groupings in the program. From 4c045d3fcd87cc0e3a36f8c2225d935e121c7859 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 24 Aug 2016 13:17:57 -0600 Subject: [PATCH 123/214] Fix an error in the 'Prefferred' example --- Documentation/NuttXCCodingStandard.html | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/NuttXCCodingStandard.html b/Documentation/NuttXCCodingStandard.html index 5403d6c3216..d675c854616 100644 --- a/Documentation/NuttXCCodingStandard.html +++ b/Documentation/NuttXCCodingStandard.html @@ -608,7 +608,9 @@ struct animals_s

Preferred

    -  /* This assignment will convert what was at one time a lowly dog into a ferocious feline. */
+  /* This assignment will convert what was at one time a lowly dog into a
+   * ferocious feline.
+   */
 
   dog = cat;
From 4f22af9547e0d70748be106008ff0bdeb250f8a3 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 24 Aug 2016 13:20:46 -0600 Subject: [PATCH 124/214] Grrr.. fix another typo. --- Documentation/NuttXCCodingStandard.html | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/NuttXCCodingStandard.html b/Documentation/NuttXCCodingStandard.html index d675c854616..7505acfd136 100644 --- a/Documentation/NuttXCCodingStandard.html +++ b/Documentation/NuttXCCodingStandard.html @@ -588,8 +588,8 @@ struct animals_s

Long Comments on the Right. - Long comments on the right of statements or data definitions must be short and fit on the same line without exceeding the maximum line length. - If a longer comment is needed, then it should appear about the statement of definition rather than to the right of the definition. + Comments on the right of statements or data definitions must be short and fit on the same line without exceeding the maximum line length. + If a longer comment is needed, then it should appear above the statement of definition rather than to the right of the definition.

From a626ba5b708f942a97daaef72305ad403f96229c Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 24 Aug 2016 15:43:57 -0600 Subject: [PATCH 125/214] libc/time: This commit adds the difftime() function. Since the function returns a double, I have isolated it in a CONFIG_LIBC_DIFFTIME option (It also depends on the toolchain-dependent CONFIG_HAVE_DOUBLE so is not available on tiny platforms). --- include/time.h | 4 +++ libc/Kconfig | 7 +++++ libc/time/Make.defs | 4 +++ libc/time/lib_difftime.c | 65 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 80 insertions(+) create mode 100644 libc/time/lib_difftime.c diff --git a/include/time.h b/include/time.h index 0fd4b7611bc..649e4f9f394 100644 --- a/include/time.h +++ b/include/time.h @@ -214,6 +214,10 @@ FAR char *ctime_r(FAR const time_t *timep, FAR char *buf); time_t time(FAR time_t *timep); +#if defined(CONFIG_LIBC_DIFFTIME) +double difftime(time_t time1, time_t time0); +#endif + int timer_create(clockid_t clockid, FAR struct sigevent *evp, FAR timer_t *timerid); int timer_delete(timer_t timerid); diff --git a/libc/Kconfig b/libc/Kconfig index 4a2fa5ed49e..8cbe5c7f7a1 100644 --- a/libc/Kconfig +++ b/libc/Kconfig @@ -350,6 +350,13 @@ config TIME_EXTENDED Note: tm_isdst is always 0 +config LIBC_DIFFTIME + bool "Add support for difftime()" + default "n" + ---help--- + Add POSIX support for computing the difference between two time_t + values. + config LIB_SENDFILE_BUFSIZE int "sendfile() buffer size" default 512 diff --git a/libc/time/Make.defs b/libc/time/Make.defs index f5799c7dd21..0aeda13eefe 100644 --- a/libc/time/Make.defs +++ b/libc/time/Make.defs @@ -49,6 +49,10 @@ CSRCS += lib_ctimer.c endif endif +ifdef CONFIG_LIBC_DIFFTIME +CSRCS += lib_difftime.c +endif + # Add the time directory to the build DEPPATH += --dep-path time diff --git a/libc/time/lib_difftime.c b/libc/time/lib_difftime.c new file mode 100644 index 00000000000..3487d118cd5 --- /dev/null +++ b/libc/time/lib_difftime.c @@ -0,0 +1,65 @@ +/**************************************************************************** + * libc/time/lib_difftime.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Sebastien Lorquet + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#ifdef CONFIG_HAVE_DOUBLE + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Function: difftime + * + * Description: + * The difftime() function returns the number of seconds elapsed + * between time time1 and time time0, represented as a double. + * + ****************************************************************************/ + +double difftime(time_t time1, time_t time0) +{ + return (double)time1 - (double)time0; +} + +#endif /* CONFIG_HAVE_DOUBLE */ From c51b642f813e6a38c8e1f80091d3c09950537155 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 25 Aug 2016 07:15:59 -0600 Subject: [PATCH 126/214] Fix some driver return values. If sem_wait fails, the errcode is in errno, not the return value. --- drivers/sensors/bmg160.c | 5 +++-- drivers/sensors/lis3dsh.c | 5 +++-- drivers/sensors/lis3mdl.c | 5 +++-- drivers/sensors/mlx90393.c | 5 +++-- 4 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/sensors/bmg160.c b/drivers/sensors/bmg160.c index b27fbd87779..03ad72a5d04 100644 --- a/drivers/sensors/bmg160.c +++ b/drivers/sensors/bmg160.c @@ -455,8 +455,9 @@ static ssize_t bmg160_read(FAR struct file *filep, FAR char *buffer, ret = sem_wait(&priv->datasem); if (ret < 0) { - snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); - return ret; + int errcode = errno; + snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode); + return -errcode; } /* Copy the sensor data into the buffer */ diff --git a/drivers/sensors/lis3dsh.c b/drivers/sensors/lis3dsh.c index a9aa3aa9db9..243f89874dc 100644 --- a/drivers/sensors/lis3dsh.c +++ b/drivers/sensors/lis3dsh.c @@ -451,8 +451,9 @@ static ssize_t lis3dsh_read(FAR struct file *filep, FAR char *buffer, ret = sem_wait(&priv->datasem); if (ret < 0) { - snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); - return ret; + int errcode = errno; + snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode); + return -errcode; } /* Copy the sensor data into the buffer */ diff --git a/drivers/sensors/lis3mdl.c b/drivers/sensors/lis3mdl.c index bec3f14cd29..cdb04e776e7 100644 --- a/drivers/sensors/lis3mdl.c +++ b/drivers/sensors/lis3mdl.c @@ -494,8 +494,9 @@ static ssize_t lis3mdl_read(FAR struct file *filep, FAR char *buffer, ret = sem_wait(&priv->datasem); if (ret < 0) { - snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); - return ret; + int errcode = errno; + snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode); + return -errcode; } /* Copy the sensor data into the buffer */ diff --git a/drivers/sensors/mlx90393.c b/drivers/sensors/mlx90393.c index 1eb9aac6414..93a53ef871c 100644 --- a/drivers/sensors/mlx90393.c +++ b/drivers/sensors/mlx90393.c @@ -486,8 +486,9 @@ static ssize_t mlx90393_read(FAR struct file *filep, FAR char *buffer, ret = sem_wait(&priv->datasem); if (ret < 0) { - snerr("ERROR: Could not aquire priv->datasem: %d\n", ret); - return ret; + int errcode = errno; + snerr("ERROR: Could not aquire priv->datasem: %d\n", errcode); + return -errcode; } data = (FAR struct mlx90393_sensor_data_s *)buffer; From 51596dc4579f2257e744828408f41462432b4aa3 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Thu, 25 Aug 2016 08:00:50 -0600 Subject: [PATCH 127/214] Updata difftime. Add a version of difftime for the case where the platform does not support type double --- include/time.h | 6 +++++- libc/time/Make.defs | 5 +---- libc/time/lib_difftime.c | 29 +++++++++++++++++++++++++---- 3 files changed, 31 insertions(+), 9 deletions(-) diff --git a/include/time.h b/include/time.h index 649e4f9f394..f5243570137 100644 --- a/include/time.h +++ b/include/time.h @@ -41,6 +41,7 @@ ********************************************************************************/ #include +#include #include #include @@ -103,6 +104,7 @@ /******************************************************************************** * Public Types ********************************************************************************/ + /* Scalar types */ typedef uint32_t time_t; /* Holds time in seconds */ @@ -214,8 +216,10 @@ FAR char *ctime_r(FAR const time_t *timep, FAR char *buf); time_t time(FAR time_t *timep); -#if defined(CONFIG_LIBC_DIFFTIME) +#ifdef CONFIG_HAVE_DOUBLE double difftime(time_t time1, time_t time0); +#else +float difftime(time_t time1, time_t time0); #endif int timer_create(clockid_t clockid, FAR struct sigevent *evp, diff --git a/libc/time/Make.defs b/libc/time/Make.defs index 0aeda13eefe..68e62436871 100644 --- a/libc/time/Make.defs +++ b/libc/time/Make.defs @@ -37,6 +37,7 @@ CSRCS += lib_strftime.c lib_calendar2utc.c lib_daysbeforemonth.c CSRCS += lib_gettimeofday.c lib_isleapyear.c lib_settimeofday.c lib_time.c +CSRCS += lib_difftime.c ifdef CONFIG_LIBC_LOCALTIME CSRCS += lib_localtime.c lib_asctime.c lib_asctimer.c lib_ctime.c @@ -49,10 +50,6 @@ CSRCS += lib_ctimer.c endif endif -ifdef CONFIG_LIBC_DIFFTIME -CSRCS += lib_difftime.c -endif - # Add the time directory to the build DEPPATH += --dep-path time diff --git a/libc/time/lib_difftime.c b/libc/time/lib_difftime.c index 3487d118cd5..ee9a62ebb20 100644 --- a/libc/time/lib_difftime.c +++ b/libc/time/lib_difftime.c @@ -40,10 +40,9 @@ #include #include +#include #include -#ifdef CONFIG_HAVE_DOUBLE - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -53,13 +52,35 @@ * * Description: * The difftime() function returns the number of seconds elapsed - * between time time1 and time time0, represented as a double. + * between time time1 and time time0, represented as a double or a float. + * Float is used if the platform does not support double. However, when + * using a float, some precision may be lost for big differences. * ****************************************************************************/ +#ifdef CONFIG_HAVE_DOUBLE double difftime(time_t time1, time_t time0) { return (double)time1 - (double)time0; } +#else +float difftime(time_t time1, time_t time0) +{ + if (time1 >= time2) + { + /* Result will be positive (even though bit 31 may be set on very large + * differences!) + */ -#endif /* CONFIG_HAVE_DOUBLE */ + return (float)((uint32_t)(time1 - time0)) + } + else + { + /* Result will be negative. REVISIT: Am I missing any case where bit 31 + * might not be set? + */ + + return (float)((int32_t)(time1 - time0)) + } +} +#endif From 6a58f046e6c83aabdc3bbfac05f6cbcdf47db5db Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 25 Aug 2016 08:09:23 -0600 Subject: [PATCH 128/214] CONFIG_LIBC_DIFFTIME is no longer used, but was still in Kconfig file. Noted by Sebastien Lorquet --- libc/Kconfig | 7 ------- 1 file changed, 7 deletions(-) diff --git a/libc/Kconfig b/libc/Kconfig index 8cbe5c7f7a1..4a2fa5ed49e 100644 --- a/libc/Kconfig +++ b/libc/Kconfig @@ -350,13 +350,6 @@ config TIME_EXTENDED Note: tm_isdst is always 0 -config LIBC_DIFFTIME - bool "Add support for difftime()" - default "n" - ---help--- - Add POSIX support for computing the difference between two time_t - values. - config LIB_SENDFILE_BUFSIZE int "sendfile() buffer size" default 512 From aed8a602b83f01e4356817307829904b764b2fd8 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Thu, 25 Aug 2016 08:40:34 -0600 Subject: [PATCH 129/214] stdio: Add support for remove() --- include/stdio.h | 1 + libc/stdio/Make.defs | 1 + libc/stdio/lib_remove.c | 89 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 libc/stdio/lib_remove.c diff --git a/include/stdio.h b/include/stdio.h index 20994e22ffd..d2ab907c0ca 100644 --- a/include/stdio.h +++ b/include/stdio.h @@ -194,6 +194,7 @@ int vdprintf(int fd, FAR const IPTR char *fmt, va_list ap); FAR char *tmpnam(FAR char *s); FAR char *tempnam(FAR const char *dir, FAR const char *pfx); +int remove(FAR const char *path); #undef EXTERN #if defined(__cplusplus) diff --git a/libc/stdio/Make.defs b/libc/stdio/Make.defs index 595a222b277..f308266d656 100644 --- a/libc/stdio/Make.defs +++ b/libc/stdio/Make.defs @@ -51,6 +51,7 @@ ifneq ($(CONFIG_NFILE_DESCRIPTORS),0) CSRCS += lib_rawinstream.c lib_rawoutstream.c lib_rawsistream.c CSRCS += lib_rawsostream.c +CSRCS += lib_remove.c # And these depend upon both file descriptors and C streams diff --git a/libc/stdio/lib_remove.c b/libc/stdio/lib_remove.c new file mode 100644 index 00000000000..3c2c8e6d3f0 --- /dev/null +++ b/libc/stdio/lib_remove.c @@ -0,0 +1,89 @@ +/**************************************************************************** + * libc/stdio/lib_remove.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Sebastien Lorquet + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: remove + * + * Description: + * The remove() function causes the object denoted by path to be removed. + * The function is equivalent to unlink() or rmdir(). + * + * Input Parmeters: + * path - A pointer to a file or directory to be removed. + * + * Returned Value: + * 0(OK) on success; -1(ERROR) on failure with errno set appropriately: + * + * For returned errno values, see unlink or rmdir. + * + ****************************************************************************/ + +int remove(FAR const char *path) +{ + struct stat buf; + int ret; + + /* Check the kind of object pointed by path */ + + ret = stat(path, &buf); + if (ret != 0) + { + return ret; + } + + /* Act according to the kind of object */ + + if (S_ISDIR(buf.st_mode)) + { + return rmdir(path); + } + else + { + return unlink(path); + } +} From 87f4a8033a4474fd2c7b57d174b67c7d63301111 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Thu, 25 Aug 2016 06:31:51 -1000 Subject: [PATCH 130/214] BugFix:Lost first word from FIFO 1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)* 2) Acknowledge all pending int on entry to ISR that are Only rc_w1* 3) Do not disable RXFVL* 4) Loop until RXFVL is cleared* 5) Only clear the NAK on the endpoint on the OTGFS_GRXSTSD_PKTSTS_SETUPDONE to not loose the first WORD of FIFO all the data (Bug Fix) Changed marked *are just driver clean up and ensure ints are not lost. The bug fix is #5 Test case open putty and observer the Set/Get LineCoding Without this fix #5 the Get will not match the Set, and infact the data might be skewed by 4 bytes, that are lost from the FIFO if the OTGFS_DOEPCTL0_CNAK bit is set in the OTGFS_GRXSTSD_PKTSTS_SETUPRECVD as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08 c8 .. 00 00 07 | 7a 72 --- arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h | 71 ++-- arch/arm/src/stm32/stm32_otgfsdev.c | 341 +++++++++++--------- 2 files changed, 218 insertions(+), 194 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h b/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h index b0f431ab06f..8658aec0a89 100644 --- a/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h +++ b/arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h @@ -1,10 +1,11 @@ /**************************************************************************************************** * arch/arm/src/stm32/chip/stm32fxxxxx_otgfs.h * - * Copyright (C) 2012, 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved. * Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved. - * Author: Gregory Nutt - * Paul Alexander Patience + * Authors: Gregory Nutt + * Paul Alexander Patience + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -470,44 +471,38 @@ /* Core interrupt and Interrupt mask registers */ -#define OTGFS_GINTSTS_CMOD (1 << 0) /* Bit 0: Current mode of operation */ +#define OTGFS_GINTSTS_CMOD (1 << 0) /* Bit 0: ro Current mode of operation */ # define OTGFS_GINTSTS_DEVMODE (0) # define OTGFS_GINTSTS_HOSTMODE (OTGFS_GINTSTS_CMOD) -#define OTGFS_GINT_MMIS (1 << 1) /* Bit 1: Mode mismatch interrupt */ -#define OTGFS_GINT_OTG (1 << 2) /* Bit 2: OTG interrupt */ -#define OTGFS_GINT_SOF (1 << 3) /* Bit 3: Start of frame */ -#define OTGFS_GINT_RXFLVL (1 << 4) /* Bit 4: RxFIFO non-empty */ -#define OTGFS_GINT_NPTXFE (1 << 5) /* Bit 5: Non-periodic TxFIFO empty */ -#define OTGFS_GINT_GINAKEFF (1 << 6) /* Bit 6: Global IN non-periodic NAK effective */ +#define OTGFS_GINT_MMIS (1 << 1) /* Bit 1: rc_w1 Mode mismatch interrupt */ +#define OTGFS_GINT_OTG (1 << 2) /* Bit 2: ro OTG interrupt */ +#define OTGFS_GINT_SOF (1 << 3) /* Bit 3: rc_w1 Start of frame */ +#define OTGFS_GINT_RXFLVL (1 << 4) /* Bit 4: ro RxFIFO non-empty */ +#define OTGFS_GINT_NPTXFE (1 << 5) /* Bit 5: ro Non-periodic TxFIFO empty */ +#define OTGFS_GINT_GINAKEFF (1 << 6) /* Bit 6: ro Global IN non-periodic NAK effective */ #define OTGFS_GINT_GONAKEFF (1 << 7) /* Bit 7: Global OUT NAK effective */ - /* Bits 8-9: Reserved, must be kept at reset value */ -#define OTGFS_GINT_ESUSP (1 << 10) /* Bit 10: Early suspend */ -#define OTGFS_GINT_USBSUSP (1 << 11) /* Bit 11: USB suspend */ -#define OTGFS_GINT_USBRST (1 << 12) /* Bit 12: USB reset */ -#define OTGFS_GINT_ENUMDNE (1 << 13) /* Bit 13: Enumeration done */ -#define OTGFS_GINT_ISOODRP (1 << 14) /* Bit 14: Isochronous OUT packet dropped interrupt */ -#define OTGFS_GINT_EOPF (1 << 15) /* Bit 15: End of periodic frame interrupt */ - /* Bits 16 Reserved, must be kept at reset value */ -#define OTGFS_GINTMSK_EPMISM (1 << 17) /* Bit 17: Endpoint mismatch interrupt mask */ -#define OTGFS_GINT_IEP (1 << 18) /* Bit 18: IN endpoint interrupt */ -#define OTGFS_GINT_OEP (1 << 19) /* Bit 19: OUT endpoint interrupt */ -#define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */ -#define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */ -#define OTGFS_GINT_IPXFR (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */ - /* Bit 22: Reserved, must be kept at reset value */ -#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) -# define OTGFS_GINT_RSTDET (1 << 23) /* Bit 23: Reset detected interrupt */ -#endif -#define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: Host port interrupt */ -#define OTGFS_GINT_HC (1 << 25) /* Bit 25: Host channels interrupt */ -#define OTGFS_GINT_PTXFE (1 << 26) /* Bit 26: Periodic TxFIFO empty */ -#if defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) -# define OTGFS_GINT_LPMINT (1 << 27) /* Bit 27: LPM interrupt */ -#endif -#define OTGFS_GINT_CIDSCHG (1 << 28) /* Bit 28: Connector ID status change */ -#define OTGFS_GINT_DISC (1 << 29) /* Bit 29: Disconnect detected interrupt */ -#define OTGFS_GINT_SRQ (1 << 30) /* Bit 30: Session request/new session detected interrupt */ -#define OTGFS_GINT_WKUP (1 << 31) /* Bit 31: Resume/remote wakeup detected interrupt */ +#define OTGFS_GINT_RES89 (3 << 8) /* Bits 8-9: Reserved, must be kept at reset value */ +#define OTGFS_GINT_ESUSP (1 << 10) /* Bit 10: rc_w1 Early suspend */ +#define OTGFS_GINT_USBSUSP (1 << 11) /* Bit 11: rc_w1 USB suspend */ +#define OTGFS_GINT_USBRST (1 << 12) /* Bit 12: rc_w1 USB reset */ +#define OTGFS_GINT_ENUMDNE (1 << 13) /* Bit 13: rc_w1 Enumeration done */ +#define OTGFS_GINT_ISOODRP (1 << 14) /* Bit 14: rc_w1 Isochronous OUT packet dropped interrupt */ +#define OTGFS_GINT_EOPF (1 << 15) /* Bit 15: rc_w1 End of periodic frame interrupt */ +#define OTGFS_GINT_RES16 (1 << 16) /* Bits 16 Reserved, must be kept at reset value */ +#define OTGFS_GINTMSK_EPMISM (1 << 17) /* Bit 17: Reserved in GINT rw Endpoint mismatch interrupt mask */ +#define OTGFS_GINT_IEP (1 << 18) /* Bit 18: ro IN endpoint interrupt */ +#define OTGFS_GINT_OEP (1 << 19) /* Bit 19: ro OUT endpoint interrupt */ +#define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: rc_w1Incomplete isochronous IN transfer */ +#define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: rc_w1 Incomplete isochronous OUT transfer */ +#define OTGFS_GINT_RES2223 (3 << 22) /* Bits 22-23: Reserved, must be kept at reset value */ +#define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: ro Host port interrupt */ +#define OTGFS_GINT_HC (1 << 25) /* Bit 25: ro Host channels interrupt */ +#define OTGFS_GINT_PTXFE (1 << 26) /* Bit 26: ro Periodic TxFIFO empty */ +#define OTGFS_GINT_RES27 (1 << 27) /* Bit 27 Reserved, must be kept at reset value */ +#define OTGFS_GINT_CIDSCHG (1 << 28) /* Bit 28: rc_w1 Connector ID status change */ +#define OTGFS_GINT_DISC (1 << 29) /* Bit 29: rc_w1 Disconnect detected interrupt */ +#define OTGFS_GINT_SRQ (1 << 30) /* Bit 30: rc_w1 Session request/new session detected interrupt */ +#define OTGFS_GINT_WKUP (1 << 31) /* Bit 31: rc_w1 Resume/remote wakeup detected interrupt */ /* Receive status debug read/OTG status read and pop registers (host mode) */ diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index 231d091a0cc..ee536bf0ff6 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -1,8 +1,9 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_otgfsdev.c * - * Copyright (C) 2012-2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2012-2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -111,7 +112,8 @@ # define CONFIG_USBDEV_EP3_TXFIFO_SIZE 192 #endif -#if (CONFIG_USBDEV_RXFIFO_SIZE + CONFIG_USBDEV_EP0_TXFIFO_SIZE + \ +#if (CONFIG_USBDEV_RXFIFO_SIZE + \ + CONFIG_USBDEV_EP0_TXFIFO_SIZE + CONFIG_USBDEV_EP1_TXFIFO_SIZE + \ CONFIG_USBDEV_EP2_TXFIFO_SIZE + CONFIG_USBDEV_EP3_TXFIFO_SIZE) > 1280 # error "FIFO allocations exceed FIFO memory size" #endif @@ -151,6 +153,27 @@ # error "CONFIG_USBDEV_EP3_TXFIFO_SIZE is out of range" #endif +#define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \ + (OTGFS_GINT_RES16 | OTGFS_GINTMSK_EPMISM) \ + |OTGFS_GINT_RES2223 | \ + OTGFS_GINT_RES27) + +#define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS | \ + OTGFS_GINT_SOF | \ + OTGFS_GINT_ESUSP | \ + OTGFS_GINT_USBSUSP | \ + OTGFS_GINT_USBRST | \ + OTGFS_GINT_ENUMDNE | \ + OTGFS_GINT_ISOODRP | \ + OTGFS_GINT_EOPF | \ + OTGFS_GINT_IISOIXFR | \ + OTGFS_GINT_IISOOXFR | \ + OTGFS_GINT_CIDSCHG | \ + OTGFS_GINT_DISC | \ + OTGFS_GINT_SRQ | \ + OTGFS_GINT_SOF | \ + OTGFS_GINT_WKUP) + /* Debug ***********************************************************************/ /* Trace error codes */ @@ -3119,154 +3142,163 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) /* Disable the Rx status queue level interrupt */ - regval = stm32_getreg(STM32_OTGFS_GINTMSK); - regval &= ~OTGFS_GINT_RXFLVL; - stm32_putreg(regval, STM32_OTGFS_GINTMSK); - - /* Get the status from the top of the FIFO */ - - regval = stm32_getreg(STM32_OTGFS_GRXSTSP); - - /* Decode status fields */ - - epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT; - - if (epphy < STM32_NENDPOINTS) + while(0 != (stm32_getreg(STM32_OTGFS_GINTSTS) & OTGFS_GINT_RXFLVL)) { - privep = &priv->epout[epphy]; - /* Handle the RX event according to the packet status field */ + /* Get the status from the top of the FIFO */ - switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK) - { - /* Global OUT NAK. This indicate that the global OUT NAK bit has taken - * effect. - * - * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't - * Care. + regval = stm32_getreg(STM32_OTGFS_GRXSTSP); + + /* Decode status fields */ + + epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT; + + /* Workaround for bad values read from the STM32_OTGFS_GRXSTSP register + * happens regval is 0xb4e48168 or 0xa80c9367 or 267E781c + * All of which provide out of range indexes for epout[epphy] */ - case OTGFS_GRXSTSD_PKTSTS_OUTNAK: - { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTNAK), 0); - } - break; + if (epphy < STM32_NENDPOINTS) + { + privep = &priv->epout[epphy]; - /* OUT data packet received. - * - * PKTSTS = DataOUT, BCNT = size of the received data OUT packet, - * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID. - */ + /* Handle the RX event according to the packet status field */ - case OTGFS_GRXSTSD_PKTSTS_OUTRECVD: + switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTRECVD), epphy); - bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT; - if (bcnt > 0) - { - stm32_epout_receive(privep, bcnt); + /* Global OUT NAK. This indicate that the global OUT NAK bit has taken + * effect. + * + * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't + * Care. + */ + + case OTGFS_GRXSTSD_PKTSTS_OUTNAK: + { + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTNAK), 0); + } + break; + + /* OUT data packet received. + * + * PKTSTS = DataOUT, BCNT = size of the received data OUT packet, + * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID. + */ + + case OTGFS_GRXSTSD_PKTSTS_OUTRECVD: + { + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTRECVD), epphy); + bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT; + if (bcnt > 0) + { + stm32_epout_receive(privep, bcnt); + } + } + break; + + /* OUT transfer completed. This indicates that an OUT data transfer for + * the specified OUT endpoint has completed. After this entry is popped + * from the receive FIFO, the core asserts a Transfer Completed interrupt + * on the specified OUT endpoint. + * + * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on + * which the data transfer is complete, DPID = Don't Care. + */ + + case OTGFS_GRXSTSD_PKTSTS_OUTDONE: + { + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTDONE), epphy); + } + break; + + /* SETUP transaction completed. This indicates that the Setup stage for + * the specified endpoint has completed and the Data stage has started. + * After this entry is popped from the receive FIFO, the core asserts a + * Setup interrupt on the specified control OUT endpoint (triggers an + * interrupt). + * + * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num, + * DPID = Don't Care. + */ + + case OTGFS_GRXSTSD_PKTSTS_SETUPDONE: + { + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy); + + /* Now that the Setup Phase is complete if it was an OUT enable + * the endpoint + * (Doing this here prevents the loss of the first FIFO word) + */ + + if (priv->ep0state == EP0STATE_SETUP_OUT) + { + + /* Clear NAKSTS so that we can receive the data */ + + regval = stm32_getreg(STM32_OTGFS_DOEPCTL0); + regval |= OTGFS_DOEPCTL0_CNAK; + stm32_putreg(regval, STM32_OTGFS_DOEPCTL0); + } + } + break; + + /* SETUP data packet received. This indicates that a SETUP packet for the + * specified endpoint is now available for reading from the receive FIFO. + * + * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0. + */ + + case OTGFS_GRXSTSD_PKTSTS_SETUPRECVD: + { + uint16_t datlen; + + usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), epphy); + + /* Read EP0 setup data. NOTE: If multiple SETUP packets are received, + * the last one overwrites the previous setup packets and only that + * last SETUP packet will be processed. + */ + + stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, + USB_SIZEOF_CTRLREQ); + + /* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP, + * then we need to wait for the completion of the data phase to + * process the setup command. If it is an IN SETUP packet, then + * we must processing the command BEFORE we enter the DATA phase. + * + * If the data associated with the OUT SETUP packet is zero length, + * then, of course, we don't need to wait. + */ + + datlen = GETUINT16(priv->ctrlreq.len); + if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0) + { + /* Wait for the data phase. */ + + priv->ep0state = EP0STATE_SETUP_OUT; + } + else + { + /* We can process the setup data as soon as SETUP done word is + * popped of the RxFIFO. + */ + + priv->ep0state = EP0STATE_SETUP_READY; + } + } + break; + + default: + { + usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), + (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT); + } + break; } - break; - - /* OUT transfer completed. This indicates that an OUT data transfer for - * the specified OUT endpoint has completed. After this entry is popped - * from the receive FIFO, the core asserts a Transfer Completed interrupt - * on the specified OUT endpoint. - * - * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on - * which the data transfer is complete, DPID = Don't Care. - */ - - case OTGFS_GRXSTSD_PKTSTS_OUTDONE: - { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTDONE), epphy); - } - break; - - /* SETUP transaction completed. This indicates that the Setup stage for - * the specified endpoint has completed and the Data stage has started. - * After this entry is popped from the receive FIFO, the core asserts a - * Setup interrupt on the specified control OUT endpoint (triggers an - * interrupt). - * - * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num, - * DPID = Don't Care. - */ - - case OTGFS_GRXSTSD_PKTSTS_SETUPDONE: - { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy); - } - break; - - /* SETUP data packet received. This indicates that a SETUP packet for the - * specified endpoint is now available for reading from the receive FIFO. - * - * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0. - */ - - case OTGFS_GRXSTSD_PKTSTS_SETUPRECVD: - { - uint16_t datlen; - - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), epphy); - - /* Read EP0 setup data. NOTE: If multiple SETUP packets are received, - * the last one overwrites the previous setup packets and only that - * last SETUP packet will be processed. - */ - - stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, - USB_SIZEOF_CTRLREQ); - - /* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP, - * then we need to wait for the completion of the data phase to - * process the setup command. If it is an IN SETUP packet, then - * we must processing the command BEFORE we enter the DATA phase. - * - * If the data associated with the OUT SETUP packet is zero length, - * then, of course, we don't need to wait. - */ - - datlen = GETUINT16(priv->ctrlreq.len); - if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0) - { - /* Clear NAKSTS so that we can receive the data */ - - regval = stm32_getreg(STM32_OTGFS_DOEPCTL0); - regval |= OTGFS_DOEPCTL0_CNAK; - stm32_putreg(regval, STM32_OTGFS_DOEPCTL0); - - /* Wait for the data phase. */ - - priv->ep0state = EP0STATE_SETUP_OUT; - } - else - { - /* We can process the setup data as soon as SETUP done word is - * popped of the RxFIFO. - */ - - priv->ep0state = EP0STATE_SETUP_READY; - } - } - break; - - default: - { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), - (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT); - } - break; - } + } } - - /* Enable the Rx Status Queue Level interrupt */ - - regval = stm32_getreg(STM32_OTGFS_GINTMSK); - regval |= OTGFS_GINT_RXFLVL; - stm32_putreg(regval, STM32_OTGFS_GINTMSK); } /**************************************************************************** @@ -3289,7 +3321,7 @@ static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv) regval = stm32_getreg(STM32_OTGFS_GUSBCFG); regval &= ~OTGFS_GUSBCFG_TRDT_MASK; - regval |= OTGFS_GUSBCFG_TRDT(5); + regval |= OTGFS_GUSBCFG_TRDT(6); stm32_putreg(regval, STM32_OTGFS_GUSBCFG); } @@ -3508,6 +3540,7 @@ static int stm32_usbinterrupt(int irq, FAR void *context) FAR struct stm32_usbdev_s *priv = &g_otgfsdev; uint32_t regval; + uint32_t reserved; usbtrace(TRACE_INTENTRY(STM32_TRACEINTID_USB), 0); @@ -3519,14 +3552,21 @@ static int stm32_usbinterrupt(int irq, FAR void *context) * some interrupts (like RXFLVL) will generate additional interrupting * events. */ - for (; ; ) { /* Get the set of pending, un-masked interrupts */ regval = stm32_getreg(STM32_OTGFS_GINTSTS); + reserved = (regval & OTGFS_GINT_RESERVED); regval &= stm32_getreg(STM32_OTGFS_GINTMSK); + /* With out modifying the reserved bits, acknowledge all + * **Writable** pending irqs we will service below + */ + + stm32_putreg(((regval | reserved) & OTGFS_GINT_RC_W1), STM32_OTGFS_GINTSTS); + + /* Break out of the loop when there are no further pending (and * unmasked) interrupts to be processes. */ @@ -3545,7 +3585,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT), (uint16_t)regval); stm32_epout_interrupt(priv); - stm32_putreg(OTGFS_GINT_OEP, STM32_OTGFS_GINTSTS); } /* IN endpoint interrupt. The core sets this bit to indicate that @@ -3556,7 +3595,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN), (uint16_t)regval); stm32_epin_interrupt(priv); - stm32_putreg(OTGFS_GINT_IEP, STM32_OTGFS_GINTSTS); } /* Host/device mode mismatch error interrupt */ @@ -3565,7 +3603,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_MMIS) != 0) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_MISMATCH), (uint16_t)regval); - stm32_putreg(OTGFS_GINT_MMIS, STM32_OTGFS_GINTSTS); } #endif @@ -3575,7 +3612,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_WAKEUP), (uint16_t)regval); stm32_resumeinterrupt(priv); - stm32_putreg(OTGFS_GINT_WKUP, STM32_OTGFS_GINTSTS); } /* USB suspend interrupt */ @@ -3584,7 +3620,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SUSPEND), (uint16_t)regval); stm32_suspendinterrupt(priv); - stm32_putreg(OTGFS_GINT_USBSUSP, STM32_OTGFS_GINTSTS); } /* Start of frame interrupt */ @@ -3593,7 +3628,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_SOF) != 0) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SOF), (uint16_t)regval); - stm32_putreg(OTGFS_GINT_SOF, STM32_OTGFS_GINTSTS); } #endif @@ -3605,7 +3639,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_RXFIFO), (uint16_t)regval); stm32_rxinterrupt(priv); - stm32_putreg(OTGFS_GINT_RXFLVL, STM32_OTGFS_GINTSTS); } /* USB reset interrupt */ @@ -3618,7 +3651,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) stm32_usbreset(priv); usbtrace(TRACE_INTEXIT(STM32_TRACEINTID_USB), 0); - stm32_putreg(OTGFS_GINT_USBRST, STM32_OTGFS_GINTSTS); return OK; } @@ -3628,7 +3660,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_ENUMDNE), (uint16_t)regval); stm32_enuminterrupt(priv); - stm32_putreg(OTGFS_GINT_ENUMDNE, STM32_OTGFS_GINTSTS); } /* Incomplete isochronous IN transfer interrupt. When the core finds @@ -3642,7 +3673,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOIXFR), (uint16_t)regval); stm32_isocininterrupt(priv); - stm32_putreg(OTGFS_GINT_IISOIXFR, STM32_OTGFS_GINTSTS); } /* Incomplete isochronous OUT transfer. For isochronous OUT @@ -3659,7 +3689,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOOXFR), (uint16_t)regval); stm32_isocoutinterrupt(priv); - stm32_putreg(OTGFS_GINT_IISOOXFR, STM32_OTGFS_GINTSTS); } #endif @@ -3670,7 +3699,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SRQ), (uint16_t)regval); stm32_sessioninterrupt(priv); - stm32_putreg(OTGFS_GINT_SRQ, STM32_OTGFS_GINTSTS); } /* OTG interrupt */ @@ -3679,7 +3707,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OTG), (uint16_t)regval); stm32_otginterrupt(priv); - stm32_putreg(OTGFS_GINT_OTG, STM32_OTGFS_GINTSTS); } #endif } @@ -5338,7 +5365,9 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) /* Clear any pending interrupts */ - stm32_putreg(0xbfffffff, STM32_OTGFS_GINTSTS); + regval = stm32_getreg(STM32_OTGFS_GINTSTS); + regval &= OTGFS_GINT_RESERVED; + stm32_putreg(regval | OTGFS_GINT_RC_W1, STM32_OTGFS_GINTSTS); /* Enable the interrupts in the INTMSK */ From e07a02bf29ecf85660995bd5b7f25a01037f591b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 25 Aug 2016 11:28:09 -0600 Subject: [PATCH 131/214] Add system() to stdlib.h --- include/stdlib.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/stdlib.h b/include/stdlib.h index d08db9d5570..02dfed909ef 100644 --- a/include/stdlib.h +++ b/include/stdlib.h @@ -170,6 +170,14 @@ int on_exit(CODE void (*func)(int, FAR void *), FAR void *arg); void _exit(int status); /* See unistd.h */ #define _Exit(s) _exit(s) +/* System() command is not implemented in the NuttX libc because it is so + * entangled with shell logic. There is an experimental version at + * apps/system/system. system() is prototyped here, however, for + * compatibility. + */ + +int system(FAR char *cmd); + /* String to binary conversions */ long strtol(FAR const char *nptr, FAR char **endptr, int base); From 55a325bcd48b9b7a879319e01bc34fd3be9955c5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 25 Aug 2016 12:36:19 -0600 Subject: [PATCH 132/214] system() is not available from within the OS --- include/stdlib.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/stdlib.h b/include/stdlib.h index 02dfed909ef..4b112da3684 100644 --- a/include/stdlib.h +++ b/include/stdlib.h @@ -173,10 +173,12 @@ void _exit(int status); /* See unistd.h */ /* System() command is not implemented in the NuttX libc because it is so * entangled with shell logic. There is an experimental version at * apps/system/system. system() is prototyped here, however, for - * compatibility. + * standards compatibility. */ +#ifndef __KERNEL__ int system(FAR char *cmd); +#endif /* String to binary conversions */ From 440d535360fc41e7474a3dae275eb815f6fd82e3 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 25 Aug 2016 15:06:46 -0600 Subject: [PATCH 133/214] include/cxx: Update some C++ header files due to recent changes to C hader files --- include/cxx/csignal | 19 +++++++++++++------ include/cxx/cstdlib | 24 ++++++++++++++++++++++-- include/signal.h | 2 +- include/stdlib.h | 4 ++-- 4 files changed, 38 insertions(+), 11 deletions(-) diff --git a/include/cxx/csignal b/include/cxx/csignal index c66473bb57f..b5ccdbf8ddc 100644 --- a/include/cxx/csignal +++ b/include/cxx/csignal @@ -49,6 +49,7 @@ namespace std { using ::sigset_t; + using ::sig_atomic_t; using ::sigval; using ::sigevent; using ::siginfo; @@ -56,18 +57,24 @@ namespace std using ::sigaction; using ::kill; using ::raise; - using ::sigemptyset; - using ::sigfillset; + using ::sigaction; using ::sigaddset; using ::sigdelset; + using ::sigemptyset; + using ::sigfillset; + using ::sighold; using ::sigismember; - using ::sigaction; - using ::sigprocmask; + using ::sigignore; + using ::signal; + using ::sigpause; using ::sigpending; + using ::sigprocmask; + using ::sigqueue; + using ::sigrelse; + using ::sigset; + using ::sigtimedwait; using ::sigsuspend; using ::sigwaitinfo; - using ::sigtimedwait; - using ::sigqueue; } #endif // CSIGNAL_HEADER diff --git a/include/cxx/cstdlib b/include/cxx/cstdlib index 419291c789b..65c200672a5 100644 --- a/include/cxx/cstdlib +++ b/include/cxx/cstdlib @@ -1,7 +1,7 @@ //*************************************************************************** // include/cxx/cstdlib // -// Copyright (C) 2009, 2012, 2015 Gregory Nutt. All rights reserved. +// Copyright (C) 2009, 2012, 2015-2016 Gregory Nutt. All rights reserved. // Author: Gregory Nutt // // Redistribution and use in source and binary forms, with or without @@ -54,9 +54,9 @@ namespace std using ::srand; using ::rand; +#ifndef CONFIG_DISABLE_ENVIRON // Environment variable support -#ifndef CONFIG_DISABLE_ENVIRON using ::get_environ_ptr; using ::getenv; using ::putenv; @@ -76,6 +76,12 @@ namespace std using ::on_exit; #endif +#ifndef __KERNEL__ + // System command + + using ::system; +#endif + // String to binary conversions using ::strtol; @@ -100,6 +106,16 @@ namespace std using ::calloc; using ::mallinfo; +#ifdef CONFIG_PSEUDOTERM + // Pseudo-Terminals + +#ifdef CONFIG_PSEUDOTERM_SUSV1 + using ::ptsname; + using ::ptsname_r; +#endif + using ::unlockpt; +#endif + // Arithmetic using ::abs; @@ -124,6 +140,10 @@ namespace std // Sorting using ::qsort; + + // Binary search + + using ::bsearch; } #endif // __INCLUDE_CXX_CSTDLIB diff --git a/include/signal.h b/include/signal.h index 576691a168d..a4060fe3316 100644 --- a/include/signal.h +++ b/include/signal.h @@ -298,9 +298,9 @@ int sighold(int signo); int sigismember(FAR const sigset_t *set, int signo); int sigignore(int signo); CODE void (*signal(int signo, CODE void (*func)(int signo)))(int signo); -int sigprocmask(int how, FAR const sigset_t *set, FAR sigset_t *oset); int sigpause(int signo); int sigpending(FAR sigset_t *set); +int sigprocmask(int how, FAR const sigset_t *set, FAR sigset_t *oset); #ifdef CONFIG_CAN_PASS_STRUCTS int sigqueue(int pid, int signo, union sigval value); #else diff --git a/include/stdlib.h b/include/stdlib.h index 4b112da3684..6b4498ebea3 100644 --- a/include/stdlib.h +++ b/include/stdlib.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/stdlib.h * - * Copyright (C) 2007-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -143,9 +143,9 @@ extern "C" void srand(unsigned int seed); int rand(void); +#ifndef CONFIG_DISABLE_ENVIRON /* Environment variable support */ -#ifndef CONFIG_DISABLE_ENVIRON FAR char **get_environ_ptr(void); FAR char *getenv(FAR const char *name); int putenv(FAR const char *string); From 644335a39cd4e187c6522b18f591928acbe5291e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 08:28:54 -0600 Subject: [PATCH 134/214] Fix C99 style comment --- include/nuttx/usb/usb.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/nuttx/usb/usb.h b/include/nuttx/usb/usb.h index d3c537bbcd6..5195c114b4d 100644 --- a/include/nuttx/usb/usb.h +++ b/include/nuttx/usb/usb.h @@ -425,4 +425,5 @@ struct usb_iaddesc_s * Public Functions ************************************************************************************/ -#endif // __INCLUDE_NUTTX_USB_USB_H +#endif /* __INCLUDE_NUTTX_USB_USB_H */ + From 8a1d6c9ed8270128948f2c2e0da8630dd114b89a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 09:07:52 -0600 Subject: [PATCH 135/214] Basic framework that might be used to add USB host support --- drivers/usbhost/Kconfig | 6 ++ drivers/usbhost/Make.defs | 4 + drivers/usbhost/usbhost_composite.c | 146 ++++++++++++++++++++++++++++ drivers/usbhost/usbhost_composite.h | 91 +++++++++++++++++ drivers/usbhost/usbhost_enumerate.c | 35 +++++-- 5 files changed, 276 insertions(+), 6 deletions(-) create mode 100644 drivers/usbhost/usbhost_composite.c create mode 100644 drivers/usbhost/usbhost_composite.h diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig index e8768896901..ee8a1d8d5aa 100644 --- a/drivers/usbhost/Kconfig +++ b/drivers/usbhost/Kconfig @@ -77,6 +77,12 @@ config USBHOST_HUB_POLLMSEC endif # USBHOST_HUB +config USBHOST_COMPOSITE + bool "Composite device support" + default n + ---help--- + Build in USB host support for connected composite devices + config USBHOST_MSC bool "Mass Storage Class Support" default n diff --git a/drivers/usbhost/Make.defs b/drivers/usbhost/Make.defs index 0391dd33390..fd28be8766f 100644 --- a/drivers/usbhost/Make.defs +++ b/drivers/usbhost/Make.defs @@ -46,6 +46,10 @@ ifeq ($(CONFIG_USBHOST_HUB),y) CSRCS += usbhost_hub.c endif +ifeq ($(CONFIG_USBHOST_COMPOSITE),y) +CSRCS += usbhost_composite.c +endif + ifeq ($(CONFIG_USBHOST_MSC),y) CSRCS += usbhost_storage.c endif diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c new file mode 100644 index 00000000000..777b90fc219 --- /dev/null +++ b/drivers/usbhost/usbhost_composite.c @@ -0,0 +1,146 @@ +/**************************************************************************** + * drivers/usbhost/usbhost_composite.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "usbhost_composite.h" + +#ifdef CONFIG_USBHOST_COMPOSITE + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: usbhost_composite + * + * Description: + * As the final steps in the device enumeration sequence this function + * will be called in order to determine (1) determine if the device is + * a composite device, and if so, (2) create the composite class which + * contains all of the individual class instances making up the composite. + * + * Input Parameters: + * hport - The downstream port to which the (potential) composite + * device has been connected. + * configdesc - The full configuration descriptor + * desclen - The length of the configuration descriptor + * devclass - If the class driver for the device is successful located + * and bound to the hub port, the allocated class instance + * is returned into this caller-provided memory location. + * + * Returned Value: + * Zero (OK) is returned if (1) the device was determined to be a + * composite device and (2) the composite class wrapper was sucessfully + * created and bound to the HCD. A negated errno value is returned on + * any failure. The value -ENOENT, in particular means that the attached + * device is not a composite device. Other values would indicate other + * various, unexpected failures. + * + ****************************************************************************/ + +int usbhost_composite(FAR struct usbhost_hubport_s *hport, + FAR const uint8_t *configdesc, int desclen, + FAR struct usbhost_id_s *id, + FAR struct usbhost_class_s **devclass) +{ + /* Determine if this a composite device has been connected to the + * downstream port. + */ + + /* Count the number of interfaces. Scan for IAD descriptors that will be + * used when it is necessary to associate multiple interfaces with a single + * device. + */ + + /* Allocate the composite class container */ + + /* Loop, processing each device that we discovered */ + /* See usbhost_classbind() for similar logic */ + + /* Is there is a class implementation registered to support this device. */ + + /* Yes.. there is a class for this device. Get an instance of + * its interface. + */ + + /* Then bind the newly instantiated class instance to the + * composite wrapper (not the HCD) */ + + /* On failures, call the class disconnect method which + * should then free the allocated devclass instance. + */ + + /* All classes have been found, instantiated and boud the the composite class + * container. Now bind the composite class instance to the HCD */ + + /* On failures, call the class disconnect method which should then free + * the allocated devclass instance. + */ + + return -ENOSYS; +} + +#endif /* CONFIG_USBHOST_COMPOSITE */ diff --git a/drivers/usbhost/usbhost_composite.h b/drivers/usbhost/usbhost_composite.h new file mode 100644 index 00000000000..8395690d47d --- /dev/null +++ b/drivers/usbhost/usbhost_composite.h @@ -0,0 +1,91 @@ +/**************************************************************************** + * drivers/usbhost/usbdev_composite.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __DRIVERS_USBHOST_USBHOST_COMPOSITE_H +#define __DRIVERS_USBHOST_USBHOST_COMPOSITE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#ifdef CONFIG_USBHOST_COMPOSITE + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: usbhost_composite + * + * Description: + * As the final steps in the device enumeration sequence this function + * will be called in order to determine (1) determine if the device is + * a composite device, and if so, (2) create the composite class which + * contains all of the individual class instances making up the composite. + * + * Input Parameters: + * hport - The downstream port to which the (potential) composite + * device has been connected. + * configdesc - The full configuration descriptor + * desclen - The length of the configuration descriptor + * devclass - If the class driver for the device is successful located + * and bound to the hub port, the allocated class instance + * is returned into this caller-provided memory location. + * + * Returned Value: + * Zero (OK) is returned if (1) the device was determined to be a + * composite device and (2) the composite class wrapper was sucessfully + * created and bound to the HCD. A negated errno value is returned on + * any failure. The value -ENOENT, in particular means that the attached + * device is not a composite device. Other values would indicate other + * various, unexpected failures. + * + ****************************************************************************/ + +int usbhost_composite(FAR struct usbhost_hubport_s *hport, + FAR const uint8_t *configdesc, int desclen, + FAR struct usbhost_class_s **devclass); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* CONFIG_USBHOST_COMPOSITE */ +#endif /* #define __DRIVERS_USBHOST_USBHOST_COMPOSITE_H */ diff --git a/drivers/usbhost/usbhost_enumerate.c b/drivers/usbhost/usbhost_enumerate.c index b92c0e6fc92..c1223c4a77f 100644 --- a/drivers/usbhost/usbhost_enumerate.c +++ b/drivers/usbhost/usbhost_enumerate.c @@ -539,15 +539,38 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport, usleep(100*1000); - /* Parse the configuration descriptor and bind to the class instance for the - * device. This needs to be the last thing done because the class driver - * will begin configuring the device. +#ifdef CONFIG_USBHOST_COMPOSITE + /* Check if the device attached to the downstream port if a USB composite + * device and, if so, create the composite device wrapper and bind it to + * the HCD. + * + * usbhost_composite() will return a negated errno value is on any + * failure. The value -ENOENT, in particular means that the attached + * device is not a composite device. Other values would indicate other + * various, unexpected failures. We make no real distinction here. */ - ret = usbhost_classbind(hport, buffer, cfglen, &id, devclass); - if (ret < 0) + ret = usbhost_composite(hport, buffer, cfglen, devclass); + if (ret >= 0) { - uerr("ERROR: usbhost_classbind failed %d\n", ret); + uinfo("usbhost_composite has bound the composite device\n"); + } + + /* Apparently this is not a composite device */ + + else +#endif + { + /* Parse the configuration descriptor and bind to the class instance + * for the device. This needs to be the last thing done because the + * class driver will begin configuring the device. + */ + + ret = usbhost_classbind(hport, buffer, cfglen, &id, devclass); + if (ret < 0) + { + uerr("ERROR: usbhost_classbind failed %d\n", ret); + } } errout: From 579e338cd31576fc1ddb94e715f1142b76f0c013 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 09:47:38 -0600 Subject: [PATCH 136/214] Add a little more meat to the USB host composite skeleton. Still pretty bony. --- drivers/usbhost/usbhost_composite.c | 186 ++++++++++++++++++++++++++-- 1 file changed, 176 insertions(+), 10 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 777b90fc219..245b3dcff94 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -39,6 +39,9 @@ #include +#include +#include + #include #include "usbhost_composite.h" @@ -53,10 +56,48 @@ * Private Types ****************************************************************************/ +/* This structure describes one component class of the composite */ + +struct usbhost_component_s +{ + /* To be determined */ +}; + +/* This structure contains the internal, private state of the USB host + * CDC/ACM class. + */ + +struct usbhsot_composite_s +{ + /* This is the externally visible portion of the state. The usbclass must + * the first element of the structure. It is then cast compatible with + * struct usbhsot_composite_s. + */ + + struct usbhost_class_s usbclass; + + /* Class specific data follows */ + + uint16_t nclasses; /* Number of component classes in the composite */ + + /* The following points to an allocated array of type struct + * usbhost_component_s. Element element of the array corresponds to one + * component class in the composite. + */ + + FAR struct usbhost_component_s *members; +}; + /**************************************************************************** * Private Function Prototypes ****************************************************************************/ +/* struct usbhost_class_s methods */ + +static int usbhost_connect(FAR struct usbhost_class_s *usbclass, + FAR const uint8_t *configdesc, int desclen); +static int usbhost_disconnected(FAR struct usbhost_class_s *usbclass); + /**************************************************************************** * Private Data ****************************************************************************/ @@ -69,6 +110,94 @@ * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: usbhost_connect + * + * Description: + * This function implements the connect() method of struct + * usbhost_class_s. This method is a callback into the class + * implementation. It is used to provide the device's configuration + * descriptor to the class so that the class may initialize properly + * + * Input Parameters: + * usbclass - The USB host class entry previously obtained from a call to + * create(). + * configdesc - A pointer to a uint8_t buffer container the configuration + * descriptor. + * desclen - The length in bytes of the configuration descriptor. + * + * Returned Value: + * On success, zero (OK) is returned. On a failure, a negated errno value is + * returned indicating the nature of the failure + * + * NOTE that the class instance remains valid upon return with a failure. It is + * the responsibility of the higher level enumeration logic to call + * CLASS_DISCONNECTED to free up the class driver resources. + * + * Assumptions: + * - This function will *not* be called from an interrupt handler. + * - If this function returns an error, the USB host controller driver + * must call to DISCONNECTED method to recover from the error + * + ****************************************************************************/ + +static int usbhost_connect(FAR struct usbhost_class_s *usbclass, + FAR const uint8_t *configdesc, int desclen) +{ + FAR struct usbhsot_composite_s *priv = (FAR struct usbhsot_composite_s *)usbclass; + int ret; + + DEBUGASSERT(priv != NULL && + configdesc != NULL && + desclen >= sizeof(struct usb_cfgdesc_s)); + + /* Get exclusive access to the device structure */ + + /* Forward the connection information to each contained class in the + * composite + */ + + return ret; +} + +/**************************************************************************** + * Name: usbhost_disconnected + * + * Description: + * This function implements the disconnected() method of struct + * usbhost_class_s. This method is a callback into the class + * implementation. It is used to inform the class that the USB device has + * been disconnected. + * + * Input Parameters: + * usbclass - The USB host class entry previously obtained from a call to + * create(). + * + * Returned Value: + * On success, zero (OK) is returned. On a failure, a negated errno value + * is returned indicating the nature of the failure + * + * Assumptions: + * This function may be called from an interrupt handler. + * + ****************************************************************************/ + +static int usbhost_disconnected(struct usbhost_class_s *usbclass) +{ + FAR struct usbhsot_composite_s *priv = (FAR struct usbhsot_composite_s *)usbclass; + + DEBUGASSERT(priv != NULL); + + /* Get exclusive access to the device structure */ + + /* Forward the disconnect event to each contained class in the composite. */ + + /* Destroy the composite container */ + + kmm_free(priv); + return OK; +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -106,6 +235,11 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR struct usbhost_id_s *id, FAR struct usbhost_class_s **devclass) { + FAR struct usbhsot_composite_s *priv; + FAR struct usbhost_component_s *member; + uint16_t nclasses; + int i; + /* Determine if this a composite device has been connected to the * downstream port. */ @@ -117,21 +251,53 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Allocate the composite class container */ + priv = (FAR struct usbhsot_composite_s *) + kmm_zalloc(sizeof(struct usbhsot_composite_s)); + + if (priv == NULL) + { + uerr("ERROR: Failed to allocate class container\n") + return -ENOMEM; + } + + priv->members = (FAR struct usbhost_component_s *) + kmm_zalloc(nclasses * sizeof(struct usbhost_component_s)); + + if (priv->members == NULL) + { + uerr("ERROR: Failed to allocate class members\n") + kmm_free(priv); + return -ENOMEM; + } + + /* Initialize the non-zero elements of the class container */ + + priv->usbclass.hport = hport; + priv->usbclass.connect = usbhost_connect; + priv->usbclass.disconnected = usbhost_disconnected; + priv->nclasses = nclasses; + /* Loop, processing each device that we discovered */ - /* See usbhost_classbind() for similar logic */ - /* Is there is a class implementation registered to support this device. */ + for (i = 0; i < nclasses; i++) + { + member = &priv->members[i]; - /* Yes.. there is a class for this device. Get an instance of - * its interface. - */ + /* See usbhost_classbind() for similar logic */ - /* Then bind the newly instantiated class instance to the - * composite wrapper (not the HCD) */ + /* Is there is a class implementation registered to support this device. */ - /* On failures, call the class disconnect method which - * should then free the allocated devclass instance. - */ + /* Yes.. there is a class for this device. Get an instance of + * its interface. + */ + + /* Then bind the newly instantiated class instance to the + * composite wrapper (not the HCD) */ + + /* On failures, call the class disconnect method which + * should then free the allocated devclass instance. + */ + } /* All classes have been found, instantiated and boud the the composite class * container. Now bind the composite class instance to the HCD */ From fa4e9e3c1cc2261f898f2c1e69c6bde190b26f63 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 10:13:35 -0600 Subject: [PATCH 137/214] Add a little more meat to the still very bony USB host composite skeleton. --- drivers/usbhost/usbhost_composite.c | 97 +++++++++++++++++++++++++---- 1 file changed, 85 insertions(+), 12 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 245b3dcff94..ba6ba834fa3 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -60,7 +60,9 @@ struct usbhost_component_s { - /* To be determined */ + /* This the the classobject returned by each contained class */ + + FAR struct usbhost_class_s **usbclass }; /* This structure contains the internal, private state of the USB host @@ -110,6 +112,42 @@ static int usbhost_disconnected(FAR struct usbhost_class_s *usbclass); * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: usbhost_disconnect_all + * + * Description: + * Disconnect all contained class instances. + * + * Input Parameters: + * priv - Reference to private, composite container state stucture. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void usbhost_disconnect_all(FAR struct usbhsot_composite_s *priv) +{ + FAR struct usbhost_component_s *member; + + /* Loop, processing each class that has been included into the composite */ + + for (i = 0; i < nclasses; i++) + { + member = &priv->members[i]; + + /* Has this member been included to the composite? */ + + if (member->usbclass != NULL) + { + /* Yes.. disconnect it, freeing all of the class resources */ + + CLASS_DISCONNECTED(member->usbclass); + member->usbclass = NULL; + } + } +} + /**************************************************************************** * Name: usbhost_connect * @@ -216,7 +254,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass) * device has been connected. * configdesc - The full configuration descriptor * desclen - The length of the configuration descriptor - * devclass - If the class driver for the device is successful located + * usbclass - If the class driver for the device is successful located * and bound to the hub port, the allocated class instance * is returned into this caller-provided memory location. * @@ -233,7 +271,7 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass) int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR const uint8_t *configdesc, int desclen, FAR struct usbhost_id_s *id, - FAR struct usbhost_class_s **devclass) + FAR struct usbhost_class_s **usbclass) { FAR struct usbhsot_composite_s *priv; FAR struct usbhost_component_s *member; @@ -266,8 +304,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, if (priv->members == NULL) { uerr("ERROR: Failed to allocate class members\n") - kmm_free(priv); - return -ENOMEM; + ret = -ENOMEM; + goto errout_with_container; } /* Initialize the non-zero elements of the class container */ @@ -295,18 +333,53 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * composite wrapper (not the HCD) */ /* On failures, call the class disconnect method which - * should then free the allocated devclass instance. + * should then free the allocated usbclass instance. */ + + goto errout_with_members; } - /* All classes have been found, instantiated and boud the the composite class - * container. Now bind the composite class instance to the HCD */ + /* All classes have been found, instantiated and bound to the composite class + * container. Now bind the composite class continer to the HCD. + * + * REVISIT: I dont' think this is right. + */ - /* On failures, call the class disconnect method which should then free - * the allocated devclass instance. - */ + ret = CLASS_CONNECT(usbclass, configdesc, desclen); + if (ret < 0) + { + /* On failure, call the class disconnect method of each contained + * class which should then free the allocated usbclass instance. + */ - return -ENOSYS; + uerr("ERROR: CLASS_CONNECT failed: %d\n", ret); + goto errout_with_members; + } + + /* Return our USB class structure */ + + *usbclass = &priv->usbclass; + return OK; + +errout_with_members: + /* On an failure, call the class disconnect method of each contained + * class which should then free the allocated usbclass instance. + */ + + usbhost_disconnect_all(priv); + + /* Free the allocate array of composite members */ + + if (priv->members != NULL) + { + kmm_free(priv->members); + } + +errout_with_container: + /* Then free the composite container itself */ + + kmm_free(priv); + return ret; } #endif /* CONFIG_USBHOST_COMPOSITE */ From a228b0cc36dce0c8dd4cdde00afd6837ab845a8d Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 10:33:41 -0600 Subject: [PATCH 138/214] Add a little more meat to the still very USB host composite skeleton. Not quite so boney now. --- drivers/usbhost/usbhost_composite.c | 37 ++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 11 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index ba6ba834fa3..2ff6835515f 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -189,11 +189,10 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass, configdesc != NULL && desclen >= sizeof(struct usb_cfgdesc_s)); - /* Get exclusive access to the device structure */ - /* Forward the connection information to each contained class in the * composite */ +#warning Missing logic return ret; } @@ -226,11 +225,18 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass) DEBUGASSERT(priv != NULL); - /* Get exclusive access to the device structure */ - /* Forward the disconnect event to each contained class in the composite. */ - /* Destroy the composite container */ + usbhost_disconnect_all(priv); + + /* Free the allocate array of composite members */ + + if (priv->members != NULL) + { + kmm_free(priv->members); + } + + /* The destroy the composite container itself */ kmm_free(priv); return OK; @@ -281,11 +287,13 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Determine if this a composite device has been connected to the * downstream port. */ +#warning Missing logic /* Count the number of interfaces. Scan for IAD descriptors that will be * used when it is necessary to associate multiple interfaces with a single * device. */ +#warning Missing logic /* Allocate the composite class container */ @@ -324,19 +332,26 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* See usbhost_classbind() for similar logic */ /* Is there is a class implementation registered to support this device. */ - +#warning Missing logic + { /* Yes.. there is a class for this device. Get an instance of * its interface. */ - - /* Then bind the newly instantiated class instance to the - * composite wrapper (not the HCD) */ - +#warning Missing logic + { + /* Then bind the newly instantiated class instance as an + * composite class member. + */ +#warning Missing logic + { /* On failures, call the class disconnect method which * should then free the allocated usbclass instance. */ goto errout_with_members; + } + } + } } /* All classes have been found, instantiated and bound to the composite class @@ -345,7 +360,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * REVISIT: I dont' think this is right. */ - ret = CLASS_CONNECT(usbclass, configdesc, desclen); + ret = CLASS_CONNECT(&priv->usbclass, configdesc, desclen); if (ret < 0) { /* On failure, call the class disconnect method of each contained From ea8ce7acb65d058c21acb730921902e91ece6b8f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 11:05:50 -0600 Subject: [PATCH 139/214] Trivial rename --- drivers/usbhost/usbhost_composite.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.h b/drivers/usbhost/usbhost_composite.h index 8395690d47d..a44f4e7f00c 100644 --- a/drivers/usbhost/usbhost_composite.h +++ b/drivers/usbhost/usbhost_composite.h @@ -64,7 +64,7 @@ * device has been connected. * configdesc - The full configuration descriptor * desclen - The length of the configuration descriptor - * devclass - If the class driver for the device is successful located + * usbclass - If the class driver for the device is successful located * and bound to the hub port, the allocated class instance * is returned into this caller-provided memory location. * @@ -80,7 +80,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR const uint8_t *configdesc, int desclen, - FAR struct usbhost_class_s **devclass); + FAR struct usbhost_class_s **usbclass); #undef EXTERN #if defined(__cplusplus) From f2809d52d3e258b7f843c167c303814dc8acf3d0 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 26 Aug 2016 17:20:38 +0000 Subject: [PATCH 140/214] =?UTF-8?q?stm32=5Fotgfsdev.c=20edited=20online=20?= =?UTF-8?q?with=20Bitbucket=20dup=20SOF=20removed=20as=20noted=20by=20S?= =?UTF-8?q?=C3=A9bastien=20Lorquet?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- arch/arm/src/stm32/stm32_otgfsdev.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index ee536bf0ff6..c570e6d084f 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -171,7 +171,6 @@ OTGFS_GINT_CIDSCHG | \ OTGFS_GINT_DISC | \ OTGFS_GINT_SRQ | \ - OTGFS_GINT_SOF | \ OTGFS_GINT_WKUP) /* Debug ***********************************************************************/ From 3c0b287fe91420351af388c34c7986075fcd27b5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 12:24:35 -0600 Subject: [PATCH 141/214] Fill in a little of the 'Missing logic' in the USB host composite wrapper. --- drivers/usbhost/usbhost_composite.c | 44 ++++++++++++++++------------- 1 file changed, 25 insertions(+), 19 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 2ff6835515f..0118f25c102 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -281,6 +281,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, { FAR struct usbhsot_composite_s *priv; FAR struct usbhost_component_s *member; + FAR const struct usbhost_registry_s *reg; uint16_t nclasses; int i; @@ -292,6 +293,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Count the number of interfaces. Scan for IAD descriptors that will be * used when it is necessary to associate multiple interfaces with a single * device. + * + * Save the CLASS ID information in the member structure. */ #warning Missing logic @@ -329,28 +332,31 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, { member = &priv->members[i]; - /* See usbhost_classbind() for similar logic */ + /* Is there is a class implementation registered to support this + * device. + * REVISIT: This should have been saved in member structure when the + * number of member classes was counted. + */ +#warning Missing logic to get id - /* Is there is a class implementation registered to support this device. */ -#warning Missing logic + reg = usbhost_findclass(id); + if (reg == NULL) { - /* Yes.. there is a class for this device. Get an instance of - * its interface. - */ -#warning Missing logic - { - /* Then bind the newly instantiated class instance as an - * composite class member. - */ -#warning Missing logic - { - /* On failures, call the class disconnect method which - * should then free the allocated usbclass instance. - */ + uinfo("usbhost_findclass failed\n"); + ret = -EINVAL; + goto errour_with_members; + } - goto errout_with_members; - } - } + /* Yes.. there is a class for this device. Get an instance of its + * interface. + */ + + member->usbclass = CLASS_CREATE(reg, hport, id); + if (member->usbclass == NULL) + { + uinfo("CLASS_CREATE failed\n"); + ret = -ENOMEM; + goto errour_with_members; } } From 0860621e600ba0421ef29de6e8ba6745204ad3c4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 12:34:58 -0600 Subject: [PATCH 142/214] Fill one more case of 'Missing logic' in the USB host composite wrapper. --- drivers/usbhost/usbhost_composite.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 0118f25c102..1c4e56315b4 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -63,6 +63,12 @@ struct usbhost_component_s /* This the the classobject returned by each contained class */ FAR struct usbhost_class_s **usbclass + + /* This is the information that we need to do the registry lookup for this + * class member. + */ + + struct usbhost_id_s id, }; /* This structure contains the internal, private state of the USB host @@ -190,7 +196,9 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass, desclen >= sizeof(struct usb_cfgdesc_s)); /* Forward the connection information to each contained class in the - * composite + * composite. + * REVIST: Is that right? Or should it be forwarded only to the class + * matching the configdesc? I am not sure that is going on here. */ #warning Missing logic @@ -276,7 +284,6 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass) int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR const uint8_t *configdesc, int desclen, - FAR struct usbhost_id_s *id, FAR struct usbhost_class_s **usbclass) { FAR struct usbhsot_composite_s *priv; @@ -337,9 +344,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * REVISIT: This should have been saved in member structure when the * number of member classes was counted. */ -#warning Missing logic to get id - reg = usbhost_findclass(id); + reg = usbhost_findclass(&priv->id); if (reg == NULL) { uinfo("usbhost_findclass failed\n"); From 2460d41ae005dac98d0b467ba0118f665322f0fc Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 26 Aug 2016 17:03:16 -0600 Subject: [PATCH 143/214] Add more logic to the USB host composite wrapper. --- drivers/usbhost/usbhost_composite.c | 88 ++++++++++++++++++++++++++--- 1 file changed, 80 insertions(+), 8 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 1c4e56315b4..4d17be66871 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -289,21 +289,84 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR struct usbhsot_composite_s *priv; FAR struct usbhost_component_s *member; FAR const struct usbhost_registry_s *reg; + FAR struct usb_desc_s *desc; + uint16_t nintfs; + uint16_t nmerged; uint16_t nclasses; + int offset; int i; /* Determine if this a composite device has been connected to the * downstream port. - */ -#warning Missing logic - - /* Count the number of interfaces. Scan for IAD descriptors that will be - * used when it is necessary to associate multiple interfaces with a single - * device. * - * Save the CLASS ID information in the member structure. + * First, count the number of interface descriptors (nintrfs) and the + * number of interfaces that are assocated to one device via IAD + * descriptor (nmerged). */ + + for (nintfs = 0, nmerged = 0, offset = 0; + offset < desclen - sizeof(struct usb_desc_s); + ) + { + desc = (FAR struct usb_desc_s *)&configdesc[offset]; + int len = desc->len; + + if (offset + len < desclen) + { + /* Is this an interface descriptor? */ + + if (desc->type == USB_DESC_TYPE_INTERFACE) + { + nintfs++; + } + + /* Check for IAD descriptors that will be used when it is + * necessary to associate multiple interfaces with a single + * device. + */ + + else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION) + { + FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; + + /* Keep count of the number of merged interfaces */ + + nmerged += (iad->nifs - 1); + } + } + + offset += len; + } + + if (nintfs < 2) + { + /* Only one interface. Can't be a composite device */ + + return -ENOENT; + } + + /* Special case: Some NON-composite deveice have more than on interface: CDC/ACM + * and MSC both may have two interfaces. + */ + + if (nintfs < 3 && nmerged == 0) + { + /* Do the special case checks */ #warning Missing logic + } + + /* The total number of classes is then the number of interfaces minus the + * number of interfaces merged via the IAD descriptor. + */ + + if (nintfs <= nmerged ) + { + /* Should not happen. Means a bug. */ + + return -EINVAL; + } + + nclasses = nintfs - nmerged; /* Allocate the composite class container */ @@ -333,7 +396,16 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, priv->usbclass.disconnected = usbhost_disconnected; priv->nclasses = nclasses; - /* Loop, processing each device that we discovered */ + /* Reparse the configuration descriptor and save the CLASS ID information + * in the member structure: If the interface is defined by an interface + * descriptor, then we have to use the info in the interface descriptor; + * If the interface has a IAD, we have to use info in the IAD. + */ +#warning Missing logic + + /* Now loop, performing the registry lookup on each class in the + * composite. + */ for (i = 0; i < nclasses; i++) { From c973e0d3bae2a8eaa12eff92dedbfc9b1b0db085 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 27 Aug 2016 10:31:18 -0600 Subject: [PATCH 144/214] Add the logic necessary to abstract the register lookup information for each candiate class --- drivers/usbhost/usbhost_composite.c | 103 +++++++++++++++++++++++++--- drivers/usbhost/usbhost_enumerate.c | 18 +---- 2 files changed, 97 insertions(+), 24 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 4d17be66871..595b984c0e6 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -268,6 +268,9 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass) * device has been connected. * configdesc - The full configuration descriptor * desclen - The length of the configuration descriptor + * id - Lookup information extracted from the device descriptor. + * for the case of the composite devices, we need only the + * vid and pid. * usbclass - If the class driver for the device is successful located * and bound to the hub port, the allocated class instance * is returned into this caller-provided memory location. @@ -284,12 +287,14 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass) int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR const uint8_t *configdesc, int desclen, + FAR struct usbhost_id_s *id, FAR struct usbhost_class_s **usbclass) { FAR struct usbhsot_composite_s *priv; FAR struct usbhost_component_s *member; FAR const struct usbhost_registry_s *reg; FAR struct usb_desc_s *desc; + uint32_t mergeset; uint16_t nintfs; uint16_t nmerged; uint16_t nclasses; @@ -304,9 +309,11 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * descriptor (nmerged). */ - for (nintfs = 0, nmerged = 0, offset = 0; - offset < desclen - sizeof(struct usb_desc_s); - ) + mergeset = 0 + nintfs = 0; + nmerged = 0; + + for (offset = 0; offset < desclen - sizeof(struct usb_desc_s); ) { desc = (FAR struct usb_desc_s *)&configdesc[offset]; int len = desc->len; @@ -317,6 +324,10 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, if (desc->type == USB_DESC_TYPE_INTERFACE) { + FAR struct usb_ifdesc_s *ifdesc = + (FAR struct usb_ifdesc_s *)desc; + + DEBUGASSERT(ifdesc->iif < 32); nintfs++; } @@ -327,11 +338,18 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION) { - FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; + FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; + uint32_t mask; - /* Keep count of the number of merged interfaces */ + /* Keep count of the number of merged interfaces */ - nmerged += (iad->nifs - 1); + nmerged += (iad->nifs - 1); + + /* Keep track of which interfaces have been merged */ + + DEBUGASSERT(iad->firstif + iad->nifs < 32); + mask = (1 << iad->nifs) - 1; + mergset |= mask << iad->firstif; } } @@ -396,12 +414,81 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, priv->usbclass.disconnected = usbhost_disconnected; priv->nclasses = nclasses; - /* Reparse the configuration descriptor and save the CLASS ID information + /* Re-parse the configuration descriptor and save the CLASS ID information * in the member structure: If the interface is defined by an interface * descriptor, then we have to use the info in the interface descriptor; * If the interface has a IAD, we have to use info in the IAD. */ -#warning Missing logic + + for (i = 0, offset = 0; offset < desclen - sizeof(struct usb_desc_s); ) + { + desc = (FAR struct usb_desc_s *)&configdesc[offset]; + int len = desc->len; + + if (offset + len < desclen) + { + /* Is this an interface descriptor? */ + + if (desc->type == USB_DESC_TYPE_INTERFACE) + { + FAR struct usb_ifdesc_s *ifdesc = + (FAR struct usb_ifdesc_s *)desc; + + /* Was the interface merged via an IAD descriptor? */ + + DEBUGASSERT(ifdesc->iif < 32); + if ((mergset & (1 << ifdesc->iif)) == 0) + { + FAR struct usbhost_id_s *member = + (FAR struct usbhost_id_s *)&priv->members[i]; + + /* No, this interface was not merged. Save the registry + * lookup information from the interface descriptor. + */ + + member->base = ifdesc->classid; + member->subclass = ifdesc->subclass; + member->proto = ifdesc->protocol; + member->vid = id->vid; + member->pid = id->pid; + + /* Increment the member index */ + + i++; + } + } + + /* Check for IAD descriptors that will be used when it is + * necessary to associate multiple interfaces with a single + * device. + */ + + else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION) + { + FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; + + /* Yes.. Save the registry lookup information from the IAD. */ + + member->base = iad->classid; + member->subclass = iad->subclass; + member->proto = iad->protocol; + member->vid = id->vid; + member->pid = id->pid; + + /* Increment the member index */ + + i++; + } + } + + offset += len; + } + + /* If everything worked, the final index must be the same as the pre- + * calculated number of member classes. + */ + + DEBUGASSERT(i == nclasses); /* Now loop, performing the registry lookup on each class in the * composite. diff --git a/drivers/usbhost/usbhost_enumerate.c b/drivers/usbhost/usbhost_enumerate.c index c1223c4a77f..80b6d48ff33 100644 --- a/drivers/usbhost/usbhost_enumerate.c +++ b/drivers/usbhost/usbhost_enumerate.c @@ -53,13 +53,7 @@ #include #include -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ +#include "usbhost_composite.h" /**************************************************************************** * Private Function Prototypes @@ -77,14 +71,6 @@ static inline int usbhost_classbind(FAR struct usbhost_hubport_s *hport, FAR struct usbhost_id_s *id, FAR struct usbhost_class_s **devclass); -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -550,7 +536,7 @@ int usbhost_enumerate(FAR struct usbhost_hubport_s *hport, * various, unexpected failures. We make no real distinction here. */ - ret = usbhost_composite(hport, buffer, cfglen, devclass); + ret = usbhost_composite(hport, buffer, cfglen, &id, devclass); if (ret >= 0) { uinfo("usbhost_composite has bound the composite device\n"); From 5d4428be93e15109b6a4b237f8262e5972799d8a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 27 Aug 2016 10:53:43 -0600 Subject: [PATCH 145/214] Add check of class ID in device scriptor header --- drivers/usbhost/usbhost_composite.c | 31 +++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 595b984c0e6..24173bab239 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -304,7 +304,32 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Determine if this a composite device has been connected to the * downstream port. * - * First, count the number of interface descriptors (nintrfs) and the + * First look at there device descriptor information. A composite + * device is only possible if: + * + * 1. Manufacturers of composite devices typically assign a value of zero + * to the device class (bDeviceClass), subclass (bDeviceSubClass), and + * protocol (bDeviceProtocol) fields in the device descriptor, as + * specified by the Universal Serial Bus Specification. This allows + * the manufacturer to associate each individual interface with a + * different device class and protocol. + * + * 2. The USB-IF core team has devised a special class and protocol code + * set that notifies the operating system that one or more IADs are + * present in device firmware. A device's device descriptor must have + * the values that appear in the following table: + * + * bDeviceClass 0xEF + * bDeviceSubClass 0x02 + * bDeviceProtocol 0x01 + */ + + if (id->base != USB_CLASS_PER_INTERFACE && id->base != USB_CLASS_MISC) + { + return -ENOENT; + } + + /* First, count the number of interface descriptors (nintfs) and the * number of interfaces that are assocated to one device via IAD * descriptor (nmerged). */ @@ -363,7 +388,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, return -ENOENT; } - /* Special case: Some NON-composite deveice have more than on interface: CDC/ACM +#if 0 /* I think not needed, the device descriptor classid check should handle this */ + /* Special case: Some NON-composite device have more than on interface: CDC/ACM * and MSC both may have two interfaces. */ @@ -372,6 +398,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Do the special case checks */ #warning Missing logic } +#endif /* The total number of classes is then the number of interfaces minus the * number of interfaces merged via the IAD descriptor. From 1500a5005790c702c043268e0b22f89872285247 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 27 Aug 2016 11:32:47 -0600 Subject: [PATCH 146/214] Add missing prototype for btn_lower_initialize() --- include/nuttx/input/buttons.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/nuttx/input/buttons.h b/include/nuttx/input/buttons.h index ee0785ef95c..901480bc8ee 100644 --- a/include/nuttx/input/buttons.h +++ b/include/nuttx/input/buttons.h @@ -200,6 +200,19 @@ extern "C" int btn_register(FAR const char *devname, FAR const struct btn_lowerhalf_s *lower); +/**************************************************************************** + * Name: btn_lower_initialize + * + * Description: + * Initialize the generic button lower half driver, bind it and register + * it with the upper half button driver as devname. + * + ****************************************************************************/ + +#if CONFIG_BUTTONS_LOWER +int btn_lower_initialize(FAR const char *devname); +#endif + #undef EXTERN #ifdef __cplusplus } From 58b45d64d707c20f7168fe965b36e51c383a899f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 28 Aug 2016 08:33:38 -0600 Subject: [PATCH 147/214] Fix composite connect method. --- drivers/usbhost/usbhost_composite.c | 55 ++++++++++++----------------- 1 file changed, 22 insertions(+), 33 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 24173bab239..6305b8d6ad0 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -48,10 +48,6 @@ #ifdef CONFIG_USBHOST_COMPOSITE -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Private Types ****************************************************************************/ @@ -106,14 +102,6 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass, FAR const uint8_t *configdesc, int desclen); static int usbhost_disconnected(FAR struct usbhost_class_s *usbclass); -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -160,8 +148,23 @@ static void usbhost_disconnect_all(FAR struct usbhsot_composite_s *priv) * Description: * This function implements the connect() method of struct * usbhost_class_s. This method is a callback into the class - * implementation. It is used to provide the device's configuration - * descriptor to the class so that the class may initialize properly + * implementation from the common enumeration logic. It is normally used + * to provide the device's configuration descriptor to the class so that + * the class may initialize properly. That calling sequence is: + * + * 1. usbhost_enumerate() + * 2. usbhost_classbind() + * 3. CLASS_CONNECT() + * + * However, that applies only to the Non-composite device. + * usbhost_classbind() is not called for the composite device and, hence, + * this method is never called. Rather, the composite logic calls + * CLASS_CONNECT() for each member of the composite in a calling sequence + * like: + * + * 1. usbhost_enumerate() + * 2. usbhost_composite() + * 3. Call CLASS_CONNECT() for each composite member * * Input Parameters: * usbclass - The USB host class entry previously obtained from a call to @@ -188,21 +191,7 @@ static void usbhost_disconnect_all(FAR struct usbhsot_composite_s *priv) static int usbhost_connect(FAR struct usbhost_class_s *usbclass, FAR const uint8_t *configdesc, int desclen) { - FAR struct usbhsot_composite_s *priv = (FAR struct usbhsot_composite_s *)usbclass; - int ret; - - DEBUGASSERT(priv != NULL && - configdesc != NULL && - desclen >= sizeof(struct usb_cfgdesc_s)); - - /* Forward the connection information to each contained class in the - * composite. - * REVIST: Is that right? Or should it be forwarded only to the class - * matching the configdesc? I am not sure that is going on here. - */ -#warning Missing logic - - return ret; + return -ENOSYS; } /**************************************************************************** @@ -383,7 +372,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, if (nintfs < 2) { - /* Only one interface. Can't be a composite device */ + /* Only one interface descriptor. Can't be a composite device */ return -ENOENT; } @@ -527,8 +516,6 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Is there is a class implementation registered to support this * device. - * REVISIT: This should have been saved in member structure when the - * number of member classes was counted. */ reg = usbhost_findclass(&priv->id); @@ -555,7 +542,9 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* All classes have been found, instantiated and bound to the composite class * container. Now bind the composite class continer to the HCD. * - * REVISIT: I dont' think this is right. + * REVISIT: I dont' think this is right. I am think we will need to construct + * a custom configuration + interface descriptors for each member of the + * composite. That might be tricky. Maybe there is a better way? */ ret = CLASS_CONNECT(&priv->usbclass, configdesc, desclen); From 31c364457af8fc43abc3beaaedf6a0754cc1819c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 28 Aug 2016 08:48:40 -0600 Subject: [PATCH 148/214] CLASS_CONNECT needs to be called for each member of the composite. --- drivers/usbhost/usbhost_composite.c | 39 ++++++++++++++++------------- 1 file changed, 21 insertions(+), 18 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 6305b8d6ad0..23bf9a63a2d 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -506,8 +506,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, DEBUGASSERT(i == nclasses); - /* Now loop, performing the registry lookup on each class in the - * composite. + /* Now loop, performing the registry lookup and initialization of each + * member class in the composite. */ for (i = 0; i < nclasses; i++) @@ -537,25 +537,28 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, ret = -ENOMEM; goto errour_with_members; } - } - /* All classes have been found, instantiated and bound to the composite class - * container. Now bind the composite class continer to the HCD. - * - * REVISIT: I dont' think this is right. I am think we will need to construct - * a custom configuration + interface descriptors for each member of the - * composite. That might be tricky. Maybe there is a better way? - */ - - ret = CLASS_CONNECT(&priv->usbclass, configdesc, desclen); - if (ret < 0) - { - /* On failure, call the class disconnect method of each contained - * class which should then free the allocated usbclass instance. + /* Call the newly instantiated classes connect() method provide it + * with the information that it needs to initialize properly, that + * is the configuration escriptor and all of the interface descriptors + * needed by the member class. + * + * REVISIT: I dont' think this will work. I am thinking we will need + * to construct a custom configuration + interface + endpoint + * descriptors to pass to each member of the composite. That might be + * tricky. Maybe there is a better way? */ - uerr("ERROR: CLASS_CONNECT failed: %d\n", ret); - goto errout_with_members; + ret = CLASS_CONNECT(member->usbclass, configdesc, desclen); + if (ret < 0) + { + /* On failure, call the class disconnect method of each contained + * class which should then free the allocated usbclass instance. + */ + + uerr("ERROR: CLASS_CONNECT failed: %d\n", ret); + goto errout_with_members; + } } /* Return our USB class structure */ From 786a18235c4782a5e8948e18840455beba61b8a4 Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Sun, 28 Aug 2016 13:22:34 -0600 Subject: [PATCH 149/214] configs/stm32f103-minimum: Add board config support to SPI LCD module JLX12864G-086 --- configs/stm32f103-minimum/README.txt | 6 + configs/stm32f103-minimum/jlx12864g/Make.defs | 113 ++ configs/stm32f103-minimum/jlx12864g/defconfig | 1357 +++++++++++++++++ configs/stm32f103-minimum/jlx12864g/setenv.sh | 100 ++ configs/stm32f103-minimum/src/Makefile | 4 + configs/stm32f103-minimum/src/stm32_lcd.c | 153 ++ configs/stm32f103-minimum/src/stm32_spi.c | 64 +- .../stm32f103-minimum/src/stm32f103_minimum.h | 12 +- 8 files changed, 1805 insertions(+), 4 deletions(-) create mode 100644 configs/stm32f103-minimum/jlx12864g/Make.defs create mode 100644 configs/stm32f103-minimum/jlx12864g/defconfig create mode 100644 configs/stm32f103-minimum/jlx12864g/setenv.sh create mode 100644 configs/stm32f103-minimum/src/stm32_lcd.c diff --git a/configs/stm32f103-minimum/README.txt b/configs/stm32f103-minimum/README.txt index 942f0458d60..145f6af0e42 100644 --- a/configs/stm32f103-minimum/README.txt +++ b/configs/stm32f103-minimum/README.txt @@ -562,6 +562,12 @@ Where is one of the following: builtin applications is enabled, but in the base configuration no builtin applications are selected. + jlx12864g: + --------- + This is a config example to use the JLX12864G-086 LCD module. To use this + LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4 + to CS; PA3 to RST; PA2 to RS. + usbnsh: ------- diff --git a/configs/stm32f103-minimum/jlx12864g/Make.defs b/configs/stm32f103-minimum/jlx12864g/Make.defs new file mode 100644 index 00000000000..06fcf0d63f1 --- /dev/null +++ b/configs/stm32f103-minimum/jlx12864g/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f103-minimum/jlx12864g/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f103-minimum/jlx12864g/defconfig b/configs/stm32f103-minimum/jlx12864g/defconfig new file mode 100644 index 00000000000..ac1ee07d2bb --- /dev/null +++ b/configs/stm32f103-minimum/jlx12864g/defconfig @@ -0,0 +1,1357 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +CONFIG_DEBUG_FEATURES=y + +# +# Debug SYSLOG Output Controls +# +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_WARN=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_ASSERTIONS is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +CONFIG_DEBUG_LCD=y +CONFIG_DEBUG_LCD_ERROR=y +CONFIG_DEBUG_LCD_WARN=y +CONFIG_DEBUG_LCD_INFO=y +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_SPI is not set +# CONFIG_DEBUG_TIMER is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +CONFIG_ARCH_CHIP_STM32F103C8=y +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set +# CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32_TINY is not set +CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f103-minimum" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_ARCH_HAVE_TIMEKEEPING=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_SPI_BITORDER is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +CONFIG_LCD=y + +# +# Common Graphic LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_SH1106_OLED_132 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +CONFIG_LCD_ST7567=y +CONFIG_ST7567_SPIMODE=0 +CONFIG_ST7567_FREQUENCY=3500000 +CONFIG_ST7567_NINTERFACES=1 +# CONFIG_ST7567_POWER is not set +CONFIG_ST7567_XRES=128 +CONFIG_ST7567_YRES=64 +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +CONFIG_NX_WRITEONLY=y +# CONFIG_NX_UPDATE is not set + +# +# Supported Pixel Depths +# +# CONFIG_NX_DISABLE_1BPP is not set +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=1 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +CONFIG_NXFONT_MONO5X8=y +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=1 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=2 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2 +CONFIG_EXAMPLES_NXLINES_BPP=1 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +CONFIG_EXAMPLES_NXTEXT=y + +# +# Basic Configuration of the example +# +CONFIG_EXAMPLES_NXTEXT_VPLANE=0 +CONFIG_EXAMPLES_NXTEXT_DEVNO=0 +CONFIG_EXAMPLES_NXTEXT_BPP=1 +CONFIG_EXAMPLES_NXTEXT_BMCACHE=128 +CONFIG_EXAMPLES_NXTEXT_GLCACHE=16 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXTEXT_EXTERNINIT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLEBG=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f103-minimum/jlx12864g/setenv.sh b/configs/stm32f103-minimum/jlx12864g/setenv.sh new file mode 100644 index 00000000000..4a9a11eff24 --- /dev/null +++ b/configs/stm32f103-minimum/jlx12864g/setenv.sh @@ -0,0 +1,100 @@ +#!/bin/bash +# configs//stm32f103-minimum/jlx12864g/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f103-minimum/src/Makefile b/configs/stm32f103-minimum/src/Makefile index 9f98afc7aee..0e070417152 100644 --- a/configs/stm32f103-minimum/src/Makefile +++ b/configs/stm32f103-minimum/src/Makefile @@ -51,4 +51,8 @@ ifeq ($(CONFIG_WL_MFRC522),y) CSRCS += stm32_mfrc522.c endif +ifeq ($(CONFIG_LCD_ST7567),y) +CSRCS += stm32_lcd.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32f103-minimum/src/stm32_lcd.c b/configs/stm32f103-minimum/src/stm32_lcd.c new file mode 100644 index 00000000000..3c3f1106355 --- /dev/null +++ b/configs/stm32f103-minimum/src/stm32_lcd.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * configs/stm32f103-minimum/src/stm32_lcd.c + * + * Copyright (C) 2016 Uniquix Tecnologia. All rights reserved. + * Author: Alan Carvalho de Assis + * + * I used the JLX12864G-086 LCD module based on ST7567 controller. + * + * Based on configs/zkit-arm-1769/src/lpc17_lcd.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Manikandan + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "stm32_gpio.h" +#include "stm32_spi.h" +#include "stm32f103_minimum.h" + +#ifdef CONFIG_NX_LCDDRIVER + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define LCD_SPI_PORTNO 1 /* On SPI1 */ + +#ifndef CONFIG_LCD_CONTRAST +# define CONFIG_LCD_CONTRAST 0x1f +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +FAR struct spi_dev_s *g_spidev; +FAR struct lcd_dev_s *g_lcddev; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + stm32_configgpio(STM32_LCD_RST); + stm32_configgpio(STM32_LCD_RS); + stm32_gpiowrite(STM32_LCD_RST, 1); + stm32_gpiowrite(STM32_LCD_RS, 1); + + g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO); + + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return 0; + } + + stm32_gpiowrite(STM32_LCD_RST, 0); + up_mdelay(1); + stm32_gpiowrite(STM32_LCD_RST, 1); + return 1; +} + +/**************************************************************************** + * Name: board_lcd_getdev + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + g_lcddev = st7567_initialize(g_spidev, lcddev); + if (!g_lcddev) + { + lcderr("ERROR: Failed to bind SPI port 1 to LCD %d: %d\n", lcddev); + } + else + { + lcdinfo("SPI port 1 bound to LCD %d\n", lcddev); + + /* And turn the LCD on (CONFIG_LCD_MAXPOWER should be 1) */ + + (void)g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER); + + /* Set contrast to right value, otherwise background too dark */ + + (void)g_lcddev->setcontrast(g_lcddev, CONFIG_LCD_CONTRAST); + + return g_lcddev; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* TO-FIX */ +} + +#endif /* CONFIG_NX_LCDDRIVER */ diff --git a/configs/stm32f103-minimum/src/stm32_spi.c b/configs/stm32f103-minimum/src/stm32_spi.c index 4b911f03460..2095e3e2af3 100644 --- a/configs/stm32f103-minimum/src/stm32_spi.c +++ b/configs/stm32f103-minimum/src/stm32_spi.c @@ -77,6 +77,10 @@ void stm32_spidev_initialize(void) #ifdef CONFIG_WL_MFRC522 (void)stm32_configgpio(GPIO_CS_MFRC522); /* MFRC522 chip select */ #endif + +#ifdef CONFIG_LCD_ST7567 + (void)stm32_configgpio(STM32_LCD_CS); /* ST7567 chip select */ +#endif } /**************************************************************************** @@ -105,7 +109,8 @@ void stm32_spidev_initialize(void) ****************************************************************************/ #ifdef CONFIG_STM32_SPI1 -void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) { #if defined(CONFIG_WL_MFRC522) if (devid == SPIDEV_WIRELESS) @@ -113,6 +118,13 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele stm32_gpiowrite(GPIO_CS_MFRC522, !selected); } #endif + +#ifdef CONFIG_LCD_ST7567 + if (devid == SPIDEV_DISPLAY) + { + stm32_gpiowrite(GPIO_CS_MFRC522, !selected); + } +#endif } uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -122,7 +134,8 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) #endif #ifdef CONFIG_STM32_SPI2 -void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) { } @@ -132,4 +145,51 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) } #endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool cmd) +{ +#ifdef CONFIG_LCD_ST7567 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + */ + + (void)stm32_gpiowrite(STM32_LCD_RS, !cmd); + + return OK; + } +#endif + + return -ENODEV; +} +#endif +#endif + #endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm32f103-minimum/src/stm32f103_minimum.h b/configs/stm32f103-minimum/src/stm32f103_minimum.h index 1116124d42e..c023d22dc95 100644 --- a/configs/stm32f103-minimum/src/stm32f103_minimum.h +++ b/configs/stm32f103-minimum/src/stm32f103_minimum.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/stm32f103-minimum/src/stm32f103_minimum.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Laurent Latil * * Redistribution and use in source and binary forms, with or without @@ -71,6 +71,15 @@ #define GPIO_CS_MFRC522 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) +#define STM32_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) + +#define STM32_LCD_RST (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN3) + +#define STM32_LCD_RS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN2) + /* USB Soft Connect Pullup: PC.13 */ #define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ @@ -128,4 +137,3 @@ int stm32_tone_setup(void); #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_STM32F103_MINIMUM_SRC_STM32F103_MINIMUM_H */ - From 3a1c0e07fa45bbb3ef9939c65ab086db3a5f4095 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 28 Aug 2016 13:43:19 -0600 Subject: [PATCH 150/214] Fix a comment block --- configs/stm32f103-minimum/src/stm32_lcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/stm32f103-minimum/src/stm32_lcd.c b/configs/stm32f103-minimum/src/stm32_lcd.c index 3c3f1106355..22e345b3f0b 100644 --- a/configs/stm32f103-minimum/src/stm32_lcd.c +++ b/configs/stm32f103-minimum/src/stm32_lcd.c @@ -66,9 +66,9 @@ #ifdef CONFIG_NX_LCDDRIVER -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ #define LCD_SPI_PORTNO 1 /* On SPI1 */ From 5125feec1e5b7eb8efa2b5869b24a51ea03904b6 Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Sun, 28 Aug 2016 13:22:34 -0600 Subject: [PATCH 151/214] configs/stm32f103-minimum: Add board config support to SPI LCD module JLX12864G-086 --- configs/stm32f103-minimum/README.txt | 6 + configs/stm32f103-minimum/jlx12864g/Make.defs | 113 ++ configs/stm32f103-minimum/jlx12864g/defconfig | 1357 +++++++++++++++++ configs/stm32f103-minimum/jlx12864g/setenv.sh | 100 ++ configs/stm32f103-minimum/src/Makefile | 4 + configs/stm32f103-minimum/src/stm32_lcd.c | 153 ++ configs/stm32f103-minimum/src/stm32_spi.c | 64 +- .../stm32f103-minimum/src/stm32f103_minimum.h | 12 +- 8 files changed, 1805 insertions(+), 4 deletions(-) create mode 100644 configs/stm32f103-minimum/jlx12864g/Make.defs create mode 100644 configs/stm32f103-minimum/jlx12864g/defconfig create mode 100644 configs/stm32f103-minimum/jlx12864g/setenv.sh create mode 100644 configs/stm32f103-minimum/src/stm32_lcd.c diff --git a/configs/stm32f103-minimum/README.txt b/configs/stm32f103-minimum/README.txt index 942f0458d60..145f6af0e42 100644 --- a/configs/stm32f103-minimum/README.txt +++ b/configs/stm32f103-minimum/README.txt @@ -562,6 +562,12 @@ Where is one of the following: builtin applications is enabled, but in the base configuration no builtin applications are selected. + jlx12864g: + --------- + This is a config example to use the JLX12864G-086 LCD module. To use this + LCD you need to connect PA5 (SPI1 CLK) to SCK; PA7 (SPI1 MOSI) to SDA; PA4 + to CS; PA3 to RST; PA2 to RS. + usbnsh: ------- diff --git a/configs/stm32f103-minimum/jlx12864g/Make.defs b/configs/stm32f103-minimum/jlx12864g/Make.defs new file mode 100644 index 00000000000..06fcf0d63f1 --- /dev/null +++ b/configs/stm32f103-minimum/jlx12864g/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f103-minimum/jlx12864g/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f103-minimum/jlx12864g/defconfig b/configs/stm32f103-minimum/jlx12864g/defconfig new file mode 100644 index 00000000000..ac1ee07d2bb --- /dev/null +++ b/configs/stm32f103-minimum/jlx12864g/defconfig @@ -0,0 +1,1357 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +CONFIG_DEBUG_FEATURES=y + +# +# Debug SYSLOG Output Controls +# +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_WARN=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_ASSERTIONS is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +CONFIG_DEBUG_LCD=y +CONFIG_DEBUG_LCD_ERROR=y +CONFIG_DEBUG_LCD_WARN=y +CONFIG_DEBUG_LCD_INFO=y +# CONFIG_DEBUG_LEDS is not set +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_SPI is not set +# CONFIG_DEBUG_TIMER is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set +# CONFIG_DEBUG_HARDFAULT is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +CONFIG_SERIAL_TERMIOS=y + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +CONFIG_ARCH_CHIP_STM32F103C8=y +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +CONFIG_STM32_SPI1=y +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +CONFIG_STM32_SPI=y +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_SPI1_REMAP is not set +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# +# CONFIG_STM32_ONESHOT is not set +# CONFIG_STM32_FREERUN is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set +# CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set + +# +# SPI Configuration +# +# CONFIG_STM32_SPI_INTERRUPTS is not set +# CONFIG_STM32_SPI_DMA is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32_TINY is not set +CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f103-minimum" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +CONFIG_ARCH_HAVE_TIMEKEEPING=y +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=7 +CONFIG_START_DAY=5 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +CONFIG_SPI_CMDDATA=y +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_SPI_BITORDER is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +CONFIG_LCD=y + +# +# Common Graphic LCD Settings +# +# CONFIG_LCD_CONSOLE is not set +# CONFIG_LCD_NOGETRUN is not set +CONFIG_LCD_MAXCONTRAST=63 +CONFIG_LCD_MAXPOWER=1 + +# +# Graphic LCD Devices +# +# CONFIG_LCD_P14201 is not set +# CONFIG_LCD_NOKIA6100 is not set +# CONFIG_LCD_MIO283QT2 is not set +# CONFIG_LCD_MIO283QT9A is not set +# CONFIG_LCD_UG9664HSWAG01 is not set +# CONFIG_LCD_SH1106_OLED_132 is not set +# CONFIG_LCD_UG2864HSWEG01 is not set +# CONFIG_LCD_UG2832HSWEG04 is not set +# CONFIG_LCD_SSD1351 is not set +# CONFIG_LCD_ST7565 is not set +CONFIG_LCD_ST7567=y +CONFIG_ST7567_SPIMODE=0 +CONFIG_ST7567_FREQUENCY=3500000 +CONFIG_ST7567_NINTERFACES=1 +# CONFIG_ST7567_POWER is not set +CONFIG_ST7567_XRES=128 +CONFIG_ST7567_YRES=64 +# CONFIG_LCD_UG2864AMBAG01 is not set +# CONFIG_LCD_SSD1289 is not set +# CONFIG_LCD_SHARP_MEMLCD is not set +CONFIG_LCD_LANDSCAPE=y +# CONFIG_LCD_PORTRAIT is not set +# CONFIG_LCD_RPORTRAIT is not set +# CONFIG_LCD_RLANDSCAPE is not set +# CONFIG_LCD_ILI9341 is not set +# CONFIG_LCD_RA8875 is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=256 +CONFIG_USART1_TXBUFSIZE=256 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +CONFIG_NX=y +CONFIG_NX_LCDDRIVER=y +CONFIG_NX_NPLANES=1 +CONFIG_NX_BGCOLOR=0x0 +CONFIG_NX_WRITEONLY=y +# CONFIG_NX_UPDATE is not set + +# +# Supported Pixel Depths +# +# CONFIG_NX_DISABLE_1BPP is not set +CONFIG_NX_DISABLE_2BPP=y +CONFIG_NX_DISABLE_4BPP=y +CONFIG_NX_DISABLE_8BPP=y +CONFIG_NX_DISABLE_16BPP=y +CONFIG_NX_DISABLE_24BPP=y +CONFIG_NX_DISABLE_32BPP=y +CONFIG_NX_PACKEDMSFIRST=y + +# +# Input Devices +# +# CONFIG_NX_XYINPUT is not set +CONFIG_NX_XYINPUT_NONE=y +# CONFIG_NX_XYINPUT_MOUSE is not set +# CONFIG_NX_XYINPUT_TOUCHSCREEN is not set +# CONFIG_NX_KBD is not set + +# +# Framed Window Borders +# +CONFIG_NXTK_BORDERWIDTH=1 +CONFIG_NXTK_DEFAULT_BORDERCOLORS=y +# CONFIG_NXTK_AUTORAISE is not set + +# +# Font Selections +# +CONFIG_NXFONTS_CHARBITS=7 +CONFIG_NXFONT_MONO5X8=y +# CONFIG_NXFONT_SANS17X22 is not set +# CONFIG_NXFONT_SANS20X26 is not set +# CONFIG_NXFONT_SANS23X27 is not set +# CONFIG_NXFONT_SANS22X29 is not set +# CONFIG_NXFONT_SANS28X37 is not set +# CONFIG_NXFONT_SANS39X48 is not set +# CONFIG_NXFONT_SANS17X23B is not set +# CONFIG_NXFONT_SANS20X27B is not set +# CONFIG_NXFONT_SANS22X29B is not set +# CONFIG_NXFONT_SANS28X37B is not set +# CONFIG_NXFONT_SANS40X49B is not set +# CONFIG_NXFONT_SERIF22X29 is not set +# CONFIG_NXFONT_SERIF29X37 is not set +# CONFIG_NXFONT_SERIF38X48 is not set +# CONFIG_NXFONT_SERIF22X28B is not set +# CONFIG_NXFONT_SERIF27X38B is not set +# CONFIG_NXFONT_SERIF38X49B is not set +# CONFIG_NXFONT_PIXEL_UNICODE is not set +# CONFIG_NXFONT_PIXEL_LCD_MACHINE is not set +# CONFIG_NXFONT_X11_MISC_FIXED_4X6 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X7 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_5X8 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X9 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X10 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X12 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_6X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_7X14B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_8X13O is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X15B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18 is not set +# CONFIG_NXFONT_X11_MISC_FIXED_9X18B is not set +# CONFIG_NXFONT_X11_MISC_FIXED_10X20 is not set +# CONFIG_NXTERM is not set + +# +# NX Multi-user only options +# +# CONFIG_NX_MULTIUSER is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_LCDRW is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXFFS is not set +CONFIG_EXAMPLES_NXHELLO=y +CONFIG_EXAMPLES_NXHELLO_VPLANE=0 +CONFIG_EXAMPLES_NXHELLO_DEVNO=0 +CONFIG_EXAMPLES_NXHELLO_BPP=1 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set +CONFIG_EXAMPLES_NXLINES=y +CONFIG_EXAMPLES_NXLINES_VPLANE=0 +CONFIG_EXAMPLES_NXLINES_DEVNO=0 +# CONFIG_EXAMPLES_NXLINES_DEFAULT_COLORS is not set +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=2 +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2 +CONFIG_EXAMPLES_NXLINES_BPP=1 +# CONFIG_EXAMPLES_NXLINES_EXTERNINIT is not set +# CONFIG_EXAMPLES_NXTERM is not set +CONFIG_EXAMPLES_NXTEXT=y + +# +# Basic Configuration of the example +# +CONFIG_EXAMPLES_NXTEXT_VPLANE=0 +CONFIG_EXAMPLES_NXTEXT_DEVNO=0 +CONFIG_EXAMPLES_NXTEXT_BPP=1 +CONFIG_EXAMPLES_NXTEXT_BMCACHE=128 +CONFIG_EXAMPLES_NXTEXT_GLCACHE=16 + +# +# Example Color Configuration +# +CONFIG_EXAMPLES_NXTEXT_DEFAULT_COLORS=y + +# +# Example Font Configuration +# +CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXTEXT_EXTERNINIT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +CONFIG_NSH_DISABLEBG=y +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +CONFIG_NSH_DISABLE_CMP=y +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=1024 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +CONFIG_NSH_DISABLE_ITEF=y +CONFIG_NSH_DISABLE_LOOPS=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_SYSTEM is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f103-minimum/jlx12864g/setenv.sh b/configs/stm32f103-minimum/jlx12864g/setenv.sh new file mode 100644 index 00000000000..4a9a11eff24 --- /dev/null +++ b/configs/stm32f103-minimum/jlx12864g/setenv.sh @@ -0,0 +1,100 @@ +#!/bin/bash +# configs//stm32f103-minimum/jlx12864g/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f103-minimum/src/Makefile b/configs/stm32f103-minimum/src/Makefile index 9f98afc7aee..0e070417152 100644 --- a/configs/stm32f103-minimum/src/Makefile +++ b/configs/stm32f103-minimum/src/Makefile @@ -51,4 +51,8 @@ ifeq ($(CONFIG_WL_MFRC522),y) CSRCS += stm32_mfrc522.c endif +ifeq ($(CONFIG_LCD_ST7567),y) +CSRCS += stm32_lcd.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32f103-minimum/src/stm32_lcd.c b/configs/stm32f103-minimum/src/stm32_lcd.c new file mode 100644 index 00000000000..3c3f1106355 --- /dev/null +++ b/configs/stm32f103-minimum/src/stm32_lcd.c @@ -0,0 +1,153 @@ +/**************************************************************************** + * configs/stm32f103-minimum/src/stm32_lcd.c + * + * Copyright (C) 2016 Uniquix Tecnologia. All rights reserved. + * Author: Alan Carvalho de Assis + * + * I used the JLX12864G-086 LCD module based on ST7567 controller. + * + * Based on configs/zkit-arm-1769/src/lpc17_lcd.c + * + * Copyright (C) 2013 Zilogic Systems. All rights reserved. + * Author: Manikandan + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "up_arch.h" +#include "up_internal.h" + +#include "stm32_gpio.h" +#include "stm32_spi.h" +#include "stm32f103_minimum.h" + +#ifdef CONFIG_NX_LCDDRIVER + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define LCD_SPI_PORTNO 1 /* On SPI1 */ + +#ifndef CONFIG_LCD_CONTRAST +# define CONFIG_LCD_CONTRAST 0x1f +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +FAR struct spi_dev_s *g_spidev; +FAR struct lcd_dev_s *g_lcddev; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + stm32_configgpio(STM32_LCD_RST); + stm32_configgpio(STM32_LCD_RS); + stm32_gpiowrite(STM32_LCD_RST, 1); + stm32_gpiowrite(STM32_LCD_RS, 1); + + g_spidev = stm32_spibus_initialize(LCD_SPI_PORTNO); + + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return 0; + } + + stm32_gpiowrite(STM32_LCD_RST, 0); + up_mdelay(1); + stm32_gpiowrite(STM32_LCD_RST, 1); + return 1; +} + +/**************************************************************************** + * Name: board_lcd_getdev + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + g_lcddev = st7567_initialize(g_spidev, lcddev); + if (!g_lcddev) + { + lcderr("ERROR: Failed to bind SPI port 1 to LCD %d: %d\n", lcddev); + } + else + { + lcdinfo("SPI port 1 bound to LCD %d\n", lcddev); + + /* And turn the LCD on (CONFIG_LCD_MAXPOWER should be 1) */ + + (void)g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER); + + /* Set contrast to right value, otherwise background too dark */ + + (void)g_lcddev->setcontrast(g_lcddev, CONFIG_LCD_CONTRAST); + + return g_lcddev; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* TO-FIX */ +} + +#endif /* CONFIG_NX_LCDDRIVER */ diff --git a/configs/stm32f103-minimum/src/stm32_spi.c b/configs/stm32f103-minimum/src/stm32_spi.c index 4b911f03460..2095e3e2af3 100644 --- a/configs/stm32f103-minimum/src/stm32_spi.c +++ b/configs/stm32f103-minimum/src/stm32_spi.c @@ -77,6 +77,10 @@ void stm32_spidev_initialize(void) #ifdef CONFIG_WL_MFRC522 (void)stm32_configgpio(GPIO_CS_MFRC522); /* MFRC522 chip select */ #endif + +#ifdef CONFIG_LCD_ST7567 + (void)stm32_configgpio(STM32_LCD_CS); /* ST7567 chip select */ +#endif } /**************************************************************************** @@ -105,7 +109,8 @@ void stm32_spidev_initialize(void) ****************************************************************************/ #ifdef CONFIG_STM32_SPI1 -void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) { #if defined(CONFIG_WL_MFRC522) if (devid == SPIDEV_WIRELESS) @@ -113,6 +118,13 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele stm32_gpiowrite(GPIO_CS_MFRC522, !selected); } #endif + +#ifdef CONFIG_LCD_ST7567 + if (devid == SPIDEV_DISPLAY) + { + stm32_gpiowrite(GPIO_CS_MFRC522, !selected); + } +#endif } uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -122,7 +134,8 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) #endif #ifdef CONFIG_STM32_SPI2 -void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) { } @@ -132,4 +145,51 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) } #endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool cmd) +{ +#ifdef CONFIG_LCD_ST7567 + if (devid == SPIDEV_DISPLAY) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + */ + + (void)stm32_gpiowrite(STM32_LCD_RS, !cmd); + + return OK; + } +#endif + + return -ENODEV; +} +#endif +#endif + #endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */ diff --git a/configs/stm32f103-minimum/src/stm32f103_minimum.h b/configs/stm32f103-minimum/src/stm32f103_minimum.h index 1116124d42e..c023d22dc95 100644 --- a/configs/stm32f103-minimum/src/stm32f103_minimum.h +++ b/configs/stm32f103-minimum/src/stm32f103_minimum.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/stm32f103-minimum/src/stm32f103_minimum.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Laurent Latil * * Redistribution and use in source and binary forms, with or without @@ -71,6 +71,15 @@ #define GPIO_CS_MFRC522 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) +#define STM32_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) + +#define STM32_LCD_RST (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN3) + +#define STM32_LCD_RS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN2) + /* USB Soft Connect Pullup: PC.13 */ #define GPIO_USB_PULLUP (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\ @@ -128,4 +137,3 @@ int stm32_tone_setup(void); #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_STM32F103_MINIMUM_SRC_STM32F103_MINIMUM_H */ - From 3bc14827f35cb0725acb46a5ac590605294953b1 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 28 Aug 2016 13:43:19 -0600 Subject: [PATCH 152/214] Fix a comment block --- configs/stm32f103-minimum/src/stm32_lcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/stm32f103-minimum/src/stm32_lcd.c b/configs/stm32f103-minimum/src/stm32_lcd.c index 3c3f1106355..22e345b3f0b 100644 --- a/configs/stm32f103-minimum/src/stm32_lcd.c +++ b/configs/stm32f103-minimum/src/stm32_lcd.c @@ -66,9 +66,9 @@ #ifdef CONFIG_NX_LCDDRIVER -/************************************************************************************ +/**************************************************************************** * Pre-processor Definitions - ************************************************************************************/ + ****************************************************************************/ #define LCD_SPI_PORTNO 1 /* On SPI1 */ From 43abb7cb3a8d62ef500ffa3a1439c060ff351967 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 28 Aug 2016 14:51:55 -0600 Subject: [PATCH 153/214] Mark USB host compsite feature EXPERMENTAL; update ChangeLog --- ChangeLog | 6 ++++++ drivers/usbhost/Kconfig | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/ChangeLog b/ChangeLog index 35c2fc43b0c..699e2e037ae 100755 --- a/ChangeLog +++ b/ChangeLog @@ -12593,3 +12593,9 @@ generally available (2016-08-20). * sched/sched_cpuload_oneshot: Use the oneshot timer with optional entropy to measure cPU load if so configured (2016-08-20). + * drivers/usbhost/usbhost_composite.c: An an EXPERIMENTAL prototype of + how USB host support for composite devices might be implemented. This + feature is EXPERIMENTAL because (1) it is untested and (2) has some + know design issues that must be addressed before it can be of use + (2016-08-28). + diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig index ee8a1d8d5aa..0ad805ba81a 100644 --- a/drivers/usbhost/Kconfig +++ b/drivers/usbhost/Kconfig @@ -80,9 +80,13 @@ endif # USBHOST_HUB config USBHOST_COMPOSITE bool "Composite device support" default n + depends on EXPERIMENTAL ---help--- Build in USB host support for connected composite devices + NOTE: This feature is marked EXPERIMENTAL because it it untested + and has some known design issues that must still be be resolved. + config USBHOST_MSC bool "Mass Storage Class Support" default n From 7d5173ca0954170f27830a206db8a5cd1370a3d3 Mon Sep 17 00:00:00 2001 From: Alpo Leinonen Date: Mon, 29 Aug 2016 07:53:57 -0600 Subject: [PATCH 154/214] USB host composite: Several syntactic errors fixed --- drivers/lcd/memlcd.c | 2 ++ drivers/usbhost/usbhost_composite.c | 56 ++++++++++++++++------------- drivers/usbhost/usbhost_composite.h | 2 ++ 3 files changed, 35 insertions(+), 25 deletions(-) diff --git a/drivers/lcd/memlcd.c b/drivers/lcd/memlcd.c index 9a2527b39af..85a1678f84b 100644 --- a/drivers/lcd/memlcd.c +++ b/drivers/lcd/memlcd.c @@ -562,6 +562,7 @@ static int memlcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t * buffer, * Get information about the LCD video controller configuration. * ****************************************************************************/ + static int memlcd_getvideoinfo(FAR struct lcd_dev_s *dev, FAR struct fb_videoinfo_s *vinfo) { @@ -708,6 +709,7 @@ static int memlcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast) * the specified LCD. NULL is returned on any failure. * ****************************************************************************/ + FAR struct lcd_dev_s *memlcd_initialize(FAR struct spi_dev_s *spi, FAR struct memlcd_priv_s *priv, unsigned int devno) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 23bf9a63a2d..18ef0497824 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -40,8 +40,10 @@ #include #include +#include #include +#include #include #include "usbhost_composite.h" @@ -58,24 +60,24 @@ struct usbhost_component_s { /* This the the classobject returned by each contained class */ - FAR struct usbhost_class_s **usbclass + FAR struct usbhost_class_s *usbclass; /* This is the information that we need to do the registry lookup for this * class member. */ - struct usbhost_id_s id, + struct usbhost_id_s id; }; /* This structure contains the internal, private state of the USB host * CDC/ACM class. */ -struct usbhsot_composite_s +struct usbhost_composite_s { /* This is the externally visible portion of the state. The usbclass must * the first element of the structure. It is then cast compatible with - * struct usbhsot_composite_s. + * struct usbhost_composite_s. */ struct usbhost_class_s usbclass; @@ -120,13 +122,14 @@ static int usbhost_disconnected(FAR struct usbhost_class_s *usbclass); * ****************************************************************************/ -static void usbhost_disconnect_all(FAR struct usbhsot_composite_s *priv) +static void usbhost_disconnect_all(FAR struct usbhost_composite_s *priv) { FAR struct usbhost_component_s *member; + int i; /* Loop, processing each class that has been included into the composite */ - for (i = 0; i < nclasses; i++) + for (i = 0; i < priv->nclasses; i++) { member = &priv->members[i]; @@ -218,7 +221,7 @@ static int usbhost_connect(FAR struct usbhost_class_s *usbclass, static int usbhost_disconnected(struct usbhost_class_s *usbclass) { - FAR struct usbhsot_composite_s *priv = (FAR struct usbhsot_composite_s *)usbclass; + FAR struct usbhost_composite_s *priv = (FAR struct usbhost_composite_s *)usbclass; DEBUGASSERT(priv != NULL); @@ -279,7 +282,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR struct usbhost_id_s *id, FAR struct usbhost_class_s **usbclass) { - FAR struct usbhsot_composite_s *priv; + FAR struct usbhost_composite_s *priv; FAR struct usbhost_component_s *member; FAR const struct usbhost_registry_s *reg; FAR struct usb_desc_s *desc; @@ -288,6 +291,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, uint16_t nmerged; uint16_t nclasses; int offset; + int ret; int i; /* Determine if this a composite device has been connected to the @@ -323,7 +327,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * descriptor (nmerged). */ - mergeset = 0 + mergeset = 0; nintfs = 0; nmerged = 0; @@ -362,8 +366,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Keep track of which interfaces have been merged */ DEBUGASSERT(iad->firstif + iad->nifs < 32); - mask = (1 << iad->nifs) - 1; - mergset |= mask << iad->firstif; + mask = (1 << iad->nifs) - 1; + mergeset |= mask << iad->firstif; } } @@ -404,8 +408,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Allocate the composite class container */ - priv = (FAR struct usbhsot_composite_s *) - kmm_zalloc(sizeof(struct usbhsot_composite_s)); + priv = (FAR struct usbhost_composite_s *) + kmm_zalloc(sizeof(struct usbhost_composite_s)); if (priv == NULL) { @@ -453,7 +457,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Was the interface merged via an IAD descriptor? */ DEBUGASSERT(ifdesc->iif < 32); - if ((mergset & (1 << ifdesc->iif)) == 0) + if ((mergeset & (1 << ifdesc->iif)) == 0) { FAR struct usbhost_id_s *member = (FAR struct usbhost_id_s *)&priv->members[i]; @@ -482,18 +486,20 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION) { FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; + FAR struct usbhost_id_s *member = + (FAR struct usbhost_id_s *)&priv->members[i]; - /* Yes.. Save the registry lookup information from the IAD. */ + /* Yes.. Save the registry lookup information from the IAD. */ - member->base = iad->classid; - member->subclass = iad->subclass; - member->proto = iad->protocol; - member->vid = id->vid; - member->pid = id->pid; + member->base = iad->classid; + member->subclass = iad->subclass; + member->proto = iad->protocol; + member->vid = id->vid; + member->pid = id->pid; - /* Increment the member index */ + /* Increment the member index */ - i++; + i++; } } @@ -518,12 +524,12 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * device. */ - reg = usbhost_findclass(&priv->id); + reg = usbhost_findclass(&member->id); if (reg == NULL) { uinfo("usbhost_findclass failed\n"); ret = -EINVAL; - goto errour_with_members; + goto errout_with_members; } /* Yes.. there is a class for this device. Get an instance of its @@ -535,7 +541,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, { uinfo("CLASS_CREATE failed\n"); ret = -ENOMEM; - goto errour_with_members; + goto errout_with_members; } /* Call the newly instantiated classes connect() method provide it diff --git a/drivers/usbhost/usbhost_composite.h b/drivers/usbhost/usbhost_composite.h index a44f4e7f00c..4d1e35d0d1d 100644 --- a/drivers/usbhost/usbhost_composite.h +++ b/drivers/usbhost/usbhost_composite.h @@ -42,6 +42,7 @@ #include +#include #include #ifdef CONFIG_USBHOST_COMPOSITE @@ -80,6 +81,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR const uint8_t *configdesc, int desclen, + FAR struct usbhost_id_s *id, FAR struct usbhost_class_s **usbclass); #undef EXTERN From f4f807100bef3ee87fe1ab9f7df76c24730e0401 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 29 Aug 2016 14:55:03 -0600 Subject: [PATCH 155/214] Update comment --- drivers/usbhost/usbhost_composite.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 18ef0497824..d1a5f8bf2cc 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -512,6 +512,12 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, DEBUGASSERT(i == nclasses); + /* REVISIT: Here I think that we need to create an intermediate data + * structure that indexes all interface and endpoint dscriptors in the + * configuration. This index table will be used before CLASS_CONNECT() + * is called to construct a meaning conifuration for the single class. + */ + /* Now loop, performing the registry lookup and initialization of each * member class in the composite. */ From 1ce4db80085a1e7fa4dac2da122f63dfa1df921d Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 29 Aug 2016 15:02:15 -0600 Subject: [PATCH 156/214] USB host composite: Save some information that will be needed to create a class-specific configuration. --- drivers/usbhost/usbhost_composite.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index d1a5f8bf2cc..399feec2779 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -67,6 +67,13 @@ struct usbhost_component_s */ struct usbhost_id_s id; + + /* This information will be needed to construct a meaningful configuration + * for CLASS_CONNSET() + */ + + uint8_t iff; /* First interface */ + uint8_t nifs; /* Number of interfaces */ }; /* This structure contains the internal, private state of the USB host @@ -466,15 +473,18 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * lookup information from the interface descriptor. */ - member->base = ifdesc->classid; - member->subclass = ifdesc->subclass; - member->proto = ifdesc->protocol; - member->vid = id->vid; - member->pid = id->pid; + member->base = ifdesc->classid; + member->subclass = ifdesc->subclass; + member->proto = ifdesc->protocol; + member->vid = id->vid; + member->pid = id->pid; - /* Increment the member index */ + member->iff = ifdesc->iff; + member->nifs = 1; - i++; + /* Increment the member index */ + + i++; } } @@ -497,6 +507,9 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, member->vid = id->vid; member->pid = id->pid; + member->iff = iad->firstif; + member->nifs = iad->nifs; + /* Increment the member index */ i++; From ee83e49f7551242bc1a90321ca6d3fb4b2291f56 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 29 Aug 2016 15:43:11 -0600 Subject: [PATCH 157/214] Update a comment --- drivers/usbhost/usbhost_composite.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 399feec2779..3e532914770 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -529,6 +529,10 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * structure that indexes all interface and endpoint dscriptors in the * configuration. This index table will be used before CLASS_CONNECT() * is called to construct a meaning conifuration for the single class. + * + * An option would be some functions: usbhost_findinterface() and + * usbhost_findenpoint() that could do the brute force look-up as + * necessary. */ /* Now loop, performing the registry lookup and initialization of each From 9c3bade7b4b1cfda37687dda672190b65f7f4ce0 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 30 Aug 2016 07:59:57 -0600 Subject: [PATCH 158/214] net/tcp: tcp_ipvX_bind() not actually using the ported selected with port==0. Also removes duplicate call to pkt_input(). Issues noted by Pascal Speck. --- arch/arm/src/stm32/stm32_eth.c | 6 ------ net/tcp/tcp_conn.c | 26 ++++++++++++++++---------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index 30357d1b373..8103477f5a9 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -1690,12 +1690,6 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv) continue; } -#ifdef CONFIG_NET_PKT - /* When packet sockets are enabled, feed the frame into the packet tap */ - - pkt_input(&priv->dev); -#endif - /* We only accept IP packets of the configured type and ARP packets */ #ifdef CONFIG_NET_IPv4 diff --git a/net/tcp/tcp_conn.c b/net/tcp/tcp_conn.c index ac861c24d4e..12f7b332ea8 100644 --- a/net/tcp/tcp_conn.c +++ b/net/tcp/tcp_conn.c @@ -273,7 +273,8 @@ static FAR struct tcp_conn_s *tcp_listener(uint16_t portno) * selected. * * Return: - * 0 on success, negated errno on failure: + * Selected or verified port number in host order on success, a negated + * errno on failure: * * EADDRINUSE * The given address is already in use. @@ -305,6 +306,7 @@ static int tcp_selectport(uint16_t portno) /* Guess that the next available port number will be the one after * the last port number assigned. */ + portno = ++g_last_tcp_port; /* Make sure that the port number is within range */ @@ -338,7 +340,7 @@ static int tcp_selectport(uint16_t portno) } } - /* Return the selected or verified port number */ + /* Return the selected or verified port number (host byte order) */ return portno; } @@ -520,7 +522,7 @@ static inline int tcp_ipv4_bind(FAR struct tcp_conn_s *conn, flags = net_lock(); - /* Verify or select a local port */ + /* Verify or select a local port (host byte order) */ #ifdef CONFIG_NETDEV_MULTINIC port = tcp_selectport(PF_INET, @@ -536,9 +538,9 @@ static inline int tcp_ipv4_bind(FAR struct tcp_conn_s *conn, return port; } - /* Save the local address in the connection structure. */ + /* Save the local address in the connection structure (network byte order). */ - conn->lport = addr->sin_port; + conn->lport = htons(port); #ifdef CONFIG_NETDEV_MULTINIC net_ipv4addr_copy(conn->u.ipv4.laddr, addr->sin_addr.s_addr); #endif @@ -595,7 +597,7 @@ static inline int tcp_ipv6_bind(FAR struct tcp_conn_s *conn, flags = net_lock(); - /* Verify or select a local port */ + /* Verify or select a local port (host byte order) */ #ifdef CONFIG_NETDEV_MULTINIC /* The port number must be unique for this address binding */ @@ -617,9 +619,9 @@ static inline int tcp_ipv6_bind(FAR struct tcp_conn_s *conn, return port; } - /* Save the local address in the connection structure. */ + /* Save the local address in the connection structure (network byte order). */ - conn->lport = addr->sin6_port; + conn->lport = htons(port); #ifdef CONFIG_NETDEV_MULTINIC net_ipv6addr_copy(conn->u.ipv6.laddr, addr->sin6_addr.in6_u.u6_addr16); #endif @@ -1217,7 +1219,9 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr) if (conn->domain == PF_INET) #endif { - /* Select a port that is unique for this IPv4 local address */ + /* Select a port that is unique for this IPv4 local address (host + * order). + */ port = tcp_selectport(PF_INET, (FAR const union ip_addr_u *)&conn->u.ipv4.laddr, @@ -1230,7 +1234,9 @@ int tcp_connect(FAR struct tcp_conn_s *conn, FAR const struct sockaddr *addr) else #endif { - /* Select a port that is unique for this IPv6 local address */ + /* Select a port that is unique for this IPv6 local address (host + * order). + */ port = tcp_selectport(PF_INET6, (FAR const union ip_addr_u *)conn->u.ipv6.laddr, From bef7f5be2319a881128667109a7d3ee5772a6a29 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 30 Aug 2016 08:04:18 -0600 Subject: [PATCH 159/214] STM32 F7: Remove duplicate call to pkt_input from Ethernet driver. --- arch/arm/src/stm32f7/stm32_ethernet.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c index 74d7721ed60..9caceb48427 100644 --- a/arch/arm/src/stm32f7/stm32_ethernet.c +++ b/arch/arm/src/stm32f7/stm32_ethernet.c @@ -1788,12 +1788,6 @@ static void stm32_receive(struct stm32_ethmac_s *priv) continue; } -#ifdef CONFIG_NET_PKT - /* When packet sockets are enabled, feed the frame into the packet tap */ - - pkt_input(&priv->dev); -#endif - /* We only accept IP packets of the configured type and ARP packets */ #ifdef CONFIG_NET_IPv4 From ac623abc7dd065a8631943d9f06543a156a7e86b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 30 Aug 2016 10:52:41 -0600 Subject: [PATCH 160/214] USB host composite: Reosolves last remaining REVISIT design issues. Compiles clean with no errors and warning and is fully ready for testing. --- drivers/usbhost/Kconfig | 4 +- drivers/usbhost/usbhost_composite.c | 317 +++++++++++++++++++++++----- 2 files changed, 271 insertions(+), 50 deletions(-) diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig index 0ad805ba81a..021dababb63 100644 --- a/drivers/usbhost/Kconfig +++ b/drivers/usbhost/Kconfig @@ -84,8 +84,8 @@ config USBHOST_COMPOSITE ---help--- Build in USB host support for connected composite devices - NOTE: This feature is marked EXPERIMENTAL because it it untested - and has some known design issues that must still be be resolved. + NOTE: This feature is marked EXPERIMENTAL because it has not been + untested config USBHOST_MSC bool "Mass Storage Class Support" diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 3e532914770..5d629cfcb63 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -39,6 +39,7 @@ #include +#include #include #include #include @@ -50,13 +51,24 @@ #ifdef CONFIG_USBHOST_COMPOSITE +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* This is the size of a large, allocated temporary buffer that we will use + * to constuct custom configuration descriptors for each member class. + */ + +#define CUSTOM_CONFIG_BUFSIZE \ + (USB_SIZEOF_CFGDESC + 3 * USB_SIZEOF_IFDESC + 9 * USB_SIZEOF_EPDESC) + /**************************************************************************** * Private Types ****************************************************************************/ /* This structure describes one component class of the composite */ -struct usbhost_component_s +struct usbhost_member_s { /* This the the classobject returned by each contained class */ @@ -72,7 +84,7 @@ struct usbhost_component_s * for CLASS_CONNSET() */ - uint8_t iff; /* First interface */ + uint8_t firstif; /* First interface */ uint8_t nifs; /* Number of interfaces */ }; @@ -94,11 +106,11 @@ struct usbhost_composite_s uint16_t nclasses; /* Number of component classes in the composite */ /* The following points to an allocated array of type struct - * usbhost_component_s. Element element of the array corresponds to one + * usbhost_member_s. Element element of the array corresponds to one * component class in the composite. */ - FAR struct usbhost_component_s *members; + FAR struct usbhost_member_s *members; }; /**************************************************************************** @@ -131,7 +143,7 @@ static int usbhost_disconnected(FAR struct usbhost_class_s *usbclass); static void usbhost_disconnect_all(FAR struct usbhost_composite_s *priv) { - FAR struct usbhost_component_s *member; + FAR struct usbhost_member_s *member; int i; /* Loop, processing each class that has been included into the composite */ @@ -249,6 +261,198 @@ static int usbhost_disconnected(struct usbhost_class_s *usbclass) return OK; } +/**************************************************************************** + * Name: usbhost_copyinterface + * + * Description: + * Find an interface descriptor and copy it along with all of its + * following encpoint descriptors. + * + * Input Parameters: + * ifno - The interface ID to find. + * configdesc - The original configuration descriptor that contains the + * the interface descriptor. + * desclen - the length of configdesc. + * buffer - The buffer in which to return the descriptors + * buflen - The length of buffer + * + * Returned Value: + * On success, the number of bytes copied is returned. On a failure, a + * negated errno value is returned indicating the nature of the failure: + * + * -ENOENT: Did not find interface descriptor + * -EINVAL: Did not find all endpoint descriptors + * + ****************************************************************************/ + +static int usbhost_copyinterface(uint8_t ifno, FAR const uint8_t *configdesc, + int desclen, FAR uint8_t *buffer, int buflen) +{ + FAR struct usb_ifdesc_s *ifdesc; + FAR struct usb_epdesc_s *epdesc; + int retsize; + int offset; + int neps; + int len; + + /* Make sure that the buffer will hold at least the interface descriptor */ + + if (buflen < USB_SIZEOF_IFDESC) + { + return -ENOSPC; + } + + /* Search for the interface */ + + for (offset = 0, retsize = 0; + offset < desclen - sizeof(struct usb_ifdesc_s); + offset += len) + { + ifdesc = (FAR struct usb_ifdesc_s *)&configdesc[offset]; + len = ifdesc->len; + + /* Is this an interface descriptor? Is it the one we are looking for? */ + + if (ifdesc->type == USB_DESC_TYPE_INTERFACE && ifdesc->iif == ifno) + { + /* Yes.. return the interface descriptor */ + + memcpy(buffer, ifdesc, len); + buffer += len; + buflen -= len; + retsize += len; + + /* Make sure that the buffer will hold at least the endpoint + * descriptors. + */ + + neps = ifdesc->neps; + if (buflen < neps * USB_SIZEOF_EPDESC) + { + return -ENOSPC; + } + + /* The endpoint descriptors should immediately follow the + * interface descriptor. + */ + + for (offset += len; + offset < desclen - sizeof(struct usb_ifdesc_s); + offset += len) + { + epdesc = (FAR struct usb_epdesc_s *)&configdesc[offset]; + len = ifdesc->len; + + /* Is this an endpoint descriptor? */ + + if (ifdesc->type == USB_DESC_TYPE_ENDPOINT) + { + /* Yes.. return the endpoint descriptor */ + + memcpy(buffer, epdesc, len); + buffer += len; + buflen -= len; + retsize += len; + + /* And reduce the number of endpoints we are looking for */ + + if (--neps <= 0) + { + /* That is all of them!. Return the total size copied */ + + return retsize; + } + } + } + + /* Did not find all of the interface descriptors */ + + return -EINVAL; + } + } + + /* Could not find the interface descriptor */ + + return -ENOENT; +} + +/**************************************************************************** + * Name: usbhost_createconfig + * + * Description: + * Create a custom configuration for a member class. + * + * Input Parameters: + * configdesc - The original configuration descriptor that contains the + * the interface descriptor. + * desclen - the length of configdesc. + * buffer - The buffer in which to return the descriptors + * buflen - The length of buffer + * + * Returned Value: + * On success, the size of the new configuration descriptor is returned. + * On a failure, a negated errno value is returned indicating the nature + * of the failure: + * + * -ENOENT: Did not find interface descriptor + * -EINVAL: Did not find all endpoint descriptors + * + ****************************************************************************/ + +static int usbhost_createconfig(FAR struct usbhost_member_s *member, + FAR const uint8_t *configdesc, int desclen, + FAR uint8_t *buffer, int buflen) +{ + FAR struct usb_cfgdesc_s *cfgdesc; + int cfgsize; + int ifsize; + int ifno; + int nifs; + + /* Copy and modify the original configuration descriptor */ + + if (buflen < USB_SIZEOF_CFGDESC) + { + return -ENOSPC; + } + + memcpy(buffer, configdesc, USB_SIZEOF_CFGDESC); + cfgsize = USB_SIZEOF_CFGDESC; + buffer += USB_SIZEOF_CFGDESC; + buflen -= USB_SIZEOF_CFGDESC; + + /* Modify the copied configuration descriptor */ + + cfgdesc = (FAR struct usb_cfgdesc_s *)buffer; + cfgdesc->len = USB_SIZEOF_CFGDESC; + cfgdesc->ninterfaces = member->nifs; + + /* Then copy all of the interfaces to the configuration buffer */ + + for (nifs = 0, ifno = member->firstif; nifs < member->nifs; nifs++, ifno++) + { + ifsize = usbhost_copyinterface(ifno, configdesc, desclen, + buffer, buflen); + if (ifsize < 0) + { + uerr("ERROR: Failed to copy inteface: %d\n", ifsize); + return ifsize; + } + + /* Update sizes and pointers */ + + cfgsize += ifsize; + buffer += ifsize; + buflen -= ifsize; + } + + /* Set the totallen of the configuration descriptor and return success */ + + cfgdesc->totallen[0] = cfgsize & 0xff; /* Little endian always */ + cfgdesc->totallen[1] = cfgsize >> 8; + return cfgsize; +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -290,13 +494,15 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR struct usbhost_class_s **usbclass) { FAR struct usbhost_composite_s *priv; - FAR struct usbhost_component_s *member; + FAR struct usbhost_member_s *member; FAR const struct usbhost_registry_s *reg; FAR struct usb_desc_s *desc; + FAR uint8_t *cfgbuffer; uint32_t mergeset; uint16_t nintfs; uint16_t nmerged; uint16_t nclasses; + int cfgsize; int offset; int ret; int i; @@ -349,10 +555,14 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, if (desc->type == USB_DESC_TYPE_INTERFACE) { +#ifdef CONFIG_DEBUG_ASSERTIONS FAR struct usb_ifdesc_s *ifdesc = (FAR struct usb_ifdesc_s *)desc; DEBUGASSERT(ifdesc->iif < 32); +#endif + /* Increment the count of interfaces */ + nintfs++; } @@ -366,11 +576,11 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; uint32_t mask; - /* Keep count of the number of merged interfaces */ + /* Keep count of the number ofinterfaces that will be merged */ nmerged += (iad->nifs - 1); - /* Keep track of which interfaces have been merged */ + /* Keep track of which interfaces will be merged */ DEBUGASSERT(iad->firstif + iad->nifs < 32); mask = (1 << iad->nifs) - 1; @@ -424,8 +634,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, return -ENOMEM; } - priv->members = (FAR struct usbhost_component_s *) - kmm_zalloc(nclasses * sizeof(struct usbhost_component_s)); + priv->members = (FAR struct usbhost_member_s *) + kmm_zalloc(nclasses * sizeof(struct usbhost_member_s)); if (priv->members == NULL) { @@ -466,21 +676,19 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, DEBUGASSERT(ifdesc->iif < 32); if ((mergeset & (1 << ifdesc->iif)) == 0) { - FAR struct usbhost_id_s *member = - (FAR struct usbhost_id_s *)&priv->members[i]; - /* No, this interface was not merged. Save the registry * lookup information from the interface descriptor. */ - member->base = ifdesc->classid; - member->subclass = ifdesc->subclass; - member->proto = ifdesc->protocol; - member->vid = id->vid; - member->pid = id->pid; + member = (FAR struct usbhost_member_s *)&priv->members[i]; + member->id.base = ifdesc->classid; + member->id.subclass = ifdesc->subclass; + member->id.proto = ifdesc->protocol; + member->id.vid = id->vid; + member->id.pid = id->pid; - member->iff = ifdesc->iff; - member->nifs = 1; + member->firstif = ifdesc->iif; + member->nifs = 1; /* Increment the member index */ @@ -496,19 +704,18 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION) { FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; - FAR struct usbhost_id_s *member = - (FAR struct usbhost_id_s *)&priv->members[i]; /* Yes.. Save the registry lookup information from the IAD. */ - member->base = iad->classid; - member->subclass = iad->subclass; - member->proto = iad->protocol; - member->vid = id->vid; - member->pid = id->pid; + member = (FAR struct usbhost_member_s *)&priv->members[i]; + member->id.base = iad->classid; + member->id.subclass = iad->subclass; + member->id.proto = iad->protocol; + member->id.vid = id->vid; + member->id.pid = id->pid; - member->iff = iad->firstif; - member->nifs = iad->nifs; + member->firstif = iad->firstif; + member->nifs = iad->nifs; /* Increment the member index */ @@ -525,16 +732,18 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, DEBUGASSERT(i == nclasses); - /* REVISIT: Here I think that we need to create an intermediate data - * structure that indexes all interface and endpoint dscriptors in the - * configuration. This index table will be used before CLASS_CONNECT() - * is called to construct a meaning conifuration for the single class. - * - * An option would be some functions: usbhost_findinterface() and - * usbhost_findenpoint() that could do the brute force look-up as - * necessary. + /* Allocate a large buffer in which we can construct a custom configuration + * descriptor for each member class. */ + cfgbuffer = (FAR uint8_t *)malloc(CUSTOM_CONFIG_BUFSIZE); + if (cfgbuffer == NULL) + { + uerr("ERROR: Failed to allocated configuration buffer"); + ret = -ENOMEM; + goto errout_with_members; + } + /* Now loop, performing the registry lookup and initialization of each * member class in the composite. */ @@ -550,9 +759,9 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, reg = usbhost_findclass(&member->id); if (reg == NULL) { - uinfo("usbhost_findclass failed\n"); + uerr("ERROR: usbhost_findclass failed\n"); ret = -EINVAL; - goto errout_with_members; + goto errout_with_cfgbuffer; } /* Yes.. there is a class for this device. Get an instance of its @@ -562,23 +771,30 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, member->usbclass = CLASS_CREATE(reg, hport, id); if (member->usbclass == NULL) { - uinfo("CLASS_CREATE failed\n"); + uerr("ERROR: CLASS_CREATE failed\n"); ret = -ENOMEM; - goto errout_with_members; + goto errout_with_cfgbuffer; + } + + /* Construct a custom configuration descriptor for this member */ + + cfgsize = usbhost_createconfig(member, configdesc, desclen, + cfgbuffer, CUSTOM_CONFIG_BUFSIZE); + if (cfgsize < 0) + { + uerr("ERROR: Failed to create the custom configuration: %d\n", + cfgsize); + ret = cfgsize; + goto errout_with_cfgbuffer; } /* Call the newly instantiated classes connect() method provide it * with the information that it needs to initialize properly, that * is the configuration escriptor and all of the interface descriptors * needed by the member class. - * - * REVISIT: I dont' think this will work. I am thinking we will need - * to construct a custom configuration + interface + endpoint - * descriptors to pass to each member of the composite. That might be - * tricky. Maybe there is a better way? */ - ret = CLASS_CONNECT(member->usbclass, configdesc, desclen); + ret = CLASS_CONNECT(member->usbclass, cfgbuffer, cfgsize); if (ret < 0) { /* On failure, call the class disconnect method of each contained @@ -586,15 +802,20 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, */ uerr("ERROR: CLASS_CONNECT failed: %d\n", ret); - goto errout_with_members; + goto errout_with_cfgbuffer; } } + kmm_free(cfgbuffer); + /* Return our USB class structure */ *usbclass = &priv->usbclass; return OK; +errout_with_cfgbuffer: + kmm_free(cfgbuffer); + errout_with_members: /* On an failure, call the class disconnect method of each contained * class which should then free the allocated usbclass instance. From aa0d1868f53cf5355090837e7b68c56c27ef45f4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 30 Aug 2016 13:58:01 -0600 Subject: [PATCH 161/214] USB host composite: Fix places where the wrong pointer was used; Add a test for an error condition. --- drivers/usbhost/usbhost_composite.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 5d629cfcb63..b2da8a9e276 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -341,11 +341,11 @@ static int usbhost_copyinterface(uint8_t ifno, FAR const uint8_t *configdesc, offset += len) { epdesc = (FAR struct usb_epdesc_s *)&configdesc[offset]; - len = ifdesc->len; + len = epdesc->len; /* Is this an endpoint descriptor? */ - if (ifdesc->type == USB_DESC_TYPE_ENDPOINT) + if (epdesc->type == USB_DESC_TYPE_ENDPOINT) { /* Yes.. return the endpoint descriptor */ @@ -363,6 +363,17 @@ static int usbhost_copyinterface(uint8_t ifno, FAR const uint8_t *configdesc, return retsize; } } + + /* The endpoint descriptors following the interface descriptor + * should all be contiguous. But we will complain only if another + * interface descriptor is encountered before all of the endpoint + * descriptors have been found. + */ + + else if (epdesc->type == USB_DESC_TYPE_INTERFACE) + { + break; + } } /* Did not find all of the interface descriptors */ From 3654b841bcc0971ba15d1e62b97b66ce263d6a61 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:08:58 +0200 Subject: [PATCH 162/214] Move contactless drivers to their own directory --- drivers/Kconfig | 9 + drivers/wireless/Kconfig | 62 -- drivers/wireless/Make.defs | 8 - drivers/wireless/mfrc522.c | 1616 ------------------------------ drivers/wireless/mfrc522.h | 430 -------- drivers/wireless/pn532.c | 1165 --------------------- drivers/wireless/pn532.h | 171 ---- include/nuttx/fs/ioctl.h | 7 + include/nuttx/wireless/mfrc522.h | 116 --- include/nuttx/wireless/pn532.h | 165 --- 10 files changed, 16 insertions(+), 3733 deletions(-) delete mode 100644 drivers/wireless/mfrc522.c delete mode 100644 drivers/wireless/mfrc522.h delete mode 100644 drivers/wireless/pn532.c delete mode 100644 drivers/wireless/pn532.h delete mode 100644 include/nuttx/wireless/mfrc522.h delete mode 100644 include/nuttx/wireless/pn532.h diff --git a/drivers/Kconfig b/drivers/Kconfig index c3ef7aa49af..9b508fdd7fa 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -595,4 +595,13 @@ menuconfig DRIVERS_WIRELESS Drivers for various wireless devices. source drivers/wireless/Kconfig + +menuconfig DRIVERS_CONTACTLESS + bool "Contactless Device Support" + default n + ---help--- + Drivers for various contactless devices. + +source drivers/contactless/Kconfig + source drivers/syslog/Kconfig diff --git a/drivers/wireless/Kconfig b/drivers/wireless/Kconfig index 42eda1941cf..a3537b85cf1 100644 --- a/drivers/wireless/Kconfig +++ b/drivers/wireless/Kconfig @@ -72,66 +72,4 @@ config WL_NRF24L01_RXFIFO_LEN endif # WL_NRF24L01_RXSUPPORT endif # WL_NRF24L01 - -config WL_MFRC522 - bool "NXP MFRC522 ISO14443/Mifare Transceiver" - default n - select SPI - ---help--- - This options adds driver support for the MFRC522 ISO14443/Mifare chip. - -if WL_MFRC522 - -config MFRC522_SPI_FREQ - int "SPI frequency for MFRC522" - default 1000000 - depends on WL_MFRC522 - -config MFRC522_DEBUG - bool "Enable MFRC522 debug" - default n - depends on WL_MFRC522 - -config MFRC522_DEBUG_TX - bool "trace TX frames" - default n - depends on MFRC522_DEBUG - -config MFRC522_DEBUG_RX - bool "trace RX frames" - default n - depends on MFRC522_DEBUG - -endif # WL_MFRC522 - -config WL_PN532 - bool "pn532 NFC-chip support" - default n - select SPI - ---help--- - This options adds driver support for the PN532 NFC chip. - -if WL_PN532 - -config PN532_SPI_FREQ - int "SPI frequency for PN532" - default 1000000 - depends on WL_PN532 - -config WL_PN532_DEBUG - bool "Enable PN532 debug" - default n - depends on WL_PN532 - -config WL_PN532_DEBUG_TX - bool "trace TX frames" - default n - depends on WL_PN532_DEBUG - -config WL_PN532_DEBUG_RX - bool "trace RX frames" - default n - depends on WL_PN532_DEBUG - -endif # WL_PN532 endif # DRIVERS_WIRELESS diff --git a/drivers/wireless/Make.defs b/drivers/wireless/Make.defs index 48b356e7ac8..14ffb312083 100644 --- a/drivers/wireless/Make.defs +++ b/drivers/wireless/Make.defs @@ -55,14 +55,6 @@ ifeq ($(CONFIG_WL_CC3000),y) include wireless$(DELIM)cc3000$(DELIM)Make.defs endif -ifeq ($(CONFIG_WL_MFRC522),y) -CSRCS += mfrc522.c -endif - -ifeq ($(CONFIG_WL_PN532),y) -CSRCS += pn532.c -endif - # Include wireless devices build support DEPPATH += --dep-path wireless diff --git a/drivers/wireless/mfrc522.c b/drivers/wireless/mfrc522.c deleted file mode 100644 index badc760a339..00000000000 --- a/drivers/wireless/mfrc522.c +++ /dev/null @@ -1,1616 +0,0 @@ -/**************************************************************************** - * drivers/wireless/mfrc522.c - * - * Copyright(C) 2016 Uniquix Ltda. All rights reserved. - * Author: Alan Carvalho de Assis - * - * This driver is based on Arduino library for MFRC522 from Miguel - * Balboa released into the public domain: - * https://github.com/miguelbalboa/rfid/ - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "mfrc522.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#ifdef CONFIG_MFRC522_DEBUG -# define mfrc522err _err -# define mfrc522info _info -#else -# ifdef CONFIG_CPP_HAVE_VARARGS -# define mfrc522err(x...) -# define mfrc522info(x...) -# else -# define mfrc522err (void) -# define mfrc522info (void) -# endif -#endif - -#ifdef CONFIG_MFRC522_DEBUG_TX -# define tracetx errdumpbuffer -#else -# define tracetx(x...) -#endif - -#ifdef CONFIG_MFRC522_DEBUG_RX -# define tracerx errdumpbuffer -#else -# define tracerx(x...) -#endif - -#define FRAME_SIZE(f) (sizeof(struct mfrc522_frame) + f->len + 2) -#define FRAME_POSTAMBLE(f) (f->data[f->len + 1]) - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -static inline void mfrc522_configspi(FAR struct spi_dev_s *spi); -static void mfrc522_lock(FAR struct spi_dev_s *spi); -static void mfrc522_unlock(FAR struct spi_dev_s *spi); - -/* Character driver methods */ - -static int mfrc522_open(FAR struct file *filep); -static int mfrc522_close(FAR struct file *filep); -static ssize_t mfrc522_read(FAR struct file *, FAR char *, size_t); -static ssize_t mfrc522_write(FAR struct file *filep, FAR const char *buffer, - size_t buflen); -static int mfrc522_ioctl(FAR struct file *filep, int cmd, - unsigned long arg); - -uint8_t mfrc522_readu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr); -void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, - FAR uint8_t regval); -void mfrc522_writeblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, - uint8_t *regval, int length); -void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, - FAR uint8_t *regval, int length, uint8_t rxalign); - -void mfrc522_softreset(FAR struct mfrc522_dev_s *dev); - -int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev, - FAR struct picc_uid_s *uid, uint8_t validbits); - -/* IRQ Handling TODO: -static int mfrc522_irqhandler(FAR int irq, FAR void *context, FAR void* dev); -static inline int mfrc522_attachirq(FAR struct mfrc522_dev_s *dev, xcpt_t isr); -*/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static const struct file_operations g_mfrc522fops = -{ - mfrc522_open, - mfrc522_close, - mfrc522_read, - mfrc522_write, - 0, - mfrc522_ioctl -#ifndef CONFIG_DISABLE_POLL - , 0 -#endif -#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS - , 0 -#endif -}; - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -static void mfrc522_lock(FAR struct spi_dev_s *spi) -{ - (void)SPI_LOCK(spi, true); - - SPI_SETMODE(spi, SPIDEV_MODE0); - SPI_SETBITS(spi, 8); - (void)SPI_HWFEATURES(spi, 0); - (void)SPI_SETFREQUENCY(spi, CONFIG_MFRC522_SPI_FREQ); -} - -static void mfrc522_unlock(FAR struct spi_dev_s *spi) -{ - (void)SPI_LOCK(spi, false); -} - -static inline void mfrc522_configspi(FAR struct spi_dev_s *spi) -{ - /* Configure SPI for the MFRC522 module. */ - - SPI_SETMODE(spi, SPIDEV_MODE0); - SPI_SETBITS(spi, 8); - (void)SPI_HWFEATURES(spi, 0); - (void)SPI_SETFREQUENCY(spi, CONFIG_MFRC522_SPI_FREQ); -} - -static inline void mfrc522_select(struct mfrc522_dev_s *dev) -{ - SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true); -} - -static inline void mfrc522_deselect(struct mfrc522_dev_s *dev) -{ - SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false); -} - -/**************************************************************************** - * Name: mfrc522_readu8 - * - * Description: - * Read a byte from a register address. - * - * Input Parameters: - * - * Returned Value: the read byte from the register - * - ****************************************************************************/ - -uint8_t mfrc522_readu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr) -{ - uint8_t regval; - uint8_t address = (0x80 | (regaddr & 0x7E)); - - mfrc522_lock(dev->spi); - mfrc522_select(dev); - SPI_SEND(dev->spi, address); - regval = SPI_SEND(dev->spi, 0); - mfrc522_deselect(dev); - mfrc522_unlock(dev->spi); - - tracerx("read", regval, 1); - return regval; -} - -/**************************************************************************** - * Name: mfrc522_write8 - * - * Description: - * Write a byte to a register address. - * - * Input Parameters: - * - * Returned Value: - * - ****************************************************************************/ - -void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, - FAR uint8_t regval) -{ - mfrc522_lock(dev->spi); - mfrc522_select(dev); - SPI_SEND(dev->spi, regaddr & 0x7E); - SPI_SEND(dev->spi, regval); - mfrc522_deselect(dev); - mfrc522_unlock(dev->spi); - - tracerx("write", ®val, 1); -} - -/**************************************************************************** - * Name: mfrc522_readblk - * - * Description: - * Read a block of bytes from a register address. Align the bit positions of - * regval[0] from rxalign..7. - * - * Input Parameters: - * - * Returned Value: none - * - ****************************************************************************/ - -void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, - FAR uint8_t *regval, int length, uint8_t rxalign) -{ - uint8_t i = 0; - uint8_t address = (0x80 | (regaddr & 0x7E)); - - mfrc522_lock(dev->spi); - mfrc522_select(dev); - - /* Inform the MFRC522 the address we want to read */ - - SPI_SEND(dev->spi, address); - - while (i < length) - { - if (i == 0 && rxalign) - { - uint8_t mask = 0; - uint8_t value; - uint8_t j; - - for (j = rxalign; j <= 7; j++) - { - mask |= (1 << j); - } - - /* Read the first byte */ - - value = SPI_SEND(dev->spi, address); - - /* Apply mask to current regval[0] with the read value */ - - regval[0] = (regval[0] & ~mask) | (value & mask); - } - else - { - /* Read the remaining bytes */ - - regval[i] = SPI_SEND(dev->spi, address); - } - i++; - } - - /* Read the last byte. Send 0 to stop reading (it maybe wrong, 1 byte out) */ - - regval[i] = SPI_SEND(dev->spi, 0); - - mfrc522_deselect(dev); - mfrc522_unlock(dev->spi); - - tracerx("readblk", regval, size); -} - -/**************************************************************************** - * Name: mfrc522_writeblk - * - * Description: - * Write a block of bytes to a register address. - * - * Input Parameters: - * - * Returned Value: none - * - ****************************************************************************/ - -void mfrc522_writeblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, - uint8_t *regval, int length) -{ - uint8_t address = (regaddr & 0x7E); - - mfrc522_lock(dev->spi); - mfrc522_select(dev); - - /* Inform the MFRC522 the address we want write to */ - - SPI_SEND(dev->spi, address); - - /* Send the block of bytes */ - - SPI_SNDBLOCK(dev->spi, regval, length); - - mfrc522_deselect(dev); - mfrc522_unlock(dev->spi); - - tracerx("writeblk", regval, size); -} - -/**************************************************************************** - * Name: mfrc522_calc_crc - * - * Description: - * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A. - * - * Input Parameters: - * - * Returned Value: OK or -ETIMEDOUT - * - ****************************************************************************/ - -int mfrc522_calc_crc(FAR struct mfrc522_dev_s *dev, uint8_t *buffer, - int length, uint8_t *result) -{ - struct timespec tstart; - struct timespec tend; - - /* Stop any command in execution */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); - - /* Clear the CRCIRq interrupt request bit */ - - mfrc522_writeu8(dev, MFRC522_DIV_IRQ_REG, MFRC522_CRC_IRQ); - - /* Flush all bytes in the FIFO */ - - mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER); - - /* Write data to the FIFO */ - - mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, buffer, length); - - /* Start the calculation */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_CALC_CRC_CMD); - - /* Wait for CRC completion or 200ms time-out */ - - clock_gettime(CLOCK_REALTIME, &tstart); - tstart.tv_nsec += 200000; - if (tstart.tv_nsec >= 1000 * 1000 * 1000) - { - tstart.tv_sec++; - tstart.tv_nsec -= 1000 * 1000 * 1000; - } - - while(1) - { - uint8_t irqreg; - - irqreg = mfrc522_readu8(dev, MFRC522_DIV_IRQ_REG); - if ( irqreg & MFRC522_CRC_IRQ) - { - break; - } - - /* Get time now */ - - clock_gettime(CLOCK_REALTIME, &tend); - - if ((tend.tv_sec > tstart.tv_sec) && (tend.tv_nsec > tstart.tv_nsec)) - { - return -ETIMEDOUT; - } - } - - /* Stop calculating CRC for new content of FIFO */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); - - result[0] = mfrc522_readu8(dev, MFRC522_CRC_RESULT_REGL); - result[1] = mfrc522_readu8(dev, MFRC522_CRC_RESULT_REGH); - - return OK; -} - -/**************************************************************************** - * Name: mfrc522_comm_picc - * - * Description: - * Transfers data to the MFRC522 FIFO, executes a command, waits for - * completion and transfers data back from the FIFO. - * CRC validation can only be done if back_data and back_len are specified. - * - * Input Parameters: - * - * Returned Value: OK or -ETIMEDOUT - * - ****************************************************************************/ - -int mfrc522_comm_picc(FAR struct mfrc522_dev_s *dev, uint8_t command, - uint8_t waitirq, uint8_t *send_data, uint8_t send_len, - uint8_t *back_data, uint8_t *back_len, - uint8_t *validbits, uint8_t rxalign, bool checkcrc) -{ - int ret; - uint8_t errors; - uint8_t vbits; - uint8_t value; - struct timespec tstart; - struct timespec tend; - - /* Prepare values for BitFramingReg */ - - uint8_t txlastbits = validbits ? *validbits : 0; - uint8_t bitframing = (rxalign << 4) + txlastbits; - - /* Stop any active command */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); - - /* Clear all seven interrupt request bits */ - - value = mfrc522_readu8(dev, MFRC522_COM_IRQ_REG); - mfrc522_writeu8(dev, MFRC522_COM_IRQ_REG, value | MFRC522_COM_IRQ_MASK); - - /* Flush all bytes in the FIFO */ - - mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER); - - /* Write data to FIFO */ - - mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, send_data, send_len); - - /* Bit adjustments */ - - mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, bitframing); - - /* Execute command */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, command); - - /* We setup the TAuto flag in the mfrc522_init() then we could use the - * internal MFC522 Timer to detect timeout, but because there could be some - * hardware fault, let us to use a NuttX timeout as well. - */ - - clock_gettime(CLOCK_REALTIME, &tstart); - tstart.tv_nsec += 200000; - if (tstart.tv_nsec >= 1000 * 1000 * 1000) - { - tstart.tv_sec++; - tstart.tv_nsec -= 1000 * 1000 * 1000; - } - - /* If it is a Transceive command, then start transmittion */ - - if (command == MFRC522_TRANSCV_CMD) - { - value = mfrc522_readu8(dev, MFRC522_BIT_FRAMING_REG); - mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, value | MFRC522_START_SEND); - } - - /* Wait for the command to complete */ - - while (1) - { - uint8_t irqsreg; - - irqsreg = mfrc522_readu8(dev, MFRC522_COM_IRQ_REG); - - /* If at least an of selected IRQ happened */ - - if (irqsreg & waitirq) - { - break; - } - - /* Timer expired */ - - if (irqsreg & MFRC522_TIMER_IRQ) - { - return -ETIMEDOUT; - } - - /* Get time now */ - - clock_gettime(CLOCK_REALTIME, &tend); - - if ((tend.tv_sec > tstart.tv_sec) && (tend.tv_nsec > tstart.tv_nsec)) - { - return -ETIMEDOUT; - } - } - - /* Read error register to verify if there are any issue */ - - errors = mfrc522_readu8(dev, MFRC522_ERROR_REG); - - /* Check for Protocol error */ - - if (errors & (MFRC522_PROTO_ERR)) - { - return -EPROTO; - } - - /* Check for Parity and Buffer Overflow errors */ - - if (errors & (MFRC522_PARITY_ERR | MFRC522_BUF_OVFL_ERR)) - { - return -EIO; - } - - /* Check collision error */ - - if (errors & MFRC522_COLL_ERR) - { - return -EBUSY; /* should it be EAGAIN ? */ - } - - /* If the caller wants data back, get it from the MFRC522 */ - - if (back_data && back_len) - { - uint8_t nbytes; - - /* Number of bytes in the FIFO */ - - nbytes = mfrc522_readu8(dev, MFRC522_FIFO_LEVEL_REG); - - /* Returned more bytes than the expected */ - - if (nbytes > *back_len) - { - return -ENOMEM; - } - - *back_len = nbytes; - - /* Read the data from FIFO */ - - mfrc522_readblk(dev, MFRC522_FIFO_DATA_REG, back_data, nbytes, rxalign); - - /* RxLastBits[2:0] indicates the number of valid bits received */ - - vbits = mfrc522_readu8(dev, MFRC522_CONTROL_REG) - & MFRC522_RX_LAST_BITS_MASK; - - if (validbits) - { - *validbits = vbits; - } - } - - /* Perform CRC_A validation if requested */ - - if (back_data && back_len && checkcrc) - { - uint8_t ctrlbuf[2]; - - /* In this case a MIFARE Classic NAK is not OK */ - - if (*back_len == 1 && vbits == 4) - { - return -EACCES; - } - - /* We need the CRC_A value or all 8 bits of the last byte */ - - if (*back_len < 2 || vbits != 0) - { - return -EPERM; - } - - /* Verify CRC_A */ - - ret = mfrc522_calc_crc(dev, &back_data[0], *back_len - 2, &ctrlbuf[0]); - if (ret != OK) - { - return ret; - } - - if ((back_data[*back_len - 2] != ctrlbuf[0]) || - (back_data[*back_len - 1] != ctrlbuf[1])) - { - return -EFAULT; - } - } - - return OK; -} - -/**************************************************************************** - * Name: mfrc522_transcv_data - * - * Description: - * Executes the Transceive command - * - * Input Parameters: - * - * Returned Value: OK or -ETIMEDOUT - * - ****************************************************************************/ - -int mfrc522_transcv_data(FAR struct mfrc522_dev_s *dev, uint8_t *senddata, - uint8_t sendlen, uint8_t *backdata, uint8_t *backlen, - uint8_t *validbits, uint8_t rxalign, bool check_crc) -{ - uint8_t waitirq = MFRC522_RX_IRQ | MFRC522_IDLE_IRQ; - - return mfrc522_comm_picc(dev, MFRC522_TRANSCV_CMD, waitirq, senddata, - sendlen, backdata, backlen, validbits, rxalign, - check_crc); -} - -/**************************************************************************** - * Name: mfrc522_picc_reqa_wupa - * - * Description: - * Transmits REQA or WUPA commands - * - * Input Parameters: - * - * Returned Value: OK or -ETIMEDOUT - * - ****************************************************************************/ - -int mfrc522_picc_reqa_wupa(FAR struct mfrc522_dev_s *dev, uint8_t command, - uint8_t *buffer, uint8_t length) -{ - uint8_t validbits; - uint8_t value; - int status; - - if (!buffer || length < 2) - { - return -EINVAL; - } - - /* Force clear of received bits if a collision is detected */ - - value = mfrc522_readu8(dev, MFRC522_COLL_REG); - mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL); - - validbits = 7; - status = mfrc522_transcv_data(dev, &command, 1, buffer, &length, &validbits, - 0, false); - - /* For REQA and WUPA we need to transmit only 7 bits */ - - if (status != OK) - { - return status; - } - - /* ATQA must be exactly 16 bits */ - - if (length != 2 || validbits != 0) - { - return -EAGAIN; - } - - mfrc522info("buffer[0]=0x%02X | buffer[1]=0x%02X\n", buffer[0], buffer[1]); - return OK; -} - -/**************************************************************************** - * Name: mfrc522_picc_request_a - * - * Description: - * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to - * READY and prepare for anticollision or selection. - * - * Input Parameters: - * - * Returned Value: OK or -ETIMEDOUT - * - ****************************************************************************/ - -int mfrc522_picc_request_a(FAR struct mfrc522_dev_s *dev, uint8_t *buffer, - uint8_t length) -{ - return mfrc522_picc_reqa_wupa(dev, PICC_CMD_REQA, buffer, length); -} - -/**************************************************************************** - * Name: mfrc522_picc_detect - * - * Description: - * Detects if a Contactless Card is near - * - * Input Parameters: - * - * Returned Value: OK or -ETIMEDOUT - * - ****************************************************************************/ - -int mfrc522_picc_detect(FAR struct mfrc522_dev_s *dev) -{ - int ret; - uint8_t buffer_atqa[2]; - uint8_t length = sizeof(buffer_atqa); - - /* Send a REQA command */ - - ret = mfrc522_picc_request_a(dev, buffer_atqa, length); - return (ret == OK || ret == -EBUSY); -} - -/**************************************************************************** - * Name: mfrc522_picc_select - * - * Description: - * Selects a near Card and read its UID. - * - * Input Parameters: - * - * Returned Value: OK or -ETIMEDOUT - * - ****************************************************************************/ - -int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev, - FAR struct picc_uid_s *uid, uint8_t validbits) -{ - bool uid_complete; - bool select_done; - bool use_cascade_tag; - uint8_t cascade_level = 1; - int result; - uint8_t i; - uint8_t value; - uint8_t count; - - /* The first index in uid->data[] that is used in the current Cascade Level */ - - uint8_t uid_index; - - /* The number of known UID bits in the current Cascade Level. */ - - uint8_t curr_level_known_bits; - - /* The SELECT/ANTICOLLISION uses a 7 byte standard frame + 2 bytes CRC_A */ - - uint8_t buffer[9]; - - /* The number of bytes used in the buffer, number bytes on FIFO */ - - uint8_t buffer_used; - - /* Used to defines the bit position for the first bit received */ - - uint8_t rxalign; - - /* The number of valid bits in the last transmitted byte. */ - - uint8_t txlastbits; - - uint8_t *resp_buf; - uint8_t resp_len; - - /* Sanity check */ - - if (validbits > 80) - { - return -EINVAL; - } - - /* Force clear of received bits if a collision is detected */ - - value = mfrc522_readu8(dev, MFRC522_COLL_REG); - mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL); - - /* Repeat cascade level loop until we have a complete UID */ - - uid_complete = false; - while (!uid_complete) - { - uint8_t bytes_to_copy; - - /* Set the Cascade Level in the SEL byte, find out if we need to use the - * Cascade Tag in byte 2. - */ - - switch (cascade_level) - { - case 1: - buffer[0] = PICC_CMD_SEL_CL1; - uid_index = 0; - - /* When we know that the UID has more than 4 bytes */ - - use_cascade_tag = validbits && (uid->size > 4); - break; - - case 2: - buffer[0] = PICC_CMD_SEL_CL2; - uid_index = 3; - - /* When we know that the UID has more than 7 bytes */ - - use_cascade_tag = validbits && (uid->size > 7); - break; - - case 3: - buffer[0] = PICC_CMD_SEL_CL3; - uid_index = 6; - use_cascade_tag = false; - break; - - default: - return -EIO; /* Internal error */ - } - - /* How many UID bits are known in this Cascade Level? */ - - curr_level_known_bits = validbits - (8 * uid_index); - if (curr_level_known_bits < 0) - { - curr_level_known_bits = 0; - } - - /* Copy the known bits from uid->uid_data[] to buffer[] */ - - i = 2; /* destination index in buffer[] */ - if (use_cascade_tag) - { - buffer[i++] = PICC_CMD_CT; - } - - /* Number of bytes needed to represent the known bits for this level */ - - bytes_to_copy = curr_level_known_bits / 8 + - (curr_level_known_bits % 8 ? 1 : 0); - - if (bytes_to_copy) - { - /* Max 4 bytes in each Cascade Level. Only 3 left if we use the - * Cascade Tag. - */ - - uint8_t max_bytes = use_cascade_tag ? 3 : 4; - - if (bytes_to_copy > max_bytes) - { - bytes_to_copy = max_bytes; - } - - for (count = 0; count < bytes_to_copy; count++) - { - buffer[i++] = uid->uid_data[uid_index + count]; - } - } - - /* Now that the data has been copied we need to include the 8 bits in CT - * in curr_level_known_bits. - */ - - if (use_cascade_tag) - { - curr_level_known_bits += 8; - } - - /* Repeat anti collision loop until we can transmit all UID bits + BCC - * and receive a SAK - max 32 iterations. - */ - - select_done = false; - while (!select_done) - { - /* Find out how many bits and bytes to send and receive. */ - - if (curr_level_known_bits >= 32) - { - /* All UID bits in this Cascade Level are known. This is a - * SELECT. - */ - - /* NVB - Number of Valid Bits: Seven whole bytes */ - - buffer[1] = 0x70; - - /* Calculate BCC - Block Check Character */ - - buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5]; - - /* Calculate CRC_A */ - - result = mfrc522_calc_crc(dev, buffer, 7, &buffer[7]); - if (result != OK) - { - return result; - } - - txlastbits = 0; /* 0 => All 8 bits are valid. */ - buffer_used = 9; - - /* Store response in the last 3 bytes of buffer (BCC and CRC_A - - * not needed after tx). - */ - - resp_buf = &buffer[6]; - resp_len = 3; - } - else - { - /* This is an ANTICOLLISION */ - - txlastbits = curr_level_known_bits % 8; - - /* Number of whole bytes in the UID part. */ - - count = curr_level_known_bits / 8; - i = 2 + count; - - /* NVB - Number of Valid Bits */ - - buffer[1] = (i << 4) + txlastbits; - buffer_used = i + (txlastbits ? 1 : 0); - - /* Store response in the unused part of buffer */ - - resp_buf = &buffer[i]; - resp_len = sizeof(buffer) - i; - } - - /* Set bit adjustments */ - - rxalign = txlastbits; - mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, - (rxalign << 4) + txlastbits); - - /* Transmit the buffer and receive the response */ - - result = mfrc522_transcv_data(dev, buffer, buffer_used, resp_buf, - &resp_len, &txlastbits, rxalign, false); - - /* More than one PICC in the field => collision */ - - if (result == -EBUSY) - { - uint8_t coll_pos; - uint8_t coll_reg = mfrc522_readu8(dev, MFRC522_COLL_REG); - - /* CollPosNotValid */ - - if (coll_reg & 0x20) - { - /* Without a valid collision position we cannot continue */ - - return -EBUSY; - } - - coll_pos = coll_reg & 0x1F; /* Values 0-31, 0 means bit 32. */ - if (coll_pos == 0) - { - coll_pos = 32; - } - - if (coll_pos <= curr_level_known_bits) - { - /* No progress - should not happen */ - - return -EIO; - } - - /* Choose the PICC with the bit set. */ - - curr_level_known_bits = coll_pos; - - /* The bit to modify */ - - count = (curr_level_known_bits - 1) % 8; - - /* First byte is index 0. */ - - i = 1 + (curr_level_known_bits / 8) + (count ? 1 : 0); - buffer[i] |= (1 << count); - } - else if (result != OK) - { - return result; - } - else /* OK */ - { - /* This was a SELECT. */ - - if (curr_level_known_bits >= 32) - { - /* No more collision */ - - select_done = true; - } - else - { - /* This was an ANTICOLLISION. */ - /* We have all 32 bits of the UID in this Cascade Level */ - - curr_level_known_bits = 32; - - /* Run loop again to do the SELECT */ - } - } - } - - /* We do not check the CBB - it was constructed by us above. */ - /* Copy the found UID bytes from buffer[] to uid->uid_data[] */ - - i = (buffer[2] == PICC_CMD_CT) ? 3 : 2; /* source index in buffer[] */ - bytes_to_copy = (buffer[2] == PICC_CMD_CT) ? 3 : 4; - - for (count = 0; count < bytes_to_copy; count++) - { - uid->uid_data[uid_index + count] = buffer[i++]; - } - - /* Check response SAK (Select Acknowledge) */ - - if (resp_len != 3 || txlastbits != 0) - { - /* SAK must be exactly 24 bits (1 byte + CRC_A). */ - - return -EIO; - } - - /* Verify CRC_A - do our own calculation and store the control in - * buffer[2..3] - those bytes are not needed anymore. - */ - - result = mfrc522_calc_crc(dev, resp_buf, 1, &buffer[2]); - if (result != OK) - { - return result; - } - - /* Is it correct */ - - if ((buffer[2] != resp_buf[1]) || (buffer[3] != resp_buf[2])) - { - return -EINVAL; - } - - /* Cascade bit set - UID not complete yes */ - - if (resp_buf[0] & 0x04) - { - cascade_level++; - } - else - { - uid_complete = true; - uid->sak = resp_buf[0]; - } - } - - /* Set correct uid->size */ - - uid->size = 3 * cascade_level + 1; - - return OK; -} - -/**************************************************************************** - * Name: mfrc522_softreset - * - * Description: - * Send a software reset command - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: none - * - ****************************************************************************/ - -void mfrc522_softreset(FAR struct mfrc522_dev_s *dev) -{ - /* Send a software reset command */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_SOFTRST_CMD); - - /* Wait the internal state machine to initialize */ - - usleep(50000); - - /* Wait for the PowerDown bit in COMMAND_REG to be cleared */ - - while (mfrc522_readu8(dev, MFRC522_COMMAND_REG) & MFRC522_POWER_DOWN); -} - -/**************************************************************************** - * Name: mfrc522_enableantenna - * - * Description: - * Turns the antenna on by enabling the pins TX1 and TX2 - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: none - * - ****************************************************************************/ - -void mfrc522_enableantenna(FAR struct mfrc522_dev_s *dev) -{ - uint8_t value = mfrc522_readu8(dev, MFRC522_TX_CTRL_REG); - - if ((value & (MFRC522_TX1_RF_EN | MFRC522_TX2_RF_EN)) != 0x03) - { - mfrc522_writeu8(dev, MFRC522_TX_CTRL_REG, value | 0x03); - } -} - -/**************************************************************************** - * Name: mfrc522_disableantenna - * - * Description: - * Turns the antenna off cutting the signals on TX1 and TX2 - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: none - * - ****************************************************************************/ - -void mfrc522_disableantenna(FAR struct mfrc522_dev_s *dev) -{ - uint8_t value = mfrc522_readu8(dev, MFRC522_TX_CTRL_REG); - - value &= ~(MFRC522_TX1_RF_EN | MFRC522_TX2_RF_EN); - mfrc522_writeu8(dev, MFRC522_TX_CTRL_REG, value); -} - -/**************************************************************************** - * Name: mfrc522_getfwversion - * - * Description: - * Read the MFRC522 firmware version. - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: the firmware version byte - * - ****************************************************************************/ - -uint8_t mfrc522_getfwversion(FAR struct mfrc522_dev_s *dev) -{ - return mfrc522_readu8(dev, MFRC522_VERSION_REG); -} - -/**************************************************************************** - * Name: mfrc522_getantennagain - * - * Description: - * Read the MFRC522 receiver gain (RxGain). - * See 9.3.3.6 / table 98 in MFRC522 datasheet. - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: none - * - ****************************************************************************/ - -uint8_t mfrc522_getantennagain(FAR struct mfrc522_dev_s *dev) -{ - return mfrc522_readu8(dev, MFRC522_RF_CFG_REG) & MFRC522_RX_GAIN_MASK; -} - -/**************************************************************************** - * Name: mfrc522_setantennagain - * - * Description: - * Set the MFRC522 receiver gain (RxGain) to value value specified in mask. - * See 9.3.3.6 / table 98 in MFRC522 datasheet. - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: none - * - ****************************************************************************/ - -void mfrc522_setantennagain(FAR struct mfrc522_dev_s *dev, uint8_t mask) -{ - uint8_t value; - - if ((value = mfrc522_getantennagain(dev)) != mask) - { - mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, value & ~MFRC522_RX_GAIN_MASK); - mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, mask & MFRC522_RX_GAIN_MASK); - } -} - -/**************************************************************************** - * Name: mfrc522_init - * - * Description: - * Initializes the MFRC522 chip - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: none - * - ****************************************************************************/ - -void mfrc522_init(FAR struct mfrc522_dev_s *dev) -{ - /* Force a reset */ - - mfrc522_softreset(dev); - - /* We need a timeout if something when communicating with a TAG case - * something goes wrong. f_timer = 13.56 MHz / (2*TPreScaler+1) where: - * TPreScaler = [TPrescaler_Hi:Tprescaler_Lo]. Tprescaler_Hi are the four - * low bits in TmodeReg. Tprescaler_Lo is on TPrescalerReg. - * - * TAuto=1; timer starts automatically at the end of the transmission in - * all communication modes at all speeds. - */ - - mfrc522_writeu8(dev, MFRC522_TMODE_REG, MFRC522_TAUTO); - - /* TPreScaler = TModeReg[3..0]:TPrescalerReg, ie: 0x0A9 = 169 => - * f_timer=40kHz, then the timer period will be 25us. - */ - - mfrc522_writeu8(dev, MFRC522_TPRESCALER_REG, 0xA9); - - /* Reload timer with 0x3E8 = 1000, ie 25ms before timeout. */ - - mfrc522_writeu8(dev, MFRC522_TRELOAD_REGH, 0x06); - mfrc522_writeu8(dev, MFRC522_TRELOAD_REGL, 0xE8); - - /* Force 100% ASK modulation independent of the ModGsPReg setting */ - - mfrc522_writeu8(dev, MFRC522_TX_ASK_REG, MFRC522_FORCE_100ASK); - - /* Set the preset value for the CRC to 0x6363 (ISO 14443-3 part 6.2.4) */ - - mfrc522_writeu8(dev, MFRC522_MODE_REG, 0x3D); - - /* Enable the Antenna pins */ - - mfrc522_enableantenna(dev); -} - -/**************************************************************************** - * Name: mfrc522_selftest - * - * Description: - * Executes a self-test of the MFRC522 chip - * - * See 16.1.1 in the MFRC522 datasheet - * - * Input Parameters: a pointer to mfrc522_dev_s structure - * - * Returned Value: none - * - ****************************************************************************/ - -int mfrc522_selftest(FAR struct mfrc522_dev_s *dev) -{ - uint8_t i; - uint8_t result[64]; - uint8_t zeros[25] = {0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0}; - - /* Execute a software reset */ - - mfrc522_softreset(dev); - - /* Flush the FIFO buffer */ - - mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER); - - /* Clear the internal buffer by writing 25 bytes 0x00 */ - - mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, zeros, 25); - - /* Transfer to internal buffer */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_MEM_CMD); - - /* Enable self-test */ - - mfrc522_writeu8(dev, MFRC522_AUTOTEST_REG, MFRC522_SELFTEST_EN); - - /* Write 0x00 to FIFO buffer */ - - mfrc522_writeu8(dev, MFRC522_FIFO_DATA_REG, 0x00); - - /* Start self-test by issuing the CalcCRC command */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_CALC_CRC_CMD); - - /* Wait for self-test to complete */ - - for (i = 0; i < 255; i++) - { - uint8_t n; - - n = mfrc522_readu8(dev, MFRC522_DIV_IRQ_REG); - if (n & MFRC522_CRC_IRQ) - { - break; - } - } - - /* Stop calculating CRC for new content in the FIFO */ - - mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); - - /* Read out the 64 bytes result from the FIFO buffer */ - - mfrc522_readblk(dev, MFRC522_FIFO_DATA_REG, result, 64, 0); - - /* Self-test done. Reset AutoTestReg register to normal operation */ - - mfrc522_writeu8(dev, MFRC522_AUTOTEST_REG, 0x00); - - mfrc522info("Self Test Result:\n"); - for (i = 1; i <= 64; i++) - { - printf("0x%02X ", result[i - 1]); - - if ((i % 8) == 0) - { - printf("\n"); - } - } - - mfrc522info("Done!\n"); - return OK; -} - -/**************************************************************************** - * Name: mfrc522_open - * - * Description: - * This function is called whenever the MFRC522 device is opened. - * - ****************************************************************************/ - -static int mfrc522_open(FAR struct file *filep) -{ - FAR struct inode *inode; - FAR struct mfrc522_dev_s *dev; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - mfrc522_configspi(dev->spi); - - usleep(10000); - - mfrc522_getfwversion(dev); - - dev->state = MFRC522_STATE_IDLE; - return OK; -} - -/**************************************************************************** - * Name: mfrc522_close - * - * Description: - * This routine is called when the MFRC522 device is closed. - * - ****************************************************************************/ - -static int mfrc522_close(FAR struct file *filep) -{ - FAR struct inode *inode; - FAR struct mfrc522_dev_s *dev; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - dev->state = MFRC522_STATE_NOT_INIT; - - return OK; -} - -/**************************************************************************** - * Name: mfrc522_read - * - * Description: - * This routine is called when the device is read. - * - * Returns TAG id as string to buffer. - * or -EIO if no TAG found - * - ****************************************************************************/ - -static ssize_t mfrc522_read(FAR struct file *filep, FAR char *buffer, - size_t buflen) -{ - FAR struct inode *inode; - FAR struct mfrc522_dev_s *dev; - FAR struct picc_uid_s uid; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - /* Is a card near? */ - - if (!mfrc522_picc_detect(dev)) - { - mfrc522err("Card is not present!\n"); - return -EAGAIN; - } - - /* Now read the UID */ - - mfrc522_picc_select(dev, &uid, 0); - - if (uid.sak != 0) - { - if (buffer) - { - snprintf(buffer, buflen, "0x%02X%02X%02X%02X", - uid.uid_data[0], uid.uid_data[1], - uid.uid_data[2], uid.uid_data[3]); - return buflen; - } - } - - return OK; -} - -/**************************************************************************** - * Name: mfrc522_write - ****************************************************************************/ - -static ssize_t mfrc522_write(FAR struct file *filep, FAR const char *buffer, - size_t buflen) -{ - FAR struct inode *inode; - FAR struct mfrc522_dev_s *dev; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - (void)dev; - - return -ENOSYS; -} - -/**************************************************************************** - * Name: mfrc522_ioctl - ****************************************************************************/ - -static int mfrc522_ioctl(FAR struct file *filep, int cmd, unsigned long arg) -{ - FAR struct inode *inode; - FAR struct mfrc522_dev_s *dev; - int ret = OK; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - switch (cmd) - { - case MFRC522IOC_GET_PICC_UID: - { - struct picc_uid_s *uid = (struct picc_uid_s *)arg; - - /* Is a card near? */ - - if (mfrc522_picc_detect(dev)) - { - ret = mfrc522_picc_select(dev, uid, 0); - } - } - break; - - case MFRC522IOC_GET_STATE: - ret = dev->state; - break; - - default: - mfrc522err("ERROR: Unrecognized cmd: %d\n", cmd); - ret = -ENOTTY; - break; - } - - return ret; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: mfrc522_register - * - * Description: - * Register the MFRC522 character device as 'devpath' - * - * Input Parameters: - * devpath - The full path to the driver to register. - * E.g., "/dev/rfid0" - * spi - An instance of the SPI interface to use to communicate with - * MFRC522. - * config - chip config - * - * Returned Value: - * Zero (OK) on success; a negated errno value on failure. - * - ****************************************************************************/ - -int mfrc522_register(FAR const char *devpath, FAR struct spi_dev_s *spi) -{ - FAR struct mfrc522_dev_s *dev; - uint8_t fwver; - int ret = 0; - - /* Initialize the MFRC522 device structure */ - - dev = (FAR struct mfrc522_dev_s *)kmm_malloc(sizeof(struct mfrc522_dev_s)); - if (!dev) - { - mfrc522err("ERROR: Failed to allocate instance\n"); - return -ENOMEM; - } - - dev->spi = spi; - - /* Device is not initialized yet */ - - dev->state = MFRC522_STATE_NOT_INIT; - -#if defined CONFIG_PM - dev->pm_level = PM_IDLE; -#endif - - /* mfrc522_attachirq(dev, mfrc522_irqhandler); */ - - /* Initialize the MFRC522 */ - - mfrc522_init(dev); - - /* Device initialized and idle */ - - dev->state = MFRC522_STATE_IDLE; - - /* Read the Firmware Version */ - - fwver = mfrc522_getfwversion(dev); - - mfrc522info("MFRC522 Firmware Version: 0x%02X!\n", fwver); - - /* If returned firmware version is unknown don't register the device */ - - if (fwver != 0x90 && fwver != 0x91 && fwver != 0x92 && fwver != 0x88 ) - { - mfrc522err("None supported device detected!\n"); - goto firmware_error; - } - - /* Register the character driver */ - - ret = register_driver(devpath, &g_mfrc522fops, 0666, dev); - if (ret < 0) - { - mfrc522err("ERROR: Failed to register driver: %d\n", ret); - kmm_free(dev); - } - - return ret; - -firmware_error: - kmm_free(dev); - return -ENODEV; -} diff --git a/drivers/wireless/mfrc522.h b/drivers/wireless/mfrc522.h deleted file mode 100644 index 821b82c0a45..00000000000 --- a/drivers/wireless/mfrc522.h +++ /dev/null @@ -1,430 +0,0 @@ -/**************************************************************************** - * drivers/wireless/mfrc522.h - * - * Copyright(C) 2016 Uniquix Ltda. All rights reserved. - * Authors: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __DRIVERS_WIRELESS_MFRC522_H -#define __DRIVERS_WIRELESS_MFRC522_H 1 - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include - -#include -#include -#include - -/**************************************************************************** - * Pre-Processor Definitions - ****************************************************************************/ - -/* The commands used by the PCD to manage communication with several PICCs - * (ISO 14443-3, Type A, section 6.4) - */ - -#define PICC_CMD_REQA 0x26 /* REQuest command, Type A */ -#define PICC_CMD_WUPA 0x52 /* Wake-UP command, Type A */ -#define PICC_CMD_CT 0x88 /* Cascade Tag, used during anti collision. */ -#define PICC_CMD_SEL_CL1 0x93 /* Anti collision/Select, Cascade Level 1 */ -#define PICC_CMD_SEL_CL2 0x95 /* Anti collision/Select, Cascade Level 2 */ -#define PICC_CMD_SEL_CL3 0x97 /* Anti collision/Select, Cascade Level 3 */ -#define PICC_CMD_HLTA 0x50 /* HaLT command, Type A */ - -/* The commands used for MIFARE Classic - * (from http://www.mouser.com/ds/2/302/MF1S503x-89574.pdf, Section 9) - * Use PCD_MFAuthent to authenticate access to a sector, then use these - * commands to read/write/modify the blocks on the sector. - * The read/write commands can also be used for MIFARE Ultralight. - */ - -#define PICC_CMD_MF_AUTH_KEY_A 0x60 /* Perform authentication with Key A */ -#define PICC_CMD_MF_AUTH_KEY_B 0x61 /* Perform authentication with Key B */ -#define PICC_CMD_MF_READ 0x30 /* Reads one 16 byte block from auth sector */ -#define PICC_CMD_MF_WRITE 0xA0 /* Writes one 16 byte block to auth senctor */ -#define PICC_CMD_MF_DECREMENT 0xC0 /* Decrements contents of a block */ -#define PICC_CMD_MF_INCREMENT 0xC1 /* Increments contents of a block */ -#define PICC_CMD_MF_RESTORE 0xC2 /* Reads the contents of a block */ -#define PICC_CMD_MF_TRANSFER 0xB0 /* Writes the contents of a block */ - -/* The commands used for MIFARE Ultralight - * (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6) - * The PICC_CMD_MF_READ/_MF_WRITE can also be used for MIFARE Ultralight. - */ - -#define PICC_CMD_UL_WRITE 0xA2 /* Writes one 4 byte page to the PICC. */ - -/* MFRC522 Registers */ - -/* NOTE: All SPI addresses are shifted one bit left in the SPI address byte - * See section 8.1.2.3 from MFRC522 datasheet - */ - -/* Page 0: Commands and status */ - /* 0x00 - reserved for future use */ -#define MFRC522_COMMAND_REG (0x01 << 1) /* starts/stops command execution */ -#define MFRC522_COM_IEN_REG (0x02 << 1) /* dis/enable int. req. ctrl bits */ -#define MFRC522_DIV_IEN_REG (0x03 << 1) /* dis/enable int. req. ctrl bits */ -#define MFRC522_COM_IRQ_REG (0x04 << 1) /* interrupt request bits */ -#define MFRC522_DIV_IRQ_REG (0x05 << 1) /* interrupt request bits */ -#define MFRC522_ERROR_REG (0x06 << 1) /* error bits status of last cmd */ -#define MFRC522_STATUS1_REG (0x07 << 1) /* communication status bits */ -#define MFRC522_STATUS2_REG (0x08 << 1) /* rcvr and transmitter status */ -#define MFRC522_FIFO_DATA_REG (0x09 << 1) /* input/output of FIFO buffer */ -#define MFRC522_FIFO_LEVEL_REG (0x0A << 1) /* number of bytes stored in the FIFO */ -#define MFRC522_WATER_LEVEL_REG (0x0B << 1) /* level for FIFO under/overflow */ -#define MFRC522_CONTROL_REG (0x0C << 1) /* miscellaneos control register */ -#define MFRC522_BIT_FRAMING_REG (0x0D << 1) /* adjustments for bit-oriented frames */ -#define MFRC522_COLL_REG (0x0E << 1) /* bit position of first bit-collision detected */ - /* 0x0F - reserved for future use */ -/* Page 1: Commands */ - /* 0x10 - reserved for future use */ -#define MFRC522_MODE_REG (0x11 << 1) /* defines general modes for transmit/receive */ -#define MFRC522_TX_MODE_REG (0x12 << 1) /* defines transmission data rate and framing */ -#define MFRC522_RX_MODE_REG (0x13 << 1) /* defines reception data rate and framing */ -#define MFRC522_TX_CTRL_REG (0x14 << 1) /* controls antenna driver pins TX1 and TX2 */ -#define MFRC522_TX_ASK_REG (0x15 << 1) /* controls the setting of transmission modulation */ -#define MFRC522_TX_SEL_REG (0x16 << 1) /* selects the internal sources for antenna driver */ -#define MFRC522_RX_SEL_REG (0x17 << 1) /* selects the internal receiver settings */ -#define MFRC522_RX_THLD_REG (0x18 << 1) /* selects the thresholds for bit decoder */ -#define MFRC522_DEMOD_REG (0x19 << 1) /* defines demodulator settings */ - /* 0x1A - reserved for future use */ - /* 0x1B - reserved for future use */ -#define MFRC522_MF_TX_REG (0x1C << 1) /* controls some MIFARE comm tx param */ -#define MFRC522_MF_RX_REG (0x1D << 1) /* controls some MIFARE comm rx param */ - /* 0x1E - reserved for future use */ -#define MFRC522_SERIAL_SPD_REG (0x1F << 1) /* selects the speed of the serial UART */ - -/* Page 2: Configuration */ - /* 0x20 - reserved for future use */ -#define MFRC522_CRC_RESULT_REGH (0x21 << 1) /* shows the MSB values of CRC calc. */ -#define MFRC522_CRC_RESULT_REGL (0x22 << 1) /* shows the LSB values of CRC calc. */ - /* 0x23 - reserved for future use */ -#define MFRC522_MOD_WIDTH_REG (0x24 << 1) /* controls the ModWidth setting */ - /* 0x25 - reserved for future use */ -#define MFRC522_RF_CFG_REG (0x26 << 1) /* configures the receiver gain */ -#define MFRC522_GSN_REG (0x27 << 1) /* selects the conductance of n-driver TX1/2 */ -#define MFRC522_CW_GSP_REG (0x28 << 1) /* defines the conductance of p-driver during no modulation */ -#define MFRC522_MOD_GSP_REG (0x29 << 1) /* defines the conductance of p-driver during modulation */ -#define MFRC522_TMODE_REG (0x2A << 1) /* defines settings for the internal timer */ -#define MFRC522_TPRESCALER_REG (0x2B << 1) /* the lower 8 bits of TPrescaler value */ -#define MFRC522_TRELOAD_REGH (0x2C << 1) /* defines the 16-bit timer reload value */ -#define MFRC522_TRELOAD_REGL (0x2D << 1) /* defines the 16-bit timer reload value */ -#define MFRC522_TCOUNT_VAL_REGH (0x2E << 1) /* shows the 16-bit timer value */ -#define MFRC522_TCOUNT_VAL_REGL (0x2F << 1) /* shows the 16-bit timer value */ - -/* Page 3: Test Registers */ - /* 0x30 - reserved for future use */ -#define MFRC522_TEST_SEL1_REG (0x31 << 1) /* general test signal configuration */ -#define MFRC522_TEST_SEL2_REG (0x32 << 1) /* general test signal configuration */ -#define MFRC522_TEST_PIN_EN_REG (0x33 << 1) /* enables pin output driver on pins D1 to D7 */ -#define MFRC522_TEST_PIN_VAL_REG (0x34 << 1) /* defines the values to D1 to D7 */ -#define MFRC522_TEST_BUS_REG (0x35 << 1) /* shows the status of the internal test bus */ -#define MFRC522_AUTOTEST_REG (0x36 << 1) /* controls the digital self test */ -#define MFRC522_VERSION_REG (0x37 << 1) /* shows the software version */ -#define MFRC522_ANALOG_TEST_REG (0x38 << 1) /* controls the pins AUX1 and AUX2 */ -#define MFRC522_TEST_DAC1_REG (0x39 << 1) /* defines the test value for TestDAC1 */ -#define MFRC522_TEST_DAC2_REG (0x3A << 1) /* defines the test value for TestDAC2 */ -#define MFRC522_TEST_ADC_REG (0x3B << 1) /* show the value of ADC I and Q channels */ - -/* Section 9.3.1.2: MFRC522 Command Register */ - -#define MFRC522_CMD_MASK 0x0F -# define MFRC522_IDLE_CMD 0x00 /* no action, cancels current command execution */ -# define MFRC522_MEM_CMD 0x01 /* stores 25 bytes into the internal buffer */ -# define MFRC522_GEN_RND_ID_CMD 0x02 /* generates a 10-bytes random ID number */ -# define MFRC522_CALC_CRC_CMD 0x03 /* activates the CRC coprocessor or self test */ -# define MFRC522_TRANSMIT_CMD 0x04 /* transmits data from the FIFO buffer */ -# define MFRC522_NO_CHANGE_CMD 0x07 /* no command change, used to modify CommandReg */ -# define MFRC522_RECEIVE_CMD 0x08 /* activates the receiver circuits */ -# define MFRC522_TRANSCV_CMD 0x0C /* transmits data from FIFO and receive automatically */ -# define MFRC522_MF_AUTH_CMD 0x0E /* performs the MIFARE stand authentication as a reader */ -# define MFRC522_SOFTRST_CMD 0x0F /* resets the MFRC522 */ -#define MFRC522_POWER_DOWN (1 << 4) /* soft power-down mode entered */ -#define MFRC522_RCV_OFF (1 << 5) /* turns off analog part of receiver */ - -/* Section 9.3.1.3: ComIEnReg register */ - -#define MFRC522_TIMER_IEN (1 << 0) /* allows the timer interrupt request on pin IRQ */ -#define MFRC522_ERR_IEN (1 << 1) /* allows the error interrupt request on pin IRQ */ -#define MFRC522_LO_ALERT_IEN (1 << 2) /* allows the low alert interrupt request on pin IRQ */ -#define MFRC522_HI_ALERT_IEN (1 << 3) /* allows the high alert interrupt request on pin IRQ */ -#define MFRC522_IDLE_IEN (1 << 4) /* allows the idle interrupt request on pin IRQ */ -#define MFRC522_RX_IEN (1 << 5) /* allows the receiver interrupt request on pin IRQ */ -#define MFRC522_TX_IEN (1 << 6) /* allows the transmitter interrupt request on pin IRQ */ -#define MFRC522_IRQ_INV (1 << 7) /* signal on pin IRQ is inverse of IRq bit from Status1Reg */ - -/* Section 9.3.1.4: DivIEnReg register */ - -#define MFRC522_CRC_IEN (1 << 2) /* allows the CRC interrupt request on pin IRQ */ -#define MFRC522_MFIN_ACT_IEN (1 << 4) /* allows the MFIN active interrupt request on pin IRQ */ -#define MFRC522_IRQ_PUSH_PULL (1 << 7) /* 1 = IRQ pin is a standard CMOS output pin, 0 = open-drain */ - -/* Section 9.3.1.5: ComIrqReg register */ - -#define MFRC522_COM_IRQ_MASK (0x7F) -#define MFRC522_TIMER_IRQ (1 << 0) /* enabled when TCounterValReg reaches value 0 */ -#define MFRC522_ERR_IRQ (1 << 1) /* any error bit in the ErrorReg register is set */ -#define MFRC522_LO_ALERT_IRQ (1 << 2) /* Status1Reg register’s LoAlert bit is set */ -#define MFRC522_HI_ALERT_IRQ (1 << 3) /* Status1Reg register’s HiAlert bit is set */ -#define MFRC522_IDLE_IRQ (1 << 4) /* if a command terminates this bit is set */ -#define MFRC522_RX_IRQ (1 << 5) /* receiver has detected the end of a valid data stream */ -#define MFRC522_TX_IRQ (1 << 6) /* set immediately after the last data bit was transmitted */ -#define MFRC522_SET1 (1 << 7) /* indicate the status of ComIrqReg bits */ - -/* Section 9.3.1.6: DivIrqReg register */ - -#define MFRC522_CRC_IRQ (1 << 2) /* the CalcCRC command is active and all data is processed */ -#define MFRC522_MFIN_ACT_IRQ (1 << 4) /* MFIN is active, int is set on rising/falling signal edge */ -#define MFRC522_SET2 (1 << 7) /* indicates the status of the marked bits in the DivIrqReg */ - -/* Section 9.3.1.7: ErrorReg register */ - -#define MFRC522_PROTO_ERR (1 << 0) /* set if the SOF is incorrect or during MFAuthent if data is incorrect */ -#define MFRC522_PARITY_ERR (1 << 1) /* parity check failed */ -#define MFRC522_CRC_ERR (1 << 2) /* the RxCRCEn bit is set and the CRC calculation fails */ -#define MFRC522_COLL_ERR (1 << 3) /* a bit-collision is detected */ -#define MFRC522_BUF_OVFL_ERR (1 << 4) /* FIFO is full and the host or internal state machine try to write data */ -#define MFRC522_TEMP_ERR (1 << 6) /* internal temperature sensor detects overheating */ -#define MFRC522_WR_ERR (1 << 7) /* data write error in the FIFO, host writing to FIFO at the wrong time */ - -/* Section 9.3.1.8: Status1Reg register */ - -#define MFRC522_LO_ALERT (1 << 0) /* number of bytes on FIFO lower than the water-mark */ -#define MFRC522_HI_ALERT (1 << 1) /* number of bytes on FIFO higher than the water-mark */ -#define MFRC522_TRUNNING (1 << 3) /* timer is running */ -#define MFRC522_IRQ (1 << 4) /* indicates if any interrupt source requests attention */ -#define MFRC522_CRC_READY (1 << 5) /* the CRC calculation has finished */ -#define MFRC522_CRC_OK (1 << 6) /* when the calculation is done correctly this bit change to 1 */ - -/* Section 9.3.1.9: Status2Reg register */ - -#define MFRC522_MODEM_STATE_MASK (7 << 0) /* shows the state of the transmitter and receiver state machine */ -#define MFRC522_MODEM_IDLE (0) /* idle */ -#define MFRC522_MODEM_WAIT_BFR (1) /* wait for the BitFramingReg register’s StartSend bit */ -#define MFRC522_MODEM_TXWAIT (2) /* wait until RF field is present if TxWaitRF bit is set to 1 */ -#define MFRC522_MODEM_TXING (3) /* transmitting */ -#define MFRC522_MODEM_RXWAIT (4) /* wait until RF field is present if TxWaitRF bit is set to 1 */ -#define MFRC522_MODEM_WAIT_DATA (5) /* wait for data */ -#define MFRC522_MODEM_RXING (6) /* receiving */ -#define MFRC522_MF_CRYPTO1_ON (1 << 3) /* MIFARE Crypto1 unit is switched on */ -#define MFRC522_I2C_FORCE_HS (1 << 6) /* set the I2C to high-speed mode (R/W bit) */ -#define MFRC522_TEMP_SENS_CLEAR (1 << 7) /* clears the temperature error if it is below 125C (R/W bit) */ - -/* Section 9.3.1.10: FIFODataReg register */ - -#define MFRC522_FIFO_DATA_MASK (0xFF) /* Input and output of 64 byte FIFO buffer */ - -/* Section 9.3.1.11: FIFOLevelReg register */ - -#define MFRC522_FIFOLEVEL_MASK (0x7F) /* indicates the number of bytes stored in the FIFO buffer */ -#define MFRC522_FLUSH_BUFFER (1 << 7) /* immediately clears the internal FIFO buffer */ - -/* Section 9.3.1.12: WaterLevelReg register */ - -#define MFRC522_WATER_LEVEL_MASK (0x3F) /* level for FIFO under- and overflow warning */ - -/* Section 9.3.1.13: ControlReg register */ - -#define MFRC522_RX_LAST_BITS_MASK (7 << 0) /* indicates the number of valid bits in the last received byte */ -#define MFRC522_TSTART_NOW (1 << 6) /* timer starts immediately */ -#define MFRC522_TSTOP_NOW (1 << 7) /* timer stops immediately */ - -/* Section 9.3.1.14: BitFramingReg register */ - -#define MFRC522_TX_LAST_BITS_MASK (7 << 0) /* defines the number of bits of the last byte that will be transmitted */ -#define MFRC522_RX_ALIGN_MASK (7 << 4) /* used for reception of bit-oriented frames */ -#define MFRC522_START_SEND (1 << 7) /* starts the transmission of data */ - -/* Section 9.3.1.15: CollReg register */ - -#define MFRC522_COLL_POS_MASK (0x1F) /* shows the bit position of the first detected collision */ -#define MFRC522_COLL_POS_NOT_VALID (1 << 5) /* no collision detected or it is out of the range of CollPos[4:0] */ -#define MFRC522_VALUES_AFTER_COLL (1 << 7) /* 0 means: all received bits will be cleared after a collision */ - -/* Section 9.3.2.2: ModeReg register */ - -#define MFRC522_CRC_PRESET_MASK (0x3) /* defines the preset value for the CalcCRC */ -#define MFRC522_CRC_PRESET_0000 (0x0) /* 0000h CRC preset value */ -#define MFRC522_CRC_PRESET_6363 (0x1) /* 6363h CRC preset value */ -#define MFRC522_CRC_PRESET_A671 (0x2) /* A671h CRC preset value */ -#define MFRC522_CRC_PRESET_FFFF (0x3) /* FFFFh CRC preset value */ -#define MFRC522_POL_MFIN (1 << 3) /* defines the polarity of pin MFIN */ -#define MFRC522_TX_WAIT_RF (1 << 5) /* transmitter can only be started if an RF field is generated */ -#define MFRC522_MSB_FIRST (1 << 7) /* CRC coprocessor calculates the CRC with MSB first */ - -/* Section 9.3.2.3: TxModeReg register */ - -#define MFRC522_INV_MOD (1 << 3) /* modulation of transmitted data is inverted */ -#define MFRC522_TX_SPEED_MASK (7 << 4) /* defines the bit rate during data transmission */ -#define MFRC522_TX_106KBD (0 << 4) /* 106 kBd */ -#define MFRC522_TX_212KBD (1 << 4) /* 212 kBd */ -#define MFRC522_TX_424KBD (2 << 4) /* 424 kBd */ -#define MFRC522_TX_848KBD (3 << 4) /* 848 kBd */ - /* 4-7 << 4 - reserved */ -#define MFRC522_TX_CRC_EN (1 << 7) /* enables CRC generation during data transmission */ - -/* Section 9.3.2.4: RxModeReg register */ - -#define MFRC522_RX_MULTIPLE (1 << 2) /* enable to receive more than one data frame, only at 106kBd */ -#define MFRC522_RX_NO_ERR (1 << 3) /* ignore invalid data stream error (less than 4 bits received) */ -#define MFRC522_RX_SPEED_MASK (7 << 4) /* defines the bit rate during data reception */ -#define MFRC522_RX_106KBD (0 << 4) /* 106 kBd */ -#define MFRC522_RX_212KBD (1 << 4) /* 212 kBd */ -#define MFRC522_RX_424KBD (2 << 4) /* 424 kBd */ -#define MFRC522_RX_848KBD (3 << 4) /* 848 kBd */ - /* 4-7 << 4 - reserved */ -#define MFRC522_RX_CRC_EN (1 << 7) /* enables CRC generation during data reception */ - -/* Section 9.3.2.5: TxControlReg register */ - -#define MFRC522_TX1_RF_EN (1 << 0) /* output signal on pin TX1 delivers 13.56MHz */ -#define MFRC522_TX2_RF_EN (1 << 1) /* output signal on pin TX2 delivers 13.56MHz */ - /* bit 2 - reserved */ -#define MFRC522_TX2_CW (1 << 3) /* output signal on pin TX2 delivers (un)modulated 13.56MHz */ -#define MFRC522_INV_TX1_RF_OFF (1 << 4) /* output signal on pin TX1 is inverted when driver TX1 is disabled */ -#define MFRC522_INV_TX2_RF_OFF (1 << 5) /* output signal on pin TX2 is inverted when driver TX2 is disabled */ -#define MFRC522_INV_TX1_RF_ON (1 << 6) /* output signal on pin TX1 is inverted when driver TX1 is enabled */ -#define MFRC522_INV_TX2_RF_ON (1 << 7) /* output signal on pin TX2 is inverted when driver TX2 is enabled */ - -/* Section 9.3.2.6: TxASKReg register */ - -#define MFRC522_FORCE_100ASK (1 << 6) /* forces a 100% ASK modulation independent of the ModGsPReg setting */ - -/* Section 9.3.2.7: TxSelReg register */ - -#define MFRC522_MFOUT_SEL_MASK (0xF) /* selects the input for pin MFOUT */ -#define MFRC522_MFOUT_3STATE (0) /* 3-state */ -#define MFRC522_MFOUT_LOW (1) /* constant Low */ -#define MFRC522_MFOUT_HIGH (2) /* constant High */ -#define MFRC522_MFOUT_TEST_BUS (3) /* test bus signal as defined by the TstBusBitSel[2:0] value */ -#define MFRC522_MFOUT_INT_ENV (4) /* modulation signal (envelope) from the internal encoder */ -#define MFRC522_MFOUT_TX_STREAM (5) /* serial data stream to be transmitted, data stream before Miller encoder */ - /* 6 - reserved */ -#define MFRC522_MFOUT_RX_STREAM (7) /* serial data stream received, data stream after Manchester decoder */ - /* 8-15 - reserved */ -#define MFRC522_DRV_SEL_MASK (3 << 4) /* selects the input of drivers TX1 and TX2 */ -#define MFRC522_DRV_SEL_3STATE (0 << 4) /* 3-state */ -#define MFRC522_DRV_SEL_INT_ENV (1 << 4) /* modulation signal (envelope) from the internal encoder */ -#define MFRC522_DVR_SEL_ENV_MFIN (2 << 4) /* modulation signal (envelope) from pin MFIN */ -#define MFRC522_DVR_SEL_HIGH (3 << 4) /* High: depends on InvTx1RFOn/InvTx1RFOff and InvTx2RFOn/InvTx2RFOff */ - -/* Section 9.3.2.8: RxSelReg register */ - -#define MFRC522_RX_WAIT_MASK (0x3F) /* delay the receiver RxWait bit-clocks after transmission */ -#define MFRC522_UART_SEL_MASK (3 << 6) /* selects the input of the contactless UART */ -#define MFRC522_UART_LOW (0 << 6) /* constant Low */ -#define MFRC522_UART_MANCHESTER (1 << 6) /* Manchester with subcarrier from pin MFIN */ -#define MFRC522_UART_INT_MOD (2 << 6) /* modulated signal from the internal analog module, default */ -#define MFRC522_UART_NRZ_CODE (3 << 6) /* NRZ coding without subcarrier from pin MFIN */ - -/* Section 9.3.2.9: RxThresholdReg register */ - -#define MFRC522_COLL_LEVEL_MASK (7) /* the minimum signal strength to generate a bit-collision */ -#define MFRC522_MIN_LEVEL_MASK (0xF << 4) /* the minimum signal strength that will be accepted */ - -/* Section 9.3.2.10: DemodReg register */ - -#define MFRC522_TAU_SYNC_MASK (3 << 0) /* changes the time-constant of the internal PLL during burst */ -#define MFRC522_TAU_RCV_MASK (3 << 2) /* changes the time-constant of the internal PLL during data reception */ -#define MFRC522_TPRESCAL_EVEN (1 << 4) /* defines the Timer Prescaler formula to use */ -#define MFRC522_FIX_IQ (1 << 5) /* defines if reception will be fixed at channel I or Q based on AddIQ[1:0] */ -#define MFRC522_ADD_IQ_MASK (3 << 6) /* defines the use of I and Q channel during reception */ - -/* Section 9.3.2.13: MfTxReg register */ - -#define MFRC522_MF_TX_WAIT_MASK (3 << 0) /* defines the additional response time */ - -/* Section 9.3.2.14 MfRxReg register */ - -#define MFRC522_MF_RX_PARITY_DIS (1 << 4 ) /* disable parity bit to transmittion and reception */ - -/* Section 9.3.2.16: SerialSpeedReg register */ - -#define MFRC522_BR_T1_MASK (0x1F) /* factor BR_T1 adjusts the transfer speed */ -#define MFRC522_BR_T0_MASK (7 << 5) /* factor BR_T0 adjusts the transfer speed */ - -/* Section 9.3.3.6: RFCfgReg register */ - -#define MFRC522_RX_GAIN_MASK (0x7 << 4) -#define MFRC522_RX_GAIN_18DB (0x0 << 4) -#define MFRC522_RX_GAIN_23DB (0x1 << 4) -#define MFRC522_RX_GAIN_18DB_2 (0x2 << 4) -#define MFRC522_RX_GAIN_23DB_2 (0x3 << 4) -#define MFRC522_RX_GAIN_33DB (0x4 << 4) -#define MFRC522_RX_GAIN_38DB (0x5 << 4) -#define MFRC522_RX_GAIN_43DB (0x6 << 4) -#define MFRC522_RX_GAIN_48DB (0x7 << 4) - -/* MFRC522 TModeReg and TPrescalerReg registers */ - -#define MFRC522_TPRESCALER_HI_MASK (0xF) -#define MFRC522_TAUTO_RESTART (1 << 4) -#define MFRC522_TGATED_MASK (3 << 5) -#define MFRC522_TGATED_NONGATED (0 << 5) /* non-gated mode */ -#define MFRC522_TGATED_MFIN (1 << 5) /* gated by pin MFIN */ -#define MFRC522_TGATED_AUX1 (2 << 5) /* gated by pin AUX1 */ -#define MFRC522_TAUTO (1 << 7) /* timer starts automatically at the end of the transmission */ - -/* MFRC522 AutoTestReg register */ - -#define MFRC522_SELFTEST_MASK (0xF) /* for default operation the self test must be disabled by value 0000b */ -#define MFRC522_RFT_MASK (3 << 4) /* reserved for production tests */ -#define MFRC522_AMP_RCV (1 << 6) /* non-linear signal processing mode, increase range distance at 106kBd */ - -#define MFRC522_SELFTEST_EN 9 /* the self test is enabled by value 1001b */ - -#ifndef CONFIG_MFRC522_SPI_FREQ -# define CONFIG_MFRC522_SPI_FREQ (5000000) -#endif - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -struct mfrc522_dev_s -{ - uint8_t state; - FAR struct spi_dev_s *spi; /* SPI interface */ -}; - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -bool mfrc522_set_config(struct mfrc522_dev_s *dev, uint8_t flags); - -#endif /* __DRIVERS_WIRELESS_MFRC522_H */ diff --git a/drivers/wireless/pn532.c b/drivers/wireless/pn532.c deleted file mode 100644 index 290e05105ab..00000000000 --- a/drivers/wireless/pn532.c +++ /dev/null @@ -1,1165 +0,0 @@ -/**************************************************************************** - * drivers/wireless/pn532.c - * - * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. - * Authors: Janne Rosberg - * Teemu Pirinen - * Juho Grundström - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "pn532.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Configuration ************************************************************/ -/* Bit order H/W feature must be enabled in order to support LSB first - * operation. - */ - -#if !defined(CONFIG_SPI_HWFEATURES) || !defined(CONFIG_SPI_BITORDER) -# error CONFIG_SPI_HWFEATURES=y and CONFIG_SPI_BITORDER=y required by this driver -#endif - -#ifndef CONFIG_ARCH_HAVE_SPI_BITORDER -# warning This platform does not support SPI LSB-bit order -#endif - -#ifdef CONFIG_WL_PN532_DEBUG -# define pn532err _err -# define pn532info _info -#else -# ifdef CONFIG_CPP_HAVE_VARARGS -# define pn532err(x...) -# define pn532info(x...) -# else -# define pn532err (void) -# define pn532info (void) -# endif -#endif - -#ifdef CONFIG_WL_PN532_DEBUG_TX -# define tracetx errdumpbuffer -#else -# define tracetx(x...) -#endif - -#ifdef CONFIG_WL_PN532_DEBUG_RX -# define tracerx errdumpbuffer -#else -# define tracerx(x...) -#endif - -#define FRAME_SIZE(f) (sizeof(struct pn532_frame) + f->len + 2) -#define FRAME_POSTAMBLE(f) (f->data[f->len + 1]) - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -static inline void pn532_configspi(FAR struct spi_dev_s *spi); -static void pn532_lock(FAR struct spi_dev_s *spi); -static void pn532_unlock(FAR struct spi_dev_s *spi); - -/* Character driver methods */ - -static int _open(FAR struct file *filep); -static int _close(FAR struct file *filep); -static ssize_t _read(FAR struct file *, FAR char *, size_t); -static ssize_t _write(FAR struct file *filep, FAR const char *buffer, - size_t buflen); -static int _ioctl(FAR struct file *filep,int cmd,unsigned long arg); - -static uint8_t pn532_checksum(uint8_t value); -static uint8_t pn532_data_checksum(uint8_t *data, int datalen); - -int pn532_read(struct pn532_dev_s *dev, uint8_t *buff, uint8_t n); - -/* IRQ Handling TODO: -static int pn532_irqhandler(FAR int irq, FAR void *context, FAR void* dev); -static inline int pn532_attachirq(FAR struct pn532_dev_s *dev, xcpt_t isr); -*/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static const struct file_operations g_pn532fops = -{ - _open, - _close, - _read, - _write, - 0, - _ioctl -#ifndef CONFIG_DISABLE_POLL - ,0 -#endif -#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS - ,0 -#endif -}; - -static const uint8_t pn532ack[] = -{ - 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00 -}; - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -static void pn532_lock(FAR struct spi_dev_s *spi) -{ - int ret; - - (void)SPI_LOCK(spi, true); - - SPI_SETMODE(spi, SPIDEV_MODE0); - SPI_SETBITS(spi, 8); - - ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST); - if (ret < 0) - { - pn532err("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret); - } - - (void)SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ); -} - -static void pn532_unlock(FAR struct spi_dev_s *spi) -{ - (void)SPI_LOCK(spi, false); -} - -static inline void pn532_configspi(FAR struct spi_dev_s *spi) -{ - int ret; - - /* Configure SPI for the PN532 module. */ - - SPI_SETMODE(spi, SPIDEV_MODE0); - SPI_SETBITS(spi, 8); - - ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST); - if (ret < 0) - { - pn532err("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret); - } - - (void)SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ); -} - -static inline void pn532_select(struct pn532_dev_s *dev) -{ - if (dev->config->select) - { - dev->config->select(dev, true); - } - else - { - SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true); - } -} - -static inline void pn532_deselect(struct pn532_dev_s *dev) -{ - if (dev->config->select) - { - dev->config->select(dev, false); - } - else - { - SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false); - } -} - -static void pn532_frame_init(struct pn532_frame *frame, uint8_t cmd) -{ - frame->preamble = PN532_PREAMBLE; - frame->start_code = PN532_SOF; - frame->tfi = PN532_HOSTTOPN532; - frame->data[0] = cmd; - frame->len = 2; -} - -static void pn532_frame_finish(struct pn532_frame *frame) -{ - frame->lcs = pn532_checksum(frame->len); - frame->data[frame->len-1] = pn532_data_checksum(&frame->tfi, frame->len); - frame->data[frame->len] = PN532_POSTAMBLE; -} - -static inline uint8_t pn532_checksum(uint8_t value) -{ - return ~value + 1; -} - -static uint8_t pn532_data_checksum(uint8_t *data, int datalen) -{ - uint8_t sum = 0x00; - int i; - - for (i = 0; i < datalen; i++) - { - sum += data[i]; - } - - return pn532_checksum(sum); -} - -bool pn532_rx_frame_is_valid(struct pn532_frame *f, bool check_data) -{ - uint8_t chk; - - if (f->start_code != PN532_SOF) - { - pn532err("ERROR: Frame startcode 0x%X != 0x%X\n", - PN532_SOF, f->start_code); - return false; - } - - if (f->tfi != PN532_PN532TOHOST) - { - return false; - } - - chk = pn532_checksum(f->len); - if (chk != f->lcs) - { - pn532err("ERROR: Frame data len checksum failed"); - return false; - } - - if (check_data) - { - chk = pn532_data_checksum(&f->tfi, f->len); - if (chk != f->data[f->len-1]) - { - pn532err("ERROR: Frame data checksum failed: calc=0x%X != 0x%X", - chk, f->data[f->len-1]); - return false; - } - } - - return true; -} - -static uint8_t pn532_status(struct pn532_dev_s *dev) -{ - int rs; - - pn532_lock(dev->spi); - pn532_select(dev); - - rs = SPI_SEND(dev->spi, PN532_SPI_STATREAD); - rs = SPI_SEND(dev->spi, PN532_SPI_STATREAD); - - pn532_deselect(dev); - pn532_unlock(dev->spi); - - return rs; -} - -/**************************************************************************** - * Name: pn532_wait_rx_ready - * - * Description: - * Blocks until Data frame available from chip. - * - * Input Parameters: - * dev - * timeout - * - * Returned Value: - * 0 for OK. -ETIMEDOUT if no data available - * - ****************************************************************************/ - -static int pn532_wait_rx_ready(struct pn532_dev_s *dev, int timeout) -{ - int ret = OK; - -#ifdef CONFIG_PN532_USE_IRQ_FLOW_CONTROL - struct timespec ts; - clock_gettime(CLOCK_REALTIME, &ts); - ts.tv_sec += 1; - sem_timedwait(dev->sem_rx, &ts); -#endif - - /* TODO: Handle Exception bits 2, 3 */ - - while (pn532_status(dev) != PN532_SPI_READY) - { - if (--timeout == 0x00) - { - pn532err("ERROR: wait RX timeout!\n"); - return -ETIMEDOUT; - } - - usleep(1000); - } - - dev->state = PN532_STATE_DATA_READY; - return ret; -} - -/**************************************************************************** - * Name: pn532_writecommand - * - * Description: - * Helper for debug/testing - * - * Input Parameters: - * - * Returned Value: - * - ****************************************************************************/ - -#if 0 -static void pn532_writecommand(struct pn532_dev_s *dev, uint8_t cmd) -{ - char cmd_buffer[16]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - - pn532_frame_init(f, cmd); - pn532_frame_finish(f); - - pn532_lock(dev->spi); - pn532_select(dev); - usleep(10000); - - SPI_SEND(dev->spi, PN532_SPI_DATAWRITE); - SPI_SNDBLOCK(dev->spi, f, FRAME_SIZE(f)); - - pn532_deselect(dev); - pn532_unlock(dev->spi); - - tracetx("command sent", (uint8_t *) f, FRAME_SIZE(f)); -} -#endif - -/**************************************************************************** - * Name: pn532_read - * - * Description: - * RAW Read data from chip. - * NOTE: This WON'T wait if data is available! - * - * Input Parameters: - * - * Returned Value: - * - ****************************************************************************/ - -int pn532_read(struct pn532_dev_s *dev, uint8_t *buff, uint8_t n) -{ - pn532_lock(dev->spi); - pn532_select(dev); - SPI_SEND(dev->spi, PN532_SPI_DATAREAD); - SPI_RECVBLOCK(dev->spi, buff, n); - pn532_deselect(dev); - pn532_unlock(dev->spi); - - tracerx("read", buff, n); - return n; -} - -int pn532_read_more(struct pn532_dev_s *dev, uint8_t *buff, uint8_t n) -{ - pn532_lock(dev->spi); - pn532_select(dev); - SPI_RECVBLOCK(dev->spi, buff, n); - pn532_deselect(dev); - pn532_unlock(dev->spi); - - tracerx("read_more", buff, n); - return n; -} - -/**************************************************************************** - * Name: pn532_read_ack - * - * Description: - * Read Ack responce from device - * - * Input Parameters: - * dev - * - * Returned Value: - * 0 = NOK, 1 = OK - * - ****************************************************************************/ - -int pn532_read_ack(struct pn532_dev_s *dev) -{ - int res = 0; - uint8_t ack[6]; - - pn532_read(dev, (uint8_t *) &ack, 6); - - if (memcmp(&ack, &pn532ack, 6) == 0x00) - { - res = 1; - } - else - { - pn532info("ACK NOK"); - res = 0; - } - - return res; -} - -/**************************************************************************** - * Name: pn532_write_frame - * - * Description: - * Write frame to chip. Also waits and reads ACK frame from chip. - * - * Construct frame with - * pn532_frame_init(), pn532_frame_finish() - * - * Input Parameters: - * dev - Device instance - * f - Pointer to start frame - * - * Returned Value: - * 0 for OK, negative for error - * - ****************************************************************************/ - -int pn532_write_frame(struct pn532_dev_s *dev, struct pn532_frame *f) -{ - int res = OK; - - pn532_lock(dev->spi); - pn532_select(dev); - usleep(2000); - - SPI_SEND(dev->spi, PN532_SPI_DATAWRITE); - SPI_SNDBLOCK(dev->spi, f, FRAME_SIZE(f)); - pn532_deselect(dev); - pn532_unlock(dev->spi); - tracetx("WriteFrame", (uint8_t *) f, FRAME_SIZE(f)); - - /* Wait ACK frame */ - - res = pn532_wait_rx_ready(dev, 30); - if (res == OK) - { - if (!pn532_read_ack(dev)) - { - pn532err("ERROR: command FAILED\n"); - res = -EIO; - } - } - - return res; -} - -int pn532_read_frame(struct pn532_dev_s *dev, struct pn532_frame *f, int max_size) -{ - int res = -EIO; - - /* Wait for frame available */ - - if ((res = pn532_wait_rx_ready(dev, 100)) == OK) - { - /* Read header */ - - pn532_read(dev, (uint8_t *) f, sizeof(struct pn532_frame)); - if (pn532_rx_frame_is_valid(f, false)) - { - if (max_size < f->len) - { - return -EINVAL; - } - - pn532_read_more(dev, &f->data[0], f->len); - - /* TODO: optimize frame integrity check... - * pn532_data_checksum(&f.tfi, f->len); - * errdumpbuffer("RX Frame:", f, f->len+6); - */ - - if (pn532_rx_frame_is_valid(f, true)) - { - res = OK; - } - } - } - - return res; -} - -bool pn532_set_config(struct pn532_dev_s *dev, uint8_t flags) -{ - char cmd_buffer[2+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - - pn532_frame_init(f, PN532_COMMAND_SETPARAMETERS); - f->data[1] = flags; - f->len += 1; - pn532_frame_finish(f); - - uint8_t resp[9]; - bool res = false; - - if (pn532_write_frame(dev, f) == OK) - { - pn532_read(dev, (uint8_t *) &resp, 9); - tracerx("set config responce", resp, 9); - res = true; - } - - return res; -} - -int pn532_sam_config(struct pn532_dev_s *dev, struct pn_sam_settings_s *settings) -{ - char cmd_buffer[4+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - int res; - - pn532_frame_init(f, PN532_COMMAND_SAMCONFIGURATION); - f->data[1] = PN532_SAM_NORMAL_MODE; - f->data[2] = 0x14; /* Timeout LSB=50ms 0x14*50ms = 1sec */ - f->data[3] = 0x01; /* P-70, IRQ enabled */ - - if (settings) - { - /* TODO: !!! */ - } - - f->len += 3; - pn532_frame_finish(f); - - res = -EIO; - - if (pn532_write_frame(dev, f) == OK) - { - if (pn532_read_frame(dev, f, 4) == OK) - { - tracerx("sam config response", (uint8_t *) f->data, 3); - if (f->data[0] == PN532_COMMAND_SAMCONFIGURATION + 1) - { - res = OK; - } - } - } - - return res; -} - -int pn532_get_fw_version(struct pn532_dev_s *dev, - struct pn_firmware_version *fv) -{ - uint8_t cmd_buffer[4+8+1]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - struct pn_firmware_version *fw; - int res = -EIO; - - pn532_frame_init(f, PN532_COMMAND_GETFIRMWAREVERSION); - pn532_frame_finish(f); - - if (pn532_write_frame(dev, f) == OK) - { - if (pn532_read_frame(dev, f, 6) == OK) - { - if (f->data[0] == PN532_COMMAND_GETFIRMWAREVERSION + 1) - { - fw = (struct pn_firmware_version*) &f->data[1]; - pn532info("FW: %d.%d on IC:0x%X (Features: 0x%X)\n", - fw->ver, fw->rev, fw->ic, fw->support); - if (fv) - { - memcpy(fv, fw, sizeof(struct pn_firmware_version)); - } - - res = OK; - } - } - } - - return res; -} - -int pn532_write_gpio(struct pn532_dev_s *dev, uint8_t p3, uint8_t p7) -{ - uint8_t cmd_buffer[3+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - int res = -EIO; - - pn532_frame_init(f, PN532_COMMAND_WRITEGPIO); - f->data[1] = p3; - f->data[2] = p7; - f->len += 2; - pn532_frame_finish(f); - - if (pn532_write_frame(dev, f)) - { - pn532_read(dev, cmd_buffer, 10); - tracetx("Resp:", cmd_buffer, 10); - pn532info("TFI=%x, data0=%X", f->tfi, f->data[0]); - if ((f->tfi == PN532_PN532TOHOST) && (f->data[0] == PN532_COMMAND_WRITEGPIO+1)) - { - res = OK; - } - } - - return res; -} - -uint32_t pn532_write_passive_data(struct pn532_dev_s *dev, uint8_t address, - uint8_t *data, uint8_t len) -{ - uint8_t cmd_buffer[8+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - uint8_t resp[20]; - uint32_t res = -EIO; - - pn532_frame_init(f, PN532_COMMAND_INDATAEXCHANGE); - f->data[1] = 1; /* max n cards at once */ - f->data[2] = 0xA2; /* command WRITE */ - f->data[3] = address; /* ADDRESS, 0 = serial */ - memcpy(&f->data[4], data, len); - f->len += 7; - pn532_frame_finish(f); - - if (pn532_write_frame(dev, f) == OK) - { - if (dev->state == PN532_STATE_DATA_READY) - { - if (pn532_read_frame(dev, (struct pn532_frame *) resp, 15) == OK) - { - dev->state = PN532_STATE_IDLE; - f = (struct pn532_frame *) resp; - tracerx("passive target id resp:", f, f->len+6); - - if (f->data[0] == PN532_COMMAND_INDATAEXCHANGE+1) - { - res = f->data[1]; - } - } - } - } - - return res; -} - -uint32_t pn532_read_passive_data(struct pn532_dev_s *dev, uint8_t address, - uint8_t *data, uint8_t len) -{ - uint8_t cmd_buffer[4+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - uint8_t resp[30]; - uint32_t res = -1; - - pn532_frame_init(f, PN532_COMMAND_INDATAEXCHANGE); - f->data[1] = 1; /* max n cards at once */ - f->data[2] = 0x30; /* command READ */ - f->data[3] = address; /* ADDRESS, 0 = serial */ - f->len += 3; - pn532_frame_finish(f); - - if (pn532_write_frame(dev, f) == OK) - { - if (dev->state == PN532_STATE_DATA_READY) - { - if (pn532_read_frame(dev, (struct pn532_frame *)resp, 25) == OK) - { - dev->state = PN532_STATE_IDLE; - f = (struct pn532_frame *) resp; - tracerx("passive target id resp:", f, f->len+6); - - if (f->data[0] == PN532_COMMAND_INDATAEXCHANGE+1) - { - if(f->data[1] == 0 && data && len) - { - memcpy(data, &f->data[2], len); - } - - res = f->data[1]; - } - } - } - } - - return res; -} - -uint32_t pn532_read_passive_target_id(struct pn532_dev_s *dev, uint8_t baudrate) -{ - uint8_t cmd_buffer[4+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - uint8_t resp[20]; - uint32_t res = -EAGAIN; - int i; - - if (dev->state == PN532_STATE_DATA_READY) - { - res = -EIO; - if (pn532_read_frame(dev, (struct pn532_frame *) resp, 15) == OK) - { - dev->state = PN532_STATE_IDLE; - f = (struct pn532_frame *) resp; - struct pn_poll_response *r = (struct pn_poll_response *) &f->data[1]; - tracerx("passive target id resp:", f, f->len+6); - - if (f->data[0] == PN532_COMMAND_INLISTPASSIVETARGET+1) - { - uint32_t cid = 0; - - if (r->nbtg == 1) - { - pn532info("Found %d card(s)\n", r->nbtg); - - /* now supports only type_a cards - * if (poll_mode == PN532_POLL_MOD_106KBPS_A) - */ - - struct pn_target_type_a *t = (struct pn_target_type_a *) &r->target_data; - pn532info("sens:0x%x sel:0x%x", t->sens_res, t->sel_res); - pn532info("idlen:0x%x ", t->nfcid_len); - - /* generate 32bit cid from id (could be longer) - * HACK: Using only top 4 bytes. - */ - - for (i = 0; i < 4 /*t->nfcid_len*/; i++) - { - cid <<= 8; - cid |= t->nfcid_data[i]; - } - } - - res = cid; - } - } - } - - return res; - -} - -static int pn532_read_passive_target(struct pn532_dev_s *dev, uint8_t baudrate) -{ - uint8_t cmd_buffer[4+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - - pn532_frame_init(f, PN532_COMMAND_INLISTPASSIVETARGET); - f->data[1] = 1; - f->data[2] = baudrate; - f->len += 2; - pn532_frame_finish(f); - return pn532_write_frame(dev, f); -} - -bool pn532_set_rf_config(struct pn532_dev_s *dev, struct pn_rf_config_s *conf) -{ - bool res = false; - uint8_t cmd_buffer[15+7]; - struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; - - pn532_frame_init(f, PN532_COMMAND_RFCONFIGURATION); - f->data[1] = conf->cfg_item; - memcpy(&f->data[2], conf->config, conf->data_size); - f->len += conf->data_size+1; - pn532_frame_finish(f); - - if (pn532_write_frame(dev, f) == OK) - { - pn532_read(dev, (uint8_t *) f, 10); - tracerx("rf config response", (uint8_t *) f, 10); - if (pn532_rx_frame_is_valid(f, true)) - { - if (f->data[0] == PN532_COMMAND_RFCONFIGURATION + 1) - { - res = true; - } - } - } - - return res; -} - -/**************************************************************************** - * Name: pn532_attachirq - * - * Description: - * IRQ handling TODO: - * - * Input Parameters: - * - * Returned Value: - * - ****************************************************************************/ - -#if 0 -static inline int (FAR struct pn532_dev_s *dev, xcpt_t isr) -{ - return dev->config->irqattach(dev,isr); -} - -static int irq_handler(int irq, FAR void *context) -{ - (void) irq; - (void) context; - - /* pn532info("*IRQ*\n"); */ - /* work_queue(HPWORK, &g_dev->irq_work, pn532_worker, dev, 0); */ - - return OK; -} -#endif - -/**************************************************************************** - * Name: pn532_open - * - * Description: - * This function is called whenever the PN532 device is opened. - * - ****************************************************************************/ - -static int _open(FAR struct file *filep) -{ - FAR struct inode *inode; - FAR struct pn532_dev_s *dev; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - pn532_configspi(dev->spi); - - dev->config->reset(1); - usleep(10000); - - pn532_sam_config(dev, NULL); - pn532_get_fw_version(dev, NULL); - - dev->state = PN532_STATE_IDLE; - return OK; -} - -/**************************************************************************** - * Name: _close - * - * Description: - * This routine is called when the PN532 device is closed. - * - ****************************************************************************/ - -static int _close(FAR struct file *filep) -{ - FAR struct inode *inode; - FAR struct pn532_dev_s *dev; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - dev->config->reset(0); - dev->state = PN532_STATE_NOT_INIT; - -#ifdef CONFIG_PM - if(dev->pm_level >= PM_SLEEP) - { - //priv->config->reset(0); - } -#endif - - return OK; -} - -/**************************************************************************** - * Name: _read - * - * Description: - * This routine is called when the device is read. - * - * Returns TAG id as string to buffer. - * or -EIO if no TAG found - * - ****************************************************************************/ - -static ssize_t _read(FAR struct file *filep, FAR char *buffer, size_t buflen) -{ - FAR struct inode *inode; - FAR struct pn532_dev_s *dev; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - uint32_t id = pn532_read_passive_target_id(dev, PN532_MIFARE_ISO14443A); - if (id != 0xFFFFFFFF) - { - if (buffer) - { - return snprintf(buffer, buflen, "0X%X", id); - } - } - - return -EIO; -} - -/**************************************************************************** - * Name: pn532_write - ****************************************************************************/ - -static ssize_t _write(FAR struct file *filep, FAR const char *buffer, - size_t buflen) -{ - FAR struct inode *inode; - FAR struct pn532_dev_s *dev; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - (void) dev; - - return -ENOSYS; -} - -/**************************************************************************** - * Name: pn532_ioctl - ****************************************************************************/ - -static int _ioctl(FAR struct file *filep, int cmd, unsigned long arg) -{ - FAR struct inode *inode; - FAR struct pn532_dev_s *dev; - int ret = OK; - - DEBUGASSERT(filep); - inode = filep->f_inode; - - DEBUGASSERT(inode && inode->i_private); - dev = inode->i_private; - - switch (cmd) - { - case PN532IOC_READ_TAG_DATA: - { - struct pn_mifare_tag_data_s *tag_data = (struct pn_mifare_tag_data_s *) arg; - if (tag_data) - { - /* HACK: get rid of previous command */ - - if (dev->state == PN532_STATE_CMD_SENT) - { - if (pn532_wait_rx_ready(dev, 1)) - { - pn532_read_passive_target_id(dev,0); - } - } - - ret = pn532_read_passive_data(dev, tag_data->address, - (uint8_t *) &tag_data->data, - sizeof(tag_data->data)); - - dev->state = PN532_STATE_IDLE; - } - } - break; - - case PN532IOC_WRITE_TAG_DATA: - { - struct pn_mifare_tag_data_s *tag_data = (struct pn_mifare_tag_data_s *) arg; - if (tag_data) - { - /* HACK: get rid of previous command */ - - if (dev->state == PN532_STATE_CMD_SENT) - { - if (pn532_wait_rx_ready(dev, 1)) - { - pn532_read_passive_target_id(dev,0); - } - } - - ret = pn532_write_passive_data(dev, tag_data->address, - (uint8_t *) &tag_data->data, - sizeof(tag_data->data)); - - dev->state = PN532_STATE_IDLE; - } - } - break; - - case PN532IOC_SET_SAM_CONF: - pn532_sam_config(dev, (struct pn_sam_settings_s *) arg); - break; - - case PN532IOC_READ_PASSIVE: - if (dev->state == PN532_STATE_CMD_SENT) - { - uint32_t *ptr = (uint32_t *)((uintptr_t)arg); - *ptr = pn532_read_passive_target_id(dev,0); - } - else - { - uint32_t *ptr = (uint32_t *)((uintptr_t)arg); - *ptr = -1; - } - break; - - case PN532IOC_SET_RF_CONF: - pn532_set_rf_config(dev, (struct pn_rf_config_s *) arg); - break; - - case PN532IOC_SEND_CMD_READ_PASSIVE: - ret = pn532_read_passive_target(dev,0); - if (ret == 0) - { - dev->state = PN532_STATE_CMD_SENT; - } - else - { - dev->state = PN532_STATE_IDLE; - } - break; - - case PN532IOC_GET_DATA_READY: - if (pn532_wait_rx_ready(dev, 1)) - { - ret = 0; - } - else - { - ret = 1; - } - break; - - case PN532IOC_GET_TAG_ID: - { - uint32_t *ptr = (uint32_t *)((uintptr_t)arg); - *ptr = pn532_read_passive_target_id(dev,0); - } - break; - - case PN532IOC_GET_STATE: - ret = dev->state; - break; - - default: - pn532err("ERROR: Unrecognized cmd: %d\n", cmd); - ret = -EINVAL; - break; - } - - return ret; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: pn532_register - * - * Description: - * Register the PN532 character device as 'devpath' - * - * Input Parameters: - * devpath - The full path to the driver to register. - * E.g., "/dev/nfc0" - * spi - An instance of the SPI interface to use to communicate with - * PN532. - * config - chip config - * - * Returned Value: - * Zero (OK) on success; a negated errno value on failure. - * - ****************************************************************************/ - -int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi, - FAR struct pn532_config_s *config) -{ - FAR struct pn532_dev_s *dev; - int ret; - - /* Initialize the PN532 device structure */ - - dev = (FAR struct pn532_dev_s *)kmm_malloc(sizeof(struct pn532_dev_s)); - if (!dev) - { - pn532err("ERROR: Failed to allocate instance\n"); - return -ENOMEM; - } - - dev->spi = spi; - dev->config = config; - -#if defined CONFIG_PM - dev->pm_level = PM_IDLE; -#endif - - /* pn532_attachirq(dev, pn532_irqhandler); */ - - /* Register the character driver */ - - ret = register_driver(devpath, &g_pn532fops, 0666, dev); - if (ret < 0) - { - pn532err("ERROR: Failed to register driver: %d\n", ret); - kmm_free(dev); - } - - return ret; -} diff --git a/drivers/wireless/pn532.h b/drivers/wireless/pn532.h deleted file mode 100644 index 8361f5ed505..00000000000 --- a/drivers/wireless/pn532.h +++ /dev/null @@ -1,171 +0,0 @@ -/**************************************************************************** - * drivers/wireless/pn532.h - * - * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. - * Authors: Janne Rosberg - * Teemu Pirinen - * Juho Grundström - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __DRIVERS_WIRELESS_PN532_H -#define __DRIVERS_WIRELESS_PN532_H 1 - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include - -#include -#include -#include - -/**************************************************************************** - * Pre-Processor Definitions - ****************************************************************************/ - -#define PN532_PREAMBLE 0x00 -#define PN532_STARTCODE1 0x00 -#define PN532_STARTCODE2 0xFF -#define PN532_POSTAMBLE 0x00 - -#define PN532_SOF 0xFF00 - -#define PN532_HOSTTOPN532 0xD4 -#define PN532_PN532TOHOST 0xD5 - -#define PN532_SPI_STATREAD 0x02 -#define PN532_SPI_DATAWRITE 0x01 -#define PN532_SPI_DATAREAD 0x03 -#define PN532_SPI_READY 0x01 - -/* PN532 Commands */ - -#define PN532_COMMAND_DIAGNOSE 0x00 -#define PN532_COMMAND_GETFIRMWAREVERSION 0x02 -#define PN532_COMMAND_GETGENERALSTATUS 0x04 -#define PN532_COMMAND_READREGISTER 0x06 -#define PN532_COMMAND_WRITEREGISTER 0x08 -#define PN532_COMMAND_READGPIO 0x0C -#define PN532_COMMAND_WRITEGPIO 0x0E -#define PN532_COMMAND_SETSERIALBAUDRATE 0x10 -#define PN532_COMMAND_SETPARAMETERS 0x12 -#define PN532_COMMAND_SAMCONFIGURATION 0x14 -#define PN532_COMMAND_POWERDOWN 0x16 -#define PN532_COMMAND_RFCONFIGURATION 0x32 -#define PN532_COMMAND_RFREGULATIONTEST 0x58 -#define PN532_COMMAND_INJUMPFORDEP 0x56 -#define PN532_COMMAND_INJUMPFORPSL 0x46 -#define PN532_COMMAND_INLISTPASSIVETARGET 0x4A -#define PN532_COMMAND_INATR 0x50 -#define PN532_COMMAND_INPSL 0x4E -#define PN532_COMMAND_INDATAEXCHANGE 0x40 -#define PN532_COMMAND_INCOMMUNICATETHRU 0x42 -#define PN532_COMMAND_INDESELECT 0x44 -#define PN532_COMMAND_INRELEASE 0x52 -#define PN532_COMMAND_INSELECT 0x54 -#define PN532_COMMAND_INAUTOPOLL 0x60 -#define PN532_COMMAND_TGINITASTARGET 0x8C -#define PN532_COMMAND_TGSETGENERALBYTES 0x92 -#define PN532_COMMAND_TGGETDATA 0x86 -#define PN532_COMMAND_TGSETDATA 0x8E -#define PN532_COMMAND_TGSETMETADATA 0x94 -#define PN532_COMMAND_TGGETINITIATORCOMMAND 0x88 -#define PN532_COMMAND_TGRESPONSETOINITIATOR 0x90 -#define PN532_COMMAND_TGGETTARGETSTATUS 0x8A - -#define PN532_WAKEUP 0x55 - -#define PN532_SAM_NORMAL_MODE 0x01 -#define PN532_SAM_VIRTUAL_CARD 0x02 -#define PN532_SAM_WIRED_CARD 0x03 -#define PN532_SAM_DUAL_CARD 0x04 - -#ifndef CONFIG_PN532_SPI_FREQ -# define CONFIG_PN532_SPI_FREQ (5000000) -#endif - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -struct pn532_frame -{ - uint8_t preamble; /* 0x00 */ - uint16_t start_code; /* 0x00FF (BE) -> 0xFF00 (LE) */ - uint8_t len; /* 1 byte indicating the number of bytes in - * the data field */ - uint8_t lcs; /* 1 Packet Length Checksum LCS byte that satisfies - * the relation: Lower byte of [LEN + LCS] = 00h */ - uint8_t tfi; /* Frame idenfifier 0xD4, 0xD5 */ - uint8_t data[]; /* LEN-1 bytes of Packet Data Information. - * The first byte PD0 is the Command Code */ -} packed_struct; - -struct pn_poll_response -{ - uint8_t nbtg; - uint8_t tg; - uint8_t target_data[]; -} packed_struct; - -struct pn_target_type_a -{ - uint16_t sens_res; - uint8_t sel_res; - uint8_t nfcid_len; - uint8_t nfcid_data[]; -} packed_struct; - -struct pn_firmware_version -{ - uint8_t ic; - uint8_t ver; - uint8_t rev; - uint8_t support; -}; - -struct pn532_dev_s -{ - uint8_t state; - FAR struct spi_dev_s *spi; /* SPI interface */ - FAR struct pn532_config_s *config; /* Board configuration data */ -}; - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -bool pn532_set_config(struct pn532_dev_s *dev, uint8_t flags); - -#endif /* __DRIVERS_WIRELESS_PN532_H */ diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index b18f53e9692..3e7c183eb17 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -85,6 +85,7 @@ #define _I2CBASE (0x2000) /* I2C driver commands */ #define _SPIBASE (0x2100) /* SPI driver commands */ #define _GPIOBASE (0x2200) /* GPIO driver commands */ +#define _CLIOCBASE (0x1200) /* Contactless modules ioctl commands */ /* boardctl() commands share the same number space */ @@ -399,6 +400,12 @@ #define _GPIOCVALID(c) (_IOC_TYPE(c)==_GPIOBASE) #define _GPIOC(nr) _IOC(_GPIOBASE,nr) +/* Contactless driver ioctl definitions ****************************************/ +/* (see nuttx/include/contactless/contactless.h */ + +#define _CLIOCVALID(c) (_IOC_TYPE(c)==_CLIOCBASE) +#define _CLIOC(nr) _IOC(_CLIOCBASE,nr) + /* boardctl() command definitions *******************************************/ #define _BOARDIOCVALID(c) (_IOC_TYPE(c)==_BOARDBASE) diff --git a/include/nuttx/wireless/mfrc522.h b/include/nuttx/wireless/mfrc522.h deleted file mode 100644 index 252ec403027..00000000000 --- a/include/nuttx/wireless/mfrc522.h +++ /dev/null @@ -1,116 +0,0 @@ -/**************************************************************************** - * include/wireless/mfrc522.h - * - * Copyright(C) 2016 Uniquix Ltda. All rights reserved. - * Author: Alan Carvalho de Assis - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __INCLUDE_NUTTX_WIRELESS_MFRC522_H -#define __INCLUDE_NUTTX_WIRELESS_MFRC522_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include -#include -#include -#include - -/**************************************************************************** - * Pre-Processor Definitions - ****************************************************************************/ - -#define MFRC522_MIFARE_ISO14443A (0x00) - -/* IOCTL Commands ***********************************************************/ - -#define MFRC522IOC_GET_PICC_UID _WLIOC_USER(0x0001) -#define MFRC522IOC_GET_STATE _WLIOC_USER(0x0002) - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -enum mfrc522_state_e -{ - MFRC522_STATE_NOT_INIT, - MFRC522_STATE_IDLE, - MFRC522_STATE_CMD_SENT, - MFRC522_STATE_DATA_READY, -}; - -struct mfrc522_dev_s; - -struct picc_uid_s -{ - uint8_t size; /* Number of bytes in the UID. 4, 7 or 10 */ - uint8_t uid_data[10]; - uint8_t sak; /* The SAK (Select Acknowledge) return by the PICC */ -}; - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Name: mfrc522_register - * - * Description: - * Register the MFRC522 character device as 'devpath' - * - * Input Parameters: - * devpath - The full path to the driver to register. E.g., "/dev/rfid0" - * spi - An instance of the SPI interface to use to communicate with MFRC522 - * config - Device persistent board data - * - * Returned Value: - * Zero (OK) on success; a negated errno value on failure. - * - ****************************************************************************/ - -int mfrc522_register(FAR const char *devpath, FAR struct spi_dev_s *spi); - -#undef EXTERN -#ifdef __cplusplus -} -#endif - -#endif /* __INCLUDE_NUTTX_WIRELESS_MFRC522_H */ diff --git a/include/nuttx/wireless/pn532.h b/include/nuttx/wireless/pn532.h deleted file mode 100644 index 73d41f00174..00000000000 --- a/include/nuttx/wireless/pn532.h +++ /dev/null @@ -1,165 +0,0 @@ -/**************************************************************************** - * include/wireless/pn532.h - * - * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. - * Authors: Janne Rosberg - * Teemu Pirinen - * Juho Grundström - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __INCLUDE_NUTTX_WIRELESS_PN532_H -#define __INCLUDE_NUTTX_WIRELESS_PN532_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include -#include -#include -#include - -/**************************************************************************** - * Pre-Processor Definitions - ****************************************************************************/ - -#define PN532_MIFARE_ISO14443A (0x00) - -/* IOCTL Commands ***********************************************************/ - -#define PN532IOC_SET_SAM_CONF _WLIOC_USER(0x0001) -#define PN532IOC_READ_PASSIVE _WLIOC_USER(0x0002) -#define PN532IOC_SET_RF_CONF _WLIOC_USER(0x0003) -#define PN532IOC_SEND_CMD_READ_PASSIVE _WLIOC_USER(0x0004) -#define PN532IOC_GET_DATA_READY _WLIOC_USER(0x0005) -#define PN532IOC_GET_TAG_ID _WLIOC_USER(0x0006) -#define PN532IOC_GET_STATE _WLIOC_USER(0x0007) -#define PN532IOC_READ_TAG_DATA _WLIOC_USER(0x0008) -#define PN532IOC_WRITE_TAG_DATA _WLIOC_USER(0x0009) - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -enum pn532_state_e -{ - PN532_STATE_NOT_INIT, - PN532_STATE_IDLE, - PN532_STATE_CMD_SENT, - PN532_STATE_DATA_READY, -}; - -struct pn532_dev_s; -struct pn532_config_s -{ - int (*reset)(uint8_t enable); - - /* External CS, if NULL then SPIDEV_WIRELESS CS is used */ - - int (*select)(struct pn532_dev_s *dev, bool sel); - int (*irqattach)(void* dev, xcpt_t isr); -}; - -enum PN_SAM_MODE -{ - PN_SAM_NORMAL_MODE = 0x01, - PN_SAM_VIRTUAL_CARD, - PN_SAM_WIRED_CARD, - SAM_DUAL_CARD -}; - -struct pn_sam_settings_s -{ - enum PN_SAM_MODE mode; /* Mode */ - uint8_t timeout; /* Timeout: LSB=50ms 0x14*50ms = 1sec */ - uint8_t irq_en; /* If 1 - enable P-70, IRQ */ -}; - -enum PN_RF_CONFIG_ITEM -{ - PN_RF_CONFIG_RF_FIELD = 0x01, - PN_RF_CONFIG_VARIOUS_TIMINGS = 0x02, - - PN_RF_CONFIG_ITEM_ANALOG_106A = 0x0A, - PN_RF_CONFIG_ITEM_ANALOG_212 = 0x0B, -}; - -struct pn_rf_config_s -{ - uint8_t cfg_item; /* Item */ - uint8_t data_size; /* number of config items */ - uint8_t config[11]; /* Item config data */ -}; - -struct pn_mifare_tag_data_s -{ - uint32_t data; - uint8_t address; -}; - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Name: pn532_register - * - * Description: - * Register the PN532 character device as 'devpath' - * - * Input Parameters: - * devpath - The full path to the driver to register. E.g., "/dev/nfc0" - * spi - An instance of the SPI interface to use to communicate with PN532 - * config - Device persistent board data - * - * Returned Value: - * Zero (OK) on success; a negated errno value on failure. - * - ****************************************************************************/ - -int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi, - FAR struct pn532_config_s *config); - -#undef EXTERN -#ifdef __cplusplus -} -#endif - -#endif /* __INCLUDE_NUTTX_WIRELESS_PN532_H */ From e4a713477a0f136506b82c8eac937333ddfad0fe Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:12:49 +0200 Subject: [PATCH 163/214] Apply stm32 fix to stm32l4 --- arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h | 6 +- arch/arm/src/stm32l4/stm32l4_otgfsdev.c | 340 ++++++++++-------- 2 files changed, 185 insertions(+), 161 deletions(-) diff --git a/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h b/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h index 2d8d431285f..cc9c4ddc2bd 100644 --- a/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h +++ b/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h @@ -555,20 +555,20 @@ #define OTGFS_GINT_NPTXFE (1 << 5) /* Bit 5: Non-periodic TxFIFO empty */ #define OTGFS_GINT_GINAKEFF (1 << 6) /* Bit 6: Global IN non-periodic NAK effective */ #define OTGFS_GINT_GONAKEFF (1 << 7) /* Bit 7: Global OUT NAK effective */ - /* Bits 8-9: Reserved, must be kept at reset value */ +#define OTGFS_GINT_RES89 (3 << 8) /* Bits 8-9: Reserved, must be kept at reset value */ #define OTGFS_GINT_ESUSP (1 << 10) /* Bit 10: Early suspend */ #define OTGFS_GINT_USBSUSP (1 << 11) /* Bit 11: USB suspend */ #define OTGFS_GINT_USBRST (1 << 12) /* Bit 12: USB reset */ #define OTGFS_GINT_ENUMDNE (1 << 13) /* Bit 13: Enumeration done */ #define OTGFS_GINT_ISOODRP (1 << 14) /* Bit 14: Isochronous OUT packet dropped interrupt */ #define OTGFS_GINT_EOPF (1 << 15) /* Bit 15: End of periodic frame interrupt */ - /* Bits 16-17: Reserved, must be kept at reset value */ +#define OTGFS_GINT_RES1617 (3 << 16) /* Bits 16-17: Reserved, must be kept at reset value */ #define OTGFS_GINT_IEP (1 << 18) /* Bit 18: IN endpoint interrupt */ #define OTGFS_GINT_OEP (1 << 19) /* Bit 19: OUT endpoint interrupt */ #define OTGFS_GINT_IISOIXFR (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */ #define OTGFS_GINT_IISOOXFR (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */ #define OTGFS_GINT_IPXFR (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */ - /* Bit 22: Reserved, must be kept at reset value */ +#define OTGFS_GINT_RES22 (1 << 22) /* Bit 22: Reserved, must be kept at reset value */ #define OTGFS_GINT_RSTDET (1 << 23) /* Bit 23: Reset detected interrupt */ #define OTGFS_GINT_HPRT (1 << 24) /* Bit 24: Host port interrupt */ #define OTGFS_GINT_HC (1 << 25) /* Bit 25: Host channels interrupt */ diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index 2ade38444f6..406cbbc6de8 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -225,6 +225,27 @@ # error "CONFIG_USBDEV_EP5_TXFIFO_SIZE is out of range" #endif +#define OTGFS_GINT_RESERVED (OTGFS_GINT_RES89 | \ + OTGFS_GINT_RES1617 | \ + OTGFS_GINT_RES22) + +#define OTGFS_GINT_RC_W1 (OTGFS_GINT_MMIS | \ + OTGFS_GINT_SOF | \ + OTGFS_GINT_ESUSP | \ + OTGFS_GINT_USBSUSP | \ + OTGFS_GINT_USBRST | \ + OTGFS_GINT_ENUMDNE | \ + OTGFS_GINT_ISOODRP | \ + OTGFS_GINT_EOPF | \ + OTGFS_GINT_IISOIXFR | \ + OTGFS_GINT_IISOOXFR | \ + OTGFS_GINT_RSTDET | \ + OTGFS_GINT_LPMINT | \ + OTGFS_GINT_CIDSCHG | \ + OTGFS_GINT_DISC | \ + OTGFS_GINT_SRQ | \ + OTGFS_GINT_WKUP) + /* Debug ***********************************************************************/ /* Trace error codes */ @@ -3221,154 +3242,163 @@ static inline void stm32l4_rxinterrupt(FAR struct stm32l4_usbdev_s *priv) /* Disable the Rx status queue level interrupt */ - regval = stm32l4_getreg(STM32L4_OTGFS_GINTMSK); - regval &= ~OTGFS_GINT_RXFLVL; - stm32l4_putreg(regval, STM32L4_OTGFS_GINTMSK); - - /* Get the status from the top of the FIFO */ - - regval = stm32l4_getreg(STM32L4_OTGFS_GRXSTSP); - - /* Decode status fields */ - - epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT; - - if (epphy < STM32L4_NENDPOINTS) + while(0 != (stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINT_RXFLVL)) { - privep = &priv->epout[epphy]; - /* Handle the RX event according to the packet status field */ + /* Get the status from the top of the FIFO */ - switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK) - { - /* Global OUT NAK. This indicate that the global OUT NAK bit has taken - * effect. - * - * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't - * Care. + regval = stm32l4_getreg(STM32L4_OTGFS_GRXSTSP); + + /* Decode status fields */ + + epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT; + + /* Workaround for bad values read from the STM32L4_OTGFS_GRXSTSP register + * happens regval is 0xb4e48168 or 0xa80c9367 or 267E781c + * All of which provide out of range indexes for epout[epphy] */ - case OTGFS_GRXSTSD_PKTSTS_OUTNAK: - { - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTNAK), 0); - } - break; + if (epphy < STM32L4_NENDPOINTS) + { + privep = &priv->epout[epphy]; - /* OUT data packet received. - * - * PKTSTS = DataOUT, BCNT = size of the received data OUT packet, - * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID. - */ + /* Handle the RX event according to the packet status field */ - case OTGFS_GRXSTSD_PKTSTS_OUTRECVD: + switch (regval & OTGFS_GRXSTSD_PKTSTS_MASK) { - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTRECVD), epphy); - bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT; - if (bcnt > 0) - { - stm32l4_epout_receive(privep, bcnt); + /* Global OUT NAK. This indicate that the global OUT NAK bit has taken + * effect. + * + * PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID = Don't + * Care. + */ + + case OTGFS_GRXSTSD_PKTSTS_OUTNAK: + { + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTNAK), 0); + } + break; + + /* OUT data packet received. + * + * PKTSTS = DataOUT, BCNT = size of the received data OUT packet, + * EPNUM = EPNUM on which the packet was received, DPID = Actual Data PID. + */ + + case OTGFS_GRXSTSD_PKTSTS_OUTRECVD: + { + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTRECVD), epphy); + bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT; + if (bcnt > 0) + { + stm32l4_epout_receive(privep, bcnt); + } + } + break; + + /* OUT transfer completed. This indicates that an OUT data transfer for + * the specified OUT endpoint has completed. After this entry is popped + * from the receive FIFO, the core asserts a Transfer Completed interrupt + * on the specified OUT endpoint. + * + * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on + * which the data transfer is complete, DPID = Don't Care. + */ + + case OTGFS_GRXSTSD_PKTSTS_OUTDONE: + { + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTDONE), epphy); + } + break; + + /* SETUP transaction completed. This indicates that the Setup stage for + * the specified endpoint has completed and the Data stage has started. + * After this entry is popped from the receive FIFO, the core asserts a + * Setup interrupt on the specified control OUT endpoint (triggers an + * interrupt). + * + * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num, + * DPID = Don't Care. + */ + + case OTGFS_GRXSTSD_PKTSTS_SETUPDONE: + { + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPDONE), epphy); + + /* Now that the Setup Phase is complete if it was an OUT enable + * the endpoint + * (Doing this here prevents the loss of the first FIFO word) + */ + + if (priv->ep0state == EP0STATE_SETUP_OUT) + { + + /* Clear NAKSTS so that we can receive the data */ + + regval = stm32l4_getreg(STM32L4_OTGFS_DOEPCTL0); + regval |= OTGFS_DOEPCTL0_CNAK; + stm32l4_putreg(regval, STM32L4_OTGFS_DOEPCTL0); + } + } + break; + + /* SETUP data packet received. This indicates that a SETUP packet for the + * specified endpoint is now available for reading from the receive FIFO. + * + * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0. + */ + + case OTGFS_GRXSTSD_PKTSTS_SETUPRECVD: + { + uint16_t datlen; + + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPRECVD), epphy); + + /* Read EP0 setup data. NOTE: If multiple SETUP packets are received, + * the last one overwrites the previous setup packets and only that + * last SETUP packet will be processed. + */ + + stm32l4_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, + USB_SIZEOF_CTRLREQ); + + /* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP, + * then we need to wait for the completion of the data phase to + * process the setup command. If it is an IN SETUP packet, then + * we must processing the command BEFORE we enter the DATA phase. + * + * If the data associated with the OUT SETUP packet is zero length, + * then, of course, we don't need to wait. + */ + + datlen = GETUINT16(priv->ctrlreq.len); + if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0) + { + /* Wait for the data phase. */ + + priv->ep0state = EP0STATE_SETUP_OUT; + } + else + { + /* We can process the setup data as soon as SETUP done word is + * popped of the RxFIFO. + */ + + priv->ep0state = EP0STATE_SETUP_READY; + } + } + break; + + default: + { + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), + (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT); + } + break; } - break; - - /* OUT transfer completed. This indicates that an OUT data transfer for - * the specified OUT endpoint has completed. After this entry is popped - * from the receive FIFO, the core asserts a Transfer Completed interrupt - * on the specified OUT endpoint. - * - * PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on - * which the data transfer is complete, DPID = Don't Care. - */ - - case OTGFS_GRXSTSD_PKTSTS_OUTDONE: - { - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTDONE), epphy); - } - break; - - /* SETUP transaction completed. This indicates that the Setup stage for - * the specified endpoint has completed and the Data stage has started. - * After this entry is popped from the receive FIFO, the core asserts a - * Setup interrupt on the specified control OUT endpoint (triggers an - * interrupt). - * - * PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num, - * DPID = Don't Care. - */ - - case OTGFS_GRXSTSD_PKTSTS_SETUPDONE: - { - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPDONE), epphy); - } - break; - - /* SETUP data packet received. This indicates that a SETUP packet for the - * specified endpoint is now available for reading from the receive FIFO. - * - * PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0. - */ - - case OTGFS_GRXSTSD_PKTSTS_SETUPRECVD: - { - uint16_t datlen; - - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPRECVD), epphy); - - /* Read EP0 setup data. NOTE: If multiple SETUP packets are received, - * the last one overwrites the previous setup packets and only that - * last SETUP packet will be processed. - */ - - stm32l4_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, - USB_SIZEOF_CTRLREQ); - - /* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP, - * then we need to wait for the completion of the data phase to - * process the setup command. If it is an IN SETUP packet, then - * we must processing the command BEFORE we enter the DATA phase. - * - * If the data associated with the OUT SETUP packet is zero length, - * then, of course, we don't need to wait. - */ - - datlen = GETUINT16(priv->ctrlreq.len); - if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0) - { - /* Clear NAKSTS so that we can receive the data */ - - regval = stm32l4_getreg(STM32L4_OTGFS_DOEPCTL0); - regval |= OTGFS_DOEPCTL0_CNAK; - stm32l4_putreg(regval, STM32L4_OTGFS_DOEPCTL0); - - /* Wait for the data phase. */ - - priv->ep0state = EP0STATE_SETUP_OUT; - } - else - { - /* We can process the setup data as soon as SETUP done word is - * popped of the RxFIFO. - */ - - priv->ep0state = EP0STATE_SETUP_READY; - } - } - break; - - default: - { - usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), - (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT); - } - break; - } + } } - - /* Enable the Rx Status Queue Level interrupt */ - - regval = stm32l4_getreg(STM32L4_OTGFS_GINTMSK); - regval |= OTGFS_GINT_RXFLVL; - stm32l4_putreg(regval, STM32L4_OTGFS_GINTMSK); } /**************************************************************************** @@ -3391,7 +3421,7 @@ static inline void stm32l4_enuminterrupt(FAR struct stm32l4_usbdev_s *priv) regval = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG); regval &= ~OTGFS_GUSBCFG_TRDT_MASK; - regval |= OTGFS_GUSBCFG_TRDT(5); + regval |= OTGFS_GUSBCFG_TRDT(6); stm32l4_putreg(regval, STM32L4_OTGFS_GUSBCFG); } @@ -3605,32 +3635,38 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data * structure will be referenced using the 'priv' pointer (rather than the - * global data) in order to simplify any future support for multiple - * devices. + * global data) in order to simplify any future support for multiple devices. */ FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev; uint32_t regval; + uint32_t reserved; usbtrace(TRACE_INTENTRY(STM32L4_TRACEINTID_USB), 0); /* Assure that we are in device mode */ - DEBUGASSERT((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == - OTGFS_GINTSTS_DEVMODE); + DEBUGASSERT((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == OTGFS_GINTSTS_DEVMODE); /* Get the state of all enabled interrupts. We will do this repeatedly * some interrupts (like RXFLVL) will generate additional interrupting * events. */ - for (; ; ) { /* Get the set of pending, un-masked interrupts */ regval = stm32l4_getreg(STM32L4_OTGFS_GINTSTS); + reserved = (regval & OTGFS_GINT_RESERVED); regval &= stm32l4_getreg(STM32L4_OTGFS_GINTMSK); + /* With out modifying the reserved bits, acknowledge all + * **Writable** pending irqs we will service below + */ + + stm32l4_putreg(((regval | reserved) & OTGFS_GINT_RC_W1), STM32L4_OTGFS_GINTSTS); + + /* Break out of the loop when there are no further pending (and * unmasked) interrupts to be processes. */ @@ -3639,7 +3675,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { break; } - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_INTPENDING), (uint16_t)regval); /* OUT endpoint interrupt. The core sets this bit to indicate that an @@ -3650,7 +3685,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT), (uint16_t)regval); stm32l4_epout_interrupt(priv); - stm32l4_putreg(OTGFS_GINT_OEP, STM32L4_OTGFS_GINTSTS); } /* IN endpoint interrupt. The core sets this bit to indicate that @@ -3661,7 +3695,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN), (uint16_t)regval); stm32l4_epin_interrupt(priv); - stm32l4_putreg(OTGFS_GINT_IEP, STM32L4_OTGFS_GINTSTS); } /* Host/device mode mismatch error interrupt */ @@ -3670,7 +3703,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_MMIS) != 0) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_MISMATCH), (uint16_t)regval); - stm32l4_putreg(OTGFS_GINT_MMIS, STM32L4_OTGFS_GINTSTS); } #endif @@ -3680,7 +3712,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_WAKEUP), (uint16_t)regval); stm32l4_resumeinterrupt(priv); - stm32l4_putreg(OTGFS_GINT_WKUP, STM32L4_OTGFS_GINTSTS); } /* USB suspend interrupt */ @@ -3689,7 +3720,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SUSPEND), (uint16_t)regval); stm32l4_suspendinterrupt(priv); - stm32l4_putreg(OTGFS_GINT_USBSUSP, STM32L4_OTGFS_GINTSTS); } /* Start of frame interrupt */ @@ -3698,7 +3728,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_SOF) != 0) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SOF), (uint16_t)regval); - stm32l4_putreg(OTGFS_GINT_SOF, STM32L4_OTGFS_GINTSTS); } #endif @@ -3710,7 +3739,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_RXFIFO), (uint16_t)regval); stm32l4_rxinterrupt(priv); - stm32l4_putreg(OTGFS_GINT_RXFLVL, STM32L4_OTGFS_GINTSTS); } /* USB reset interrupt */ @@ -3723,7 +3751,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) stm32l4_usbreset(priv); usbtrace(TRACE_INTEXIT(STM32L4_TRACEINTID_USB), 0); - stm32l4_putreg(OTGFS_GINT_USBRST, STM32L4_OTGFS_GINTSTS); return OK; } @@ -3733,7 +3760,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_ENUMDNE), (uint16_t)regval); stm32l4_enuminterrupt(priv); - stm32l4_putreg(OTGFS_GINT_ENUMDNE, STM32L4_OTGFS_GINTSTS); } /* Incomplete isochronous IN transfer interrupt. When the core finds @@ -3747,7 +3773,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IISOIXFR), (uint16_t)regval); stm32l4_isocininterrupt(priv); - stm32l4_putreg(OTGFS_GINT_IISOIXFR, STM32L4_OTGFS_GINTSTS); } /* Incomplete isochronous OUT transfer. For isochronous OUT @@ -3764,7 +3789,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IISOOXFR), (uint16_t)regval); stm32l4_isocoutinterrupt(priv); - stm32l4_putreg(OTGFS_GINT_IISOOXFR, STM32L4_OTGFS_GINTSTS); } #endif @@ -3775,7 +3799,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SRQ), (uint16_t)regval); stm32l4_sessioninterrupt(priv); - stm32l4_putreg(OTGFS_GINT_SRQ, STM32L4_OTGFS_GINTSTS); } /* OTG interrupt */ @@ -3784,7 +3807,6 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OTG), (uint16_t)regval); stm32l4_otginterrupt(priv); - stm32l4_putreg(OTGFS_GINT_OTG, STM32L4_OTGFS_GINTSTS); } #endif } @@ -5458,7 +5480,9 @@ static void stm32l4_hwinitialize(FAR struct stm32l4_usbdev_s *priv) /* Clear any pending interrupts */ - stm32l4_putreg(0xbfffffff, STM32L4_OTGFS_GINTSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_GINTSTS); + regval &= OTGFS_GINT_RESERVED; + stm32l4_putreg(regval | OTGFS_GINT_RC_W1, STM32L4_OTGFS_GINTSTS); /* Enable the interrupts in the INTMSK */ From 3bf11c7203702e3eab8aa823ac5d79788a671200 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:20:53 +0200 Subject: [PATCH 164/214] Add contactless drivers, with renames --- drivers/contactless/mfrc522.c | 1616 +++++++++++++++++++++++++++++++++ drivers/contactless/mfrc522.h | 429 +++++++++ drivers/contactless/pn532.c | 1165 ++++++++++++++++++++++++ drivers/contactless/pn532.h | 171 ++++ 4 files changed, 3381 insertions(+) create mode 100644 drivers/contactless/mfrc522.c create mode 100644 drivers/contactless/mfrc522.h create mode 100644 drivers/contactless/pn532.c create mode 100644 drivers/contactless/pn532.h diff --git a/drivers/contactless/mfrc522.c b/drivers/contactless/mfrc522.c new file mode 100644 index 00000000000..5148aeac935 --- /dev/null +++ b/drivers/contactless/mfrc522.c @@ -0,0 +1,1616 @@ +/**************************************************************************** + * drivers/contactless/mfrc522.c + * + * Copyright(C) 2016 Uniquix Ltda. All rights reserved. + * Author: Alan Carvalho de Assis + * + * This driver is based on Arduino library for MFRC522 from Miguel + * Balboa released into the public domain: + * https://github.com/miguelbalboa/rfid/ + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "mfrc522.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_CL_MFRC522_DEBUG +# define mfrc522err _err +# define mfrc522info _info +#else +# ifdef CONFIG_CPP_HAVE_VARARGS +# define mfrc522err(x...) +# define mfrc522info(x...) +# else +# define mfrc522err (void) +# define mfrc522info (void) +# endif +#endif + +#ifdef CONFIG_CL_MFRC522_DEBUG_TX +# define tracetx errdumpbuffer +#else +# define tracetx(x...) +#endif + +#ifdef CONFIG_CL_MFRC522_DEBUG_RX +# define tracerx errdumpbuffer +#else +# define tracerx(x...) +#endif + +#define FRAME_SIZE(f) (sizeof(struct mfrc522_frame) + f->len + 2) +#define FRAME_POSTAMBLE(f) (f->data[f->len + 1]) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static inline void mfrc522_configspi(FAR struct spi_dev_s *spi); +static void mfrc522_lock(FAR struct spi_dev_s *spi); +static void mfrc522_unlock(FAR struct spi_dev_s *spi); + +/* Character driver methods */ + +static int mfrc522_open(FAR struct file *filep); +static int mfrc522_close(FAR struct file *filep); +static ssize_t mfrc522_read(FAR struct file *, FAR char *, size_t); +static ssize_t mfrc522_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int mfrc522_ioctl(FAR struct file *filep, int cmd, + unsigned long arg); + +uint8_t mfrc522_readu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr); +void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, + FAR uint8_t regval); +void mfrc522_writeblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, + uint8_t *regval, int length); +void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, + FAR uint8_t *regval, int length, uint8_t rxalign); + +void mfrc522_softreset(FAR struct mfrc522_dev_s *dev); + +int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev, + FAR struct picc_uid_s *uid, uint8_t validbits); + +/* IRQ Handling TODO: +static int mfrc522_irqhandler(FAR int irq, FAR void *context, FAR void* dev); +static inline int mfrc522_attachirq(FAR struct mfrc522_dev_s *dev, xcpt_t isr); +*/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_mfrc522fops = +{ + mfrc522_open, + mfrc522_close, + mfrc522_read, + mfrc522_write, + 0, + mfrc522_ioctl +#ifndef CONFIG_DISABLE_POLL + , 0 +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , 0 +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void mfrc522_lock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, true); + + SPI_SETMODE(spi, SPIDEV_MODE0); + SPI_SETBITS(spi, 8); + (void)SPI_HWFEATURES(spi, 0); + (void)SPI_SETFREQUENCY(spi, CONFIG_CL_MFRC522_SPI_FREQ); +} + +static void mfrc522_unlock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, false); +} + +static inline void mfrc522_configspi(FAR struct spi_dev_s *spi) +{ + /* Configure SPI for the MFRC522 module. */ + + SPI_SETMODE(spi, SPIDEV_MODE0); + SPI_SETBITS(spi, 8); + (void)SPI_HWFEATURES(spi, 0); + (void)SPI_SETFREQUENCY(spi, CONFIG_CL_MFRC522_SPI_FREQ); +} + +static inline void mfrc522_select(struct mfrc522_dev_s *dev) +{ + SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, true); +} + +static inline void mfrc522_deselect(struct mfrc522_dev_s *dev) +{ + SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, false); +} + +/**************************************************************************** + * Name: mfrc522_readu8 + * + * Description: + * Read a byte from a register address. + * + * Input Parameters: + * + * Returned Value: the read byte from the register + * + ****************************************************************************/ + +uint8_t mfrc522_readu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr) +{ + uint8_t regval; + uint8_t address = (0x80 | (regaddr & 0x7E)); + + mfrc522_lock(dev->spi); + mfrc522_select(dev); + SPI_SEND(dev->spi, address); + regval = SPI_SEND(dev->spi, 0); + mfrc522_deselect(dev); + mfrc522_unlock(dev->spi); + + tracerx("read", regval, 1); + return regval; +} + +/**************************************************************************** + * Name: mfrc522_write8 + * + * Description: + * Write a byte to a register address. + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void mfrc522_writeu8(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, + FAR uint8_t regval) +{ + mfrc522_lock(dev->spi); + mfrc522_select(dev); + SPI_SEND(dev->spi, regaddr & 0x7E); + SPI_SEND(dev->spi, regval); + mfrc522_deselect(dev); + mfrc522_unlock(dev->spi); + + tracerx("write", ®val, 1); +} + +/**************************************************************************** + * Name: mfrc522_readblk + * + * Description: + * Read a block of bytes from a register address. Align the bit positions of + * regval[0] from rxalign..7. + * + * Input Parameters: + * + * Returned Value: none + * + ****************************************************************************/ + +void mfrc522_readblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, + FAR uint8_t *regval, int length, uint8_t rxalign) +{ + uint8_t i = 0; + uint8_t address = (0x80 | (regaddr & 0x7E)); + + mfrc522_lock(dev->spi); + mfrc522_select(dev); + + /* Inform the MFRC522 the address we want to read */ + + SPI_SEND(dev->spi, address); + + while (i < length) + { + if (i == 0 && rxalign) + { + uint8_t mask = 0; + uint8_t value; + uint8_t j; + + for (j = rxalign; j <= 7; j++) + { + mask |= (1 << j); + } + + /* Read the first byte */ + + value = SPI_SEND(dev->spi, address); + + /* Apply mask to current regval[0] with the read value */ + + regval[0] = (regval[0] & ~mask) | (value & mask); + } + else + { + /* Read the remaining bytes */ + + regval[i] = SPI_SEND(dev->spi, address); + } + i++; + } + + /* Read the last byte. Send 0 to stop reading (it maybe wrong, 1 byte out) */ + + regval[i] = SPI_SEND(dev->spi, 0); + + mfrc522_deselect(dev); + mfrc522_unlock(dev->spi); + + tracerx("readblk", regval, size); +} + +/**************************************************************************** + * Name: mfrc522_writeblk + * + * Description: + * Write a block of bytes to a register address. + * + * Input Parameters: + * + * Returned Value: none + * + ****************************************************************************/ + +void mfrc522_writeblk(FAR struct mfrc522_dev_s *dev, uint8_t regaddr, + uint8_t *regval, int length) +{ + uint8_t address = (regaddr & 0x7E); + + mfrc522_lock(dev->spi); + mfrc522_select(dev); + + /* Inform the MFRC522 the address we want write to */ + + SPI_SEND(dev->spi, address); + + /* Send the block of bytes */ + + SPI_SNDBLOCK(dev->spi, regval, length); + + mfrc522_deselect(dev); + mfrc522_unlock(dev->spi); + + tracerx("writeblk", regval, size); +} + +/**************************************************************************** + * Name: mfrc522_calc_crc + * + * Description: + * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A. + * + * Input Parameters: + * + * Returned Value: OK or -ETIMEDOUT + * + ****************************************************************************/ + +int mfrc522_calc_crc(FAR struct mfrc522_dev_s *dev, uint8_t *buffer, + int length, uint8_t *result) +{ + struct timespec tstart; + struct timespec tend; + + /* Stop any command in execution */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); + + /* Clear the CRCIRq interrupt request bit */ + + mfrc522_writeu8(dev, MFRC522_DIV_IRQ_REG, MFRC522_CRC_IRQ); + + /* Flush all bytes in the FIFO */ + + mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER); + + /* Write data to the FIFO */ + + mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, buffer, length); + + /* Start the calculation */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_CALC_CRC_CMD); + + /* Wait for CRC completion or 200ms time-out */ + + clock_gettime(CLOCK_REALTIME, &tstart); + tstart.tv_nsec += 200000; + if (tstart.tv_nsec >= 1000 * 1000 * 1000) + { + tstart.tv_sec++; + tstart.tv_nsec -= 1000 * 1000 * 1000; + } + + while(1) + { + uint8_t irqreg; + + irqreg = mfrc522_readu8(dev, MFRC522_DIV_IRQ_REG); + if ( irqreg & MFRC522_CRC_IRQ) + { + break; + } + + /* Get time now */ + + clock_gettime(CLOCK_REALTIME, &tend); + + if ((tend.tv_sec > tstart.tv_sec) && (tend.tv_nsec > tstart.tv_nsec)) + { + return -ETIMEDOUT; + } + } + + /* Stop calculating CRC for new content of FIFO */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); + + result[0] = mfrc522_readu8(dev, MFRC522_CRC_RESULT_REGL); + result[1] = mfrc522_readu8(dev, MFRC522_CRC_RESULT_REGH); + + return OK; +} + +/**************************************************************************** + * Name: mfrc522_comm_picc + * + * Description: + * Transfers data to the MFRC522 FIFO, executes a command, waits for + * completion and transfers data back from the FIFO. + * CRC validation can only be done if back_data and back_len are specified. + * + * Input Parameters: + * + * Returned Value: OK or -ETIMEDOUT + * + ****************************************************************************/ + +int mfrc522_comm_picc(FAR struct mfrc522_dev_s *dev, uint8_t command, + uint8_t waitirq, uint8_t *send_data, uint8_t send_len, + uint8_t *back_data, uint8_t *back_len, + uint8_t *validbits, uint8_t rxalign, bool checkcrc) +{ + int ret; + uint8_t errors; + uint8_t vbits; + uint8_t value; + struct timespec tstart; + struct timespec tend; + + /* Prepare values for BitFramingReg */ + + uint8_t txlastbits = validbits ? *validbits : 0; + uint8_t bitframing = (rxalign << 4) + txlastbits; + + /* Stop any active command */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); + + /* Clear all seven interrupt request bits */ + + value = mfrc522_readu8(dev, MFRC522_COM_IRQ_REG); + mfrc522_writeu8(dev, MFRC522_COM_IRQ_REG, value | MFRC522_COM_IRQ_MASK); + + /* Flush all bytes in the FIFO */ + + mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER); + + /* Write data to FIFO */ + + mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, send_data, send_len); + + /* Bit adjustments */ + + mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, bitframing); + + /* Execute command */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, command); + + /* We setup the TAuto flag in the mfrc522_init() then we could use the + * internal MFC522 Timer to detect timeout, but because there could be some + * hardware fault, let us to use a NuttX timeout as well. + */ + + clock_gettime(CLOCK_REALTIME, &tstart); + tstart.tv_nsec += 200000; + if (tstart.tv_nsec >= 1000 * 1000 * 1000) + { + tstart.tv_sec++; + tstart.tv_nsec -= 1000 * 1000 * 1000; + } + + /* If it is a Transceive command, then start transmittion */ + + if (command == MFRC522_TRANSCV_CMD) + { + value = mfrc522_readu8(dev, MFRC522_BIT_FRAMING_REG); + mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, value | MFRC522_START_SEND); + } + + /* Wait for the command to complete */ + + while (1) + { + uint8_t irqsreg; + + irqsreg = mfrc522_readu8(dev, MFRC522_COM_IRQ_REG); + + /* If at least an of selected IRQ happened */ + + if (irqsreg & waitirq) + { + break; + } + + /* Timer expired */ + + if (irqsreg & MFRC522_TIMER_IRQ) + { + return -ETIMEDOUT; + } + + /* Get time now */ + + clock_gettime(CLOCK_REALTIME, &tend); + + if ((tend.tv_sec > tstart.tv_sec) && (tend.tv_nsec > tstart.tv_nsec)) + { + return -ETIMEDOUT; + } + } + + /* Read error register to verify if there are any issue */ + + errors = mfrc522_readu8(dev, MFRC522_ERROR_REG); + + /* Check for Protocol error */ + + if (errors & (MFRC522_PROTO_ERR)) + { + return -EPROTO; + } + + /* Check for Parity and Buffer Overflow errors */ + + if (errors & (MFRC522_PARITY_ERR | MFRC522_BUF_OVFL_ERR)) + { + return -EIO; + } + + /* Check collision error */ + + if (errors & MFRC522_COLL_ERR) + { + return -EBUSY; /* should it be EAGAIN ? */ + } + + /* If the caller wants data back, get it from the MFRC522 */ + + if (back_data && back_len) + { + uint8_t nbytes; + + /* Number of bytes in the FIFO */ + + nbytes = mfrc522_readu8(dev, MFRC522_FIFO_LEVEL_REG); + + /* Returned more bytes than the expected */ + + if (nbytes > *back_len) + { + return -ENOMEM; + } + + *back_len = nbytes; + + /* Read the data from FIFO */ + + mfrc522_readblk(dev, MFRC522_FIFO_DATA_REG, back_data, nbytes, rxalign); + + /* RxLastBits[2:0] indicates the number of valid bits received */ + + vbits = mfrc522_readu8(dev, MFRC522_CONTROL_REG) + & MFRC522_RX_LAST_BITS_MASK; + + if (validbits) + { + *validbits = vbits; + } + } + + /* Perform CRC_A validation if requested */ + + if (back_data && back_len && checkcrc) + { + uint8_t ctrlbuf[2]; + + /* In this case a MIFARE Classic NAK is not OK */ + + if (*back_len == 1 && vbits == 4) + { + return -EACCES; + } + + /* We need the CRC_A value or all 8 bits of the last byte */ + + if (*back_len < 2 || vbits != 0) + { + return -EPERM; + } + + /* Verify CRC_A */ + + ret = mfrc522_calc_crc(dev, &back_data[0], *back_len - 2, &ctrlbuf[0]); + if (ret != OK) + { + return ret; + } + + if ((back_data[*back_len - 2] != ctrlbuf[0]) || + (back_data[*back_len - 1] != ctrlbuf[1])) + { + return -EFAULT; + } + } + + return OK; +} + +/**************************************************************************** + * Name: mfrc522_transcv_data + * + * Description: + * Executes the Transceive command + * + * Input Parameters: + * + * Returned Value: OK or -ETIMEDOUT + * + ****************************************************************************/ + +int mfrc522_transcv_data(FAR struct mfrc522_dev_s *dev, uint8_t *senddata, + uint8_t sendlen, uint8_t *backdata, uint8_t *backlen, + uint8_t *validbits, uint8_t rxalign, bool check_crc) +{ + uint8_t waitirq = MFRC522_RX_IRQ | MFRC522_IDLE_IRQ; + + return mfrc522_comm_picc(dev, MFRC522_TRANSCV_CMD, waitirq, senddata, + sendlen, backdata, backlen, validbits, rxalign, + check_crc); +} + +/**************************************************************************** + * Name: mfrc522_picc_reqa_wupa + * + * Description: + * Transmits REQA or WUPA commands + * + * Input Parameters: + * + * Returned Value: OK or -ETIMEDOUT + * + ****************************************************************************/ + +int mfrc522_picc_reqa_wupa(FAR struct mfrc522_dev_s *dev, uint8_t command, + uint8_t *buffer, uint8_t length) +{ + uint8_t validbits; + uint8_t value; + int status; + + if (!buffer || length < 2) + { + return -EINVAL; + } + + /* Force clear of received bits if a collision is detected */ + + value = mfrc522_readu8(dev, MFRC522_COLL_REG); + mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL); + + validbits = 7; + status = mfrc522_transcv_data(dev, &command, 1, buffer, &length, &validbits, + 0, false); + + /* For REQA and WUPA we need to transmit only 7 bits */ + + if (status != OK) + { + return status; + } + + /* ATQA must be exactly 16 bits */ + + if (length != 2 || validbits != 0) + { + return -EAGAIN; + } + + mfrc522info("buffer[0]=0x%02X | buffer[1]=0x%02X\n", buffer[0], buffer[1]); + return OK; +} + +/**************************************************************************** + * Name: mfrc522_picc_request_a + * + * Description: + * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to + * READY and prepare for anticollision or selection. + * + * Input Parameters: + * + * Returned Value: OK or -ETIMEDOUT + * + ****************************************************************************/ + +int mfrc522_picc_request_a(FAR struct mfrc522_dev_s *dev, uint8_t *buffer, + uint8_t length) +{ + return mfrc522_picc_reqa_wupa(dev, PICC_CMD_REQA, buffer, length); +} + +/**************************************************************************** + * Name: mfrc522_picc_detect + * + * Description: + * Detects if a Contactless Card is near + * + * Input Parameters: + * + * Returned Value: OK or -ETIMEDOUT + * + ****************************************************************************/ + +int mfrc522_picc_detect(FAR struct mfrc522_dev_s *dev) +{ + int ret; + uint8_t buffer_atqa[2]; + uint8_t length = sizeof(buffer_atqa); + + /* Send a REQA command */ + + ret = mfrc522_picc_request_a(dev, buffer_atqa, length); + return (ret == OK || ret == -EBUSY); +} + +/**************************************************************************** + * Name: mfrc522_picc_select + * + * Description: + * Selects a near Card and read its UID. + * + * Input Parameters: + * + * Returned Value: OK or -ETIMEDOUT + * + ****************************************************************************/ + +int mfrc522_picc_select(FAR struct mfrc522_dev_s *dev, + FAR struct picc_uid_s *uid, uint8_t validbits) +{ + bool uid_complete; + bool select_done; + bool use_cascade_tag; + uint8_t cascade_level = 1; + int result; + uint8_t i; + uint8_t value; + uint8_t count; + + /* The first index in uid->data[] that is used in the current Cascade Level */ + + uint8_t uid_index; + + /* The number of known UID bits in the current Cascade Level. */ + + uint8_t curr_level_known_bits; + + /* The SELECT/ANTICOLLISION uses a 7 byte standard frame + 2 bytes CRC_A */ + + uint8_t buffer[9]; + + /* The number of bytes used in the buffer, number bytes on FIFO */ + + uint8_t buffer_used; + + /* Used to defines the bit position for the first bit received */ + + uint8_t rxalign; + + /* The number of valid bits in the last transmitted byte. */ + + uint8_t txlastbits; + + uint8_t *resp_buf; + uint8_t resp_len; + + /* Sanity check */ + + if (validbits > 80) + { + return -EINVAL; + } + + /* Force clear of received bits if a collision is detected */ + + value = mfrc522_readu8(dev, MFRC522_COLL_REG); + mfrc522_writeu8(dev, MFRC522_COLL_REG, value & MFRC522_VALUES_AFTER_COLL); + + /* Repeat cascade level loop until we have a complete UID */ + + uid_complete = false; + while (!uid_complete) + { + uint8_t bytes_to_copy; + + /* Set the Cascade Level in the SEL byte, find out if we need to use the + * Cascade Tag in byte 2. + */ + + switch (cascade_level) + { + case 1: + buffer[0] = PICC_CMD_SEL_CL1; + uid_index = 0; + + /* When we know that the UID has more than 4 bytes */ + + use_cascade_tag = validbits && (uid->size > 4); + break; + + case 2: + buffer[0] = PICC_CMD_SEL_CL2; + uid_index = 3; + + /* When we know that the UID has more than 7 bytes */ + + use_cascade_tag = validbits && (uid->size > 7); + break; + + case 3: + buffer[0] = PICC_CMD_SEL_CL3; + uid_index = 6; + use_cascade_tag = false; + break; + + default: + return -EIO; /* Internal error */ + } + + /* How many UID bits are known in this Cascade Level? */ + + curr_level_known_bits = validbits - (8 * uid_index); + if (curr_level_known_bits < 0) + { + curr_level_known_bits = 0; + } + + /* Copy the known bits from uid->uid_data[] to buffer[] */ + + i = 2; /* destination index in buffer[] */ + if (use_cascade_tag) + { + buffer[i++] = PICC_CMD_CT; + } + + /* Number of bytes needed to represent the known bits for this level */ + + bytes_to_copy = curr_level_known_bits / 8 + + (curr_level_known_bits % 8 ? 1 : 0); + + if (bytes_to_copy) + { + /* Max 4 bytes in each Cascade Level. Only 3 left if we use the + * Cascade Tag. + */ + + uint8_t max_bytes = use_cascade_tag ? 3 : 4; + + if (bytes_to_copy > max_bytes) + { + bytes_to_copy = max_bytes; + } + + for (count = 0; count < bytes_to_copy; count++) + { + buffer[i++] = uid->uid_data[uid_index + count]; + } + } + + /* Now that the data has been copied we need to include the 8 bits in CT + * in curr_level_known_bits. + */ + + if (use_cascade_tag) + { + curr_level_known_bits += 8; + } + + /* Repeat anti collision loop until we can transmit all UID bits + BCC + * and receive a SAK - max 32 iterations. + */ + + select_done = false; + while (!select_done) + { + /* Find out how many bits and bytes to send and receive. */ + + if (curr_level_known_bits >= 32) + { + /* All UID bits in this Cascade Level are known. This is a + * SELECT. + */ + + /* NVB - Number of Valid Bits: Seven whole bytes */ + + buffer[1] = 0x70; + + /* Calculate BCC - Block Check Character */ + + buffer[6] = buffer[2] ^ buffer[3] ^ buffer[4] ^ buffer[5]; + + /* Calculate CRC_A */ + + result = mfrc522_calc_crc(dev, buffer, 7, &buffer[7]); + if (result != OK) + { + return result; + } + + txlastbits = 0; /* 0 => All 8 bits are valid. */ + buffer_used = 9; + + /* Store response in the last 3 bytes of buffer (BCC and CRC_A - + * not needed after tx). + */ + + resp_buf = &buffer[6]; + resp_len = 3; + } + else + { + /* This is an ANTICOLLISION */ + + txlastbits = curr_level_known_bits % 8; + + /* Number of whole bytes in the UID part. */ + + count = curr_level_known_bits / 8; + i = 2 + count; + + /* NVB - Number of Valid Bits */ + + buffer[1] = (i << 4) + txlastbits; + buffer_used = i + (txlastbits ? 1 : 0); + + /* Store response in the unused part of buffer */ + + resp_buf = &buffer[i]; + resp_len = sizeof(buffer) - i; + } + + /* Set bit adjustments */ + + rxalign = txlastbits; + mfrc522_writeu8(dev, MFRC522_BIT_FRAMING_REG, + (rxalign << 4) + txlastbits); + + /* Transmit the buffer and receive the response */ + + result = mfrc522_transcv_data(dev, buffer, buffer_used, resp_buf, + &resp_len, &txlastbits, rxalign, false); + + /* More than one PICC in the field => collision */ + + if (result == -EBUSY) + { + uint8_t coll_pos; + uint8_t coll_reg = mfrc522_readu8(dev, MFRC522_COLL_REG); + + /* CollPosNotValid */ + + if (coll_reg & 0x20) + { + /* Without a valid collision position we cannot continue */ + + return -EBUSY; + } + + coll_pos = coll_reg & 0x1F; /* Values 0-31, 0 means bit 32. */ + if (coll_pos == 0) + { + coll_pos = 32; + } + + if (coll_pos <= curr_level_known_bits) + { + /* No progress - should not happen */ + + return -EIO; + } + + /* Choose the PICC with the bit set. */ + + curr_level_known_bits = coll_pos; + + /* The bit to modify */ + + count = (curr_level_known_bits - 1) % 8; + + /* First byte is index 0. */ + + i = 1 + (curr_level_known_bits / 8) + (count ? 1 : 0); + buffer[i] |= (1 << count); + } + else if (result != OK) + { + return result; + } + else /* OK */ + { + /* This was a SELECT. */ + + if (curr_level_known_bits >= 32) + { + /* No more collision */ + + select_done = true; + } + else + { + /* This was an ANTICOLLISION. */ + /* We have all 32 bits of the UID in this Cascade Level */ + + curr_level_known_bits = 32; + + /* Run loop again to do the SELECT */ + } + } + } + + /* We do not check the CBB - it was constructed by us above. */ + /* Copy the found UID bytes from buffer[] to uid->uid_data[] */ + + i = (buffer[2] == PICC_CMD_CT) ? 3 : 2; /* source index in buffer[] */ + bytes_to_copy = (buffer[2] == PICC_CMD_CT) ? 3 : 4; + + for (count = 0; count < bytes_to_copy; count++) + { + uid->uid_data[uid_index + count] = buffer[i++]; + } + + /* Check response SAK (Select Acknowledge) */ + + if (resp_len != 3 || txlastbits != 0) + { + /* SAK must be exactly 24 bits (1 byte + CRC_A). */ + + return -EIO; + } + + /* Verify CRC_A - do our own calculation and store the control in + * buffer[2..3] - those bytes are not needed anymore. + */ + + result = mfrc522_calc_crc(dev, resp_buf, 1, &buffer[2]); + if (result != OK) + { + return result; + } + + /* Is it correct */ + + if ((buffer[2] != resp_buf[1]) || (buffer[3] != resp_buf[2])) + { + return -EINVAL; + } + + /* Cascade bit set - UID not complete yes */ + + if (resp_buf[0] & 0x04) + { + cascade_level++; + } + else + { + uid_complete = true; + uid->sak = resp_buf[0]; + } + } + + /* Set correct uid->size */ + + uid->size = 3 * cascade_level + 1; + + return OK; +} + +/**************************************************************************** + * Name: mfrc522_softreset + * + * Description: + * Send a software reset command + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: none + * + ****************************************************************************/ + +void mfrc522_softreset(FAR struct mfrc522_dev_s *dev) +{ + /* Send a software reset command */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_SOFTRST_CMD); + + /* Wait the internal state machine to initialize */ + + usleep(50000); + + /* Wait for the PowerDown bit in COMMAND_REG to be cleared */ + + while (mfrc522_readu8(dev, MFRC522_COMMAND_REG) & MFRC522_POWER_DOWN); +} + +/**************************************************************************** + * Name: mfrc522_enableantenna + * + * Description: + * Turns the antenna on by enabling the pins TX1 and TX2 + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: none + * + ****************************************************************************/ + +void mfrc522_enableantenna(FAR struct mfrc522_dev_s *dev) +{ + uint8_t value = mfrc522_readu8(dev, MFRC522_TX_CTRL_REG); + + if ((value & (MFRC522_TX1_RF_EN | MFRC522_TX2_RF_EN)) != 0x03) + { + mfrc522_writeu8(dev, MFRC522_TX_CTRL_REG, value | 0x03); + } +} + +/**************************************************************************** + * Name: mfrc522_disableantenna + * + * Description: + * Turns the antenna off cutting the signals on TX1 and TX2 + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: none + * + ****************************************************************************/ + +void mfrc522_disableantenna(FAR struct mfrc522_dev_s *dev) +{ + uint8_t value = mfrc522_readu8(dev, MFRC522_TX_CTRL_REG); + + value &= ~(MFRC522_TX1_RF_EN | MFRC522_TX2_RF_EN); + mfrc522_writeu8(dev, MFRC522_TX_CTRL_REG, value); +} + +/**************************************************************************** + * Name: mfrc522_getfwversion + * + * Description: + * Read the MFRC522 firmware version. + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: the firmware version byte + * + ****************************************************************************/ + +uint8_t mfrc522_getfwversion(FAR struct mfrc522_dev_s *dev) +{ + return mfrc522_readu8(dev, MFRC522_VERSION_REG); +} + +/**************************************************************************** + * Name: mfrc522_getantennagain + * + * Description: + * Read the MFRC522 receiver gain (RxGain). + * See 9.3.3.6 / table 98 in MFRC522 datasheet. + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: none + * + ****************************************************************************/ + +uint8_t mfrc522_getantennagain(FAR struct mfrc522_dev_s *dev) +{ + return mfrc522_readu8(dev, MFRC522_RF_CFG_REG) & MFRC522_RX_GAIN_MASK; +} + +/**************************************************************************** + * Name: mfrc522_setantennagain + * + * Description: + * Set the MFRC522 receiver gain (RxGain) to value value specified in mask. + * See 9.3.3.6 / table 98 in MFRC522 datasheet. + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: none + * + ****************************************************************************/ + +void mfrc522_setantennagain(FAR struct mfrc522_dev_s *dev, uint8_t mask) +{ + uint8_t value; + + if ((value = mfrc522_getantennagain(dev)) != mask) + { + mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, value & ~MFRC522_RX_GAIN_MASK); + mfrc522_writeu8(dev, MFRC522_RF_CFG_REG, mask & MFRC522_RX_GAIN_MASK); + } +} + +/**************************************************************************** + * Name: mfrc522_init + * + * Description: + * Initializes the MFRC522 chip + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: none + * + ****************************************************************************/ + +void mfrc522_init(FAR struct mfrc522_dev_s *dev) +{ + /* Force a reset */ + + mfrc522_softreset(dev); + + /* We need a timeout if something when communicating with a TAG case + * something goes wrong. f_timer = 13.56 MHz / (2*TPreScaler+1) where: + * TPreScaler = [TPrescaler_Hi:Tprescaler_Lo]. Tprescaler_Hi are the four + * low bits in TmodeReg. Tprescaler_Lo is on TPrescalerReg. + * + * TAuto=1; timer starts automatically at the end of the transmission in + * all communication modes at all speeds. + */ + + mfrc522_writeu8(dev, MFRC522_TMODE_REG, MFRC522_TAUTO); + + /* TPreScaler = TModeReg[3..0]:TPrescalerReg, ie: 0x0A9 = 169 => + * f_timer=40kHz, then the timer period will be 25us. + */ + + mfrc522_writeu8(dev, MFRC522_TPRESCALER_REG, 0xA9); + + /* Reload timer with 0x3E8 = 1000, ie 25ms before timeout. */ + + mfrc522_writeu8(dev, MFRC522_TRELOAD_REGH, 0x06); + mfrc522_writeu8(dev, MFRC522_TRELOAD_REGL, 0xE8); + + /* Force 100% ASK modulation independent of the ModGsPReg setting */ + + mfrc522_writeu8(dev, MFRC522_TX_ASK_REG, MFRC522_FORCE_100ASK); + + /* Set the preset value for the CRC to 0x6363 (ISO 14443-3 part 6.2.4) */ + + mfrc522_writeu8(dev, MFRC522_MODE_REG, 0x3D); + + /* Enable the Antenna pins */ + + mfrc522_enableantenna(dev); +} + +/**************************************************************************** + * Name: mfrc522_selftest + * + * Description: + * Executes a self-test of the MFRC522 chip + * + * See 16.1.1 in the MFRC522 datasheet + * + * Input Parameters: a pointer to mfrc522_dev_s structure + * + * Returned Value: none + * + ****************************************************************************/ + +int mfrc522_selftest(FAR struct mfrc522_dev_s *dev) +{ + uint8_t i; + uint8_t result[64]; + uint8_t zeros[25] = {0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0}; + + /* Execute a software reset */ + + mfrc522_softreset(dev); + + /* Flush the FIFO buffer */ + + mfrc522_writeu8(dev, MFRC522_FIFO_LEVEL_REG, MFRC522_FLUSH_BUFFER); + + /* Clear the internal buffer by writing 25 bytes 0x00 */ + + mfrc522_writeblk(dev, MFRC522_FIFO_DATA_REG, zeros, 25); + + /* Transfer to internal buffer */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_MEM_CMD); + + /* Enable self-test */ + + mfrc522_writeu8(dev, MFRC522_AUTOTEST_REG, MFRC522_SELFTEST_EN); + + /* Write 0x00 to FIFO buffer */ + + mfrc522_writeu8(dev, MFRC522_FIFO_DATA_REG, 0x00); + + /* Start self-test by issuing the CalcCRC command */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_CALC_CRC_CMD); + + /* Wait for self-test to complete */ + + for (i = 0; i < 255; i++) + { + uint8_t n; + + n = mfrc522_readu8(dev, MFRC522_DIV_IRQ_REG); + if (n & MFRC522_CRC_IRQ) + { + break; + } + } + + /* Stop calculating CRC for new content in the FIFO */ + + mfrc522_writeu8(dev, MFRC522_COMMAND_REG, MFRC522_IDLE_CMD); + + /* Read out the 64 bytes result from the FIFO buffer */ + + mfrc522_readblk(dev, MFRC522_FIFO_DATA_REG, result, 64, 0); + + /* Self-test done. Reset AutoTestReg register to normal operation */ + + mfrc522_writeu8(dev, MFRC522_AUTOTEST_REG, 0x00); + + mfrc522info("Self Test Result:\n"); + for (i = 1; i <= 64; i++) + { + printf("0x%02X ", result[i - 1]); + + if ((i % 8) == 0) + { + printf("\n"); + } + } + + mfrc522info("Done!\n"); + return OK; +} + +/**************************************************************************** + * Name: mfrc522_open + * + * Description: + * This function is called whenever the MFRC522 device is opened. + * + ****************************************************************************/ + +static int mfrc522_open(FAR struct file *filep) +{ + FAR struct inode *inode; + FAR struct mfrc522_dev_s *dev; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + mfrc522_configspi(dev->spi); + + usleep(10000); + + mfrc522_getfwversion(dev); + + dev->state = MFRC522_STATE_IDLE; + return OK; +} + +/**************************************************************************** + * Name: mfrc522_close + * + * Description: + * This routine is called when the MFRC522 device is closed. + * + ****************************************************************************/ + +static int mfrc522_close(FAR struct file *filep) +{ + FAR struct inode *inode; + FAR struct mfrc522_dev_s *dev; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + dev->state = MFRC522_STATE_NOT_INIT; + + return OK; +} + +/**************************************************************************** + * Name: mfrc522_read + * + * Description: + * This routine is called when the device is read. + * + * Returns TAG id as string to buffer. + * or -EIO if no TAG found + * + ****************************************************************************/ + +static ssize_t mfrc522_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct inode *inode; + FAR struct mfrc522_dev_s *dev; + FAR struct picc_uid_s uid; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + /* Is a card near? */ + + if (!mfrc522_picc_detect(dev)) + { + mfrc522err("Card is not present!\n"); + return -EAGAIN; + } + + /* Now read the UID */ + + mfrc522_picc_select(dev, &uid, 0); + + if (uid.sak != 0) + { + if (buffer) + { + snprintf(buffer, buflen, "0x%02X%02X%02X%02X", + uid.uid_data[0], uid.uid_data[1], + uid.uid_data[2], uid.uid_data[3]); + return buflen; + } + } + + return OK; +} + +/**************************************************************************** + * Name: mfrc522_write + ****************************************************************************/ + +static ssize_t mfrc522_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + FAR struct inode *inode; + FAR struct mfrc522_dev_s *dev; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + (void)dev; + + return -ENOSYS; +} + +/**************************************************************************** + * Name: mfrc522_ioctl + ****************************************************************************/ + +static int mfrc522_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode; + FAR struct mfrc522_dev_s *dev; + int ret = OK; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + switch (cmd) + { + case MFRC522IOC_GET_PICC_UID: + { + struct picc_uid_s *uid = (struct picc_uid_s *)arg; + + /* Is a card near? */ + + if (mfrc522_picc_detect(dev)) + { + ret = mfrc522_picc_select(dev, uid, 0); + } + } + break; + + case MFRC522IOC_GET_STATE: + ret = dev->state; + break; + + default: + mfrc522err("ERROR: Unrecognized cmd: %d\n", cmd); + ret = -ENOTTY; + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mfrc522_register + * + * Description: + * Register the MFRC522 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. + * E.g., "/dev/rfid0" + * spi - An instance of the SPI interface to use to communicate with + * MFRC522. + * config - chip config + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int mfrc522_register(FAR const char *devpath, FAR struct spi_dev_s *spi) +{ + FAR struct mfrc522_dev_s *dev; + uint8_t fwver; + int ret = 0; + + /* Initialize the MFRC522 device structure */ + + dev = (FAR struct mfrc522_dev_s *)kmm_malloc(sizeof(struct mfrc522_dev_s)); + if (!dev) + { + mfrc522err("ERROR: Failed to allocate instance\n"); + return -ENOMEM; + } + + dev->spi = spi; + + /* Device is not initialized yet */ + + dev->state = MFRC522_STATE_NOT_INIT; + +#if defined CONFIG_PM + dev->pm_level = PM_IDLE; +#endif + + /* mfrc522_attachirq(dev, mfrc522_irqhandler); */ + + /* Initialize the MFRC522 */ + + mfrc522_init(dev); + + /* Device initialized and idle */ + + dev->state = MFRC522_STATE_IDLE; + + /* Read the Firmware Version */ + + fwver = mfrc522_getfwversion(dev); + + mfrc522info("MFRC522 Firmware Version: 0x%02X!\n", fwver); + + /* If returned firmware version is unknown don't register the device */ + + if (fwver != 0x90 && fwver != 0x91 && fwver != 0x92 && fwver != 0x88 ) + { + mfrc522err("None supported device detected!\n"); + goto firmware_error; + } + + /* Register the character driver */ + + ret = register_driver(devpath, &g_mfrc522fops, 0666, dev); + if (ret < 0) + { + mfrc522err("ERROR: Failed to register driver: %d\n", ret); + kmm_free(dev); + } + + return ret; + +firmware_error: + kmm_free(dev); + return -ENODEV; +} diff --git a/drivers/contactless/mfrc522.h b/drivers/contactless/mfrc522.h new file mode 100644 index 00000000000..9bc3903fd4f --- /dev/null +++ b/drivers/contactless/mfrc522.h @@ -0,0 +1,429 @@ +/**************************************************************************** + * drivers/contactless/mfrc522.h + * + * Copyright(C) 2016 Uniquix Ltda. All rights reserved. + * Authors: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __DRIVERS_CONTACTLESS_MFRC522_H +#define __DRIVERS_CONTACTLESS_MFRC522_H 1 + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/* The commands used by the PCD to manage communication with several PICCs + * (ISO 14443-3, Type A, section 6.4) + */ + +#define PICC_CMD_REQA 0x26 /* REQuest command, Type A */ +#define PICC_CMD_WUPA 0x52 /* Wake-UP command, Type A */ +#define PICC_CMD_CT 0x88 /* Cascade Tag, used during anti collision. */ +#define PICC_CMD_SEL_CL1 0x93 /* Anti collision/Select, Cascade Level 1 */ +#define PICC_CMD_SEL_CL2 0x95 /* Anti collision/Select, Cascade Level 2 */ +#define PICC_CMD_SEL_CL3 0x97 /* Anti collision/Select, Cascade Level 3 */ +#define PICC_CMD_HLTA 0x50 /* HaLT command, Type A */ + +/* The commands used for MIFARE Classic + * (from http://www.mouser.com/ds/2/302/MF1S503x-89574.pdf, Section 9) + * Use PCD_MFAuthent to authenticate access to a sector, then use these + * commands to read/write/modify the blocks on the sector. + * The read/write commands can also be used for MIFARE Ultralight. + */ + +#define PICC_CMD_MF_AUTH_KEY_A 0x60 /* Perform authentication with Key A */ +#define PICC_CMD_MF_AUTH_KEY_B 0x61 /* Perform authentication with Key B */ +#define PICC_CMD_MF_READ 0x30 /* Reads one 16 byte block from auth sector */ +#define PICC_CMD_MF_WRITE 0xA0 /* Writes one 16 byte block to auth senctor */ +#define PICC_CMD_MF_DECREMENT 0xC0 /* Decrements contents of a block */ +#define PICC_CMD_MF_INCREMENT 0xC1 /* Increments contents of a block */ +#define PICC_CMD_MF_RESTORE 0xC2 /* Reads the contents of a block */ +#define PICC_CMD_MF_TRANSFER 0xB0 /* Writes the contents of a block */ + +/* The commands used for MIFARE Ultralight + * (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6) + * The PICC_CMD_MF_READ/_MF_WRITE can also be used for MIFARE Ultralight. + */ + +#define PICC_CMD_UL_WRITE 0xA2 /* Writes one 4 byte page to the PICC. */ + +/* MFRC522 Registers */ + +/* NOTE: All SPI addresses are shifted one bit left in the SPI address byte + * See section 8.1.2.3 from MFRC522 datasheet + */ + +/* Page 0: Commands and status */ + /* 0x00 - reserved for future use */ +#define MFRC522_COMMAND_REG (0x01 << 1) /* starts/stops command execution */ +#define MFRC522_COM_IEN_REG (0x02 << 1) /* dis/enable int. req. ctrl bits */ +#define MFRC522_DIV_IEN_REG (0x03 << 1) /* dis/enable int. req. ctrl bits */ +#define MFRC522_COM_IRQ_REG (0x04 << 1) /* interrupt request bits */ +#define MFRC522_DIV_IRQ_REG (0x05 << 1) /* interrupt request bits */ +#define MFRC522_ERROR_REG (0x06 << 1) /* error bits status of last cmd */ +#define MFRC522_STATUS1_REG (0x07 << 1) /* communication status bits */ +#define MFRC522_STATUS2_REG (0x08 << 1) /* rcvr and transmitter status */ +#define MFRC522_FIFO_DATA_REG (0x09 << 1) /* input/output of FIFO buffer */ +#define MFRC522_FIFO_LEVEL_REG (0x0A << 1) /* number of bytes stored in the FIFO */ +#define MFRC522_WATER_LEVEL_REG (0x0B << 1) /* level for FIFO under/overflow */ +#define MFRC522_CONTROL_REG (0x0C << 1) /* miscellaneos control register */ +#define MFRC522_BIT_FRAMING_REG (0x0D << 1) /* adjustments for bit-oriented frames */ +#define MFRC522_COLL_REG (0x0E << 1) /* bit position of first bit-collision detected */ + /* 0x0F - reserved for future use */ +/* Page 1: Commands */ + /* 0x10 - reserved for future use */ +#define MFRC522_MODE_REG (0x11 << 1) /* defines general modes for transmit/receive */ +#define MFRC522_TX_MODE_REG (0x12 << 1) /* defines transmission data rate and framing */ +#define MFRC522_RX_MODE_REG (0x13 << 1) /* defines reception data rate and framing */ +#define MFRC522_TX_CTRL_REG (0x14 << 1) /* controls antenna driver pins TX1 and TX2 */ +#define MFRC522_TX_ASK_REG (0x15 << 1) /* controls the setting of transmission modulation */ +#define MFRC522_TX_SEL_REG (0x16 << 1) /* selects the internal sources for antenna driver */ +#define MFRC522_RX_SEL_REG (0x17 << 1) /* selects the internal receiver settings */ +#define MFRC522_RX_THLD_REG (0x18 << 1) /* selects the thresholds for bit decoder */ +#define MFRC522_DEMOD_REG (0x19 << 1) /* defines demodulator settings */ + /* 0x1A - reserved for future use */ + /* 0x1B - reserved for future use */ +#define MFRC522_MF_TX_REG (0x1C << 1) /* controls some MIFARE comm tx param */ +#define MFRC522_MF_RX_REG (0x1D << 1) /* controls some MIFARE comm rx param */ + /* 0x1E - reserved for future use */ +#define MFRC522_SERIAL_SPD_REG (0x1F << 1) /* selects the speed of the serial UART */ + +/* Page 2: Configuration */ + /* 0x20 - reserved for future use */ +#define MFRC522_CRC_RESULT_REGH (0x21 << 1) /* shows the MSB values of CRC calc. */ +#define MFRC522_CRC_RESULT_REGL (0x22 << 1) /* shows the LSB values of CRC calc. */ + /* 0x23 - reserved for future use */ +#define MFRC522_MOD_WIDTH_REG (0x24 << 1) /* controls the ModWidth setting */ + /* 0x25 - reserved for future use */ +#define MFRC522_RF_CFG_REG (0x26 << 1) /* configures the receiver gain */ +#define MFRC522_GSN_REG (0x27 << 1) /* selects the conductance of n-driver TX1/2 */ +#define MFRC522_CW_GSP_REG (0x28 << 1) /* defines the conductance of p-driver during no modulation */ +#define MFRC522_MOD_GSP_REG (0x29 << 1) /* defines the conductance of p-driver during modulation */ +#define MFRC522_TMODE_REG (0x2A << 1) /* defines settings for the internal timer */ +#define MFRC522_TPRESCALER_REG (0x2B << 1) /* the lower 8 bits of TPrescaler value */ +#define MFRC522_TRELOAD_REGH (0x2C << 1) /* defines the 16-bit timer reload value */ +#define MFRC522_TRELOAD_REGL (0x2D << 1) /* defines the 16-bit timer reload value */ +#define MFRC522_TCOUNT_VAL_REGH (0x2E << 1) /* shows the 16-bit timer value */ +#define MFRC522_TCOUNT_VAL_REGL (0x2F << 1) /* shows the 16-bit timer value */ + +/* Page 3: Test Registers */ + /* 0x30 - reserved for future use */ +#define MFRC522_TEST_SEL1_REG (0x31 << 1) /* general test signal configuration */ +#define MFRC522_TEST_SEL2_REG (0x32 << 1) /* general test signal configuration */ +#define MFRC522_TEST_PIN_EN_REG (0x33 << 1) /* enables pin output driver on pins D1 to D7 */ +#define MFRC522_TEST_PIN_VAL_REG (0x34 << 1) /* defines the values to D1 to D7 */ +#define MFRC522_TEST_BUS_REG (0x35 << 1) /* shows the status of the internal test bus */ +#define MFRC522_AUTOTEST_REG (0x36 << 1) /* controls the digital self test */ +#define MFRC522_VERSION_REG (0x37 << 1) /* shows the software version */ +#define MFRC522_ANALOG_TEST_REG (0x38 << 1) /* controls the pins AUX1 and AUX2 */ +#define MFRC522_TEST_DAC1_REG (0x39 << 1) /* defines the test value for TestDAC1 */ +#define MFRC522_TEST_DAC2_REG (0x3A << 1) /* defines the test value for TestDAC2 */ +#define MFRC522_TEST_ADC_REG (0x3B << 1) /* show the value of ADC I and Q channels */ + +/* Section 9.3.1.2: MFRC522 Command Register */ + +#define MFRC522_CMD_MASK 0x0F +# define MFRC522_IDLE_CMD 0x00 /* no action, cancels current command execution */ +# define MFRC522_MEM_CMD 0x01 /* stores 25 bytes into the internal buffer */ +# define MFRC522_GEN_RND_ID_CMD 0x02 /* generates a 10-bytes random ID number */ +# define MFRC522_CALC_CRC_CMD 0x03 /* activates the CRC coprocessor or self test */ +# define MFRC522_TRANSMIT_CMD 0x04 /* transmits data from the FIFO buffer */ +# define MFRC522_NO_CHANGE_CMD 0x07 /* no command change, used to modify CommandReg */ +# define MFRC522_RECEIVE_CMD 0x08 /* activates the receiver circuits */ +# define MFRC522_TRANSCV_CMD 0x0C /* transmits data from FIFO and receive automatically */ +# define MFRC522_MF_AUTH_CMD 0x0E /* performs the MIFARE stand authentication as a reader */ +# define MFRC522_SOFTRST_CMD 0x0F /* resets the MFRC522 */ +#define MFRC522_POWER_DOWN (1 << 4) /* soft power-down mode entered */ +#define MFRC522_RCV_OFF (1 << 5) /* turns off analog part of receiver */ + +/* Section 9.3.1.3: ComIEnReg register */ + +#define MFRC522_TIMER_IEN (1 << 0) /* allows the timer interrupt request on pin IRQ */ +#define MFRC522_ERR_IEN (1 << 1) /* allows the error interrupt request on pin IRQ */ +#define MFRC522_LO_ALERT_IEN (1 << 2) /* allows the low alert interrupt request on pin IRQ */ +#define MFRC522_HI_ALERT_IEN (1 << 3) /* allows the high alert interrupt request on pin IRQ */ +#define MFRC522_IDLE_IEN (1 << 4) /* allows the idle interrupt request on pin IRQ */ +#define MFRC522_RX_IEN (1 << 5) /* allows the receiver interrupt request on pin IRQ */ +#define MFRC522_TX_IEN (1 << 6) /* allows the transmitter interrupt request on pin IRQ */ +#define MFRC522_IRQ_INV (1 << 7) /* signal on pin IRQ is inverse of IRq bit from Status1Reg */ + +/* Section 9.3.1.4: DivIEnReg register */ + +#define MFRC522_CRC_IEN (1 << 2) /* allows the CRC interrupt request on pin IRQ */ +#define MFRC522_MFIN_ACT_IEN (1 << 4) /* allows the MFIN active interrupt request on pin IRQ */ +#define MFRC522_IRQ_PUSH_PULL (1 << 7) /* 1 = IRQ pin is a standard CMOS output pin, 0 = open-drain */ + +/* Section 9.3.1.5: ComIrqReg register */ + +#define MFRC522_COM_IRQ_MASK (0x7F) +#define MFRC522_TIMER_IRQ (1 << 0) /* enabled when TCounterValReg reaches value 0 */ +#define MFRC522_ERR_IRQ (1 << 1) /* any error bit in the ErrorReg register is set */ +#define MFRC522_LO_ALERT_IRQ (1 << 2) /* Status1Reg register’s LoAlert bit is set */ +#define MFRC522_HI_ALERT_IRQ (1 << 3) /* Status1Reg register’s HiAlert bit is set */ +#define MFRC522_IDLE_IRQ (1 << 4) /* if a command terminates this bit is set */ +#define MFRC522_RX_IRQ (1 << 5) /* receiver has detected the end of a valid data stream */ +#define MFRC522_TX_IRQ (1 << 6) /* set immediately after the last data bit was transmitted */ +#define MFRC522_SET1 (1 << 7) /* indicate the status of ComIrqReg bits */ + +/* Section 9.3.1.6: DivIrqReg register */ + +#define MFRC522_CRC_IRQ (1 << 2) /* the CalcCRC command is active and all data is processed */ +#define MFRC522_MFIN_ACT_IRQ (1 << 4) /* MFIN is active, int is set on rising/falling signal edge */ +#define MFRC522_SET2 (1 << 7) /* indicates the status of the marked bits in the DivIrqReg */ + +/* Section 9.3.1.7: ErrorReg register */ + +#define MFRC522_PROTO_ERR (1 << 0) /* set if the SOF is incorrect or during MFAuthent if data is incorrect */ +#define MFRC522_PARITY_ERR (1 << 1) /* parity check failed */ +#define MFRC522_CRC_ERR (1 << 2) /* the RxCRCEn bit is set and the CRC calculation fails */ +#define MFRC522_COLL_ERR (1 << 3) /* a bit-collision is detected */ +#define MFRC522_BUF_OVFL_ERR (1 << 4) /* FIFO is full and the host or internal state machine try to write data */ +#define MFRC522_TEMP_ERR (1 << 6) /* internal temperature sensor detects overheating */ +#define MFRC522_WR_ERR (1 << 7) /* data write error in the FIFO, host writing to FIFO at the wrong time */ + +/* Section 9.3.1.8: Status1Reg register */ + +#define MFRC522_LO_ALERT (1 << 0) /* number of bytes on FIFO lower than the water-mark */ +#define MFRC522_HI_ALERT (1 << 1) /* number of bytes on FIFO higher than the water-mark */ +#define MFRC522_TRUNNING (1 << 3) /* timer is running */ +#define MFRC522_IRQ (1 << 4) /* indicates if any interrupt source requests attention */ +#define MFRC522_CRC_READY (1 << 5) /* the CRC calculation has finished */ +#define MFRC522_CRC_OK (1 << 6) /* when the calculation is done correctly this bit change to 1 */ + +/* Section 9.3.1.9: Status2Reg register */ + +#define MFRC522_MODEM_STATE_MASK (7 << 0) /* shows the state of the transmitter and receiver state machine */ +#define MFRC522_MODEM_IDLE (0) /* idle */ +#define MFRC522_MODEM_WAIT_BFR (1) /* wait for the BitFramingReg register’s StartSend bit */ +#define MFRC522_MODEM_TXWAIT (2) /* wait until RF field is present if TxWaitRF bit is set to 1 */ +#define MFRC522_MODEM_TXING (3) /* transmitting */ +#define MFRC522_MODEM_RXWAIT (4) /* wait until RF field is present if TxWaitRF bit is set to 1 */ +#define MFRC522_MODEM_WAIT_DATA (5) /* wait for data */ +#define MFRC522_MODEM_RXING (6) /* receiving */ +#define MFRC522_MF_CRYPTO1_ON (1 << 3) /* MIFARE Crypto1 unit is switched on */ +#define MFRC522_I2C_FORCE_HS (1 << 6) /* set the I2C to high-speed mode (R/W bit) */ +#define MFRC522_TEMP_SENS_CLEAR (1 << 7) /* clears the temperature error if it is below 125C (R/W bit) */ + +/* Section 9.3.1.10: FIFODataReg register */ + +#define MFRC522_FIFO_DATA_MASK (0xFF) /* Input and output of 64 byte FIFO buffer */ + +/* Section 9.3.1.11: FIFOLevelReg register */ + +#define MFRC522_FIFOLEVEL_MASK (0x7F) /* indicates the number of bytes stored in the FIFO buffer */ +#define MFRC522_FLUSH_BUFFER (1 << 7) /* immediately clears the internal FIFO buffer */ + +/* Section 9.3.1.12: WaterLevelReg register */ + +#define MFRC522_WATER_LEVEL_MASK (0x3F) /* level for FIFO under- and overflow warning */ + +/* Section 9.3.1.13: ControlReg register */ + +#define MFRC522_RX_LAST_BITS_MASK (7 << 0) /* indicates the number of valid bits in the last received byte */ +#define MFRC522_TSTART_NOW (1 << 6) /* timer starts immediately */ +#define MFRC522_TSTOP_NOW (1 << 7) /* timer stops immediately */ + +/* Section 9.3.1.14: BitFramingReg register */ + +#define MFRC522_TX_LAST_BITS_MASK (7 << 0) /* defines the number of bits of the last byte that will be transmitted */ +#define MFRC522_RX_ALIGN_MASK (7 << 4) /* used for reception of bit-oriented frames */ +#define MFRC522_START_SEND (1 << 7) /* starts the transmission of data */ + +/* Section 9.3.1.15: CollReg register */ + +#define MFRC522_COLL_POS_MASK (0x1F) /* shows the bit position of the first detected collision */ +#define MFRC522_COLL_POS_NOT_VALID (1 << 5) /* no collision detected or it is out of the range of CollPos[4:0] */ +#define MFRC522_VALUES_AFTER_COLL (1 << 7) /* 0 means: all received bits will be cleared after a collision */ + +/* Section 9.3.2.2: ModeReg register */ + +#define MFRC522_CRC_PRESET_MASK (0x3) /* defines the preset value for the CalcCRC */ +#define MFRC522_CRC_PRESET_0000 (0x0) /* 0000h CRC preset value */ +#define MFRC522_CRC_PRESET_6363 (0x1) /* 6363h CRC preset value */ +#define MFRC522_CRC_PRESET_A671 (0x2) /* A671h CRC preset value */ +#define MFRC522_CRC_PRESET_FFFF (0x3) /* FFFFh CRC preset value */ +#define MFRC522_POL_MFIN (1 << 3) /* defines the polarity of pin MFIN */ +#define MFRC522_TX_WAIT_RF (1 << 5) /* transmitter can only be started if an RF field is generated */ +#define MFRC522_MSB_FIRST (1 << 7) /* CRC coprocessor calculates the CRC with MSB first */ + +/* Section 9.3.2.3: TxModeReg register */ + +#define MFRC522_INV_MOD (1 << 3) /* modulation of transmitted data is inverted */ +#define MFRC522_TX_SPEED_MASK (7 << 4) /* defines the bit rate during data transmission */ +#define MFRC522_TX_106KBD (0 << 4) /* 106 kBd */ +#define MFRC522_TX_212KBD (1 << 4) /* 212 kBd */ +#define MFRC522_TX_424KBD (2 << 4) /* 424 kBd */ +#define MFRC522_TX_848KBD (3 << 4) /* 848 kBd */ + /* 4-7 << 4 - reserved */ +#define MFRC522_TX_CRC_EN (1 << 7) /* enables CRC generation during data transmission */ + +/* Section 9.3.2.4: RxModeReg register */ + +#define MFRC522_RX_MULTIPLE (1 << 2) /* enable to receive more than one data frame, only at 106kBd */ +#define MFRC522_RX_NO_ERR (1 << 3) /* ignore invalid data stream error (less than 4 bits received) */ +#define MFRC522_RX_SPEED_MASK (7 << 4) /* defines the bit rate during data reception */ +#define MFRC522_RX_106KBD (0 << 4) /* 106 kBd */ +#define MFRC522_RX_212KBD (1 << 4) /* 212 kBd */ +#define MFRC522_RX_424KBD (2 << 4) /* 424 kBd */ +#define MFRC522_RX_848KBD (3 << 4) /* 848 kBd */ + /* 4-7 << 4 - reserved */ +#define MFRC522_RX_CRC_EN (1 << 7) /* enables CRC generation during data reception */ + +/* Section 9.3.2.5: TxControlReg register */ + +#define MFRC522_TX1_RF_EN (1 << 0) /* output signal on pin TX1 delivers 13.56MHz */ +#define MFRC522_TX2_RF_EN (1 << 1) /* output signal on pin TX2 delivers 13.56MHz */ + /* bit 2 - reserved */ +#define MFRC522_TX2_CW (1 << 3) /* output signal on pin TX2 delivers (un)modulated 13.56MHz */ +#define MFRC522_INV_TX1_RF_OFF (1 << 4) /* output signal on pin TX1 is inverted when driver TX1 is disabled */ +#define MFRC522_INV_TX2_RF_OFF (1 << 5) /* output signal on pin TX2 is inverted when driver TX2 is disabled */ +#define MFRC522_INV_TX1_RF_ON (1 << 6) /* output signal on pin TX1 is inverted when driver TX1 is enabled */ +#define MFRC522_INV_TX2_RF_ON (1 << 7) /* output signal on pin TX2 is inverted when driver TX2 is enabled */ + +/* Section 9.3.2.6: TxASKReg register */ + +#define MFRC522_FORCE_100ASK (1 << 6) /* forces a 100% ASK modulation independent of the ModGsPReg setting */ + +/* Section 9.3.2.7: TxSelReg register */ + +#define MFRC522_MFOUT_SEL_MASK (0xF) /* selects the input for pin MFOUT */ +#define MFRC522_MFOUT_3STATE (0) /* 3-state */ +#define MFRC522_MFOUT_LOW (1) /* constant Low */ +#define MFRC522_MFOUT_HIGH (2) /* constant High */ +#define MFRC522_MFOUT_TEST_BUS (3) /* test bus signal as defined by the TstBusBitSel[2:0] value */ +#define MFRC522_MFOUT_INT_ENV (4) /* modulation signal (envelope) from the internal encoder */ +#define MFRC522_MFOUT_TX_STREAM (5) /* serial data stream to be transmitted, data stream before Miller encoder */ + /* 6 - reserved */ +#define MFRC522_MFOUT_RX_STREAM (7) /* serial data stream received, data stream after Manchester decoder */ + /* 8-15 - reserved */ +#define MFRC522_DRV_SEL_MASK (3 << 4) /* selects the input of drivers TX1 and TX2 */ +#define MFRC522_DRV_SEL_3STATE (0 << 4) /* 3-state */ +#define MFRC522_DRV_SEL_INT_ENV (1 << 4) /* modulation signal (envelope) from the internal encoder */ +#define MFRC522_DVR_SEL_ENV_MFIN (2 << 4) /* modulation signal (envelope) from pin MFIN */ +#define MFRC522_DVR_SEL_HIGH (3 << 4) /* High: depends on InvTx1RFOn/InvTx1RFOff and InvTx2RFOn/InvTx2RFOff */ + +/* Section 9.3.2.8: RxSelReg register */ + +#define MFRC522_RX_WAIT_MASK (0x3F) /* delay the receiver RxWait bit-clocks after transmission */ +#define MFRC522_UART_SEL_MASK (3 << 6) /* selects the input of the contactless UART */ +#define MFRC522_UART_LOW (0 << 6) /* constant Low */ +#define MFRC522_UART_MANCHESTER (1 << 6) /* Manchester with subcarrier from pin MFIN */ +#define MFRC522_UART_INT_MOD (2 << 6) /* modulated signal from the internal analog module, default */ +#define MFRC522_UART_NRZ_CODE (3 << 6) /* NRZ coding without subcarrier from pin MFIN */ + +/* Section 9.3.2.9: RxThresholdReg register */ + +#define MFRC522_COLL_LEVEL_MASK (7) /* the minimum signal strength to generate a bit-collision */ +#define MFRC522_MIN_LEVEL_MASK (0xF << 4) /* the minimum signal strength that will be accepted */ + +/* Section 9.3.2.10: DemodReg register */ + +#define MFRC522_TAU_SYNC_MASK (3 << 0) /* changes the time-constant of the internal PLL during burst */ +#define MFRC522_TAU_RCV_MASK (3 << 2) /* changes the time-constant of the internal PLL during data reception */ +#define MFRC522_TPRESCAL_EVEN (1 << 4) /* defines the Timer Prescaler formula to use */ +#define MFRC522_FIX_IQ (1 << 5) /* defines if reception will be fixed at channel I or Q based on AddIQ[1:0] */ +#define MFRC522_ADD_IQ_MASK (3 << 6) /* defines the use of I and Q channel during reception */ + +/* Section 9.3.2.13: MfTxReg register */ + +#define MFRC522_MF_TX_WAIT_MASK (3 << 0) /* defines the additional response time */ + +/* Section 9.3.2.14 MfRxReg register */ + +#define MFRC522_MF_RX_PARITY_DIS (1 << 4 ) /* disable parity bit to transmittion and reception */ + +/* Section 9.3.2.16: SerialSpeedReg register */ + +#define MFRC522_BR_T1_MASK (0x1F) /* factor BR_T1 adjusts the transfer speed */ +#define MFRC522_BR_T0_MASK (7 << 5) /* factor BR_T0 adjusts the transfer speed */ + +/* Section 9.3.3.6: RFCfgReg register */ + +#define MFRC522_RX_GAIN_MASK (0x7 << 4) +#define MFRC522_RX_GAIN_18DB (0x0 << 4) +#define MFRC522_RX_GAIN_23DB (0x1 << 4) +#define MFRC522_RX_GAIN_18DB_2 (0x2 << 4) +#define MFRC522_RX_GAIN_23DB_2 (0x3 << 4) +#define MFRC522_RX_GAIN_33DB (0x4 << 4) +#define MFRC522_RX_GAIN_38DB (0x5 << 4) +#define MFRC522_RX_GAIN_43DB (0x6 << 4) +#define MFRC522_RX_GAIN_48DB (0x7 << 4) + +/* MFRC522 TModeReg and TPrescalerReg registers */ + +#define MFRC522_TPRESCALER_HI_MASK (0xF) +#define MFRC522_TAUTO_RESTART (1 << 4) +#define MFRC522_TGATED_MASK (3 << 5) +#define MFRC522_TGATED_NONGATED (0 << 5) /* non-gated mode */ +#define MFRC522_TGATED_MFIN (1 << 5) /* gated by pin MFIN */ +#define MFRC522_TGATED_AUX1 (2 << 5) /* gated by pin AUX1 */ +#define MFRC522_TAUTO (1 << 7) /* timer starts automatically at the end of the transmission */ + +/* MFRC522 AutoTestReg register */ + +#define MFRC522_SELFTEST_MASK (0xF) /* for default operation the self test must be disabled by value 0000b */ +#define MFRC522_RFT_MASK (3 << 4) /* reserved for production tests */ +#define MFRC522_AMP_RCV (1 << 6) /* non-linear signal processing mode, increase range distance at 106kBd */ + +#define MFRC522_SELFTEST_EN 9 /* the self test is enabled by value 1001b */ + +#ifndef CONFIG_MFRC522_SPI_FREQ +# define CONFIG_MFRC522_SPI_FREQ (5000000) +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct mfrc522_dev_s +{ + uint8_t state; + FAR struct spi_dev_s *spi; /* SPI interface */ +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +bool mfrc522_set_config(struct mfrc522_dev_s *dev, uint8_t flags); + +#endif /* __DRIVERS_CONTACTLESS_MFRC522_H */ diff --git a/drivers/contactless/pn532.c b/drivers/contactless/pn532.c new file mode 100644 index 00000000000..0f17f4c315e --- /dev/null +++ b/drivers/contactless/pn532.c @@ -0,0 +1,1165 @@ +/**************************************************************************** + * drivers/contactless/pn532.c + * + * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. + * Authors: Janne Rosberg + * Teemu Pirinen + * Juho Grundström + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "pn532.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ +/* Bit order H/W feature must be enabled in order to support LSB first + * operation. + */ + +#if !defined(CONFIG_SPI_HWFEATURES) || !defined(CONFIG_SPI_BITORDER) +# error CONFIG_SPI_HWFEATURES=y and CONFIG_SPI_BITORDER=y required by this driver +#endif + +#ifndef CONFIG_ARCH_HAVE_SPI_BITORDER +# warning This platform does not support SPI LSB-bit order +#endif + +#ifdef CONFIG_CL_PN532_DEBUG +# define pn532err _err +# define pn532info _info +#else +# ifdef CONFIG_CPP_HAVE_VARARGS +# define pn532err(x...) +# define pn532info(x...) +# else +# define pn532err (void) +# define pn532info (void) +# endif +#endif + +#ifdef CONFIG_CL_PN532_DEBUG_TX +# define tracetx errdumpbuffer +#else +# define tracetx(x...) +#endif + +#ifdef CONFIG_CL_PN532_DEBUG_RX +# define tracerx errdumpbuffer +#else +# define tracerx(x...) +#endif + +#define FRAME_SIZE(f) (sizeof(struct pn532_frame) + f->len + 2) +#define FRAME_POSTAMBLE(f) (f->data[f->len + 1]) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static inline void pn532_configspi(FAR struct spi_dev_s *spi); +static void pn532_lock(FAR struct spi_dev_s *spi); +static void pn532_unlock(FAR struct spi_dev_s *spi); + +/* Character driver methods */ + +static int _open(FAR struct file *filep); +static int _close(FAR struct file *filep); +static ssize_t _read(FAR struct file *, FAR char *, size_t); +static ssize_t _write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int _ioctl(FAR struct file *filep,int cmd,unsigned long arg); + +static uint8_t pn532_checksum(uint8_t value); +static uint8_t pn532_data_checksum(uint8_t *data, int datalen); + +int pn532_read(struct pn532_dev_s *dev, uint8_t *buff, uint8_t n); + +/* IRQ Handling TODO: +static int pn532_irqhandler(FAR int irq, FAR void *context, FAR void* dev); +static inline int pn532_attachirq(FAR struct pn532_dev_s *dev, xcpt_t isr); +*/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_pn532fops = +{ + _open, + _close, + _read, + _write, + 0, + _ioctl +#ifndef CONFIG_DISABLE_POLL + ,0 +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + ,0 +#endif +}; + +static const uint8_t pn532ack[] = +{ + 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void pn532_lock(FAR struct spi_dev_s *spi) +{ + int ret; + + (void)SPI_LOCK(spi, true); + + SPI_SETMODE(spi, SPIDEV_MODE0); + SPI_SETBITS(spi, 8); + + ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST); + if (ret < 0) + { + pn532err("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret); + } + + (void)SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ); +} + +static void pn532_unlock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, false); +} + +static inline void pn532_configspi(FAR struct spi_dev_s *spi) +{ + int ret; + + /* Configure SPI for the PN532 module. */ + + SPI_SETMODE(spi, SPIDEV_MODE0); + SPI_SETBITS(spi, 8); + + ret = SPI_HWFEATURES(spi, HWFEAT_LSBFIRST); + if (ret < 0) + { + pn532err("ERROR: SPI_HWFEATURES failed to set bit order: %d\n", ret); + } + + (void)SPI_SETFREQUENCY(spi, CONFIG_PN532_SPI_FREQ); +} + +static inline void pn532_select(struct pn532_dev_s *dev) +{ + if (dev->config->select) + { + dev->config->select(dev, true); + } + else + { + SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, true); + } +} + +static inline void pn532_deselect(struct pn532_dev_s *dev) +{ + if (dev->config->select) + { + dev->config->select(dev, false); + } + else + { + SPI_SELECT(dev->spi, SPIDEV_CONTACTLESS, false); + } +} + +static void pn532_frame_init(struct pn532_frame *frame, uint8_t cmd) +{ + frame->preamble = PN532_PREAMBLE; + frame->start_code = PN532_SOF; + frame->tfi = PN532_HOSTTOPN532; + frame->data[0] = cmd; + frame->len = 2; +} + +static void pn532_frame_finish(struct pn532_frame *frame) +{ + frame->lcs = pn532_checksum(frame->len); + frame->data[frame->len-1] = pn532_data_checksum(&frame->tfi, frame->len); + frame->data[frame->len] = PN532_POSTAMBLE; +} + +static inline uint8_t pn532_checksum(uint8_t value) +{ + return ~value + 1; +} + +static uint8_t pn532_data_checksum(uint8_t *data, int datalen) +{ + uint8_t sum = 0x00; + int i; + + for (i = 0; i < datalen; i++) + { + sum += data[i]; + } + + return pn532_checksum(sum); +} + +bool pn532_rx_frame_is_valid(struct pn532_frame *f, bool check_data) +{ + uint8_t chk; + + if (f->start_code != PN532_SOF) + { + pn532err("ERROR: Frame startcode 0x%X != 0x%X\n", + PN532_SOF, f->start_code); + return false; + } + + if (f->tfi != PN532_PN532TOHOST) + { + return false; + } + + chk = pn532_checksum(f->len); + if (chk != f->lcs) + { + pn532err("ERROR: Frame data len checksum failed"); + return false; + } + + if (check_data) + { + chk = pn532_data_checksum(&f->tfi, f->len); + if (chk != f->data[f->len-1]) + { + pn532err("ERROR: Frame data checksum failed: calc=0x%X != 0x%X", + chk, f->data[f->len-1]); + return false; + } + } + + return true; +} + +static uint8_t pn532_status(struct pn532_dev_s *dev) +{ + int rs; + + pn532_lock(dev->spi); + pn532_select(dev); + + rs = SPI_SEND(dev->spi, PN532_SPI_STATREAD); + rs = SPI_SEND(dev->spi, PN532_SPI_STATREAD); + + pn532_deselect(dev); + pn532_unlock(dev->spi); + + return rs; +} + +/**************************************************************************** + * Name: pn532_wait_rx_ready + * + * Description: + * Blocks until Data frame available from chip. + * + * Input Parameters: + * dev + * timeout + * + * Returned Value: + * 0 for OK. -ETIMEDOUT if no data available + * + ****************************************************************************/ + +static int pn532_wait_rx_ready(struct pn532_dev_s *dev, int timeout) +{ + int ret = OK; + +#ifdef CONFIG_PN532_USE_IRQ_FLOW_CONTROL + struct timespec ts; + clock_gettime(CLOCK_REALTIME, &ts); + ts.tv_sec += 1; + sem_timedwait(dev->sem_rx, &ts); +#endif + + /* TODO: Handle Exception bits 2, 3 */ + + while (pn532_status(dev) != PN532_SPI_READY) + { + if (--timeout == 0x00) + { + pn532err("ERROR: wait RX timeout!\n"); + return -ETIMEDOUT; + } + + usleep(1000); + } + + dev->state = PN532_STATE_DATA_READY; + return ret; +} + +/**************************************************************************** + * Name: pn532_writecommand + * + * Description: + * Helper for debug/testing + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +#if 0 +static void pn532_writecommand(struct pn532_dev_s *dev, uint8_t cmd) +{ + char cmd_buffer[16]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + + pn532_frame_init(f, cmd); + pn532_frame_finish(f); + + pn532_lock(dev->spi); + pn532_select(dev); + usleep(10000); + + SPI_SEND(dev->spi, PN532_SPI_DATAWRITE); + SPI_SNDBLOCK(dev->spi, f, FRAME_SIZE(f)); + + pn532_deselect(dev); + pn532_unlock(dev->spi); + + tracetx("command sent", (uint8_t *) f, FRAME_SIZE(f)); +} +#endif + +/**************************************************************************** + * Name: pn532_read + * + * Description: + * RAW Read data from chip. + * NOTE: This WON'T wait if data is available! + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int pn532_read(struct pn532_dev_s *dev, uint8_t *buff, uint8_t n) +{ + pn532_lock(dev->spi); + pn532_select(dev); + SPI_SEND(dev->spi, PN532_SPI_DATAREAD); + SPI_RECVBLOCK(dev->spi, buff, n); + pn532_deselect(dev); + pn532_unlock(dev->spi); + + tracerx("read", buff, n); + return n; +} + +int pn532_read_more(struct pn532_dev_s *dev, uint8_t *buff, uint8_t n) +{ + pn532_lock(dev->spi); + pn532_select(dev); + SPI_RECVBLOCK(dev->spi, buff, n); + pn532_deselect(dev); + pn532_unlock(dev->spi); + + tracerx("read_more", buff, n); + return n; +} + +/**************************************************************************** + * Name: pn532_read_ack + * + * Description: + * Read Ack responce from device + * + * Input Parameters: + * dev + * + * Returned Value: + * 0 = NOK, 1 = OK + * + ****************************************************************************/ + +int pn532_read_ack(struct pn532_dev_s *dev) +{ + int res = 0; + uint8_t ack[6]; + + pn532_read(dev, (uint8_t *) &ack, 6); + + if (memcmp(&ack, &pn532ack, 6) == 0x00) + { + res = 1; + } + else + { + pn532info("ACK NOK"); + res = 0; + } + + return res; +} + +/**************************************************************************** + * Name: pn532_write_frame + * + * Description: + * Write frame to chip. Also waits and reads ACK frame from chip. + * + * Construct frame with + * pn532_frame_init(), pn532_frame_finish() + * + * Input Parameters: + * dev - Device instance + * f - Pointer to start frame + * + * Returned Value: + * 0 for OK, negative for error + * + ****************************************************************************/ + +int pn532_write_frame(struct pn532_dev_s *dev, struct pn532_frame *f) +{ + int res = OK; + + pn532_lock(dev->spi); + pn532_select(dev); + usleep(2000); + + SPI_SEND(dev->spi, PN532_SPI_DATAWRITE); + SPI_SNDBLOCK(dev->spi, f, FRAME_SIZE(f)); + pn532_deselect(dev); + pn532_unlock(dev->spi); + tracetx("WriteFrame", (uint8_t *) f, FRAME_SIZE(f)); + + /* Wait ACK frame */ + + res = pn532_wait_rx_ready(dev, 30); + if (res == OK) + { + if (!pn532_read_ack(dev)) + { + pn532err("ERROR: command FAILED\n"); + res = -EIO; + } + } + + return res; +} + +int pn532_read_frame(struct pn532_dev_s *dev, struct pn532_frame *f, int max_size) +{ + int res = -EIO; + + /* Wait for frame available */ + + if ((res = pn532_wait_rx_ready(dev, 100)) == OK) + { + /* Read header */ + + pn532_read(dev, (uint8_t *) f, sizeof(struct pn532_frame)); + if (pn532_rx_frame_is_valid(f, false)) + { + if (max_size < f->len) + { + return -EINVAL; + } + + pn532_read_more(dev, &f->data[0], f->len); + + /* TODO: optimize frame integrity check... + * pn532_data_checksum(&f.tfi, f->len); + * errdumpbuffer("RX Frame:", f, f->len+6); + */ + + if (pn532_rx_frame_is_valid(f, true)) + { + res = OK; + } + } + } + + return res; +} + +bool pn532_set_config(struct pn532_dev_s *dev, uint8_t flags) +{ + char cmd_buffer[2+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + + pn532_frame_init(f, PN532_COMMAND_SETPARAMETERS); + f->data[1] = flags; + f->len += 1; + pn532_frame_finish(f); + + uint8_t resp[9]; + bool res = false; + + if (pn532_write_frame(dev, f) == OK) + { + pn532_read(dev, (uint8_t *) &resp, 9); + tracerx("set config responce", resp, 9); + res = true; + } + + return res; +} + +int pn532_sam_config(struct pn532_dev_s *dev, struct pn_sam_settings_s *settings) +{ + char cmd_buffer[4+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + int res; + + pn532_frame_init(f, PN532_COMMAND_SAMCONFIGURATION); + f->data[1] = PN532_SAM_NORMAL_MODE; + f->data[2] = 0x14; /* Timeout LSB=50ms 0x14*50ms = 1sec */ + f->data[3] = 0x01; /* P-70, IRQ enabled */ + + if (settings) + { + /* TODO: !!! */ + } + + f->len += 3; + pn532_frame_finish(f); + + res = -EIO; + + if (pn532_write_frame(dev, f) == OK) + { + if (pn532_read_frame(dev, f, 4) == OK) + { + tracerx("sam config response", (uint8_t *) f->data, 3); + if (f->data[0] == PN532_COMMAND_SAMCONFIGURATION + 1) + { + res = OK; + } + } + } + + return res; +} + +int pn532_get_fw_version(struct pn532_dev_s *dev, + struct pn_firmware_version *fv) +{ + uint8_t cmd_buffer[4+8+1]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + struct pn_firmware_version *fw; + int res = -EIO; + + pn532_frame_init(f, PN532_COMMAND_GETFIRMWAREVERSION); + pn532_frame_finish(f); + + if (pn532_write_frame(dev, f) == OK) + { + if (pn532_read_frame(dev, f, 6) == OK) + { + if (f->data[0] == PN532_COMMAND_GETFIRMWAREVERSION + 1) + { + fw = (struct pn_firmware_version*) &f->data[1]; + pn532info("FW: %d.%d on IC:0x%X (Features: 0x%X)\n", + fw->ver, fw->rev, fw->ic, fw->support); + if (fv) + { + memcpy(fv, fw, sizeof(struct pn_firmware_version)); + } + + res = OK; + } + } + } + + return res; +} + +int pn532_write_gpio(struct pn532_dev_s *dev, uint8_t p3, uint8_t p7) +{ + uint8_t cmd_buffer[3+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + int res = -EIO; + + pn532_frame_init(f, PN532_COMMAND_WRITEGPIO); + f->data[1] = p3; + f->data[2] = p7; + f->len += 2; + pn532_frame_finish(f); + + if (pn532_write_frame(dev, f)) + { + pn532_read(dev, cmd_buffer, 10); + tracetx("Resp:", cmd_buffer, 10); + pn532info("TFI=%x, data0=%X", f->tfi, f->data[0]); + if ((f->tfi == PN532_PN532TOHOST) && (f->data[0] == PN532_COMMAND_WRITEGPIO+1)) + { + res = OK; + } + } + + return res; +} + +uint32_t pn532_write_passive_data(struct pn532_dev_s *dev, uint8_t address, + uint8_t *data, uint8_t len) +{ + uint8_t cmd_buffer[8+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + uint8_t resp[20]; + uint32_t res = -EIO; + + pn532_frame_init(f, PN532_COMMAND_INDATAEXCHANGE); + f->data[1] = 1; /* max n cards at once */ + f->data[2] = 0xA2; /* command WRITE */ + f->data[3] = address; /* ADDRESS, 0 = serial */ + memcpy(&f->data[4], data, len); + f->len += 7; + pn532_frame_finish(f); + + if (pn532_write_frame(dev, f) == OK) + { + if (dev->state == PN532_STATE_DATA_READY) + { + if (pn532_read_frame(dev, (struct pn532_frame *) resp, 15) == OK) + { + dev->state = PN532_STATE_IDLE; + f = (struct pn532_frame *) resp; + tracerx("passive target id resp:", f, f->len+6); + + if (f->data[0] == PN532_COMMAND_INDATAEXCHANGE+1) + { + res = f->data[1]; + } + } + } + } + + return res; +} + +uint32_t pn532_read_passive_data(struct pn532_dev_s *dev, uint8_t address, + uint8_t *data, uint8_t len) +{ + uint8_t cmd_buffer[4+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + uint8_t resp[30]; + uint32_t res = -1; + + pn532_frame_init(f, PN532_COMMAND_INDATAEXCHANGE); + f->data[1] = 1; /* max n cards at once */ + f->data[2] = 0x30; /* command READ */ + f->data[3] = address; /* ADDRESS, 0 = serial */ + f->len += 3; + pn532_frame_finish(f); + + if (pn532_write_frame(dev, f) == OK) + { + if (dev->state == PN532_STATE_DATA_READY) + { + if (pn532_read_frame(dev, (struct pn532_frame *)resp, 25) == OK) + { + dev->state = PN532_STATE_IDLE; + f = (struct pn532_frame *) resp; + tracerx("passive target id resp:", f, f->len+6); + + if (f->data[0] == PN532_COMMAND_INDATAEXCHANGE+1) + { + if(f->data[1] == 0 && data && len) + { + memcpy(data, &f->data[2], len); + } + + res = f->data[1]; + } + } + } + } + + return res; +} + +uint32_t pn532_read_passive_target_id(struct pn532_dev_s *dev, uint8_t baudrate) +{ + uint8_t cmd_buffer[4+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + uint8_t resp[20]; + uint32_t res = -EAGAIN; + int i; + + if (dev->state == PN532_STATE_DATA_READY) + { + res = -EIO; + if (pn532_read_frame(dev, (struct pn532_frame *) resp, 15) == OK) + { + dev->state = PN532_STATE_IDLE; + f = (struct pn532_frame *) resp; + struct pn_poll_response *r = (struct pn_poll_response *) &f->data[1]; + tracerx("passive target id resp:", f, f->len+6); + + if (f->data[0] == PN532_COMMAND_INLISTPASSIVETARGET+1) + { + uint32_t cid = 0; + + if (r->nbtg == 1) + { + pn532info("Found %d card(s)\n", r->nbtg); + + /* now supports only type_a cards + * if (poll_mode == PN532_POLL_MOD_106KBPS_A) + */ + + struct pn_target_type_a *t = (struct pn_target_type_a *) &r->target_data; + pn532info("sens:0x%x sel:0x%x", t->sens_res, t->sel_res); + pn532info("idlen:0x%x ", t->nfcid_len); + + /* generate 32bit cid from id (could be longer) + * HACK: Using only top 4 bytes. + */ + + for (i = 0; i < 4 /*t->nfcid_len*/; i++) + { + cid <<= 8; + cid |= t->nfcid_data[i]; + } + } + + res = cid; + } + } + } + + return res; + +} + +static int pn532_read_passive_target(struct pn532_dev_s *dev, uint8_t baudrate) +{ + uint8_t cmd_buffer[4+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + + pn532_frame_init(f, PN532_COMMAND_INLISTPASSIVETARGET); + f->data[1] = 1; + f->data[2] = baudrate; + f->len += 2; + pn532_frame_finish(f); + return pn532_write_frame(dev, f); +} + +bool pn532_set_rf_config(struct pn532_dev_s *dev, struct pn_rf_config_s *conf) +{ + bool res = false; + uint8_t cmd_buffer[15+7]; + struct pn532_frame *f = (struct pn532_frame *) cmd_buffer; + + pn532_frame_init(f, PN532_COMMAND_RFCONFIGURATION); + f->data[1] = conf->cfg_item; + memcpy(&f->data[2], conf->config, conf->data_size); + f->len += conf->data_size+1; + pn532_frame_finish(f); + + if (pn532_write_frame(dev, f) == OK) + { + pn532_read(dev, (uint8_t *) f, 10); + tracerx("rf config response", (uint8_t *) f, 10); + if (pn532_rx_frame_is_valid(f, true)) + { + if (f->data[0] == PN532_COMMAND_RFCONFIGURATION + 1) + { + res = true; + } + } + } + + return res; +} + +/**************************************************************************** + * Name: pn532_attachirq + * + * Description: + * IRQ handling TODO: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +#if 0 +static inline int (FAR struct pn532_dev_s *dev, xcpt_t isr) +{ + return dev->config->irqattach(dev,isr); +} + +static int irq_handler(int irq, FAR void *context) +{ + (void) irq; + (void) context; + + /* pn532info("*IRQ*\n"); */ + /* work_queue(HPWORK, &g_dev->irq_work, pn532_worker, dev, 0); */ + + return OK; +} +#endif + +/**************************************************************************** + * Name: pn532_open + * + * Description: + * This function is called whenever the PN532 device is opened. + * + ****************************************************************************/ + +static int _open(FAR struct file *filep) +{ + FAR struct inode *inode; + FAR struct pn532_dev_s *dev; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + pn532_configspi(dev->spi); + + dev->config->reset(1); + usleep(10000); + + pn532_sam_config(dev, NULL); + pn532_get_fw_version(dev, NULL); + + dev->state = PN532_STATE_IDLE; + return OK; +} + +/**************************************************************************** + * Name: _close + * + * Description: + * This routine is called when the PN532 device is closed. + * + ****************************************************************************/ + +static int _close(FAR struct file *filep) +{ + FAR struct inode *inode; + FAR struct pn532_dev_s *dev; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + dev->config->reset(0); + dev->state = PN532_STATE_NOT_INIT; + +#ifdef CONFIG_PM + if(dev->pm_level >= PM_SLEEP) + { + //priv->config->reset(0); + } +#endif + + return OK; +} + +/**************************************************************************** + * Name: _read + * + * Description: + * This routine is called when the device is read. + * + * Returns TAG id as string to buffer. + * or -EIO if no TAG found + * + ****************************************************************************/ + +static ssize_t _read(FAR struct file *filep, FAR char *buffer, size_t buflen) +{ + FAR struct inode *inode; + FAR struct pn532_dev_s *dev; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + uint32_t id = pn532_read_passive_target_id(dev, PN532_MIFARE_ISO14443A); + if (id != 0xFFFFFFFF) + { + if (buffer) + { + return snprintf(buffer, buflen, "0X%X", id); + } + } + + return -EIO; +} + +/**************************************************************************** + * Name: pn532_write + ****************************************************************************/ + +static ssize_t _write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + FAR struct inode *inode; + FAR struct pn532_dev_s *dev; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + (void) dev; + + return -ENOSYS; +} + +/**************************************************************************** + * Name: pn532_ioctl + ****************************************************************************/ + +static int _ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode; + FAR struct pn532_dev_s *dev; + int ret = OK; + + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + dev = inode->i_private; + + switch (cmd) + { + case PN532IOC_READ_TAG_DATA: + { + struct pn_mifare_tag_data_s *tag_data = (struct pn_mifare_tag_data_s *) arg; + if (tag_data) + { + /* HACK: get rid of previous command */ + + if (dev->state == PN532_STATE_CMD_SENT) + { + if (pn532_wait_rx_ready(dev, 1)) + { + pn532_read_passive_target_id(dev,0); + } + } + + ret = pn532_read_passive_data(dev, tag_data->address, + (uint8_t *) &tag_data->data, + sizeof(tag_data->data)); + + dev->state = PN532_STATE_IDLE; + } + } + break; + + case PN532IOC_WRITE_TAG_DATA: + { + struct pn_mifare_tag_data_s *tag_data = (struct pn_mifare_tag_data_s *) arg; + if (tag_data) + { + /* HACK: get rid of previous command */ + + if (dev->state == PN532_STATE_CMD_SENT) + { + if (pn532_wait_rx_ready(dev, 1)) + { + pn532_read_passive_target_id(dev,0); + } + } + + ret = pn532_write_passive_data(dev, tag_data->address, + (uint8_t *) &tag_data->data, + sizeof(tag_data->data)); + + dev->state = PN532_STATE_IDLE; + } + } + break; + + case PN532IOC_SET_SAM_CONF: + pn532_sam_config(dev, (struct pn_sam_settings_s *) arg); + break; + + case PN532IOC_READ_PASSIVE: + if (dev->state == PN532_STATE_CMD_SENT) + { + uint32_t *ptr = (uint32_t *)((uintptr_t)arg); + *ptr = pn532_read_passive_target_id(dev,0); + } + else + { + uint32_t *ptr = (uint32_t *)((uintptr_t)arg); + *ptr = -1; + } + break; + + case PN532IOC_SET_RF_CONF: + pn532_set_rf_config(dev, (struct pn_rf_config_s *) arg); + break; + + case PN532IOC_SEND_CMD_READ_PASSIVE: + ret = pn532_read_passive_target(dev,0); + if (ret == 0) + { + dev->state = PN532_STATE_CMD_SENT; + } + else + { + dev->state = PN532_STATE_IDLE; + } + break; + + case PN532IOC_GET_DATA_READY: + if (pn532_wait_rx_ready(dev, 1)) + { + ret = 0; + } + else + { + ret = 1; + } + break; + + case PN532IOC_GET_TAG_ID: + { + uint32_t *ptr = (uint32_t *)((uintptr_t)arg); + *ptr = pn532_read_passive_target_id(dev,0); + } + break; + + case PN532IOC_GET_STATE: + ret = dev->state; + break; + + default: + pn532err("ERROR: Unrecognized cmd: %d\n", cmd); + ret = -EINVAL; + break; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pn532_register + * + * Description: + * Register the PN532 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. + * E.g., "/dev/nfc0" + * spi - An instance of the SPI interface to use to communicate with + * PN532. + * config - chip config + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct pn532_config_s *config) +{ + FAR struct pn532_dev_s *dev; + int ret; + + /* Initialize the PN532 device structure */ + + dev = (FAR struct pn532_dev_s *)kmm_malloc(sizeof(struct pn532_dev_s)); + if (!dev) + { + pn532err("ERROR: Failed to allocate instance\n"); + return -ENOMEM; + } + + dev->spi = spi; + dev->config = config; + +#if defined CONFIG_PM + dev->pm_level = PM_IDLE; +#endif + + /* pn532_attachirq(dev, pn532_irqhandler); */ + + /* Register the character driver */ + + ret = register_driver(devpath, &g_pn532fops, 0666, dev); + if (ret < 0) + { + pn532err("ERROR: Failed to register driver: %d\n", ret); + kmm_free(dev); + } + + return ret; +} diff --git a/drivers/contactless/pn532.h b/drivers/contactless/pn532.h new file mode 100644 index 00000000000..ee6980532b3 --- /dev/null +++ b/drivers/contactless/pn532.h @@ -0,0 +1,171 @@ +/**************************************************************************** + * drivers/contactless/pn532.h + * + * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. + * Authors: Janne Rosberg + * Teemu Pirinen + * Juho Grundström + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __DRIVERS_CONTACTLESS_PN532_H +#define __DRIVERS_CONTACTLESS_PN532_H 1 + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +#define PN532_PREAMBLE 0x00 +#define PN532_STARTCODE1 0x00 +#define PN532_STARTCODE2 0xFF +#define PN532_POSTAMBLE 0x00 + +#define PN532_SOF 0xFF00 + +#define PN532_HOSTTOPN532 0xD4 +#define PN532_PN532TOHOST 0xD5 + +#define PN532_SPI_STATREAD 0x02 +#define PN532_SPI_DATAWRITE 0x01 +#define PN532_SPI_DATAREAD 0x03 +#define PN532_SPI_READY 0x01 + +/* PN532 Commands */ + +#define PN532_COMMAND_DIAGNOSE 0x00 +#define PN532_COMMAND_GETFIRMWAREVERSION 0x02 +#define PN532_COMMAND_GETGENERALSTATUS 0x04 +#define PN532_COMMAND_READREGISTER 0x06 +#define PN532_COMMAND_WRITEREGISTER 0x08 +#define PN532_COMMAND_READGPIO 0x0C +#define PN532_COMMAND_WRITEGPIO 0x0E +#define PN532_COMMAND_SETSERIALBAUDRATE 0x10 +#define PN532_COMMAND_SETPARAMETERS 0x12 +#define PN532_COMMAND_SAMCONFIGURATION 0x14 +#define PN532_COMMAND_POWERDOWN 0x16 +#define PN532_COMMAND_RFCONFIGURATION 0x32 +#define PN532_COMMAND_RFREGULATIONTEST 0x58 +#define PN532_COMMAND_INJUMPFORDEP 0x56 +#define PN532_COMMAND_INJUMPFORPSL 0x46 +#define PN532_COMMAND_INLISTPASSIVETARGET 0x4A +#define PN532_COMMAND_INATR 0x50 +#define PN532_COMMAND_INPSL 0x4E +#define PN532_COMMAND_INDATAEXCHANGE 0x40 +#define PN532_COMMAND_INCOMMUNICATETHRU 0x42 +#define PN532_COMMAND_INDESELECT 0x44 +#define PN532_COMMAND_INRELEASE 0x52 +#define PN532_COMMAND_INSELECT 0x54 +#define PN532_COMMAND_INAUTOPOLL 0x60 +#define PN532_COMMAND_TGINITASTARGET 0x8C +#define PN532_COMMAND_TGSETGENERALBYTES 0x92 +#define PN532_COMMAND_TGGETDATA 0x86 +#define PN532_COMMAND_TGSETDATA 0x8E +#define PN532_COMMAND_TGSETMETADATA 0x94 +#define PN532_COMMAND_TGGETINITIATORCOMMAND 0x88 +#define PN532_COMMAND_TGRESPONSETOINITIATOR 0x90 +#define PN532_COMMAND_TGGETTARGETSTATUS 0x8A + +#define PN532_WAKEUP 0x55 + +#define PN532_SAM_NORMAL_MODE 0x01 +#define PN532_SAM_VIRTUAL_CARD 0x02 +#define PN532_SAM_WIRED_CARD 0x03 +#define PN532_SAM_DUAL_CARD 0x04 + +#ifndef CONFIG_PN532_SPI_FREQ +# define CONFIG_PN532_SPI_FREQ (5000000) +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct pn532_frame +{ + uint8_t preamble; /* 0x00 */ + uint16_t start_code; /* 0x00FF (BE) -> 0xFF00 (LE) */ + uint8_t len; /* 1 byte indicating the number of bytes in + * the data field */ + uint8_t lcs; /* 1 Packet Length Checksum LCS byte that satisfies + * the relation: Lower byte of [LEN + LCS] = 00h */ + uint8_t tfi; /* Frame idenfifier 0xD4, 0xD5 */ + uint8_t data[]; /* LEN-1 bytes of Packet Data Information. + * The first byte PD0 is the Command Code */ +} packed_struct; + +struct pn_poll_response +{ + uint8_t nbtg; + uint8_t tg; + uint8_t target_data[]; +} packed_struct; + +struct pn_target_type_a +{ + uint16_t sens_res; + uint8_t sel_res; + uint8_t nfcid_len; + uint8_t nfcid_data[]; +} packed_struct; + +struct pn_firmware_version +{ + uint8_t ic; + uint8_t ver; + uint8_t rev; + uint8_t support; +}; + +struct pn532_dev_s +{ + uint8_t state; + FAR struct spi_dev_s *spi; /* SPI interface */ + FAR struct pn532_config_s *config; /* Board configuration data */ +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +bool pn532_set_config(struct pn532_dev_s *dev, uint8_t flags); + +#endif /* __DRIVERS_CONTACTLESS_PN532_H */ From c025ffc3c3ca618b2577c8dd57ce536b28f307b5 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:22:10 +0200 Subject: [PATCH 165/214] contactless: spi device --- include/nuttx/spi/spi.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/nuttx/spi/spi.h b/include/nuttx/spi/spi.h index 578738108e1..2a48bc92e39 100644 --- a/include/nuttx/spi/spi.h +++ b/include/nuttx/spi/spi.h @@ -451,6 +451,7 @@ enum spi_dev_e SPIDEV_BAROMETER, /* Select SPI Pressure/Barometer device */ SPIDEV_TEMPERATURE, /* Select SPI Temperature sensor device */ SPIDEV_IEEE802154, /* Select SPI IEEE 802.15.4 wireless device */ + SPIDEV_CONTACTLESS, /* Select SPI Contactless device */ SPIDEV_USER /* Board-specific values start here */ }; From e5ba71caf8c5b4d518d6f5c798925a36fa6bf513 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:24:19 +0200 Subject: [PATCH 166/214] add cl kconfig --- drivers/contactless/Kconfig | 69 +++++++++++++++++++++++++++++++++++ drivers/contactless/mfrc522.c | 2 +- 2 files changed, 70 insertions(+), 1 deletion(-) create mode 100644 drivers/contactless/Kconfig diff --git a/drivers/contactless/Kconfig b/drivers/contactless/Kconfig new file mode 100644 index 00000000000..b26177eb9cb --- /dev/null +++ b/drivers/contactless/Kconfig @@ -0,0 +1,69 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if DRIVERS_CONTACTLESS + +config CL_MFRC522 + bool "NXP MFRC522 ISO14443/Mifare Transceiver" + default n + select SPI + ---help--- + This options adds driver support for the MFRC522 ISO14443/Mifare chip. + +if CL_MFRC522 + +config MFRC522_SPI_FREQ + int "SPI frequency for MFRC522" + default 1000000 + depends on CL_MFRC522 + +config CL_MFRC522_DEBUG + bool "Enable MFRC522 debug" + default n + depends on CL_MFRC522 + +config CL_MFRC522_DEBUG_TX + bool "trace TX frames" + default n + depends on MFRC522_DEBUG + +config CL_MFRC522_DEBUG_RX + bool "trace RX frames" + default n + depends on MFRC522_DEBUG + +endif # CL_MFRC522 + +config CL_PN532 + bool "pn532 NFC-chip support" + default n + select SPI + ---help--- + This options adds driver support for the PN532 NFC chip. + +if CL_PN532 + +config PN532_SPI_FREQ + int "SPI frequency for PN532" + default 1000000 + depends on CL_PN532 + +config CL_PN532_DEBUG + bool "Enable PN532 debug" + default n + depends on CL_PN532 + +config CL_PN532_DEBUG_TX + bool "trace TX frames" + default n + depends on CL_PN532_DEBUG + +config CL_PN532_DEBUG_RX + bool "trace RX frames" + default n + depends on CL_PN532_DEBUG + +endif # CL_PN532 +endif # DRIVERS_CONTACTLESS diff --git a/drivers/contactless/mfrc522.c b/drivers/contactless/mfrc522.c index 5148aeac935..9c5cd43c43d 100644 --- a/drivers/contactless/mfrc522.c +++ b/drivers/contactless/mfrc522.c @@ -153,7 +153,7 @@ static void mfrc522_lock(FAR struct spi_dev_s *spi) SPI_SETMODE(spi, SPIDEV_MODE0); SPI_SETBITS(spi, 8); (void)SPI_HWFEATURES(spi, 0); - (void)SPI_SETFREQUENCY(spi, CONFIG_CL_MFRC522_SPI_FREQ); + (void)SPI_SETFREQUENCY(spi, CONFIG_MFRC522_SPI_FREQ); } static void mfrc522_unlock(FAR struct spi_dev_s *spi) From 90568f9e8fe3846bf4ba62f38ff79d2b96b4b5c9 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:25:21 +0200 Subject: [PATCH 167/214] Add CL make.defs --- drivers/contactless/Make.defs | 53 +++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 drivers/contactless/Make.defs diff --git a/drivers/contactless/Make.defs b/drivers/contactless/Make.defs new file mode 100644 index 00000000000..a678f826c35 --- /dev/null +++ b/drivers/contactless/Make.defs @@ -0,0 +1,53 @@ +############################################################################ +# drivers/contactless/Make.defs +# +# Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +ifeq ($(CONFIG_DRIVERS_CONTACTLESS),y) + +# Include contactless drivers + +ifeq ($(CONFIG_WL_MFRC522),y) +CSRCS += mfrc522.c +endif + +ifeq ($(CONFIG_WL_PN532),y) +CSRCS += pn532.c +endif + +# Include contactless devices build support + +DEPPATH += --dep-path contactless +VPATH += :contactless +CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)contactless} +endif From d4048f3eeb7ff3e536e9db1107a41e625e28e2f3 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:41:49 +0200 Subject: [PATCH 168/214] CL fixes --- drivers/Makefile | 1 + drivers/contactless/Make.defs | 4 +- drivers/contactless/mfrc522.c | 4 +- include/nuttx/drivers/contactless.h | 67 +++++++++++++++++++++++++++++ 4 files changed, 72 insertions(+), 4 deletions(-) create mode 100644 include/nuttx/drivers/contactless.h diff --git a/drivers/Makefile b/drivers/Makefile index fefb6a718b5..daac4cd18c1 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -76,6 +76,7 @@ include usbhost$(DELIM)Make.defs include usbmonitor$(DELIM)Make.defs include video$(DELIM)Make.defs include wireless$(DELIM)Make.defs +include contactless$(DELIM)Make.defs ifneq ($(CONFIG_NFILE_DESCRIPTORS),0) CSRCS += dev_null.c dev_zero.c diff --git a/drivers/contactless/Make.defs b/drivers/contactless/Make.defs index a678f826c35..0df7134d88e 100644 --- a/drivers/contactless/Make.defs +++ b/drivers/contactless/Make.defs @@ -37,11 +37,11 @@ ifeq ($(CONFIG_DRIVERS_CONTACTLESS),y) # Include contactless drivers -ifeq ($(CONFIG_WL_MFRC522),y) +ifeq ($(CONFIG_CL_MFRC522),y) CSRCS += mfrc522.c endif -ifeq ($(CONFIG_WL_PN532),y) +ifeq ($(CONFIG_CL_PN532),y) CSRCS += pn532.c endif diff --git a/drivers/contactless/mfrc522.c b/drivers/contactless/mfrc522.c index 9c5cd43c43d..b0c1a786df7 100644 --- a/drivers/contactless/mfrc522.c +++ b/drivers/contactless/mfrc522.c @@ -50,7 +50,7 @@ #include #include -#include +#include #include "mfrc522.h" @@ -168,7 +168,7 @@ static inline void mfrc522_configspi(FAR struct spi_dev_s *spi) SPI_SETMODE(spi, SPIDEV_MODE0); SPI_SETBITS(spi, 8); (void)SPI_HWFEATURES(spi, 0); - (void)SPI_SETFREQUENCY(spi, CONFIG_CL_MFRC522_SPI_FREQ); + (void)SPI_SETFREQUENCY(spi, CONFIG_MFRC522_SPI_FREQ); } static inline void mfrc522_select(struct mfrc522_dev_s *dev) diff --git a/include/nuttx/drivers/contactless.h b/include/nuttx/drivers/contactless.h new file mode 100644 index 00000000000..b5beaf56b12 --- /dev/null +++ b/include/nuttx/drivers/contactless.h @@ -0,0 +1,67 @@ +/************************************************************************************ + * include/nuttx/contactless/contactless.h + * + * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. + * Author: Laurent Latil + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/* This file includes common definitions to be used in all contactless drivers + * (when applicable). + */ + +#ifndef __INCLUDE_NUTTX_DRIVERS_CONTACTLESS_H +#define __INCLUDE_NUTTX_DRIVERS_CONTACTLESS_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#ifdef CONFIG_DRIVERS_CONTACTLESS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* IOCTL Commands *******************************************************************/ + +/* Contactless drivers can provide additional, device specific ioctl + * commands, beginning with this value: + */ + +#define CLIOC_USER 0x0001 /* Lowest, unused CL ioctl command */ + +#define _CLIOC_USER(nr) _CLIOC(nr + CLIOC_USER) + +#endif + +#endif /* __INCLUDE_NUTTX_CONTACTLESS_H */ From 1d1affdd2ba3eec4e2038d354d6f220363ed5e99 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:46:27 +0200 Subject: [PATCH 169/214] fix mfrc522 --- drivers/contactless/mfrc522.c | 1 + drivers/contactless/pn532.c | 2 +- include/nuttx/contactless/mfrc522.h | 116 ++++++++++++++++++++++++++++ include/nuttx/drivers/contactless.h | 2 +- 4 files changed, 119 insertions(+), 2 deletions(-) create mode 100644 include/nuttx/contactless/mfrc522.h diff --git a/drivers/contactless/mfrc522.c b/drivers/contactless/mfrc522.c index b0c1a786df7..01a7c309841 100644 --- a/drivers/contactless/mfrc522.c +++ b/drivers/contactless/mfrc522.c @@ -51,6 +51,7 @@ #include #include +#include #include "mfrc522.h" diff --git a/drivers/contactless/pn532.c b/drivers/contactless/pn532.c index 0f17f4c315e..c40ba71fcac 100644 --- a/drivers/contactless/pn532.c +++ b/drivers/contactless/pn532.c @@ -48,7 +48,7 @@ #include #include -#include +#include #include "pn532.h" diff --git a/include/nuttx/contactless/mfrc522.h b/include/nuttx/contactless/mfrc522.h new file mode 100644 index 00000000000..6fe3d6847c7 --- /dev/null +++ b/include/nuttx/contactless/mfrc522.h @@ -0,0 +1,116 @@ +/**************************************************************************** + * include/wireless/mfrc522.h + * + * Copyright(C) 2016 Uniquix Ltda. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_WIRELESS_MFRC522_H +#define __INCLUDE_NUTTX_WIRELESS_MFRC522_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +#define MFRC522_MIFARE_ISO14443A (0x00) + +/* IOCTL Commands ***********************************************************/ + +#define MFRC522IOC_GET_PICC_UID _CLIOC_USER(0x0001) +#define MFRC522IOC_GET_STATE _CLIOC_USER(0x0002) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +enum mfrc522_state_e +{ + MFRC522_STATE_NOT_INIT, + MFRC522_STATE_IDLE, + MFRC522_STATE_CMD_SENT, + MFRC522_STATE_DATA_READY, +}; + +struct mfrc522_dev_s; + +struct picc_uid_s +{ + uint8_t size; /* Number of bytes in the UID. 4, 7 or 10 */ + uint8_t uid_data[10]; + uint8_t sak; /* The SAK (Select Acknowledge) return by the PICC */ +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: mfrc522_register + * + * Description: + * Register the MFRC522 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/rfid0" + * spi - An instance of the SPI interface to use to communicate with MFRC522 + * config - Device persistent board data + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int mfrc522_register(FAR const char *devpath, FAR struct spi_dev_s *spi); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_WIRELESS_MFRC522_H */ diff --git a/include/nuttx/drivers/contactless.h b/include/nuttx/drivers/contactless.h index b5beaf56b12..8a887480e1f 100644 --- a/include/nuttx/drivers/contactless.h +++ b/include/nuttx/drivers/contactless.h @@ -58,7 +58,7 @@ * commands, beginning with this value: */ -#define CLIOC_USER 0x0001 /* Lowest, unused CL ioctl command */ +#define CLIOC_USER 0x0003 /* Lowest, unused CL ioctl command */ #define _CLIOC_USER(nr) _CLIOC(nr + CLIOC_USER) From a17059503ec93a6b0c5beba994cbd0c3d2e139a1 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:50:03 +0200 Subject: [PATCH 170/214] fix pn532 --- include/nuttx/contactless/pn532.h | 165 ++++++++++++++++++++++++++++ include/nuttx/drivers/contactless.h | 2 +- 2 files changed, 166 insertions(+), 1 deletion(-) create mode 100644 include/nuttx/contactless/pn532.h diff --git a/include/nuttx/contactless/pn532.h b/include/nuttx/contactless/pn532.h new file mode 100644 index 00000000000..1eb39399a8b --- /dev/null +++ b/include/nuttx/contactless/pn532.h @@ -0,0 +1,165 @@ +/**************************************************************************** + * include/wireless/pn532.h + * + * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. + * Authors: Janne Rosberg + * Teemu Pirinen + * Juho Grundström + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_WIRELESS_PN532_H +#define __INCLUDE_NUTTX_WIRELESS_PN532_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +#define PN532_MIFARE_ISO14443A (0x00) + +/* IOCTL Commands ***********************************************************/ + +#define PN532IOC_SET_SAM_CONF _CLIOC_USER(0x0001) +#define PN532IOC_READ_PASSIVE _CLIOC_USER(0x0002) +#define PN532IOC_SET_RF_CONF _CLIOC_USER(0x0003) +#define PN532IOC_SEND_CMD_READ_PASSIVE _CLIOC_USER(0x0004) +#define PN532IOC_GET_DATA_READY _CLIOC_USER(0x0005) +#define PN532IOC_GET_TAG_ID _CLIOC_USER(0x0006) +#define PN532IOC_GET_STATE _CLIOC_USER(0x0007) +#define PN532IOC_READ_TAG_DATA _CLIOC_USER(0x0008) +#define PN532IOC_WRITE_TAG_DATA _CLIOC_USER(0x0009) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +enum pn532_state_e +{ + PN532_STATE_NOT_INIT, + PN532_STATE_IDLE, + PN532_STATE_CMD_SENT, + PN532_STATE_DATA_READY, +}; + +struct pn532_dev_s; +struct pn532_config_s +{ + int (*reset)(uint8_t enable); + + /* External CS, if NULL then SPIDEV_WIRELESS CS is used */ + + int (*select)(struct pn532_dev_s *dev, bool sel); + int (*irqattach)(void* dev, xcpt_t isr); +}; + +enum PN_SAM_MODE +{ + PN_SAM_NORMAL_MODE = 0x01, + PN_SAM_VIRTUAL_CARD, + PN_SAM_WIRED_CARD, + SAM_DUAL_CARD +}; + +struct pn_sam_settings_s +{ + enum PN_SAM_MODE mode; /* Mode */ + uint8_t timeout; /* Timeout: LSB=50ms 0x14*50ms = 1sec */ + uint8_t irq_en; /* If 1 - enable P-70, IRQ */ +}; + +enum PN_RF_CONFIG_ITEM +{ + PN_RF_CONFIG_RF_FIELD = 0x01, + PN_RF_CONFIG_VARIOUS_TIMINGS = 0x02, + + PN_RF_CONFIG_ITEM_ANALOG_106A = 0x0A, + PN_RF_CONFIG_ITEM_ANALOG_212 = 0x0B, +}; + +struct pn_rf_config_s +{ + uint8_t cfg_item; /* Item */ + uint8_t data_size; /* number of config items */ + uint8_t config[11]; /* Item config data */ +}; + +struct pn_mifare_tag_data_s +{ + uint32_t data; + uint8_t address; +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: pn532_register + * + * Description: + * Register the PN532 character device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/nfc0" + * spi - An instance of the SPI interface to use to communicate with PN532 + * config - Device persistent board data + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi, + FAR struct pn532_config_s *config); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_WIRELESS_PN532_H */ diff --git a/include/nuttx/drivers/contactless.h b/include/nuttx/drivers/contactless.h index 8a887480e1f..b20163a969b 100644 --- a/include/nuttx/drivers/contactless.h +++ b/include/nuttx/drivers/contactless.h @@ -58,7 +58,7 @@ * commands, beginning with this value: */ -#define CLIOC_USER 0x0003 /* Lowest, unused CL ioctl command */ +#define CLIOC_USER 0x000A /* Lowest, unused CL ioctl command */ #define _CLIOC_USER(nr) _CLIOC(nr + CLIOC_USER) From 947639cbd542995682777083bb84fdf599b8dfb0 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 31 Aug 2016 13:57:23 +0200 Subject: [PATCH 171/214] fix alan's board with mfrc support --- configs/stm32f103-minimum/src/stm32_mfrc522.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/stm32f103-minimum/src/stm32_mfrc522.c b/configs/stm32f103-minimum/src/stm32_mfrc522.c index b3bc776ef7b..d55842eca7f 100644 --- a/configs/stm32f103-minimum/src/stm32_mfrc522.c +++ b/configs/stm32f103-minimum/src/stm32_mfrc522.c @@ -43,13 +43,13 @@ #include #include -#include +#include #include "stm32.h" #include "stm32_spi.h" #include "stm32f103_minimum.h" -#if defined(CONFIG_SPI) && defined(CONFIG_STM32_SPI1) && defined(CONFIG_WL_MFRC522) +#if defined(CONFIG_SPI) && defined(CONFIG_STM32_SPI1) && defined(CONFIG_CL_MFRC522) /************************************************************************************ * Pre-processor Definitions From cb7c1c1f147418e80cc735185dc30230df312b40 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 07:56:27 -0600 Subject: [PATCH 172/214] USB host composite: Add an option to permit support only a subset of the composite intefaces. --- drivers/usbhost/Kconfig | 10 ++++++++++ drivers/usbhost/usbhost_composite.c | 4 ++++ 2 files changed, 14 insertions(+) diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig index 021dababb63..7b225defd08 100644 --- a/drivers/usbhost/Kconfig +++ b/drivers/usbhost/Kconfig @@ -87,6 +87,16 @@ config USBHOST_COMPOSITE NOTE: This feature is marked EXPERIMENTAL because it has not been untested +config USBHOST_COMPOSITE_STRICT + bool "Strict composite membership" + default n + depends on USBHOST_COMPOSITE + ---help--- + If selected, then the composite device will not be enumerated unless + every member class in the composite is supported. If not selected + then, for example, you could use the CDC/ACM interface of the device + with not support for the other interfaces. + config USBHOST_MSC bool "Mass Storage Class Support" default n diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index b2da8a9e276..d0b294d74cf 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -771,8 +771,12 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, if (reg == NULL) { uerr("ERROR: usbhost_findclass failed\n"); +#ifdef CONFIG_USBHOST_COMPOSITE_STRICT ret = -EINVAL; goto errout_with_cfgbuffer; +#else + continue; +#endif } /* Yes.. there is a class for this device. Get an instance of its From 7b75a32ca1ba4c187d33a6fcbba7d180c52be15a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 08:16:12 -0600 Subject: [PATCH 173/214] Improve some comments --- drivers/usbhost/usbhost_composite.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index d0b294d74cf..67a2c42426e 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -579,7 +579,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Check for IAD descriptors that will be used when it is * necessary to associate multiple interfaces with a single - * device. + * class driver. */ else if (desc->type == USB_DESC_TYPE_INTERFACEASSOCIATION) @@ -587,7 +587,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR struct usb_iaddesc_s *iad = (FAR struct usb_iaddesc_s *)desc; uint32_t mask; - /* Keep count of the number ofinterfaces that will be merged */ + /* Keep count of the number of interfaces that will be merged */ nmerged += (iad->nifs - 1); @@ -625,7 +625,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, * number of interfaces merged via the IAD descriptor. */ - if (nintfs <= nmerged ) + if (nintfs <= nmerged) { /* Should not happen. Means a bug. */ @@ -743,8 +743,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, DEBUGASSERT(i == nclasses); - /* Allocate a large buffer in which we can construct a custom configuration - * descriptor for each member class. + /* Allocate a temporary buffer in which we can construct a custom + * configuration descriptor for each member class. */ cfgbuffer = (FAR uint8_t *)malloc(CUSTOM_CONFIG_BUFSIZE); @@ -804,9 +804,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, } /* Call the newly instantiated classes connect() method provide it - * with the information that it needs to initialize properly, that - * is the configuration escriptor and all of the interface descriptors - * needed by the member class. + * with the configuration information that it needs to initialize + * properly. */ ret = CLASS_CONNECT(member->usbclass, cfgbuffer, cfgsize); @@ -821,6 +820,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, } } + /* Free the temporary buffer */ + kmm_free(cfgbuffer); /* Return our USB class structure */ From 4b0e8e56cfef3ccfeecd27aae6d27cf63f4915d9 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 10:58:08 -0600 Subject: [PATCH 174/214] Add contactless/ directory to Documentation --- Documentation/NuttxPortingGuide.html | 113 ++++++++++++++++++++++++--- drivers/README.txt | 5 ++ 2 files changed, 109 insertions(+), 9 deletions(-) diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html index bf32596fef0..cf7c53dba90 100644 --- a/Documentation/NuttxPortingGuide.html +++ b/Documentation/NuttxPortingGuide.html @@ -12,7 +12,7 @@

NuttX RTOS Porting Guide

-

Last Updated: June 22, 2016

+

Last Updated: August 31, 2016
@@ -948,22 +948,46 @@ drivers/ | |-- Kconfig | |-- Make.defs | `-- (Common ADC and DAC driver source files) +|-- audio/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common audio device source files) |-- bch/ | |-- Kconfig | |-- Make.defs | `-- (bch driver source files) +|-- contactless/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common contactless device driver source files) |-- input/ | |-- Kconfig | |-- Make.defs | `-- (Common touchscreen and keypad driver source files) +|-- ioexpander/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common I/O expander and GPIO-related driver source files) |-- lcd/ | |-- Kconfig | |-- Make.defs | `-- (Common LCD driver source files) +|-- leds/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common LED device driver source files) +|-- loop/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common loop device driver source files) |-- mmcsd/ | |-- Kconfig | |-- Make.defs | `-- (Common MMC/SD card driver source files) +|-- modem/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common modem driver source files) |-- mtd/ | |-- Kconfig | |-- Make.defs @@ -972,11 +996,19 @@ drivers/ | |-- Kconfig | |-- Make.defs | `-- (Common network driver source files) +|-- pipes/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common pipe and FIFO driver source files) +|-- power/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common power-related driver source files) |-- sensors/ | |-- Kconfig | |-- Make.defs | `-- (Common sensor driver source files) -|-- serial/ +|-- sercomm/ | |-- Kconfig | |-- Make.defs | `-- (Files for the Calypso SERCOMM driver) @@ -984,6 +1016,18 @@ drivers/ | |-- Kconfig | |-- Make.defs | `-- (Common front-end character drivers for chip-specific UARTs) +|-- spi/ +| |-- Kconfig +| |-- Make.defs +| `-- (Common SPI-related drivers and helper fuctions) +|-- syslog/ +| |-- Kconfig +| |-- Make.defs +| `-- (System logging device support) +|-- timers/ +| |-- Kconfig +| |-- Make.defs +| `-- (Timer-based device driver support) |-- usbdev/ | |-- Kconfig | |-- Make.defs @@ -992,6 +1036,10 @@ drivers/ | |-- Kconfig | |-- Make.defs | `-- (Common USB host driver source files) +|-- usbmonitor/ +| |-- Kconfig +| |-- Make.defs +| `-- (USB monitor source files) |-- wireless/ | |-- Kconfig | |-- Make.defs @@ -1085,19 +1133,35 @@ include/ | |-analog/ | | `-- (Analog driver header files) | |-audio/ -| | `-- (Audio driver header files) +| | `-- (Contactless driver header files) | |-binfmt/ | | `-- (Binary format header files) +| |-contactless/ +| | `-- (Audio driver header files) +| |-crypto/ +| | `-- (Cryptographic support header files) +| |-drivers/ +| | `-- (Miscellaneous driver header files) +| |-eeprom/ +| | `-- (EEPROM driver header files) | |-fs/ | | `-- (File System header files) | |-input/ | | `-- (Input device driver header files) +| |-ioexpander/ +| | `-- (I/O exander and GPIO drvier header files) | |-lcd/ | | `-- (LCD driver header files) +| |-leds/ +| | `-- (LED driver header files) +| |-lib/ +| | `-- (Non-standard C library driver header files) +| |-mm/ +| | `-- (Memory management header files) +| |-modem/ +| | `-- (Modem driver header files) | |-mtd/ | | `-- (Memory technology device header files) -| |-serial/ -| | `-- (Serial driver header files) | |-net/ | | `-- (Networking header files) | |-nx/ @@ -1114,8 +1178,12 @@ include/ | | `-- (SPI driver header files) | |-syslog/ | | `-- (SYSLOG header files) +| |-timers/ +| | `-- (Timer-related driver header files) | |-usb/ | | `-- (USB driver header files) +| |-video/ +| | `-- (Video-related driver header files) | `-wireless/ | `-- (Wireless device driver header files) `- sys/ @@ -1148,16 +1216,28 @@ include/ 

     libc/
+|-- aio/
+|   `-- (Implementation of functions from aio.h)
+|-- audio/
+|   `-- (Implementation of audio-related functions)
+|-- dirent/
+|   `-- (Implementation of functions from dirent.h)
+|-- fixedmath/
+|   `-- (Implementation of functions from fixedmath.h)
+|-- hex2bin/
+|   `-- (Implementation of functions from hex2bin.h)
 |-- libgen/
 |   `-- (Implementation of functions from libgen.h)
 |-- math/
 |   `-- (Implementation of functions from fixedmath.h)
 |-- misc/
 |   `-- (Implementation of miscellaneous library functions)
-|-- mqueue/
-|   `-- (Implementation of some functions from mqueue.h)
 |-- net/
 |   `-- (Implementation of network-related library functions)
+|-- netdb/
+|   `-- (Implementation of functions from netdb.h)
+|-- pthread/
+|   `-- (Implementation of functions from pthread.h)
 |-- queue/
 |   `-- (Implementation of functions from queue.h)
 |-- sched/
@@ -1166,16 +1246,31 @@ libc/
 |   `-- (Implementation of some functions from semaphore.h)
 |-- signal/
 |   `-- (Implementation of some functions from signal.h)
+|-- spawn/
+|   `-- (Implementation of some functions from spawn.h)
 |-- stdio/
 |   `-- (Implementation of functions from stdio.h)
 |-- stdlib/
 |   `-- (Implementation of functions from stdlib.h)
 |-- string/
 |   `-- (Implementation of functions from string.h)
+|-- symtab/
+|   `-- (Implementation of symbol-table library functions)
+|-- syslog/
+|   `-- (Implementation of functions from syslog.h)
+|-- termios/
+|   `-- (Implementation of functions from termios.h)
 |-- time/
 |   `-- (Implementation of some functions from time.h)
-`-- unistd/
-    `-- (Implementation of some functions from unistd.h)
+|-- tls/
+|   `-- (Implementation of some functions from tls.h)
+|-- wqueue/
+|   `-- (Implementation of some functions from wqueue.h)
+|-- unistd/
+|   `-- (Implementation of some functions from unistd.h)
+`-- zoneinfo/
+    `-- (Implementation of timezone database)
+

2.13 nuttx/libxx

diff --git a/drivers/README.txt b/drivers/README.txt index a76c0e3434f..fbb13ce25d7 100644 --- a/drivers/README.txt +++ b/drivers/README.txt @@ -55,6 +55,11 @@ bch/ performed by loop.c. See include/nuttx/fs/fs.h for registration information. +contactless/ + Contactless devices are related to wireless devices. They are not + communication devices with other similar peers, but couplers/interfaces + to contactless cards and tags. + eeprom/ An EEPROM is a form of Memory Technology Device (see drivers/mtd). EEPROMs are non-volatile memory like FLASH, but differ in underlying From 7ea963259246c8da015d996a0411c23577c7b87b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 11:30:22 -0600 Subject: [PATCH 175/214] Change the way that contactless IOCTL commands are defined. All IOCTL commands must be unique. --- drivers/contactless/mfrc522.c | 1 - drivers/contactless/pn532.c | 1 - drivers/usbhost/Kconfig | 2 +- include/nuttx/contactless/ioctl.h | 93 +++++++++++++++++++++++++++++ include/nuttx/contactless/mfrc522.h | 18 +++--- include/nuttx/contactless/pn532.h | 21 ++----- include/nuttx/drivers/contactless.h | 67 --------------------- include/nuttx/fs/ioctl.h | 22 +++---- 8 files changed, 117 insertions(+), 108 deletions(-) create mode 100644 include/nuttx/contactless/ioctl.h delete mode 100644 include/nuttx/drivers/contactless.h diff --git a/drivers/contactless/mfrc522.c b/drivers/contactless/mfrc522.c index 01a7c309841..804ea0fa4b6 100644 --- a/drivers/contactless/mfrc522.c +++ b/drivers/contactless/mfrc522.c @@ -50,7 +50,6 @@ #include #include -#include #include #include "mfrc522.h" diff --git a/drivers/contactless/pn532.c b/drivers/contactless/pn532.c index c40ba71fcac..a7b21131810 100644 --- a/drivers/contactless/pn532.c +++ b/drivers/contactless/pn532.c @@ -48,7 +48,6 @@ #include #include -#include #include "pn532.h" diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig index 7b225defd08..6c139e2a89c 100644 --- a/drivers/usbhost/Kconfig +++ b/drivers/usbhost/Kconfig @@ -95,7 +95,7 @@ config USBHOST_COMPOSITE_STRICT If selected, then the composite device will not be enumerated unless every member class in the composite is supported. If not selected then, for example, you could use the CDC/ACM interface of the device - with not support for the other interfaces. + with no support for the other interfaces. config USBHOST_MSC bool "Mass Storage Class Support" diff --git a/include/nuttx/contactless/ioctl.h b/include/nuttx/contactless/ioctl.h new file mode 100644 index 00000000000..7ec5b12eae3 --- /dev/null +++ b/include/nuttx/contactless/ioctl.h @@ -0,0 +1,93 @@ +/**************************************************************************** + * include/wireless/ioclt.h + * + * Copyright(C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_CONTACTLESS_IOCTL_H +#define __INCLUDE_NUTTX_CONTACTLESS_IOCTL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/* MFRC522 IOCTL Commands ***************************************************/ + +#define MFRC522IOC_GET_PICC_UID _CLIOC(0x0001) +#define MFRC522IOC_GET_STATE _CLIOC(0x0002) + +/* PN532 IOCTL Commands *****************************************************/ + +#define PN532IOC_SET_SAM_CONF _CLIOC(0x0003) +#define PN532IOC_READ_PASSIVE _CLIOC(0x0004) +#define PN532IOC_SET_RF_CONF _CLIOC(0x0005) +#define PN532IOC_SEND_CMD_READ_PASSIVE _CLIOC(0x0006) +#define PN532IOC_GET_DATA_READY _CLIOC(0x0007) +#define PN532IOC_GET_TAG_ID _CLIOC(0x0008) +#define PN532IOC_GET_STATE _CLIOC(0x0009) +#define PN532IOC_READ_TAG_DATA _CLIOC(0x000a) +#define PN532IOC_WRITE_TAG_DATA _CLIOC(0x000b) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_CONTACTLESS_IOCTL_H */ diff --git a/include/nuttx/contactless/mfrc522.h b/include/nuttx/contactless/mfrc522.h index 6fe3d6847c7..f4e8c2ae51b 100644 --- a/include/nuttx/contactless/mfrc522.h +++ b/include/nuttx/contactless/mfrc522.h @@ -33,18 +33,19 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_WIRELESS_MFRC522_H -#define __INCLUDE_NUTTX_WIRELESS_MFRC522_H +#ifndef __INCLUDE_NUTTX_CONTACTLESS_MFRC522_H +#define __INCLUDE_NUTTX_CONTACTLESS_MFRC522_H /**************************************************************************** * Included Files ****************************************************************************/ #include -#include -#include #include -#include + +#include +#include +#include /**************************************************************************** * Pre-Processor Definitions @@ -52,11 +53,6 @@ #define MFRC522_MIFARE_ISO14443A (0x00) -/* IOCTL Commands ***********************************************************/ - -#define MFRC522IOC_GET_PICC_UID _CLIOC_USER(0x0001) -#define MFRC522IOC_GET_STATE _CLIOC_USER(0x0002) - /**************************************************************************** * Public Types ****************************************************************************/ @@ -113,4 +109,4 @@ int mfrc522_register(FAR const char *devpath, FAR struct spi_dev_s *spi); } #endif -#endif /* __INCLUDE_NUTTX_WIRELESS_MFRC522_H */ +#endif /* __INCLUDE_NUTTX_CONTACTLESS_MFRC522_H */ diff --git a/include/nuttx/contactless/pn532.h b/include/nuttx/contactless/pn532.h index 1eb39399a8b..51b71d49448 100644 --- a/include/nuttx/contactless/pn532.h +++ b/include/nuttx/contactless/pn532.h @@ -35,8 +35,8 @@ * ****************************************************************************/ -#ifndef __INCLUDE_NUTTX_WIRELESS_PN532_H -#define __INCLUDE_NUTTX_WIRELESS_PN532_H +#ifndef __INCLUDE_NUTTX_CONTACTLESS_PN532_H +#define __INCLUDE_NUTTX_CONTACTLESS_PN532_H /**************************************************************************** * Included Files @@ -46,7 +46,8 @@ #include #include #include -#include + +#include /**************************************************************************** * Pre-Processor Definitions @@ -54,18 +55,6 @@ #define PN532_MIFARE_ISO14443A (0x00) -/* IOCTL Commands ***********************************************************/ - -#define PN532IOC_SET_SAM_CONF _CLIOC_USER(0x0001) -#define PN532IOC_READ_PASSIVE _CLIOC_USER(0x0002) -#define PN532IOC_SET_RF_CONF _CLIOC_USER(0x0003) -#define PN532IOC_SEND_CMD_READ_PASSIVE _CLIOC_USER(0x0004) -#define PN532IOC_GET_DATA_READY _CLIOC_USER(0x0005) -#define PN532IOC_GET_TAG_ID _CLIOC_USER(0x0006) -#define PN532IOC_GET_STATE _CLIOC_USER(0x0007) -#define PN532IOC_READ_TAG_DATA _CLIOC_USER(0x0008) -#define PN532IOC_WRITE_TAG_DATA _CLIOC_USER(0x0009) - /**************************************************************************** * Public Types ****************************************************************************/ @@ -162,4 +151,4 @@ int pn532_register(FAR const char *devpath, FAR struct spi_dev_s *spi, } #endif -#endif /* __INCLUDE_NUTTX_WIRELESS_PN532_H */ +#endif /* __INCLUDE_NUTTX_CONTACTLESS_PN532_H */ diff --git a/include/nuttx/drivers/contactless.h b/include/nuttx/drivers/contactless.h deleted file mode 100644 index b20163a969b..00000000000 --- a/include/nuttx/drivers/contactless.h +++ /dev/null @@ -1,67 +0,0 @@ -/************************************************************************************ - * include/nuttx/contactless/contactless.h - * - * Copyright (C) 2011-2013 Gregory Nutt. All rights reserved. - * Author: Laurent Latil - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -/* This file includes common definitions to be used in all contactless drivers - * (when applicable). - */ - -#ifndef __INCLUDE_NUTTX_DRIVERS_CONTACTLESS_H -#define __INCLUDE_NUTTX_DRIVERS_CONTACTLESS_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include -#include - -#ifdef CONFIG_DRIVERS_CONTACTLESS - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ -/* IOCTL Commands *******************************************************************/ - -/* Contactless drivers can provide additional, device specific ioctl - * commands, beginning with this value: - */ - -#define CLIOC_USER 0x000A /* Lowest, unused CL ioctl command */ - -#define _CLIOC_USER(nr) _CLIOC(nr + CLIOC_USER) - -#endif - -#endif /* __INCLUDE_NUTTX_CONTACTLESS_H */ diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index 3e7c183eb17..29f6f71a90d 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -361,8 +361,8 @@ /* User LED driver ioctl definitions ****************************************/ /* (see nuttx/leds/usersled.h */ -#define _ULEDIOCVALID(c) (_IOC_TYPE(c)==_ULEDBASE) -#define _ULEDIOC(nr) _IOC(_ULEDBASE,nr) +#define _ULEDIOCVALID(c) (_IOC_TYPE(c)==_ULEDBASE) +#define _ULEDIOC(nr) _IOC(_ULEDBASE,nr) /* Zero Cross driver ioctl definitions **************************************/ /* (see nuttx/include/sensor/zerocross.h */ @@ -379,29 +379,29 @@ /* Modem driver ioctl definitions ********************************************/ /* see nuttx/include/modem/*.h */ -#define _MODEMIOCVALID(c) (_IOC_TYPE(c)==_MODEMBASE) -#define _MODEMIOC(nr) _IOC(_MODEMBASE,nr) +#define _MODEMIOCVALID(c) (_IOC_TYPE(c)==_MODEMBASE) +#define _MODEMIOC(nr) _IOC(_MODEMBASE,nr) /* I2C driver ioctl definitions **********************************************/ /* see nuttx/include/i2c/i2c_master.h */ -#define _I2CIOCVALID(c) (_IOC_TYPE(c)==_I2CBASE) -#define _I2CIOC(nr) _IOC(_I2CBASE,nr) +#define _I2CIOCVALID(c) (_IOC_TYPE(c)==_I2CBASE) +#define _I2CIOC(nr) _IOC(_I2CBASE,nr) /* SPI driver ioctl definitions **********************************************/ /* see nuttx/include/spi/spi_transfer.h */ -#define _SPIIOCVALID(c) (_IOC_TYPE(c)==_SPIBASE) -#define _SPIIOC(nr) _IOC(_SPIBASE,nr) +#define _SPIIOCVALID(c) (_IOC_TYPE(c)==_SPIBASE) +#define _SPIIOC(nr) _IOC(_SPIBASE,nr) /* GPIO driver command definitions ******************************************/ /* see nuttx/include/ioexpander/gpio.h */ -#define _GPIOCVALID(c) (_IOC_TYPE(c)==_GPIOBASE) -#define _GPIOC(nr) _IOC(_GPIOBASE,nr) +#define _GPIOCVALID(c) (_IOC_TYPE(c)==_GPIOBASE) +#define _GPIOC(nr) _IOC(_GPIOBASE,nr) /* Contactless driver ioctl definitions ****************************************/ -/* (see nuttx/include/contactless/contactless.h */ +/* (see nuttx/include/contactless/ioctl.h */ #define _CLIOCVALID(c) (_IOC_TYPE(c)==_CLIOCBASE) #define _CLIOC(nr) _IOC(_CLIOCBASE,nr) From 1431dcd8d5191c45e52d0b8b66248b59cb22bf17 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 12:25:50 -0600 Subject: [PATCH 176/214] Fix some bad file inclusions in last commit --- include/nuttx/contactless/ioctl.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/include/nuttx/contactless/ioctl.h b/include/nuttx/contactless/ioctl.h index 7ec5b12eae3..ba4b45ee2d5 100644 --- a/include/nuttx/contactless/ioctl.h +++ b/include/nuttx/contactless/ioctl.h @@ -41,11 +41,7 @@ ****************************************************************************/ #include -#include - -#include -#include -#include +#include /**************************************************************************** * Pre-Processor Definitions From ebe829c4b9d756d7f8a137ea64839e75a21ffa75 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 13:24:38 -0600 Subject: [PATCH 177/214] USB host composite: A test should be <= not just < --- drivers/usbhost/usbhost_composite.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 67a2c42426e..6e372cb686b 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -560,7 +560,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, desc = (FAR struct usb_desc_s *)&configdesc[offset]; int len = desc->len; - if (offset + len < desclen) + if (offset + len <= desclen) { /* Is this an interface descriptor? */ @@ -673,7 +673,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, desc = (FAR struct usb_desc_s *)&configdesc[offset]; int len = desc->len; - if (offset + len < desclen) + if (offset + len <= desclen) { /* Is this an interface descriptor? */ @@ -750,7 +750,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, cfgbuffer = (FAR uint8_t *)malloc(CUSTOM_CONFIG_BUFSIZE); if (cfgbuffer == NULL) { - uerr("ERROR: Failed to allocated configuration buffer"); + uerr("ERROR: Failed to allocate configuration buffer"); ret = -ENOMEM; goto errout_with_members; } From e958c32e4d622320d7819545ac31a8f4eda5d589 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 13:29:38 -0600 Subject: [PATCH 178/214] USB host composite: Using wrong interface number from interface descriptor. --- drivers/usbhost/usbhost_composite.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/usbhost/usbhost_composite.c b/drivers/usbhost/usbhost_composite.c index 6e372cb686b..42ad0bf0301 100644 --- a/drivers/usbhost/usbhost_composite.c +++ b/drivers/usbhost/usbhost_composite.c @@ -313,7 +313,7 @@ static int usbhost_copyinterface(uint8_t ifno, FAR const uint8_t *configdesc, /* Is this an interface descriptor? Is it the one we are looking for? */ - if (ifdesc->type == USB_DESC_TYPE_INTERFACE && ifdesc->iif == ifno) + if (ifdesc->type == USB_DESC_TYPE_INTERFACE && ifdesc->ifno == ifno) { /* Yes.. return the interface descriptor */ @@ -570,7 +570,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, FAR struct usb_ifdesc_s *ifdesc = (FAR struct usb_ifdesc_s *)desc; - DEBUGASSERT(ifdesc->iif < 32); + DEBUGASSERT(ifdesc->ifno < 32); #endif /* Increment the count of interfaces */ @@ -684,8 +684,8 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, /* Was the interface merged via an IAD descriptor? */ - DEBUGASSERT(ifdesc->iif < 32); - if ((mergeset & (1 << ifdesc->iif)) == 0) + DEBUGASSERT(ifdesc->ifno < 32); + if ((mergeset & (1 << ifdesc->ifno)) == 0) { /* No, this interface was not merged. Save the registry * lookup information from the interface descriptor. @@ -698,7 +698,7 @@ int usbhost_composite(FAR struct usbhost_hubport_s *hport, member->id.vid = id->vid; member->id.pid = id->pid; - member->firstif = ifdesc->iif; + member->firstif = ifdesc->ifno; member->nifs = 1; /* Increment the member index */ From 71b46fe6c15fcc78e0ea4e6d4745ae04c66b4286 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 13:32:03 -0600 Subject: [PATCH 179/214] Fix some reversed comments introduced with the last change. --- Documentation/NuttxPortingGuide.html | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html index cf7c53dba90..7fa60d4d93b 100644 --- a/Documentation/NuttxPortingGuide.html +++ b/Documentation/NuttxPortingGuide.html @@ -1133,11 +1133,11 @@ include/ | |-analog/ | | `-- (Analog driver header files) | |-audio/ -| | `-- (Contactless driver header files) +| | `-- (Audio driver header files) | |-binfmt/ | | `-- (Binary format header files) | |-contactless/ -| | `-- (Audio driver header files) +| | `-- (Contactless driver header files) | |-crypto/ | | `-- (Cryptographic support header files) | |-drivers/ From 0de75e144a89d25b8bb0bb4f0d1dcabf53923b08 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 31 Aug 2016 13:34:52 -0600 Subject: [PATCH 180/214] Fix some comments in header files --- include/nuttx/contactless/ioctl.h | 2 +- include/nuttx/contactless/mfrc522.h | 2 +- include/nuttx/contactless/pn532.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/nuttx/contactless/ioctl.h b/include/nuttx/contactless/ioctl.h index ba4b45ee2d5..7c7916c1c79 100644 --- a/include/nuttx/contactless/ioctl.h +++ b/include/nuttx/contactless/ioctl.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/wireless/ioclt.h + * include/contactless/ioctl.h * * Copyright(C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/include/nuttx/contactless/mfrc522.h b/include/nuttx/contactless/mfrc522.h index f4e8c2ae51b..982ed17c8ca 100644 --- a/include/nuttx/contactless/mfrc522.h +++ b/include/nuttx/contactless/mfrc522.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/wireless/mfrc522.h + * include/contactless/mfrc522.h * * Copyright(C) 2016 Uniquix Ltda. All rights reserved. * Author: Alan Carvalho de Assis diff --git a/include/nuttx/contactless/pn532.h b/include/nuttx/contactless/pn532.h index 51b71d49448..c4bf82d8b24 100644 --- a/include/nuttx/contactless/pn532.h +++ b/include/nuttx/contactless/pn532.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/wireless/pn532.h + * include/contactless/pn532.h * * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. * Authors: Janne Rosberg From 7f6a403b9690e2ac0d1700cf8d64e9c063047db7 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 2 Sep 2016 07:26:29 -0600 Subject: [PATCH 181/214] USB host composite is at least partially functional. No longer depends on CONFIG_EXPERIMENTAL --- drivers/usbhost/Kconfig | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/usbhost/Kconfig b/drivers/usbhost/Kconfig index 6c139e2a89c..334e393f51c 100644 --- a/drivers/usbhost/Kconfig +++ b/drivers/usbhost/Kconfig @@ -80,13 +80,9 @@ endif # USBHOST_HUB config USBHOST_COMPOSITE bool "Composite device support" default n - depends on EXPERIMENTAL ---help--- Build in USB host support for connected composite devices - NOTE: This feature is marked EXPERIMENTAL because it has not been - untested - config USBHOST_COMPOSITE_STRICT bool "Strict composite membership" default n From 3f40541b2162d8d5a40b5d384aded0dfaebdf278 Mon Sep 17 00:00:00 2001 From: Aleksandr Vyhovanec Date: Fri, 2 Sep 2016 07:27:57 -0600 Subject: [PATCH 182/214] MTD: Fixed cloned typos in several FLASH drivers. --- drivers/mtd/n25qxxx.c | 6 +++--- drivers/mtd/s25fl1.c | 6 +++--- drivers/mtd/sst25.c | 8 ++++---- drivers/mtd/w25.c | 8 ++++---- 4 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/mtd/n25qxxx.c b/drivers/mtd/n25qxxx.c index 38bde4e275f..e5272f47edf 100644 --- a/drivers/mtd/n25qxxx.c +++ b/drivers/mtd/n25qxxx.c @@ -241,15 +241,15 @@ #define IS_VALID(p) ((((p)->flags) & N25QXXX_CACHE_VALID) != 0) #define IS_DIRTY(p) ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0) -#define IS_ERASED(p) ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0) +#define IS_ERASED(p) ((((p)->flags) & N25QXXX_CACHE_ERASED) != 0) #define SET_VALID(p) do { (p)->flags |= N25QXXX_CACHE_VALID; } while (0) #define SET_DIRTY(p) do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0) -#define SET_ERASED(p) do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0) +#define SET_ERASED(p) do { (p)->flags |= N25QXXX_CACHE_ERASED; } while (0) #define CLR_VALID(p) do { (p)->flags &= ~N25QXXX_CACHE_VALID; } while (0) #define CLR_DIRTY(p) do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0) -#define CLR_ERASED(p) do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0) +#define CLR_ERASED(p) do { (p)->flags &= ~N25QXXX_CACHE_ERASED; } while (0) /* 512 byte sector support **********************************************************/ diff --git a/drivers/mtd/s25fl1.c b/drivers/mtd/s25fl1.c index f3181dd475e..33a2589638f 100644 --- a/drivers/mtd/s25fl1.c +++ b/drivers/mtd/s25fl1.c @@ -292,15 +292,15 @@ #define IS_VALID(p) ((((p)->flags) & S25FL1_CACHE_VALID) != 0) #define IS_DIRTY(p) ((((p)->flags) & S25FL1_CACHE_DIRTY) != 0) -#define IS_ERASED(p) ((((p)->flags) & S25FL1_CACHE_DIRTY) != 0) +#define IS_ERASED(p) ((((p)->flags) & S25FL1_CACHE_ERASED) != 0) #define SET_VALID(p) do { (p)->flags |= S25FL1_CACHE_VALID; } while (0) #define SET_DIRTY(p) do { (p)->flags |= S25FL1_CACHE_DIRTY; } while (0) -#define SET_ERASED(p) do { (p)->flags |= S25FL1_CACHE_DIRTY; } while (0) +#define SET_ERASED(p) do { (p)->flags |= S25FL1_CACHE_ERASED; } while (0) #define CLR_VALID(p) do { (p)->flags &= ~S25FL1_CACHE_VALID; } while (0) #define CLR_DIRTY(p) do { (p)->flags &= ~S25FL1_CACHE_DIRTY; } while (0) -#define CLR_ERASED(p) do { (p)->flags &= ~S25FL1_CACHE_DIRTY; } while (0) +#define CLR_ERASED(p) do { (p)->flags &= ~S25FL1_CACHE_ERASED; } while (0) /* 512 byte sector support **********************************************************/ diff --git a/drivers/mtd/sst25.c b/drivers/mtd/sst25.c index 8da5778d840..9c84c7fba90 100644 --- a/drivers/mtd/sst25.c +++ b/drivers/mtd/sst25.c @@ -171,15 +171,15 @@ #define IS_VALID(p) ((((p)->flags) & SST25_CACHE_VALID) != 0) #define IS_DIRTY(p) ((((p)->flags) & SST25_CACHE_DIRTY) != 0) -#define IS_ERASED(p) ((((p)->flags) & SST25_CACHE_DIRTY) != 0) +#define IS_ERASED(p) ((((p)->flags) & SST25_CACHE_ERASED) != 0) #define SET_VALID(p) do { (p)->flags |= SST25_CACHE_VALID; } while (0) #define SET_DIRTY(p) do { (p)->flags |= SST25_CACHE_DIRTY; } while (0) -#define SET_ERASED(p) do { (p)->flags |= SST25_CACHE_DIRTY; } while (0) +#define SET_ERASED(p) do { (p)->flags |= SST25_CACHE_ERASED; } while (0) #define CLR_VALID(p) do { (p)->flags &= ~SST25_CACHE_VALID; } while (0) #define CLR_DIRTY(p) do { (p)->flags &= ~SST25_CACHE_DIRTY; } while (0) -#define CLR_ERASED(p) do { (p)->flags &= ~SST25_CACHE_DIRTY; } while (0) +#define CLR_ERASED(p) do { (p)->flags &= ~SST25_CACHE_ERASED; } while (0) /************************************************************************************ * Private Types @@ -1228,7 +1228,7 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev) ferr("ERROR: Allocation failed\n"); kmm_free(priv); - priv = NULL; + return NULL; } #endif } diff --git a/drivers/mtd/w25.c b/drivers/mtd/w25.c index da015a8c421..279525e1fc4 100644 --- a/drivers/mtd/w25.c +++ b/drivers/mtd/w25.c @@ -200,15 +200,15 @@ #define IS_VALID(p) ((((p)->flags) & W25_CACHE_VALID) != 0) #define IS_DIRTY(p) ((((p)->flags) & W25_CACHE_DIRTY) != 0) -#define IS_ERASED(p) ((((p)->flags) & W25_CACHE_DIRTY) != 0) +#define IS_ERASED(p) ((((p)->flags) & W25_CACHE_ERASED) != 0) #define SET_VALID(p) do { (p)->flags |= W25_CACHE_VALID; } while (0) #define SET_DIRTY(p) do { (p)->flags |= W25_CACHE_DIRTY; } while (0) -#define SET_ERASED(p) do { (p)->flags |= W25_CACHE_DIRTY; } while (0) +#define SET_ERASED(p) do { (p)->flags |= W25_CACHE_ERASED; } while (0) #define CLR_VALID(p) do { (p)->flags &= ~W25_CACHE_VALID; } while (0) #define CLR_DIRTY(p) do { (p)->flags &= ~W25_CACHE_DIRTY; } while (0) -#define CLR_ERASED(p) do { (p)->flags &= ~W25_CACHE_DIRTY; } while (0) +#define CLR_ERASED(p) do { (p)->flags &= ~W25_CACHE_ERASED; } while (0) /************************************************************************************ * Private Types @@ -1278,7 +1278,7 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *spi) ferr("ERROR: Allocation failed\n"); kmm_free(priv); - priv = NULL; + return NULL; } #endif } From 81ba54b6504c32c6e2e0afd792e9cf7fc2b29c14 Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 2 Sep 2016 03:50:26 -1000 Subject: [PATCH 183/214] Using uinfo --- arch/arm/src/stm32f7/stm32_otgdev.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/src/stm32f7/stm32_otgdev.c b/arch/arm/src/stm32f7/stm32_otgdev.c index 6a776976e2d..da4bf8e0b83 100644 --- a/arch/arm/src/stm32f7/stm32_otgdev.c +++ b/arch/arm/src/stm32f7/stm32_otgdev.c @@ -871,7 +871,7 @@ static uint32_t stm32_getreg(uint32_t addr) { if (count == 4) { - llerr("...\n"); + uinfo("...\n"); } return val; @@ -888,7 +888,7 @@ static uint32_t stm32_getreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - llerr("[repeats %d more times]\n", count-3); + uinfo("[repeats %d more times]\n", count-3); } /* Save the new address, value, and count */ @@ -900,7 +900,7 @@ static uint32_t stm32_getreg(uint32_t addr) /* Show the register value read */ - llerr("%08x->%08x\n", addr, val); + uinfo("%08x->%08x\n", addr, val); return val; } #endif @@ -918,7 +918,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr) { /* Show the register value being written */ - llerr("%08x<-%08x\n", addr, val); + uinfo("%08x<-%08x\n", addr, val); /* Write the value */ From b0f973d901e4fa8f44b68e617cb2013f779d601d Mon Sep 17 00:00:00 2001 From: Aleksandr Vyhovanec Date: Fri, 2 Sep 2016 11:00:04 -0600 Subject: [PATCH 184/214] MTD: SPI-based driver for Macronix MX25L3233F or MX25L6433F. --- drivers/mtd/Kconfig | 36 +- drivers/mtd/Make.defs | 10 +- drivers/mtd/mx25lx.c | 1052 +++++++++++++++++++++++++++++++++++++++ include/nuttx/mtd/mtd.h | 15 +- 4 files changed, 1109 insertions(+), 4 deletions(-) create mode 100644 drivers/mtd/mx25lx.c diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 44fd420d7ba..ba45d0f5123 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -456,6 +456,41 @@ config M25P_SUBSECTOR_ERASE endif # MTD_M25P +config MTD_MX25L + bool "SPI-based MX25L3233F / MX25L6433F" + default n + select SPI + ---help--- + SPI-based driver for Macronix MX25L3233F or MX25L6433F. + +if MTD_MX25L + +config MX25L_SPIMODE + int "MX25L SPI mode" + default 0 + +config MX25L_SPIFREQUENCY + int "MX25L SPI Frequency" + default 20000000 + +config MX25L_SECTOR512 + bool "Simulate 512 byte Erase Blocks" + default n + +config MX25L_SUBSECTOR_ERASE + bool "Sub-Sector Erase" + default n + ---help--- + Some devices (such as the EON EN25F80) support a smaller erase block + size (4K vs 64K). This option enables support for sub-sector erase. + The SMART file system can take advantage of this option if it is enabled. + +config MX25L_DEBUG + bool "Enable driver debug features" + default n + +endif # MTD_MX25L + config MTD_S25FL1 bool "QuadSPI-based S25FL1 FLASH" default n @@ -514,7 +549,6 @@ config MTD_N25QXXX ---help--- Support the N25Q016A, N25Q032A, N25Q064A, N25Q128A, N25Q256A - if MTD_N25QXXX config N25QXXX_QSPIMODE diff --git a/drivers/mtd/Make.defs b/drivers/mtd/Make.defs index 9a8396a7fbf..c26e48025e1 100644 --- a/drivers/mtd/Make.defs +++ b/drivers/mtd/Make.defs @@ -39,7 +39,7 @@ ifeq ($(CONFIG_MTD),y) -CSRCS += at45db.c ftl.c m25px.c ramtron.c mtd_config.c +CSRCS += at45db.c ftl.c ramtron.c mtd_config.c ifeq ($(CONFIG_MTD_PARTITION),y) CSRCS += mtd_partition.c @@ -104,6 +104,14 @@ ifeq ($(CONFIG_MTD_AT25),y) CSRCS += at25.c endif +ifeq ($(CONFIG_MTD_M25P),y) +CSRCS += m25px.c +endif + +ifeq ($(CONFIG_MTD_M25L),y) +CSRCS += m25lx.c +endif + ifeq ($(CONFIG_MTD_S25FL1),y) CSRCS += s25fl1.c endif diff --git a/drivers/mtd/mx25lx.c b/drivers/mtd/mx25lx.c new file mode 100644 index 00000000000..47c447cf1b2 --- /dev/null +++ b/drivers/mtd/mx25lx.c @@ -0,0 +1,1052 @@ +/************************************************************************************ + * drivers/mtd/mx25lx.c + * Driver for SPI-based or QSPI-based MX25Lxx33L parts of 32 or 64MBit. + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Aleksandr Vyhovanec + * + * Copied from / based on sst25.c and w25.c drivers written by + * Gregory Nutt + * Ken Pettit + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ********************************************************************/ +/* Per the data sheet, MX25L parts can be driven with either SPI mode 0 (CPOL=0 and + * CPHA=0) or mode 3 (CPOL=1 and CPHA=1). So you may need to specify + * CONFIG_MX25L_SPIMODE to select the best mode for your device. If + * CONFIG_MX25L_SPIMODE is not defined, mode 0 will be used. + */ + +#ifndef CONFIG_MX25L_SPIMODE +# define CONFIG_MX25L_SPIMODE SPIDEV_MODE0 +#endif + +/* SPI Frequency. May be up to 133 MHz. */ + +#ifndef CONFIG_MX25L_SPIFREQUENCY +# define CONFIG_MX25L_SPIFREQUENCY 20000000 +#endif + +/* Chip Geometries ******************************************************************/ + +/* MX25L3233F capacity is 32Mbit (4096Kbit x 8) = 4Mb (512kb x 8) */ + +#define MX25L_MX25L3233F_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4Kb */ +#define MX25L_MX25L3233F_NSECTORS 1024 +#define MX25L_MX25L3233F_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */ + +/* MX25L6433F capacity is 32Mbit (8192Kbit x 8) = 8Mb (1024kb x 8) */ + +#define MX25L_MX25L6433F_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4Kb */ +#define MX25L_MX25L6433F_NSECTORS 2048 +#define MX25L_MX25L6433F_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */ + +#ifdef CONFIG_MX25L_SECTOR512 /* Simulate a 512 byte sector */ +# define MX25L_SECTOR512_SHIFT 9 /* Sector size 1 << 9 = 512 bytes */ +#endif + +#define MX25L_ERASED_STATE 0xff /* State of FLASH when erased */ + +#define MX25L_CACHE_VALID (1 << 0) /* 1=Cache has valid data */ +#define MX25L_CACHE_DIRTY (1 << 1) /* 1=Cache is dirty */ +#define MX25L_CACHE_ERASED (1 << 2) /* 1=Backing FLASH is erased */ + +#define IS_VALID(p) ((((p)->flags) & MX25L_CACHE_VALID) != 0) +#define IS_DIRTY(p) ((((p)->flags) & MX25L_CACHE_DIRTY) != 0) +#define IS_ERASED(p) ((((p)->flags) & MX25L_CACHE_ERASED) != 0) + +#define SET_VALID(p) do { (p)->flags |= MX25L_CACHE_VALID; } while (0) +#define SET_DIRTY(p) do { (p)->flags |= MX25L_CACHE_DIRTY; } while (0) +#define SET_ERASED(p) do { (p)->flags |= MX25L_CACHE_ERASED; } while (0) + +#define CLR_VALID(p) do { (p)->flags &= ~MX25L_CACHE_VALID; } while (0) +#define CLR_DIRTY(p) do { (p)->flags &= ~MX25L_CACHE_DIRTY; } while (0) +#define CLR_ERASED(p) do { (p)->flags &= ~MX25L_CACHE_ERASED; } while (0) + +/* MX25L Instructions *****************************************************************/ +/* Command Value Description Addr Data */ +/* Dummy */ +#define MX25L_READ 0x03 /* Read data bytes 3 0 >=1 */ +#define MX25L_FAST_READ 0x0b /* Higher speed read 3 1 >=1 */ +#define MX25L_2READ 0xbb /* 2 x I/O read command */ +#define MX25L_DREAD 0x3b /* 1I / 2O read command 3 1 >=1 */ +#define MX25L_4READ 0xeb /* 4 x I/O read command */ +#define MX25L_QREAD 0x6b /* 1I / 4O read command 3 1 >=1 */ +#define MX25L_WREN 0x06 /* Write Enable 0 0 0 */ +#define MX25L_WRDI 0x04 /* Write Disable 0 0 0 */ +#define MX25L_RDSR 0x05 /* Read status register 0 0 >=1 */ +#define MX25L_RDCR 0x15 /* Read config register 0 0 >=1 */ +#define MX25L_WRSR 0x01 /* Write stat/conf register 0 0 2 */ +#define MX25L_4PP 0x38 /* Quad page program 3 0 1-256 */ +#define MX25L_SE 0x20 /* 4Kb Sector erase 3 0 0 */ +#define MX25L_BE32 0x52 /* 32Kbit block Erase 3 0 0 */ +#define MX25L_BE64 0xd8 /* 64Kbit block Erase 3 0 0 */ +#define MX25L_CE 0xc7 /* Chip erase 0 0 0 */ +#define MX25L_CE_ALT 0x60 /* Chip erase (alternate) 0 0 0 */ +#define MX25L_PP 0x02 /* Page program 3 0 1-256 */ +#define MX25L_DP 0xb9 /* Deep power down 0 0 0 */ +#define MX25L_RDP 0xab /* Release deep power down 0 0 0 */ +#define MX25L_PGM_SUSPEND 0x75 /* Suspends program 0 0 0 */ +#define MX25L_ERS_SUSPEND 0xb0 /* Suspends erase 0 0 0 */ +#define MX25L_PGM_RESUME 0x7A /* Resume program 0 0 0 */ +#define MX25L_ERS_RESUME 0x30 /* Resume erase 0 0 0 */ +#define MX25L_RDID 0x9f /* Read identification 0 0 3 */ +#define MX25L_RES 0xab /* Read electronic ID 0 3 1 */ +#define MX25L_REMS 0x90 /* Read manufacture and ID 1 2 >=2 */ +#define MX25L_ENSO 0xb1 /* Enter secured OTP 0 0 0 */ +#define MX25L_EXSO 0xc1 /* Exit secured OTP 0 0 0 */ +#define MX25L_RDSCUR 0x2b /* Read security register 0 0 0 */ +#define MX25L_WRSCUR 0x2f /* Write security register 0 0 0 */ +#define MX25L_RSTEN 0x66 /* Reset Enable 0 0 0 */ +#define MX25L_RST 0x99 /* Reset Memory 0 0 0 */ +#define MX25L_RDSFDP 0x5a /* read out until CS# high */ +#define MX25L_SBL 0xc0 /* Set Burst Length */ +#define MX25L_SBL_ALT 0x77 /* Set Burst Length */ +#define MX25L_NOP 0x00 /* No Operation 0 0 0 */ + +/* MX25L Registers ******************************************************************/ +/* Read ID (RDID) register values */ + +#define MX25L_MANUFACTURER 0xc2 /* Macronix manufacturer ID */ +#define MX25L3233F_DEVID 0x15 /* MX25L3233F device ID */ + +/* JEDEC Read ID register values */ + +#define MX25L_JEDEC_MANUFACTURER 0xc2 /* Macronix manufacturer ID */ +#define MX25L_JEDEC_MEMORY_TYPE 0x20 /* MX25Lx memory type */ +#define MX25L_JEDEC_MX25L3233F_CAPACITY 0x16 /* MX25L3233F memory capacity */ +#define MX25L_JEDEC_MX25L6433F_CAPACITY 0x17 /* MX25L6433F memory capacity */ + +/* Status register bit definitions */ + +#define MX25L_SR_WIP (1 << 0) /* Bit 0: Write in progress */ +#define MX25L_SR_WEL (1 << 1) /* Bit 1: Write enable latch */ +#define MX25L_SR_BP_SHIFT (2) /* Bits 2-5: Block protect bits */ +#define MX25L_SR_BP_MASK (15 << MX25L_SR_BP_SHIFT) +#define MX25L_SR_QE (1 << 6) /* Bit 6: Quad enable */ +#define MX25L_SR_SRWD (1 << 7) /* Bit 7: Status register write protect */ + +/* Configuration registerregister bit definitions */ + +#define MX25L_CR_ODS (1 << 0) /* Bit 0: Output driver strength */ +#define MX25L_CR_TB (1 << 3) /* Bit 3: Top/bottom selected */ +#define MX25L_CR_DC (1 << 6) /* Bit 6: Dummy cycle */ + +#define MX25L_DUMMY MX25L_NOP + +/* Debug ****************************************************************************/ + +#ifdef CONFIG_MX25L_DEBUG +# define mxlerr(format, ...) _err(format, ##__VA_ARGS__) +# define mxlinfo(format, ...) _info(format, ##__VA_ARGS__) +#else +# define mxlerr(x...) +# define mxlinfo(x...) +#endif + +/************************************************************************************ + * Private Types + ************************************************************************************/ + +/* This type represents the state of the MTD device. The struct mtd_dev_s + * must appear at the beginning of the definition so that you can freely + * cast between pointers to struct mtd_dev_s and struct mx25l_dev_s. + */ + +struct mx25l_dev_s +{ + struct mtd_dev_s mtd; /* MTD interface */ + FAR struct spi_dev_s *dev; /* Saved SPI interface instance */ + uint8_t sectorshift; + uint8_t pageshift; + uint16_t nsectors; +#if defined(CONFIG_MX25L_SECTOR512) + uint8_t flags; /* Buffered sector flags */ + uint16_t esectno; /* Erase sector number in the cache */ + FAR uint8_t *sector; /* Allocated sector data */ +#endif +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +/* Helpers */ + +static void mx25l_lock(FAR struct spi_dev_s *dev); +static inline void mx25l_unlock(FAR struct spi_dev_s *dev); +static inline int mx25l_readid(FAR struct mx25l_dev_s *priv); +static void mx25l_waitwritecomplete(FAR struct mx25l_dev_s *priv); +static void mx25l_writeenable(FAR struct mx25l_dev_s *priv); +static void mx25l_writedisable(FAR struct mx25l_dev_s *priv); +static inline void mx25l_sectorerase(FAR struct mx25l_dev_s *priv, off_t offset); +static inline int mx25l_chiperase(FAR struct mx25l_dev_s *priv); +static void mx25l_byteread(FAR struct mx25l_dev_s *priv, FAR uint8_t *buffer, + off_t address, size_t nbytes); +static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv, + FAR const uint8_t *buffer, + off_t address, size_t nbytes); +#if defined(CONFIG_MX25L_SECTOR512) +static void mx25l_cacheflush(FAR struct mx25l_dev_s *priv); +static FAR uint8_t *mx25l_cacheread(FAR struct mx25l_dev_s *priv, off_t sector); +static void mx25l_cacheerase(FAR struct mx25l_dev_s *priv, off_t sector); +static void mx25l_cachewrite(FAR struct mx25l_dev_s *priv, + FAR const uint8_t *buffer, + off_t sector, size_t nsectors); +#endif + +/* MTD driver methods */ + +static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks); +static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR uint8_t *buf); +static ssize_t mx25l_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR const uint8_t *buf); +static ssize_t mx25l_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, + FAR uint8_t *buffer); +static int mx25l_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: mx25l_lock + ************************************************************************************/ + +static void mx25l_lock(FAR struct spi_dev_s *dev) +{ + /* On SPI busses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the busses for a sequence of + * transfers. The bus should be locked before the chip is selected. + * + * This is a blocking call and will not return until we have exclusiv access to + * the SPI buss. We will retain that exclusive access until the bus is unlocked. + */ + + (void)SPI_LOCK(dev, true); + + /* After locking the SPI bus, the we also need call the setfrequency, setbits, and + * setmode methods to make sure that the SPI is properly configured for the device. + * If the SPI buss is being shared, then it may have been left in an incompatible + * state. + */ + + SPI_SETMODE(dev, CONFIG_MX25L_SPIMODE); + SPI_SETBITS(dev, 8); + (void)SPI_HWFEATURES(dev, 0); + (void)SPI_SETFREQUENCY(dev, CONFIG_MX25L_SPIFREQUENCY); +} + +/************************************************************************************ + * Name: mx25l_unlock + ************************************************************************************/ + +static inline void mx25l_unlock(FAR struct spi_dev_s *dev) +{ + (void)SPI_LOCK(dev, false); +} + +/************************************************************************************ + * Name: mx25l_readid + ************************************************************************************/ + +static inline int mx25l_readid(FAR struct mx25l_dev_s *priv) +{ + uint16_t manufacturer; + uint16_t memory; + uint16_t capacity; + + mxlinfo("priv: %p\n", priv); + + /* Lock the SPI bus, configure the bus, and select this FLASH part. */ + + mx25l_lock(priv->dev); + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send the "Read ID (RDID)" command and read the first three ID bytes */ + + (void)SPI_SEND(priv->dev, MX25L_RDID); + manufacturer = SPI_SEND(priv->dev, MX25L_DUMMY); + memory = SPI_SEND(priv->dev, MX25L_DUMMY); + capacity = SPI_SEND(priv->dev, MX25L_DUMMY); + + /* Deselect the FLASH and unlock the bus */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + mx25l_unlock(priv->dev); + + mxlinfo("manufacturer: %02x memory: %02x capacity: %02x\n", + manufacturer, memory, capacity); + + /* Check for a valid manufacturer and memory type */ + + if (manufacturer == MX25L_JEDEC_MANUFACTURER && memory == MX25L_JEDEC_MEMORY_TYPE) + { + /* Okay.. is it a FLASH capacity that we understand? */ + + if (capacity == MX25L_JEDEC_MX25L3233F_CAPACITY) + { + /* Save the FLASH geometry */ + + priv->sectorshift = MX25L_MX25L3233F_SECTOR_SHIFT; + priv->nsectors = MX25L_MX25L3233F_NSECTORS; + priv->pageshift = MX25L_MX25L3233F_PAGE_SHIFT; + return OK; + } + else if (capacity == MX25L_JEDEC_MX25L6433F_CAPACITY) + { + /* Save the FLASH geometry */ + + priv->sectorshift = MX25L_MX25L6433F_SECTOR_SHIFT; + priv->nsectors = MX25L_MX25L6433F_NSECTORS; + priv->pageshift = MX25L_MX25L6433F_PAGE_SHIFT; + return OK; + } + } + + return -ENODEV; +} + +/************************************************************************************ + * Name: mx25l_waitwritecomplete + ************************************************************************************/ + +static void mx25l_waitwritecomplete(FAR struct mx25l_dev_s *priv) +{ + uint8_t status; + + /* Loop as long as the memory is busy with a write cycle */ + + do + { + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Read Status Register (RDSR)" command */ + + (void)SPI_SEND(priv->dev, MX25L_RDSR); + + /* Send a dummy byte to generate the clock needed to shift out the status */ + + status = SPI_SEND(priv->dev, MX25L_DUMMY); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + /* Given that writing could take up to few tens of milliseconds, and erasing + * could take more. The following short delay in the "busy" case will allow + * other peripherals to access the SPI bus. + */ + + if ((status & MX25L_SR_WIP) != 0) + { + mx25l_unlock(priv->dev); + usleep(1000); + mx25l_lock(priv->dev); + } + } + while ((status & MX25L_SR_WIP) != 0); + + mxlinfo("Complete\n"); +} + +/************************************************************************************ + * Name: mx25l_writeenable + ************************************************************************************/ + +static void mx25l_writeenable(FAR struct mx25l_dev_s *priv) +{ + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Write Enable (WREN)" command */ + + (void)SPI_SEND(priv->dev, MX25L_WREN); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + mxlinfo("Enabled\n"); +} + +/************************************************************************************ + * Name: mx25l_writedisable + ************************************************************************************/ + +static void mx25l_writedisable(FAR struct mx25l_dev_s *priv) +{ + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Write Disable (WRDI)" command */ + + (void)SPI_SEND(priv->dev, MX25L_WRDI); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + mxlinfo("Disabled\n"); +} + +/************************************************************************************ + * Name: mx25l_sectorerase (4k) + ************************************************************************************/ + +static void mx25l_sectorerase(FAR struct mx25l_dev_s *priv, off_t sector) +{ + off_t offset; + + offset = sector << priv->sectorshift; + + mxlinfo("sector: %08lx\n", (long)sector); + + /* Send write enable instruction */ + + mx25l_writeenable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send the "Sector Erase (SE)" or "Block Erase (BE)" instruction + * that was passed in as the erase type. + */ + + (void)SPI_SEND(priv->dev, MX25L_SE); + + /* Send the sector offset high byte first. For all of the supported + * parts, the sector number is completely contained in the first byte + * and the values used in the following two bytes don't really matter. + */ + + (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff); + (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff); + (void)SPI_SEND(priv->dev, offset & 0xff); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + mx25l_waitwritecomplete(priv); + + mxlinfo("Erased\n"); +} + +/************************************************************************************ + * Name: mx25l_chiperase + ************************************************************************************/ + +static inline int mx25l_chiperase(FAR struct mx25l_dev_s *priv) +{ + mxlinfo("priv: %p\n", priv); + + /* Send write enable instruction */ + + mx25l_writeenable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send the "Chip Erase (CE)" instruction */ + + (void)SPI_SEND(priv->dev, MX25L_CE); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + mx25l_waitwritecomplete(priv); + + mxlinfo("Return: OK\n"); + return OK; +} + +/************************************************************************************ + * Name: mx25l_byteread + ************************************************************************************/ + +static void mx25l_byteread(FAR struct mx25l_dev_s *priv, FAR uint8_t *buffer, + off_t address, size_t nbytes) +{ + mxlinfo("address: %08lx nbytes: %d\n", (long)address, (int)nbytes); + + /* Wait for any preceding write or erase operation to complete. */ + + mx25l_waitwritecomplete(priv); + + /* Make sure that writing is disabled */ + + mx25l_writedisable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Read from Memory " instruction */ + + (void)SPI_SEND(priv->dev, MX25L_FAST_READ); + + /* Send the address high byte first. */ + + (void)SPI_SEND(priv->dev, (address >> 16) & 0xff); + (void)SPI_SEND(priv->dev, (address >> 8) & 0xff); + (void)SPI_SEND(priv->dev, address & 0xff); + + /* Send a dummy byte */ + + (void)SPI_SEND(priv->dev, MX25L_DUMMY); + + /* Then read all of the requested bytes */ + + SPI_RECVBLOCK(priv->dev, buffer, nbytes); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); +} + +/************************************************************************************ + * Name: mx25l_pagewrite + ************************************************************************************/ + +static inline void mx25l_pagewrite(FAR struct mx25l_dev_s *priv, + FAR const uint8_t *buffer, + off_t address, size_t nbytes) +{ + mxlinfo("address: %08lx nwords: %d\n", (long)address, (int)nbytes); + + for (; nbytes > 0; nbytes -= (1 << priv->pageshift)) + { + /* Enable the write access to the FLASH */ + + mx25l_writeenable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send the "Page Program (MX25L_PP)" Command */ + + SPI_SEND(priv->dev, MX25L_PP); + + /* Send the address high byte first. */ + + (void)SPI_SEND(priv->dev, (address >> 16) & 0xff); + (void)SPI_SEND(priv->dev, (address >> 8) & 0xff); + (void)SPI_SEND(priv->dev, address & 0xff); + + /* Then send the page of data */ + + SPI_SNDBLOCK(priv->dev, buffer, 1 << priv->pageshift); + + /* Deselect the FLASH and setup for the next pass through the loop */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + /* Wait for any preceding write or erase operation to complete. */ + + mx25l_waitwritecomplete(priv); + + /* Update addresses */ + + address += 1 << priv->pageshift; + buffer += 1 << priv->pageshift; + } + + mxlinfo("Written\n"); +} + +/************************************************************************************ + * Name: mx25l_cacheflush + ************************************************************************************/ + +#if defined(CONFIG_MX25L_SECTOR512) +static void mx25l_cacheflush(FAR struct mx25l_dev_s *priv) +{ + /* If the cached is dirty (meaning that it no longer matches the old FLASH contents) + * or was erased (with the cache containing the correct FLASH contents), then write + * the cached erase block to FLASH. + */ + + if (IS_DIRTY(priv) || IS_ERASED(priv)) + { + /* Write entire erase block to FLASH */ + + mx25l_pagewrite(priv, priv->sector, (off_t)priv->esectno << priv->sectorshift, + (1 << priv->sectorshift)); + + /* The case is no long dirty and the FLASH is no longer erased */ + + CLR_DIRTY(priv); + CLR_ERASED(priv); + } +} +#endif + +/************************************************************************************ + * Name: mx25l_cacheread + ************************************************************************************/ + +#if defined(CONFIG_MX25L_SECTOR512) +static FAR uint8_t *mx25l_cacheread(FAR struct mx25l_dev_s *priv, off_t sector) +{ + off_t esectno; + int shift; + int index; + + /* Convert from the 512 byte sector to the erase sector size of the device. For + * exmample, if the actual erase sector size if 4Kb (1 << 12), then we first + * shift to the right by 3 to get the sector number in 4096 increments. + */ + + shift = priv->sectorshift - MX25L_SECTOR512_SHIFT; + esectno = sector >> shift; + mxlinfo("sector: %ld esectno: %d shift=%d\n", sector, esectno, shift); + + /* Check if the requested erase block is already in the cache */ + + if (!IS_VALID(priv) || esectno != priv->esectno) + { + /* No.. Flush any dirty erase block currently in the cache */ + + mx25l_cacheflush(priv); + + /* Read the erase block into the cache */ + + mx25l_byteread(priv, priv->sector, (esectno << priv->sectorshift), 1 << priv->sectorshift); + + /* Mark the sector as cached */ + + priv->esectno = esectno; + + SET_VALID(priv); /* The data in the cache is valid */ + CLR_DIRTY(priv); /* It should match the FLASH contents */ + CLR_ERASED(priv); /* The underlying FLASH has not been erased */ + } + + /* Get the index to the 512 sector in the erase block that holds the argument */ + + index = sector & ((1 << shift) - 1); + + /* Return the address in the cache that holds this sector */ + + return &priv->sector[index << MX25L_SECTOR512_SHIFT]; +} +#endif + +/************************************************************************************ + * Name: mx25l_cacheerase + ************************************************************************************/ + +#if defined(CONFIG_MX25L_SECTOR512) +static void mx25l_cacheerase(FAR struct mx25l_dev_s *priv, off_t sector) +{ + FAR uint8_t *dest; + + /* First, make sure that the erase block containing the 512 byte sector is in + * the cache. + */ + + dest = mx25l_cacheread(priv, sector); + + /* Erase the block containing this sector if it is not already erased. + * The erased indicated will be cleared when the data from the erase sector + * is read into the cache and set here when we erase the block. + */ + + if (!IS_ERASED(priv)) + { + off_t esectno = sector >> (priv->sectorshift - MX25L_SECTOR512_SHIFT); + mxlinfo("sector: %ld esectno: %d\n", sector, esectno); + + mx25l_sectorerase(priv, esectno); + SET_ERASED(priv); + } + + /* Put the cached sector data into the erase state and mart the cache as dirty + * (but don't update the FLASH yet. The caller will do that at a more optimal + * time). + */ + + memset(dest, MX25L_ERASED_STATE, 1 << MX25L_SECTOR512_SHIFT); + SET_DIRTY(priv); +} +#endif + +/************************************************************************************ + * Name: mx25l_cachewrite + ************************************************************************************/ + +#if defined(CONFIG_MX25L_SECTOR512) +static void mx25l_cachewrite(FAR struct mx25l_dev_s *priv, FAR const uint8_t *buffer, + off_t sector, size_t nsectors) +{ + FAR uint8_t *dest; + + for (; nsectors > 0; nsectors--) + { + /* First, make sure that the erase block containing 512 byte sector is in + * memory. + */ + + dest = mx25l_cacheread(priv, sector); + + /* Erase the block containing this sector if it is not already erased. + * The erased indicated will be cleared when the data from the erase sector + * is read into the cache and set here when we erase the sector. + */ + + if (!IS_ERASED(priv)) + { + off_t esectno = sector >> (priv->sectorshift - MX25L_SECTOR512_SHIFT); + mxlinfo("sector: %ld esectno: %d\n", sector, esectno); + + mx25l_sectorerase(priv, esectno); + SET_ERASED(priv); + } + + /* Copy the new sector data into cached erase block */ + + memcpy(dest, buffer, 1 << MX25L_SECTOR512_SHIFT); + SET_DIRTY(priv); + + /* Set up for the next 512 byte sector */ + + buffer += 1 << MX25L_SECTOR512_SHIFT; + sector++; + } + + /* Flush the last erase block left in the cache */ + + mx25l_cacheflush(priv); +} +#endif + +/************************************************************************************ + * Name: mx25l_erase + ************************************************************************************/ + +static int mx25l_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks) +{ + FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev; + size_t blocksleft = nblocks; + + mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + + /* Lock access to the SPI bus until we complete the erase */ + + mx25l_lock(priv->dev); + + while (blocksleft-- > 0) + { + /* MX25LVF parts have complex block overlay structure for the moment + * we just erase in 4k blocks. + */ + +#ifdef CONFIG_MX25L_SECTOR512 + mx25l_cacheerase(priv, startblock); +#else + mx25l_sectorerase(priv, startblock); +#endif + startblock++; + } + +#ifdef CONFIG_MX25L_SECTOR512 + /* Flush the last erase block left in the cache */ + + mx25l_cacheflush(priv); +#endif + + mx25l_unlock(priv->dev); + return (int)nblocks; +} + +/************************************************************************************ + * Name: mx25l_bread + ************************************************************************************/ + +static ssize_t mx25l_bread(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR uint8_t *buffer) +{ + FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev; + ssize_t nbytes; + + mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + + /* On this device, we can handle the block read just like the byte-oriented read */ + +#ifdef CONFIG_MX25L_SECTOR512 + nbytes = mx25l_read(dev, startblock << MX25L_SECTOR512_SHIFT, nblocks << MX25L_SECTOR512_SHIFT, + buffer); + if (nbytes > 0) + { + return nbytes >> MX25L_SECTOR512_SHIFT; + } +#else + nbytes = mx25l_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift, + buffer); + if (nbytes > 0) + { + return nbytes >> priv->pageshift; + } +#endif + + return (int)nbytes; +} + +/************************************************************************************ + * Name: mx25l_bwrite + ************************************************************************************/ + +static ssize_t mx25l_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR const uint8_t *buffer) +{ + FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev; + + mxlinfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + + /* Lock the SPI bus and write all of the pages to FLASH */ + + mx25l_lock(priv->dev); + +#if defined(CONFIG_MX25L_SECTOR512) + mx25l_cachewrite(priv, buffer, startblock, nblocks); +#else + mx25l_pagewrite(priv, buffer, startblock << priv->pageshift, + nblocks << priv->pageshift); +#endif + mx25l_unlock(priv->dev); + + return nblocks; +} + +/************************************************************************************ + * Name: mx25l_read + ************************************************************************************/ + +static ssize_t mx25l_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, + FAR uint8_t *buffer) +{ + FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev; // TODO: + + mxlinfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes); + + /* Lock the SPI bus and select this FLASH part */ + + mx25l_lock(priv->dev); + mx25l_byteread(priv, buffer, offset, nbytes); + mx25l_unlock(priv->dev); + mxlinfo("return nbytes: %d\n", (int)nbytes); + return nbytes; +} + +/************************************************************************************ + * Name: mx25l_ioctl + ************************************************************************************/ + +static int mx25l_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) +{ + FAR struct mx25l_dev_s *priv = (FAR struct mx25l_dev_s *)dev; + int ret = -EINVAL; /* Assume good command with bad parameters */ + + mxlinfo("cmd: %d \n", cmd); + + switch (cmd) + { + case MTDIOC_GEOMETRY: + { + FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg); + if (geo) + { + /* Populate the geometry structure with information need to know + * the capacity and how to access the device. + * + * NOTE: that the device is treated as though it where just an array + * of fixed size blocks. That is most likely not true, but the client + * will expect the device logic to do whatever is necessary to make it + * appear so. + */ + +#ifdef CONFIG_MX25L_SECTOR512 + geo->blocksize = (1 << MX25L_SECTOR512_SHIFT); + geo->erasesize = (1 << MX25L_SECTOR512_SHIFT); + geo->neraseblocks = priv->nsectors << (priv->sectorshift - MX25L_SECTOR512_SHIFT); +#else + geo->blocksize = (1 << priv->pageshift); + geo->erasesize = (1 << priv->sectorshift); + geo->neraseblocks = priv->nsectors; +#endif + ret = OK; + + mxlinfo("blocksize: %d erasesize: %d neraseblocks: %d\n", + geo->blocksize, geo->erasesize, geo->neraseblocks); + } + } + break; + + case MTDIOC_BULKERASE: + { + /* Erase the entire device */ + + mx25l_lock(priv->dev); + ret = mx25l_chiperase(priv); + mx25l_unlock(priv->dev); + } + break; + + case MTDIOC_XIPBASE: + default: + ret = -ENOTTY; /* Bad command */ + break; + } + + mxlinfo("return %d\n", ret); + return ret; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: mx25l_initialize_spi + * + * Description: + * Create an initialize MTD device instance. MTD devices are not registered + * in the file system, but are created as instances that can be bound to + * other functions (such as a block or character driver front end). + * + ************************************************************************************/ + +FAR struct mtd_dev_s *mx25l_initialize_spi(FAR struct spi_dev_s *dev) +{ + FAR struct mx25l_dev_s *priv; + int ret; + + mxlinfo("dev: %p\n", dev); + + /* Allocate a state structure (we allocate the structure instead of using + * a fixed, static allocation so that we can handle multiple FLASH devices. + * The current implementation would handle only one FLASH part per SPI + * device (only because of the SPIDEV_FLASH definition) and so would have + * to be extended to handle multiple FLASH parts on the same SPI bus. + */ + + priv = (FAR struct mx25l_dev_s *)kmm_zalloc(sizeof(struct mx25l_dev_s)); + if (priv) + { + /* Initialize the allocated structure. (unsupported methods were + * nullified by kmm_zalloc). + */ + + priv->mtd.erase = mx25l_erase; + priv->mtd.bread = mx25l_bread; + priv->mtd.bwrite = mx25l_bwrite; + priv->mtd.read = mx25l_read; + priv->mtd.ioctl = mx25l_ioctl; + priv->dev = dev; + + /* Deselect the FLASH */ + + SPI_SELECT(dev, SPIDEV_FLASH, false); + + /* Identify the FLASH chip and get its capacity */ + + ret = mx25l_readid(priv); + if (ret != OK) + { + /* Unrecognized! Discard all of that work we just did and return NULL */ + + mxlerr("ERROR: Unrecognized\n"); + kmm_free(priv); + return NULL; + } + else + { +#ifdef CONFIG_MX25L_SECTOR512 /* Simulate a 512 byte sector */ + /* Allocate a buffer for the erase block cache */ + + priv->sector = (FAR uint8_t *)kmm_malloc(1 << priv->sectorshift); + if (!priv->sector) + { + /* Allocation failed! Discard all of that work we just did and return NULL */ + + ferr("ERROR: Allocation failed\n"); + kmm_free(priv); + return NULL; + } +#endif + +#ifdef CONFIG_MTD_REGISTRATION + /* Register the MTD with the procfs system if enabled */ + + mtd_register(&priv->mtd, "mx25l"); +#endif + } + } + + /* Return the implementation-specific state structure as the MTD device */ + + mxlinfo("Return %p\n", priv); + return (FAR struct mtd_dev_s *)priv; +} diff --git a/include/nuttx/mtd/mtd.h b/include/nuttx/mtd/mtd.h index 566f75b3141..d0b8ab3ed73 100644 --- a/include/nuttx/mtd/mtd.h +++ b/include/nuttx/mtd/mtd.h @@ -515,7 +515,7 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *dev); * Name: s25fl1_initialize * * Description: - * Create an initialize MTD device instance for the QuadSPI-based ST24FL1 + * Create an initialized MTD device instance for the QuadSPI-based ST24FL1 * FLASH part. * ****************************************************************************/ @@ -524,11 +524,22 @@ struct qspi_dev_s; /* Forward reference */ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi, bool unprotect); +/**************************************************************************** + * Name: mx25l_initialize_spi + * + * Description: + * Create an initialized MTD device instance for the SPI-based MX25Lx + * FLASH part. + * + ****************************************************************************/ + +FAR struct mtd_dev_s *mx25l_initialize_spi(FAR struct spi_dev_s *dev); + /**************************************************************************** * Name: n25qxxx_initialize * * Description: - * Create an initialize MTD device instance for the QuadSPI-based N25Qxxx + * Create an initialized MTD device instance for the QuadSPI-based N25Qxxx * FLASH part from Micron. * ****************************************************************************/ From 944902a24dc6336b922d1f47c9f584692fb2fbba Mon Sep 17 00:00:00 2001 From: David Sidrane Date: Fri, 2 Sep 2016 07:14:16 -1000 Subject: [PATCH 185/214] F7 Usb Fix for FIFO loosing first word --- arch/arm/src/stm32f7/chip/stm32_otg.h | 7 +-- arch/arm/src/stm32f7/stm32_otgdev.c | 87 ++++++++++++++++----------- 2 files changed, 55 insertions(+), 39 deletions(-) diff --git a/arch/arm/src/stm32f7/chip/stm32_otg.h b/arch/arm/src/stm32f7/chip/stm32_otg.h index 874dd265639..aca73655523 100644 --- a/arch/arm/src/stm32f7/chip/stm32_otg.h +++ b/arch/arm/src/stm32f7/chip/stm32_otg.h @@ -324,21 +324,20 @@ #define OTG_GINT_NPTXFE (1 << 5) /* Bit 5: Non-periodic TxFIFO empty */ #define OTG_GINT_GINAKEFF (1 << 6) /* Bit 6: Global IN non-periodic NAK effective */ #define OTG_GINT_GONAKEFF (1 << 7) /* Bit 7: Global OUT NAK effective */ - /* Bits 8-9: Reserved, must be kept at reset value */ +#define OTG_GINT_RES89 (3 << 8) /* Bits 8-9: Reserved, must be kept at reset value */ #define OTG_GINT_ESUSP (1 << 10) /* Bit 10: Early suspend */ #define OTG_GINT_USBSUSP (1 << 11) /* Bit 11: USB suspend */ #define OTG_GINT_USBRST (1 << 12) /* Bit 12: USB reset */ #define OTG_GINT_ENUMDNE (1 << 13) /* Bit 13: Enumeration done */ #define OTG_GINT_ISOODRP (1 << 14) /* Bit 14: Isochronous OUT packet dropped interrupt */ #define OTG_GINT_EOPF (1 << 15) /* Bit 15: End of periodic frame interrupt */ - /* Bits 16 Reserved, must be kept at reset value */ -#define OTG_GINTMSK_EPMISM (1 << 17) /* Bit 17: Endpoint mismatch interrupt mask */ +#define OTG_GINT_RES1617 (3 << 16) /* Bits 16-17 Reserved, must be kept at reset value */ #define OTG_GINT_IEP (1 << 18) /* Bit 18: IN endpoint interrupt */ #define OTG_GINT_OEP (1 << 19) /* Bit 19: OUT endpoint interrupt */ #define OTG_GINT_IISOIXFR (1 << 20) /* Bit 20: Incomplete isochronous IN transfer */ #define OTG_GINT_IISOOXFR (1 << 21) /* Bit 21: Incomplete isochronous OUT transfer (device) */ #define OTG_GINT_IPXFR (1 << 21) /* Bit 21: Incomplete periodic transfer (host) */ - /* Bit 22: Reserved, must be kept at reset value */ +#define OTG_GINT_RES22 (1 << 22) /* Bits 22: Reserved, must be kept at reset value */ #define OTG_GINT_RSTDET (1 << 23) /* Bit 23: Reset detected interrupt */ #define OTG_GINT_HPRT (1 << 24) /* Bit 24: Host port interrupt */ #define OTG_GINT_HC (1 << 25) /* Bit 25: Host channels interrupt */ diff --git a/arch/arm/src/stm32f7/stm32_otgdev.c b/arch/arm/src/stm32f7/stm32_otgdev.c index da4bf8e0b83..f06175cb5bf 100644 --- a/arch/arm/src/stm32f7/stm32_otgdev.c +++ b/arch/arm/src/stm32f7/stm32_otgdev.c @@ -209,6 +209,29 @@ # error "FIFO allocations exceed FIFO memory size" #endif +#define OTG_GINT_RESERVED (OTG_GINT_RES89 | \ + OTG_GINT_RES1617 | \ + OTG_GINT_RES22) + + +#define OTG_GINT_RC_W1 (OTG_GINT_MMIS | \ + OTG_GINT_SOF | \ + OTG_GINT_ESUSP | \ + OTG_GINT_USBSUSP | \ + OTG_GINT_USBRST | \ + OTG_GINT_ENUMDNE | \ + OTG_GINT_ISOODRP | \ + OTG_GINT_EOPF | \ + OTG_GINT_IISOIXFR | \ + OTG_GINT_IISOOXFR | \ + OTG_GINT_RSTDET | \ + OTG_GINT_LPMINT | \ + OTG_GINT_CIDSCHG | \ + OTG_GINT_DISC | \ + OTG_GINT_SRQ | \ + OTG_GINT_WKUP) + + /* Debug ***********************************************************************/ /* Trace error codes */ @@ -3171,12 +3194,6 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) int bcnt; int epphy; - /* Disable the Rx status queue level interrupt */ - - regval = stm32_getreg(STM32_OTG_GINTMSK); - regval &= ~OTG_GINT_RXFLVL; - stm32_putreg(regval, STM32_OTG_GINTMSK); - /* Get the status from the top of the FIFO */ regval = stm32_getreg(STM32_OTG_GRXSTSP); @@ -3251,6 +3268,22 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) case OTG_GRXSTSD_PKTSTS_SETUPDONE: { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy); + + /* Now that the Setup Phase is complete if it was an OUT enable + * the endpoint + * (Doing this here prevents the loss of the first FIFO word) + */ + + if (priv->ep0state == EP0STATE_SETUP_OUT) + { + + /* Clear NAKSTS so that we can receive the data */ + + regval = stm32_getreg(STM32_OTG_DOEPCTL(0)); + regval |= OTG_DOEPCTL0_CNAK; + stm32_putreg(regval, STM32_OTG_DOEPCTL(0)); + + } } break; @@ -3286,14 +3319,6 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) datlen = GETUINT16(priv->ctrlreq.len); if (USB_REQ_ISOUT(priv->ctrlreq.type) && datlen > 0) { - /* Clear NAKSTS so that we can receive the data */ - - regval = stm32_getreg(STM32_OTG_DOEPCTL(0)); - regval |= OTG_DOEPCTL0_CNAK; - stm32_putreg(regval, STM32_OTG_DOEPCTL(0)); - - /* Wait for the data phase. */ - priv->ep0state = EP0STATE_SETUP_OUT; } else @@ -3316,11 +3341,6 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) } } - /* Enable the Rx Status Queue Level interrupt */ - - regval = stm32_getreg(STM32_OTG_GINTMSK); - regval |= OTG_GINT_RXFLVL; - stm32_putreg(regval, STM32_OTG_GINTMSK); } /**************************************************************************** @@ -3343,7 +3363,7 @@ static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv) regval = stm32_getreg(STM32_OTG_GUSBCFG); regval &= ~OTG_GUSBCFG_TRDT_MASK; - regval |= OTG_GUSBCFG_TRDT(5); + regval |= OTG_GUSBCFG_TRDT(6); stm32_putreg(regval, STM32_OTG_GUSBCFG); } @@ -3562,6 +3582,7 @@ static int stm32_usbinterrupt(int irq, FAR void *context) FAR struct stm32_usbdev_s *priv = &g_otghsdev; uint32_t regval; + uint32_t reserved; usbtrace(TRACE_INTENTRY(STM32_TRACEINTID_USB), 0); @@ -3579,8 +3600,15 @@ static int stm32_usbinterrupt(int irq, FAR void *context) /* Get the set of pending, un-masked interrupts */ regval = stm32_getreg(STM32_OTG_GINTSTS); + reserved = (regval & OTG_GINT_RESERVED); regval &= stm32_getreg(STM32_OTG_GINTMSK); + /* With out modifying the reserved bits, acknowledge all + * **Writable** pending irqs we will service below + */ + + stm32_putreg(((regval | reserved) & OTG_GINT_RC_W1), STM32_OTG_GINTSTS); + /* Break out of the loop when there are no further pending (and * unmasked) interrupts to be processes. */ @@ -3599,7 +3627,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT), (uint16_t)regval); stm32_epout_interrupt(priv); - stm32_putreg(OTG_GINT_OEP, STM32_OTG_GINTSTS); } /* IN endpoint interrupt. The core sets this bit to indicate that @@ -3610,7 +3637,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN), (uint16_t)regval); stm32_epin_interrupt(priv); - stm32_putreg(OTG_GINT_IEP, STM32_OTG_GINTSTS); } /* Host/device mode mismatch error interrupt */ @@ -3619,7 +3645,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTG_GINT_MMIS) != 0) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_MISMATCH), (uint16_t)regval); - stm32_putreg(OTG_GINT_MMIS, STM32_OTG_GINTSTS); } #endif @@ -3629,7 +3654,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_WAKEUP), (uint16_t)regval); stm32_resumeinterrupt(priv); - stm32_putreg(OTG_GINT_WKUP, STM32_OTG_GINTSTS); } /* USB suspend interrupt */ @@ -3638,7 +3662,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SUSPEND), (uint16_t)regval); stm32_suspendinterrupt(priv); - stm32_putreg(OTG_GINT_USBSUSP, STM32_OTG_GINTSTS); } /* Start of frame interrupt */ @@ -3647,7 +3670,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTG_GINT_SOF) != 0) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SOF), (uint16_t)regval); - stm32_putreg(OTG_GINT_SOF, STM32_OTG_GINTSTS); } #endif @@ -3659,12 +3681,11 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_RXFIFO), (uint16_t)regval); stm32_rxinterrupt(priv); - stm32_putreg(OTG_GINT_RXFLVL, STM32_OTG_GINTSTS); } /* USB reset interrupt */ - if ((regval & OTG_GINT_USBRST) != 0) + if ((regval & (OTG_GINT_USBRST | OTG_GINT_RSTDET)) != 0) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVRESET), (uint16_t)regval); @@ -3672,7 +3693,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) stm32_usbreset(priv); usbtrace(TRACE_INTEXIT(STM32_TRACEINTID_USB), 0); - stm32_putreg(OTG_GINT_USBRST, STM32_OTG_GINTSTS); return OK; } @@ -3682,7 +3702,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_ENUMDNE), (uint16_t)regval); stm32_enuminterrupt(priv); - stm32_putreg(OTG_GINT_ENUMDNE, STM32_OTG_GINTSTS); } /* Incomplete isochronous IN transfer interrupt. When the core finds @@ -3696,7 +3715,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOIXFR), (uint16_t)regval); stm32_isocininterrupt(priv); - stm32_putreg(OTG_GINT_IISOIXFR, STM32_OTG_GINTSTS); } /* Incomplete isochronous OUT transfer. For isochronous OUT @@ -3713,7 +3731,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOOXFR), (uint16_t)regval); stm32_isocoutinterrupt(priv); - stm32_putreg(OTG_GINT_IISOOXFR, STM32_OTG_GINTSTS); } #endif @@ -3724,7 +3741,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SRQ), (uint16_t)regval); stm32_sessioninterrupt(priv); - stm32_putreg(OTG_GINT_SRQ, STM32_OTG_GINTSTS); } /* OTG interrupt */ @@ -3733,7 +3749,6 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OTG), (uint16_t)regval); stm32_otginterrupt(priv); - stm32_putreg(OTG_GINT_OTG, STM32_OTG_GINTSTS); } #endif } @@ -5425,7 +5440,9 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) /* Clear any pending interrupts */ - stm32_putreg(0xbfffffff, STM32_OTG_GINTSTS); + regval = stm32_getreg(STM32_OTG_GINTSTS); + regval &= OTG_GINT_RESERVED; + stm32_putreg(regval | OTG_GINT_RC_W1, STM32_OTG_GINTSTS); #if defined(CONFIG_STM32F7_OTGHS) /* Disable the ULPI Clock enable in RCC AHB1 Register. This must From fdcf1681958c5465c56eaefe295ee2d0de32ec1d Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 2 Sep 2016 11:57:02 -0600 Subject: [PATCH 186/214] Update ChangeLog --- ChangeLog | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/ChangeLog b/ChangeLog index 699e2e037ae..a8f56d1e8e2 100755 --- a/ChangeLog +++ b/ChangeLog @@ -12598,4 +12598,77 @@ feature is EXPERIMENTAL because (1) it is untested and (2) has some know design issues that must be addressed before it can be of use (2016-08-28). + * CXXFLAGS: add -fcheck-new whenever -fno-exceptions is used. From Beat + Küng (2016-08-23). + * tools/mkfsdata.pl was still generating the old-style apps/include + inclusion paths (2016-08-23). + * drivers/sensors: Add drvier for the LIS3MDL 3 axis magnetometer. From + Alexander Entinger (2016-08-23). + * drivers/sensors: Add driver for the MLX90393 3 axis magnetometer. + From Alexander Entinger (2016-08-23). + * drivers/mtd: Add Fujistu MB85RS256B ramtron support. From Beat Küng + (2016-08-23). + * drivers/sensors: Add driver for the LIS3DSH 3 axis accelerometer. From + Alexander Entinger (2016-08-24). + * drivers/sensors: Add driver for the Bosch BMG160 3 axis gyroscope. + From Alexander Entinger (2016-08-24). + * STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and + STM32F107RC. From Aleksandr Vyhovanec (2016-08-24). + * libc/header files: Add POSIX type sig_atomic_t. From Sebastien + Lorquet (2016-08-24). + * libc/header files: isatty() should be prototypes in unstid.h, not + termios.h. From Sebastien Lorquet (2016-08-24). + * Documentation: Update to NuttX C coding style document with additions + discussing long comments on the right side of a statement or data + definition (2016-08-24). + * LPC43xx serial: Fix typos in LPC43 serial driver. Found by Vytautas + Lukenskas (2016-08-24). + * libc/time: This commit adds the difftime() function. The function + depends on the toolchain-dependent CONFIG_HAVE_DOUBLE so is not + available on tiny platforms. From Sebastien Lorquet (2016-08-24). + * libc/stdio: Add support for remove(). From Sebastien Lorquet + (2016-08-25). + * STM32 OTGFS device: Fix for lost first word from FIFO + 1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)* + 2) Acknowledge all pending int on entry to ISR that are Only rc_w1* + 3) Do not disable RXFVL* + 4) Loop until RXFVL is cleared* + 5) Only clear the NAK on the endpoint on the + OTGFS_GRXSTSD_PKTSTS_SETUPDONE to not loose the first WORD of + FIFO all the data (Bug Fix) + + Changed marked *are just driver clean up and ensure ints are not lost. + The bug fix is #5 + + Test case open putty and observer the Set/Get LineCoding. Without this + fix #5 the Get will not match the Set, and in fact the data might be + skewed by 4 bytes, that are lost from the FIFO if the + OTGFS_DOEPCTL0_CNAK bit is set in the OTGFS_GRXSTSD_PKTSTS_SETUPRECVD + as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE + + Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B + Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08 c8 .. 00 00 07 | 7a 72 + + From David Sidrane (2016-08-25). + * Add system() to stdlib.h. Actual implementation is in + apps/system/system (2016-08-25). + * include/nuttx/input: Add missing prototype for btn_lower_initialize() + (2016-08-27). + * configs/stm32f103-minimum: Add board config support to SPI LCD module + JLX12864G-086. From Alan Carvalho de Assis (2016-08-28). + * net/tcp: tcp_ipvX_bind() not actually using the ported selected with + port==0. Also removes duplicate call to pkt_input(). Issues noted by + Pascal Speck (2016-08-30). + * STM32 F7: Remove duplicate call to pkt_input from Ethernet driver. + Issues noted by Pascal Speck (2016-08-30). + * STM32L4 OTGFS device: Apply stm32 fix to stm32l4. From Sebastien + Lorquet (2016-08-31). + * drivers/contactless: Remove contactless drivers from drivers/wireless + to drivers contactless. From Sebastien Lorquet (2016-08-31). + * USB host composite is at least partially functional. No longer depends + on CONFIG_EXPERIMENTAL (2016-09-02). + * MTD: Fixed cloned typos in several FLASH drivers. From Aleksandr + Vyhovanec (2016-09-02). + * MTD: SPI-based driver for Macronix MX25L3233F or MX25L6433F. From + Aleksandr Vyhovanec (2016-09-02). From 87d2f86968bbdeada04d290cf39666a288054e24 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Mon, 5 Sep 2016 08:50:09 +0200 Subject: [PATCH 187/214] Register renames to allow stm32l4 usb device compilation --- arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h | 666 +++++++++--------- arch/arm/src/stm32l4/stm32l4_otgfsdev.c | 2 +- 2 files changed, 334 insertions(+), 334 deletions(-) diff --git a/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h b/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h index cc9c4ddc2bd..39065c05706 100644 --- a/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h +++ b/arch/arm/src/stm32l4/chip/stm32l4x6xx_otgfs.h @@ -61,408 +61,408 @@ /* Register Offsets *********************************************************************************/ /* Core global control and status registers */ -#define STM32_OTGFS_GOTGCTL_OFFSET 0x0000 /* Control and status register */ -#define STM32_OTGFS_GOTGINT_OFFSET 0x0004 /* Interrupt register */ -#define STM32_OTGFS_GAHBCFG_OFFSET 0x0008 /* AHB configuration register */ -#define STM32_OTGFS_GUSBCFG_OFFSET 0x000c /* USB configuration register */ -#define STM32_OTGFS_GRSTCTL_OFFSET 0x0010 /* Reset register */ -#define STM32_OTGFS_GINTSTS_OFFSET 0x0014 /* Core interrupt register */ -#define STM32_OTGFS_GINTMSK_OFFSET 0x0018 /* Interrupt mask register */ -#define STM32_OTGFS_GRXSTSR_OFFSET 0x001c /* Receive status debug read/OTG status read register */ -#define STM32_OTGFS_GRXSTSP_OFFSET 0x0020 /* Receive status debug read/OTG status pop register */ -#define STM32_OTGFS_GRXFSIZ_OFFSET 0x0024 /* Receive FIFO size register */ -#define STM32_OTGFS_HNPTXFSIZ_OFFSET 0x0028 /* Host non-periodic transmit FIFO size register */ -#define STM32_OTGFS_DIEPTXF0_OFFSET 0x0028 /* Endpoint 0 Transmit FIFO size */ -#define STM32_OTGFS_HNPTXSTS_OFFSET 0x002c /* Non-periodic transmit FIFO/queue status register */ -#define STM32_OTGFS_GCCFG_OFFSET 0x0038 /* General core configuration register */ -#define STM32_OTGFS_CID_OFFSET 0x003c /* Core ID register */ -#define STM32_OTGFS_GLPMCFG_OFFSET 0x0054 /* LPM configuration register */ -#define STM32_OTGFS_GPWRDN_OFFSET 0x0058 /* Power down register */ -#define STM32_OTGFS_GADPCTL_OFSSET 0x005c /* ADP timer, control and status register */ -#define STM32_OTGFS_HPTXFSIZ_OFFSET 0x0100 /* Host periodic transmit FIFO size register */ +#define STM32L4_OTGFS_GOTGCTL_OFFSET 0x0000 /* Control and status register */ +#define STM32L4_OTGFS_GOTGINT_OFFSET 0x0004 /* Interrupt register */ +#define STM32L4_OTGFS_GAHBCFG_OFFSET 0x0008 /* AHB configuration register */ +#define STM32L4_OTGFS_GUSBCFG_OFFSET 0x000c /* USB configuration register */ +#define STM32L4_OTGFS_GRSTCTL_OFFSET 0x0010 /* Reset register */ +#define STM32L4_OTGFS_GINTSTS_OFFSET 0x0014 /* Core interrupt register */ +#define STM32L4_OTGFS_GINTMSK_OFFSET 0x0018 /* Interrupt mask register */ +#define STM32L4_OTGFS_GRXSTSR_OFFSET 0x001c /* Receive status debug read/OTG status read register */ +#define STM32L4_OTGFS_GRXSTSP_OFFSET 0x0020 /* Receive status debug read/OTG status pop register */ +#define STM32L4_OTGFS_GRXFSIZ_OFFSET 0x0024 /* Receive FIFO size register */ +#define STM32L4_OTGFS_HNPTXFSIZ_OFFSET 0x0028 /* Host non-periodic transmit FIFO size register */ +#define STM32L4_OTGFS_DIEPTXF0_OFFSET 0x0028 /* Endpoint 0 Transmit FIFO size */ +#define STM32L4_OTGFS_HNPTXSTS_OFFSET 0x002c /* Non-periodic transmit FIFO/queue status register */ +#define STM32L4_OTGFS_GCCFG_OFFSET 0x0038 /* General core configuration register */ +#define STM32L4_OTGFS_CID_OFFSET 0x003c /* Core ID register */ +#define STM32L4_OTGFS_GLPMCFG_OFFSET 0x0054 /* LPM configuration register */ +#define STM32L4_OTGFS_GPWRDN_OFFSET 0x0058 /* Power down register */ +#define STM32L4_OTGFS_GADPCTL_OFSSET 0x005c /* ADP timer, control and status register */ +#define STM32L4_OTGFS_HPTXFSIZ_OFFSET 0x0100 /* Host periodic transmit FIFO size register */ -#define STM32_OTGFS_DIEPTXF_OFFSET(n) (104+(((n)-1) << 2)) -#define STM32_OTGFS_DIEPTXF1_OFFSET 0x0104 /* Device IN endpoint transmit FIFO1 size register */ -#define STM32_OTGFS_DIEPTXF2_OFFSET 0x0108 /* Device IN endpoint transmit FIFO2 size register */ -#define STM32_OTGFS_DIEPTXF3_OFFSET 0x010c /* Device IN endpoint transmit FIFO3 size register */ -#define STM32_OTGFS_DIEPTXF4_OFFSET 0x0110 /* Device IN endpoint transmit FIFO4 size register */ -#define STM32_OTGFS_DIEPTXF5_OFFSET 0x0114 /* Device IN endpoint transmit FIFO5 size register */ +#define STM32L4_OTGFS_DIEPTXF_OFFSET(n) (104+(((n)-1) << 2)) +#define STM32L4_OTGFS_DIEPTXF1_OFFSET 0x0104 /* Device IN endpoint transmit FIFO1 size register */ +#define STM32L4_OTGFS_DIEPTXF2_OFFSET 0x0108 /* Device IN endpoint transmit FIFO2 size register */ +#define STM32L4_OTGFS_DIEPTXF3_OFFSET 0x010c /* Device IN endpoint transmit FIFO3 size register */ +#define STM32L4_OTGFS_DIEPTXF4_OFFSET 0x0110 /* Device IN endpoint transmit FIFO4 size register */ +#define STM32L4_OTGFS_DIEPTXF5_OFFSET 0x0114 /* Device IN endpoint transmit FIFO5 size register */ /* Host-mode control and status registers */ -#define STM32_OTGFS_HCFG_OFFSET 0x0400 /* Host configuration register */ -#define STM32_OTGFS_HFIR_OFFSET 0x0404 /* Host frame interval register */ -#define STM32_OTGFS_HFNUM_OFFSET 0x0408 /* Host frame number/frame time remaining register */ -#define STM32_OTGFS_HPTXSTS_OFFSET 0x0410 /* Host periodic transmit FIFO/queue status register */ -#define STM32_OTGFS_HAINT_OFFSET 0x0414 /* Host all channels interrupt register */ -#define STM32_OTGFS_HAINTMSK_OFFSET 0x0418 /* Host all channels interrupt mask register */ -#define STM32_OTGFS_HPRT_OFFSET 0x0440 /* Host port control and status register */ +#define STM32L4_OTGFS_HCFG_OFFSET 0x0400 /* Host configuration register */ +#define STM32L4_OTGFS_HFIR_OFFSET 0x0404 /* Host frame interval register */ +#define STM32L4_OTGFS_HFNUM_OFFSET 0x0408 /* Host frame number/frame time remaining register */ +#define STM32L4_OTGFS_HPTXSTS_OFFSET 0x0410 /* Host periodic transmit FIFO/queue status register */ +#define STM32L4_OTGFS_HAINT_OFFSET 0x0414 /* Host all channels interrupt register */ +#define STM32L4_OTGFS_HAINTMSK_OFFSET 0x0418 /* Host all channels interrupt mask register */ +#define STM32L4_OTGFS_HPRT_OFFSET 0x0440 /* Host port control and status register */ -#define STM32_OTGFS_CHAN_OFFSET(n) (0x500 + ((n) << 5) -#define STM32_OTGFS_HCCHAR_CHOFFSET 0x0000 /* Host channel characteristics register */ -#define STM32_OTGFS_HCINT_CHOFFSET 0x0008 /* Host channel interrupt register */ -#define STM32_OTGFS_HCINTMSK_CHOFFSET 0x000c /* Host channel interrupt mask register */ -#define STM32_OTGFS_HCTSIZ_CHOFFSET 0x0010 /* Host channel interrupt register */ +#define STM32L4_OTGFS_CHAN_OFFSET(n) (0x500 + ((n) << 5) +#define STM32L4_OTGFS_HCCHAR_CHOFFSET 0x0000 /* Host channel characteristics register */ +#define STM32L4_OTGFS_HCINT_CHOFFSET 0x0008 /* Host channel interrupt register */ +#define STM32L4_OTGFS_HCINTMSK_CHOFFSET 0x000c /* Host channel interrupt mask register */ +#define STM32L4_OTGFS_HCTSIZ_CHOFFSET 0x0010 /* Host channel interrupt register */ -#define STM32_OTGFS_HCCHAR_OFFSET(n) (0x500 + ((n) << 5)) -#define STM32_OTGFS_HCCHAR0_OFFSET 0x0500 /* Host channel-0 characteristics register */ -#define STM32_OTGFS_HCCHAR1_OFFSET 0x0520 /* Host channel-1 characteristics register */ -#define STM32_OTGFS_HCCHAR2_OFFSET 0x0540 /* Host channel-2 characteristics register */ -#define STM32_OTGFS_HCCHAR3_OFFSET 0x0560 /* Host channel-3 characteristics register */ -#define STM32_OTGFS_HCCHAR4_OFFSET 0x0580 /* Host channel-4 characteristics register */ -#define STM32_OTGFS_HCCHAR5_OFFSET 0x05a0 /* Host channel-5 characteristics register */ -#define STM32_OTGFS_HCCHAR6_OFFSET 0x05c0 /* Host channel-6 characteristics register */ -#define STM32_OTGFS_HCCHAR7_OFFSET 0x05e0 /* Host channel-7 characteristics register */ -#define STM32_OTGFS_HCCHAR8_OFFSET 0x0600 /* Host channel-8 characteristics register */ -#define STM32_OTGFS_HCCHAR9_OFFSET 0x0620 /* Host channel-9 characteristics register */ -#define STM32_OTGFS_HCCHAR10_OFFSET 0x0640 /* Host channel-10 characteristics register */ -#define STM32_OTGFS_HCCHAR11_OFFSET 0x0660 /* Host channel-11 characteristics register */ +#define STM32L4_OTGFS_HCCHAR_OFFSET(n) (0x500 + ((n) << 5)) +#define STM32L4_OTGFS_HCCHAR0_OFFSET 0x0500 /* Host channel-0 characteristics register */ +#define STM32L4_OTGFS_HCCHAR1_OFFSET 0x0520 /* Host channel-1 characteristics register */ +#define STM32L4_OTGFS_HCCHAR2_OFFSET 0x0540 /* Host channel-2 characteristics register */ +#define STM32L4_OTGFS_HCCHAR3_OFFSET 0x0560 /* Host channel-3 characteristics register */ +#define STM32L4_OTGFS_HCCHAR4_OFFSET 0x0580 /* Host channel-4 characteristics register */ +#define STM32L4_OTGFS_HCCHAR5_OFFSET 0x05a0 /* Host channel-5 characteristics register */ +#define STM32L4_OTGFS_HCCHAR6_OFFSET 0x05c0 /* Host channel-6 characteristics register */ +#define STM32L4_OTGFS_HCCHAR7_OFFSET 0x05e0 /* Host channel-7 characteristics register */ +#define STM32L4_OTGFS_HCCHAR8_OFFSET 0x0600 /* Host channel-8 characteristics register */ +#define STM32L4_OTGFS_HCCHAR9_OFFSET 0x0620 /* Host channel-9 characteristics register */ +#define STM32L4_OTGFS_HCCHAR10_OFFSET 0x0640 /* Host channel-10 characteristics register */ +#define STM32L4_OTGFS_HCCHAR11_OFFSET 0x0660 /* Host channel-11 characteristics register */ -#define STM32_OTGFS_HCINT_OFFSET(n) (0x508 + ((n) << 5)) -#define STM32_OTGFS_HCINT0_OFFSET 0x0508 /* Host channel-0 interrupt register */ -#define STM32_OTGFS_HCINT1_OFFSET 0x0528 /* Host channel-1 interrupt register */ -#define STM32_OTGFS_HCINT2_OFFSET 0x0548 /* Host channel-2 interrupt register */ -#define STM32_OTGFS_HCINT3_OFFSET 0x0568 /* Host channel-3 interrupt register */ -#define STM32_OTGFS_HCINT4_OFFSET 0x0588 /* Host channel-4 interrupt register */ -#define STM32_OTGFS_HCINT5_OFFSET 0x05a8 /* Host channel-5 interrupt register */ -#define STM32_OTGFS_HCINT6_OFFSET 0x05c8 /* Host channel-6 interrupt register */ -#define STM32_OTGFS_HCINT7_OFFSET 0x05e8 /* Host channel-7 interrupt register */ -#define STM32_OTGFS_HCINT8_OFFSET 0x0608 /* Host channel-8 interrupt register */ -#define STM32_OTGFS_HCINT9_OFFSET 0x0628 /* Host channel-9 interrupt register */ -#define STM32_OTGFS_HCINT10_OFFSET 0x0648 /* Host channel-10 interrupt register */ -#define STM32_OTGFS_HCINT11_OFFSET 0x0668 /* Host channel-11 interrupt register */ +#define STM32L4_OTGFS_HCINT_OFFSET(n) (0x508 + ((n) << 5)) +#define STM32L4_OTGFS_HCINT0_OFFSET 0x0508 /* Host channel-0 interrupt register */ +#define STM32L4_OTGFS_HCINT1_OFFSET 0x0528 /* Host channel-1 interrupt register */ +#define STM32L4_OTGFS_HCINT2_OFFSET 0x0548 /* Host channel-2 interrupt register */ +#define STM32L4_OTGFS_HCINT3_OFFSET 0x0568 /* Host channel-3 interrupt register */ +#define STM32L4_OTGFS_HCINT4_OFFSET 0x0588 /* Host channel-4 interrupt register */ +#define STM32L4_OTGFS_HCINT5_OFFSET 0x05a8 /* Host channel-5 interrupt register */ +#define STM32L4_OTGFS_HCINT6_OFFSET 0x05c8 /* Host channel-6 interrupt register */ +#define STM32L4_OTGFS_HCINT7_OFFSET 0x05e8 /* Host channel-7 interrupt register */ +#define STM32L4_OTGFS_HCINT8_OFFSET 0x0608 /* Host channel-8 interrupt register */ +#define STM32L4_OTGFS_HCINT9_OFFSET 0x0628 /* Host channel-9 interrupt register */ +#define STM32L4_OTGFS_HCINT10_OFFSET 0x0648 /* Host channel-10 interrupt register */ +#define STM32L4_OTGFS_HCINT11_OFFSET 0x0668 /* Host channel-11 interrupt register */ -#define STM32_OTGFS_HCINTMSK_OFFSET(n) (0x50c + ((n) << 5)) -#define STM32_OTGFS_HCINTMSK0_OFFSET 0x050c /* Host channel-0 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK1_OFFSET 0x052c /* Host channel-1 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK2_OFFSET 0x054c /* Host channel-2 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK3_OFFSET 0x056c /* Host channel-3 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK4_OFFSET 0x058c /* Host channel-4 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK5_OFFSET 0x05ac /* Host channel-5 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK6_OFFSET 0x05cc /* Host channel-6 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK7_OFFSET 0x05ec /* Host channel-7 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK8_OFFSET 0x060c /* Host channel-8 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK9_OFFSET 0x062c /* Host channel-9 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK10_OFFSET 0x064c /* Host channel-10 interrupt mask register */ -#define STM32_OTGFS_HCINTMSK11_OFFSET 0x066c /* Host channel-11 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK_OFFSET(n) (0x50c + ((n) << 5)) +#define STM32L4_OTGFS_HCINTMSK0_OFFSET 0x050c /* Host channel-0 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK1_OFFSET 0x052c /* Host channel-1 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK2_OFFSET 0x054c /* Host channel-2 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK3_OFFSET 0x056c /* Host channel-3 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK4_OFFSET 0x058c /* Host channel-4 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK5_OFFSET 0x05ac /* Host channel-5 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK6_OFFSET 0x05cc /* Host channel-6 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK7_OFFSET 0x05ec /* Host channel-7 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK8_OFFSET 0x060c /* Host channel-8 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK9_OFFSET 0x062c /* Host channel-9 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK10_OFFSET 0x064c /* Host channel-10 interrupt mask register */ +#define STM32L4_OTGFS_HCINTMSK11_OFFSET 0x066c /* Host channel-11 interrupt mask register */ -#define STM32_OTGFS_HCTSIZ_OFFSET(n) (0x510 + ((n) << 5)) -#define STM32_OTGFS_HCTSIZ0_OFFSET 0x0510 /* Host channel-0 interrupt register */ -#define STM32_OTGFS_HCTSIZ1_OFFSET 0x0530 /* Host channel-1 interrupt register */ -#define STM32_OTGFS_HCTSIZ2_OFFSET 0x0550 /* Host channel-2 interrupt register */ -#define STM32_OTGFS_HCTSIZ3_OFFSET 0x0570 /* Host channel-3 interrupt register */ -#define STM32_OTGFS_HCTSIZ4_OFFSET 0x0590 /* Host channel-4 interrupt register */ -#define STM32_OTGFS_HCTSIZ5_OFFSET 0x05b0 /* Host channel-5 interrupt register */ -#define STM32_OTGFS_HCTSIZ6_OFFSET 0x05d0 /* Host channel-6 interrupt register */ -#define STM32_OTGFS_HCTSIZ7_OFFSET 0x05f0 /* Host channel-7 interrupt register */ -#define STM32_OTGFS_HCTSIZ8_OFFSET 0x0610 /* Host channel-8 interrupt register */ -#define STM32_OTGFS_HCTSIZ9_OFFSET 0x0630 /* Host channel-9 interrupt register */ -#define STM32_OTGFS_HCTSIZ10_OFFSET 0x0650 /* Host channel-10 interrupt register */ -#define STM32_OTGFS_HCTSIZ11_OFFSET 0x0670 /* Host channel-11 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ_OFFSET(n) (0x510 + ((n) << 5)) +#define STM32L4_OTGFS_HCTSIZ0_OFFSET 0x0510 /* Host channel-0 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ1_OFFSET 0x0530 /* Host channel-1 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ2_OFFSET 0x0550 /* Host channel-2 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ3_OFFSET 0x0570 /* Host channel-3 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ4_OFFSET 0x0590 /* Host channel-4 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ5_OFFSET 0x05b0 /* Host channel-5 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ6_OFFSET 0x05d0 /* Host channel-6 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ7_OFFSET 0x05f0 /* Host channel-7 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ8_OFFSET 0x0610 /* Host channel-8 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ9_OFFSET 0x0630 /* Host channel-9 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ10_OFFSET 0x0650 /* Host channel-10 interrupt register */ +#define STM32L4_OTGFS_HCTSIZ11_OFFSET 0x0670 /* Host channel-11 interrupt register */ /* Device-mode control and status registers */ -#define STM32_OTGFS_DCFG_OFFSET 0x0800 /* Device configuration register */ -#define STM32_OTGFS_DCTL_OFFSET 0x0804 /* Device control register */ -#define STM32_OTGFS_DSTS_OFFSET 0x0808 /* Device status register */ -#define STM32_OTGFS_DIEPMSK_OFFSET 0x0810 /* Device IN endpoint common interrupt mask register */ -#define STM32_OTGFS_DOEPMSK_OFFSET 0x0814 /* Device OUT endpoint common interrupt mask register */ -#define STM32_OTGFS_DAINT_OFFSET 0x0818 /* Device all endpoints interrupt register */ -#define STM32_OTGFS_DAINTMSK_OFFSET 0x081c /* All endpoints interrupt mask register */ -#define STM32_OTGFS_DVBUSDIS_OFFSET 0x0828 /* Device VBUS discharge time register */ -#define STM32_OTGFS_DVBUSPULSE_OFFSET 0x082c /* Device VBUS pulsing time register */ -#define STM32_OTGFS_DIEPEMPMSK_OFFSET 0x0834 /* Device IN endpoint FIFO empty interrupt mask register */ +#define STM32L4_OTGFS_DCFG_OFFSET 0x0800 /* Device configuration register */ +#define STM32L4_OTGFS_DCTL_OFFSET 0x0804 /* Device control register */ +#define STM32L4_OTGFS_DSTS_OFFSET 0x0808 /* Device status register */ +#define STM32L4_OTGFS_DIEPMSK_OFFSET 0x0810 /* Device IN endpoint common interrupt mask register */ +#define STM32L4_OTGFS_DOEPMSK_OFFSET 0x0814 /* Device OUT endpoint common interrupt mask register */ +#define STM32L4_OTGFS_DAINT_OFFSET 0x0818 /* Device all endpoints interrupt register */ +#define STM32L4_OTGFS_DAINTMSK_OFFSET 0x081c /* All endpoints interrupt mask register */ +#define STM32L4_OTGFS_DVBUSDIS_OFFSET 0x0828 /* Device VBUS discharge time register */ +#define STM32L4_OTGFS_DVBUSPULSE_OFFSET 0x082c /* Device VBUS pulsing time register */ +#define STM32L4_OTGFS_DIEPEMPMSK_OFFSET 0x0834 /* Device IN endpoint FIFO empty interrupt mask register */ -#define STM32_OTGFS_DIEP_OFFSET(n) (0x0900 + ((n) << 5)) -#define STM32_OTGFS_DIEPCTL_EPOFFSET 0x0000 /* Device endpoint control register */ -#define STM32_OTGFS_DIEPINT_EPOFFSET 0x0008 /* Device endpoint interrupt register */ -#define STM32_OTGFS_DIEPTSIZ_EPOFFSET 0x0010 /* Device IN endpoint transfer size register */ -#define STM32_OTGFS_DTXFSTS_EPOFFSET 0x0018 /* Device IN endpoint transmit FIFO status register */ +#define STM32L4_OTGFS_DIEP_OFFSET(n) (0x0900 + ((n) << 5)) +#define STM32L4_OTGFS_DIEPCTL_EPOFFSET 0x0000 /* Device endpoint control register */ +#define STM32L4_OTGFS_DIEPINT_EPOFFSET 0x0008 /* Device endpoint interrupt register */ +#define STM32L4_OTGFS_DIEPTSIZ_EPOFFSET 0x0010 /* Device IN endpoint transfer size register */ +#define STM32L4_OTGFS_DTXFSTS_EPOFFSET 0x0018 /* Device IN endpoint transmit FIFO status register */ -#define STM32_OTGFS_DIEPCTL_OFFSET(n) (0x0900 + ((n) << 5)) -#define STM32_OTGFS_DIEPCTL0_OFFSET 0x0900 /* Device control IN endpoint 0 control register */ -#define STM32_OTGFS_DIEPCTL1_OFFSET 0x0920 /* Device control IN endpoint 2 control register */ -#define STM32_OTGFS_DIEPCTL2_OFFSET 0x0940 /* Device control IN endpoint 3 control register */ -#define STM32_OTGFS_DIEPCTL3_OFFSET 0x0960 /* Device control IN endpoint 4 control register */ -#define STM32_OTGFS_DIEPCTL4_OFFSET 0x0980 /* Device control IN endpoint 4 control register */ -#define STM32_OTGFS_DIEPCTL5_OFFSET 0x09a0 /* Device control IN endpoint 4 control register */ +#define STM32L4_OTGFS_DIEPCTL_OFFSET(n) (0x0900 + ((n) << 5)) +#define STM32L4_OTGFS_DIEPCTL0_OFFSET 0x0900 /* Device control IN endpoint 0 control register */ +#define STM32L4_OTGFS_DIEPCTL1_OFFSET 0x0920 /* Device control IN endpoint 2 control register */ +#define STM32L4_OTGFS_DIEPCTL2_OFFSET 0x0940 /* Device control IN endpoint 3 control register */ +#define STM32L4_OTGFS_DIEPCTL3_OFFSET 0x0960 /* Device control IN endpoint 4 control register */ +#define STM32L4_OTGFS_DIEPCTL4_OFFSET 0x0980 /* Device control IN endpoint 4 control register */ +#define STM32L4_OTGFS_DIEPCTL5_OFFSET 0x09a0 /* Device control IN endpoint 4 control register */ -#define STM32_OTGFS_DIEPINT_OFFSET(n) (0x0908 + ((n) << 5)) -#define STM32_OTGFS_DIEPINT0_OFFSET 0x0908 /* Device endpoint-0 interrupt register */ -#define STM32_OTGFS_DIEPINT1_OFFSET 0x0928 /* Device endpoint-1 interrupt register */ -#define STM32_OTGFS_DIEPINT2_OFFSET 0x0948 /* Device endpoint-2 interrupt register */ -#define STM32_OTGFS_DIEPINT3_OFFSET 0x0968 /* Device endpoint-3 interrupt register */ -#define STM32_OTGFS_DIEPINT4_OFFSET 0x0988 /* Device endpoint-3 interrupt register */ -#define STM32_OTGFS_DIEPINT5_OFFSET 0x09a8 /* Device endpoint-3 interrupt register */ +#define STM32L4_OTGFS_DIEPINT_OFFSET(n) (0x0908 + ((n) << 5)) +#define STM32L4_OTGFS_DIEPINT0_OFFSET 0x0908 /* Device endpoint-0 interrupt register */ +#define STM32L4_OTGFS_DIEPINT1_OFFSET 0x0928 /* Device endpoint-1 interrupt register */ +#define STM32L4_OTGFS_DIEPINT2_OFFSET 0x0948 /* Device endpoint-2 interrupt register */ +#define STM32L4_OTGFS_DIEPINT3_OFFSET 0x0968 /* Device endpoint-3 interrupt register */ +#define STM32L4_OTGFS_DIEPINT4_OFFSET 0x0988 /* Device endpoint-3 interrupt register */ +#define STM32L4_OTGFS_DIEPINT5_OFFSET 0x09a8 /* Device endpoint-3 interrupt register */ -#define STM32_OTGFS_DIEPTSIZ_OFFSET(n) (0x910 + ((n) << 5)) -#define STM32_OTGFS_DIEPTSIZ0_OFFSET 0x0910 /* Device IN endpoint 0 transfer size register */ -#define STM32_OTGFS_DIEPTSIZ1_OFFSET 0x0930 /* Device IN endpoint 1 transfer size register */ -#define STM32_OTGFS_DIEPTSIZ2_OFFSET 0x0950 /* Device IN endpoint 2 transfer size register */ -#define STM32_OTGFS_DIEPTSIZ3_OFFSET 0x0970 /* Device IN endpoint 3 transfer size register */ -#define STM32_OTGFS_DIEPTSIZ4_OFFSET 0x0990 /* Device IN endpoint 3 transfer size register */ -#define STM32_OTGFS_DIEPTSIZ5_OFFSET 0x09b0 /* Device IN endpoint 3 transfer size register */ +#define STM32L4_OTGFS_DIEPTSIZ_OFFSET(n) (0x910 + ((n) << 5)) +#define STM32L4_OTGFS_DIEPTSIZ0_OFFSET 0x0910 /* Device IN endpoint 0 transfer size register */ +#define STM32L4_OTGFS_DIEPTSIZ1_OFFSET 0x0930 /* Device IN endpoint 1 transfer size register */ +#define STM32L4_OTGFS_DIEPTSIZ2_OFFSET 0x0950 /* Device IN endpoint 2 transfer size register */ +#define STM32L4_OTGFS_DIEPTSIZ3_OFFSET 0x0970 /* Device IN endpoint 3 transfer size register */ +#define STM32L4_OTGFS_DIEPTSIZ4_OFFSET 0x0990 /* Device IN endpoint 3 transfer size register */ +#define STM32L4_OTGFS_DIEPTSIZ5_OFFSET 0x09b0 /* Device IN endpoint 3 transfer size register */ -#define STM32_OTGFS_DTXFSTS_OFFSET(n) (0x0918 + ((n) << 5)) -#define STM32_OTGFS_DTXFSTS0_OFFSET 0x0918 /* Device OUT endpoint-0 TxFIFO status register */ -#define STM32_OTGFS_DTXFSTS1_OFFSET 0x0938 /* Device OUT endpoint-1 TxFIFO status register */ -#define STM32_OTGFS_DTXFSTS2_OFFSET 0x0958 /* Device OUT endpoint-2 TxFIFO status register */ -#define STM32_OTGFS_DTXFSTS3_OFFSET 0x0978 /* Device OUT endpoint-3 TxFIFO status register */ -#define STM32_OTGFS_DTXFSTS4_OFFSET 0x0998 /* Device OUT endpoint-3 TxFIFO status register */ -#define STM32_OTGFS_DTXFSTS5_OFFSET 0x09b8 /* Device OUT endpoint-3 TxFIFO status register */ +#define STM32L4_OTGFS_DTXFSTS_OFFSET(n) (0x0918 + ((n) << 5)) +#define STM32L4_OTGFS_DTXFSTS0_OFFSET 0x0918 /* Device OUT endpoint-0 TxFIFO status register */ +#define STM32L4_OTGFS_DTXFSTS1_OFFSET 0x0938 /* Device OUT endpoint-1 TxFIFO status register */ +#define STM32L4_OTGFS_DTXFSTS2_OFFSET 0x0958 /* Device OUT endpoint-2 TxFIFO status register */ +#define STM32L4_OTGFS_DTXFSTS3_OFFSET 0x0978 /* Device OUT endpoint-3 TxFIFO status register */ +#define STM32L4_OTGFS_DTXFSTS4_OFFSET 0x0998 /* Device OUT endpoint-3 TxFIFO status register */ +#define STM32L4_OTGFS_DTXFSTS5_OFFSET 0x09b8 /* Device OUT endpoint-3 TxFIFO status register */ -#define STM32_OTGFS_DOEP_OFFSET(n) (0x0b00 + ((n) << 5)) -#define STM32_OTGFS_DOEPCTL_EPOFFSET 0x0000 /* Device control OUT endpoint 0 control register */ -#define STM32_OTGFS_DOEPINT_EPOFFSET 0x0008 /* Device endpoint-x interrupt register */ -#define STM32_OTGFS_DOEPTSIZ_EPOFFSET 0x0010 /* Device endpoint OUT transfer size register */ +#define STM32L4_OTGFS_DOEP_OFFSET(n) (0x0b00 + ((n) << 5)) +#define STM32L4_OTGFS_DOEPCTL_EPOFFSET 0x0000 /* Device control OUT endpoint 0 control register */ +#define STM32L4_OTGFS_DOEPINT_EPOFFSET 0x0008 /* Device endpoint-x interrupt register */ +#define STM32L4_OTGFS_DOEPTSIZ_EPOFFSET 0x0010 /* Device endpoint OUT transfer size register */ -#define STM32_OTGFS_DOEPCTL_OFFSET(n) (0x0b00 + ((n) << 5)) -#define STM32_OTGFS_DOEPCTL0_OFFSET 0x00b00 /* Device OUT endpoint 0 control register */ -#define STM32_OTGFS_DOEPCTL1_OFFSET 0x00b20 /* Device OUT endpoint 1 control register */ -#define STM32_OTGFS_DOEPCTL2_OFFSET 0x00b40 /* Device OUT endpoint 2 control register */ -#define STM32_OTGFS_DOEPCTL3_OFFSET 0x00b60 /* Device OUT endpoint 3 control register */ -#define STM32_OTGFS_DOEPCTL4_OFFSET 0x00b80 /* Device OUT endpoint 4 control register */ -#define STM32_OTGFS_DOEPCTL5_OFFSET 0x00ba0 /* Device OUT endpoint 5 control register */ +#define STM32L4_OTGFS_DOEPCTL_OFFSET(n) (0x0b00 + ((n) << 5)) +#define STM32L4_OTGFS_DOEPCTL0_OFFSET 0x00b00 /* Device OUT endpoint 0 control register */ +#define STM32L4_OTGFS_DOEPCTL1_OFFSET 0x00b20 /* Device OUT endpoint 1 control register */ +#define STM32L4_OTGFS_DOEPCTL2_OFFSET 0x00b40 /* Device OUT endpoint 2 control register */ +#define STM32L4_OTGFS_DOEPCTL3_OFFSET 0x00b60 /* Device OUT endpoint 3 control register */ +#define STM32L4_OTGFS_DOEPCTL4_OFFSET 0x00b80 /* Device OUT endpoint 4 control register */ +#define STM32L4_OTGFS_DOEPCTL5_OFFSET 0x00ba0 /* Device OUT endpoint 5 control register */ -#define STM32_OTGFS_DOEPINT_OFFSET(n) (0x0b08 + ((n) << 5)) -#define STM32_OTGFS_DOEPINT0_OFFSET 0x00b08 /* Device endpoint-0 interrupt register */ -#define STM32_OTGFS_DOEPINT1_OFFSET 0x00b28 /* Device endpoint-1 interrupt register */ -#define STM32_OTGFS_DOEPINT2_OFFSET 0x00b48 /* Device endpoint-2 interrupt register */ -#define STM32_OTGFS_DOEPINT3_OFFSET 0x00b68 /* Device endpoint-3 interrupt register */ -#define STM32_OTGFS_DOEPINT4_OFFSET 0x00b88 /* Device endpoint-4 interrupt register */ -#define STM32_OTGFS_DOEPINT5_OFFSET 0x00ba8 /* Device endpoint-5 interrupt register */ +#define STM32L4_OTGFS_DOEPINT_OFFSET(n) (0x0b08 + ((n) << 5)) +#define STM32L4_OTGFS_DOEPINT0_OFFSET 0x00b08 /* Device endpoint-0 interrupt register */ +#define STM32L4_OTGFS_DOEPINT1_OFFSET 0x00b28 /* Device endpoint-1 interrupt register */ +#define STM32L4_OTGFS_DOEPINT2_OFFSET 0x00b48 /* Device endpoint-2 interrupt register */ +#define STM32L4_OTGFS_DOEPINT3_OFFSET 0x00b68 /* Device endpoint-3 interrupt register */ +#define STM32L4_OTGFS_DOEPINT4_OFFSET 0x00b88 /* Device endpoint-4 interrupt register */ +#define STM32L4_OTGFS_DOEPINT5_OFFSET 0x00ba8 /* Device endpoint-5 interrupt register */ -#define STM32_OTGFS_DOEPTSIZ_OFFSET(n) (0x0b10 + ((n) << 5)) -#define STM32_OTGFS_DOEPTSIZ0_OFFSET 0x00b10 /* Device OUT endpoint-0 transfer size register */ -#define STM32_OTGFS_DOEPTSIZ1_OFFSET 0x00b30 /* Device OUT endpoint-1 transfer size register */ -#define STM32_OTGFS_DOEPTSIZ2_OFFSET 0x00b50 /* Device OUT endpoint-2 transfer size register */ -#define STM32_OTGFS_DOEPTSIZ3_OFFSET 0x00b70 /* Device OUT endpoint-3 transfer size register */ -#define STM32_OTGFS_DOEPTSIZ4_OFFSET 0x00b90 /* Device OUT endpoint-4 transfer size register */ -#define STM32_OTGFS_DOEPTSIZ5_OFFSET 0x00bb0 /* Device OUT endpoint-5 transfer size register */ +#define STM32L4_OTGFS_DOEPTSIZ_OFFSET(n) (0x0b10 + ((n) << 5)) +#define STM32L4_OTGFS_DOEPTSIZ0_OFFSET 0x00b10 /* Device OUT endpoint-0 transfer size register */ +#define STM32L4_OTGFS_DOEPTSIZ1_OFFSET 0x00b30 /* Device OUT endpoint-1 transfer size register */ +#define STM32L4_OTGFS_DOEPTSIZ2_OFFSET 0x00b50 /* Device OUT endpoint-2 transfer size register */ +#define STM32L4_OTGFS_DOEPTSIZ3_OFFSET 0x00b70 /* Device OUT endpoint-3 transfer size register */ +#define STM32L4_OTGFS_DOEPTSIZ4_OFFSET 0x00b90 /* Device OUT endpoint-4 transfer size register */ +#define STM32L4_OTGFS_DOEPTSIZ5_OFFSET 0x00bb0 /* Device OUT endpoint-5 transfer size register */ /* Power and clock gating registers */ -#define STM32_OTGFS_PCGCCTL_OFFSET 0x0e00 /* Power and clock gating control register */ +#define STM32L4_OTGFS_PCGCCTL_OFFSET 0x0e00 /* Power and clock gating control register */ /* Data FIFO (DFIFO) access registers */ -#define STM32_OTGFS_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12)) -#define STM32_OTGFS_DFIFO_HCH_OFFSET(n) (0x1000 + ((n) << 12)) +#define STM32L4_OTGFS_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12)) +#define STM32L4_OTGFS_DFIFO_HCH_OFFSET(n) (0x1000 + ((n) << 12)) -#define STM32_OTGFS_DFIFO_DEP0_OFFSET 0x1000 /* 0x1000-0x1ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH0_OFFSET 0x1000 /* 0x1000-0x1ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */ +#define STM32L4_OTGFS_DFIFO_DEP0_OFFSET 0x1000 /* 0x1000-0x1ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */ +#define STM32L4_OTGFS_DFIFO_HCH0_OFFSET 0x1000 /* 0x1000-0x1ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP1_OFFSET 0x2000 /* 0x2000-0x2ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH1_OFFSET 0x2000 /* 0x2000-0x2ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */ +#define STM32L4_OTGFS_DFIFO_DEP1_OFFSET 0x2000 /* 0x2000-0x2ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */ +#define STM32L4_OTGFS_DFIFO_HCH1_OFFSET 0x2000 /* 0x2000-0x2ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000-0x3ffc Device IN/OUT Endpoint 2 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000-0x3ffc Host OUT/IN Channel 2 DFIFO Read/Write Access */ +#define STM32L4_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000-0x3ffc Device IN/OUT Endpoint 2 DFIFO Write/Read Access */ +#define STM32L4_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000-0x3ffc Host OUT/IN Channel 2 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000-0x4ffc Device IN/OUT Endpoint 3 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000-0x4ffc Host OUT/IN Channel 3 DFIFO Read/Write Access */ +#define STM32L4_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000-0x4ffc Device IN/OUT Endpoint 3 DFIFO Write/Read Access */ +#define STM32L4_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000-0x4ffc Host OUT/IN Channel 3 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP4_OFFSET 0x5000 /* 0x5000-0x5ffc Device IN/OUT Endpoint 4 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH4_OFFSET 0x5000 /* 0x5000-0x5ffc Host OUT/IN Channel 4 DFIFO Read/Write Access */ +#define STM32L4_OTGFS_DFIFO_DEP4_OFFSET 0x5000 /* 0x5000-0x5ffc Device IN/OUT Endpoint 4 DFIFO Write/Read Access */ +#define STM32L4_OTGFS_DFIFO_HCH4_OFFSET 0x5000 /* 0x5000-0x5ffc Host OUT/IN Channel 4 DFIFO Read/Write Access */ -#define STM32_OTGFS_DFIFO_DEP5_OFFSET 0x6000 /* 0x6000-0x6ffc Device IN/OUT Endpoint 5 DFIFO Write/Read Access */ -#define STM32_OTGFS_DFIFO_HCH5_OFFSET 0x6000 /* 0x6000-0x6ffc Host OUT/IN Channel 5 DFIFO Read/Write Access */ +#define STM32L4_OTGFS_DFIFO_DEP5_OFFSET 0x6000 /* 0x6000-0x6ffc Device IN/OUT Endpoint 5 DFIFO Write/Read Access */ +#define STM32L4_OTGFS_DFIFO_HCH5_OFFSET 0x6000 /* 0x6000-0x6ffc Host OUT/IN Channel 5 DFIFO Read/Write Access */ /* Register Addresses *******************************************************************************/ -#define STM32_OTGFS_GOTGCTL (STM32L4_OTGFS_BASE+STM32_OTGFS_GOTGCTL_OFFSET) -#define STM32_OTGFS_GOTGINT (STM32L4_OTGFS_BASE+STM32_OTGFS_GOTGINT_OFFSET) -#define STM32_OTGFS_GAHBCFG (STM32L4_OTGFS_BASE+STM32_OTGFS_GAHBCFG_OFFSET) -#define STM32_OTGFS_GUSBCFG (STM32L4_OTGFS_BASE+STM32_OTGFS_GUSBCFG_OFFSET) -#define STM32_OTGFS_GRSTCTL (STM32L4_OTGFS_BASE+STM32_OTGFS_GRSTCTL_OFFSET) -#define STM32_OTGFS_GINTSTS (STM32L4_OTGFS_BASE+STM32_OTGFS_GINTSTS_OFFSET) -#define STM32_OTGFS_GINTMSK (STM32L4_OTGFS_BASE+STM32_OTGFS_GINTMSK_OFFSET) -#define STM32_OTGFS_GRXSTSR (STM32L4_OTGFS_BASE+STM32_OTGFS_GRXSTSR_OFFSET) -#define STM32_OTGFS_GRXSTSP (STM32L4_OTGFS_BASE+STM32_OTGFS_GRXSTSP_OFFSET) -#define STM32_OTGFS_GRXFSIZ (STM32L4_OTGFS_BASE+STM32_OTGFS_GRXFSIZ_OFFSET) -#define STM32_OTGFS_HNPTXFSIZ (STM32L4_OTGFS_BASE+STM32_OTGFS_HNPTXFSIZ_OFFSET) -#define STM32_OTGFS_DIEPTXF0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTXF0_OFFSET) -#define STM32_OTGFS_HNPTXSTS (STM32L4_OTGFS_BASE+STM32_OTGFS_HNPTXSTS_OFFSET) -#define STM32_OTGFS_GCCFG (STM32L4_OTGFS_BASE+STM32_OTGFS_GCCFG_OFFSET) -#define STM32_OTGFS_CID (STM32L4_OTGFS_BASE+STM32_OTGFS_CID_OFFSET) -#define STM32_OTGFS_GLPMCFG (STM32L4_OTGFS_BASE+STM32_OTGFS_GLPMCFG_OFFSET) -#define STM32_OTGFS_GPWRDN (STM32L4_OTGFS_BASE+STM32_OTGFS_GPWRDN_OFFSET) -#define STM32_OTGFS_GADPCTL (STM32L4_OTGFS_BASE+STM32_OTGFS_GADPCTL_OFSSET) -#define STM32_OTGFS_HPTXFSIZ (STM32L4_OTGFS_BASE+STM32_OTGFS_HPTXFSIZ_OFFSET) +#define STM32L4_OTGFS_GOTGCTL (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GOTGCTL_OFFSET) +#define STM32L4_OTGFS_GOTGINT (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GOTGINT_OFFSET) +#define STM32L4_OTGFS_GAHBCFG (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GAHBCFG_OFFSET) +#define STM32L4_OTGFS_GUSBCFG (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GUSBCFG_OFFSET) +#define STM32L4_OTGFS_GRSTCTL (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRSTCTL_OFFSET) +#define STM32L4_OTGFS_GINTSTS (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GINTSTS_OFFSET) +#define STM32L4_OTGFS_GINTMSK (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GINTMSK_OFFSET) +#define STM32L4_OTGFS_GRXSTSR (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRXSTSR_OFFSET) +#define STM32L4_OTGFS_GRXSTSP (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRXSTSP_OFFSET) +#define STM32L4_OTGFS_GRXFSIZ (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GRXFSIZ_OFFSET) +#define STM32L4_OTGFS_HNPTXFSIZ (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HNPTXFSIZ_OFFSET) +#define STM32L4_OTGFS_DIEPTXF0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF0_OFFSET) +#define STM32L4_OTGFS_HNPTXSTS (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HNPTXSTS_OFFSET) +#define STM32L4_OTGFS_GCCFG (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GCCFG_OFFSET) +#define STM32L4_OTGFS_CID (STM32L4_OTGFS_BASE+STM32L4_OTGFS_CID_OFFSET) +#define STM32L4_OTGFS_GLPMCFG (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GLPMCFG_OFFSET) +#define STM32L4_OTGFS_GPWRDN (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GPWRDN_OFFSET) +#define STM32L4_OTGFS_GADPCTL (STM32L4_OTGFS_BASE+STM32L4_OTGFS_GADPCTL_OFSSET) +#define STM32L4_OTGFS_HPTXFSIZ (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HPTXFSIZ_OFFSET) -#define STM32_OTGFS_DIEPTXF(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTXF_OFFSET(n)) -#define STM32_OTGFS_DIEPTXF1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTXF1_OFFSET) -#define STM32_OTGFS_DIEPTXF2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTXF2_OFFSET) -#define STM32_OTGFS_DIEPTXF3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTXF3_OFFSET) -#define STM32_OTGFS_DIEPTXF4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTXF4_OFFSET) -#define STM32_OTGFS_DIEPTXF5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTXF5_OFFSET) +#define STM32L4_OTGFS_DIEPTXF(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF_OFFSET(n)) +#define STM32L4_OTGFS_DIEPTXF1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF1_OFFSET) +#define STM32L4_OTGFS_DIEPTXF2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF2_OFFSET) +#define STM32L4_OTGFS_DIEPTXF3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF3_OFFSET) +#define STM32L4_OTGFS_DIEPTXF4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF4_OFFSET) +#define STM32L4_OTGFS_DIEPTXF5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTXF5_OFFSET) /* Host-mode control and status registers */ -#define STM32_OTGFS_HCFG (STM32L4_OTGFS_BASE+STM32_OTGFS_HCFG_OFFSET) -#define STM32_OTGFS_HFIR (STM32L4_OTGFS_BASE+STM32_OTGFS_HFIR_OFFSET) -#define STM32_OTGFS_HFNUM (STM32L4_OTGFS_BASE+STM32_OTGFS_HFNUM_OFFSET) -#define STM32_OTGFS_HPTXSTS (STM32L4_OTGFS_BASE+STM32_OTGFS_HPTXSTS_OFFSET) -#define STM32_OTGFS_HAINT (STM32L4_OTGFS_BASE+STM32_OTGFS_HAINT_OFFSET) -#define STM32_OTGFS_HAINTMSK (STM32L4_OTGFS_BASE+STM32_OTGFS_HAINTMSK_OFFSET) -#define STM32_OTGFS_HPRT (STM32L4_OTGFS_BASE+STM32_OTGFS_HPRT_OFFSET) +#define STM32L4_OTGFS_HCFG (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCFG_OFFSET) +#define STM32L4_OTGFS_HFIR (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HFIR_OFFSET) +#define STM32L4_OTGFS_HFNUM (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HFNUM_OFFSET) +#define STM32L4_OTGFS_HPTXSTS (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HPTXSTS_OFFSET) +#define STM32L4_OTGFS_HAINT (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HAINT_OFFSET) +#define STM32L4_OTGFS_HAINTMSK (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HAINTMSK_OFFSET) +#define STM32L4_OTGFS_HPRT (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HPRT_OFFSET) -#define STM32_OTGFS_CHAN(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_CHAN_OFFSET(n)) +#define STM32L4_OTGFS_CHAN(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_CHAN_OFFSET(n)) -#define STM32_OTGFS_HCCHAR(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR_OFFSET(n)) -#define STM32_OTGFS_HCCHAR0 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR0_OFFSET) -#define STM32_OTGFS_HCCHAR1 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR1_OFFSET) -#define STM32_OTGFS_HCCHAR2 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR2_OFFSET) -#define STM32_OTGFS_HCCHAR3 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR3_OFFSET) -#define STM32_OTGFS_HCCHAR4 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR4_OFFSET) -#define STM32_OTGFS_HCCHAR5 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR5_OFFSET) -#define STM32_OTGFS_HCCHAR6 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR6_OFFSET) -#define STM32_OTGFS_HCCHAR7 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR7_OFFSET) -#define STM32_OTGFS_HCCHAR8 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR8_OFFSET) -#define STM32_OTGFS_HCCHAR9 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR9_OFFSET) -#define STM32_OTGFS_HCCHAR10 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR10_OFFSET) -#define STM32_OTGFS_HCCHAR11 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCCHAR11_OFFSET) +#define STM32L4_OTGFS_HCCHAR(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR_OFFSET(n)) +#define STM32L4_OTGFS_HCCHAR0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR0_OFFSET) +#define STM32L4_OTGFS_HCCHAR1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR1_OFFSET) +#define STM32L4_OTGFS_HCCHAR2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR2_OFFSET) +#define STM32L4_OTGFS_HCCHAR3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR3_OFFSET) +#define STM32L4_OTGFS_HCCHAR4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR4_OFFSET) +#define STM32L4_OTGFS_HCCHAR5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR5_OFFSET) +#define STM32L4_OTGFS_HCCHAR6 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR6_OFFSET) +#define STM32L4_OTGFS_HCCHAR7 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR7_OFFSET) +#define STM32L4_OTGFS_HCCHAR8 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR8_OFFSET) +#define STM32L4_OTGFS_HCCHAR9 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR9_OFFSET) +#define STM32L4_OTGFS_HCCHAR10 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR10_OFFSET) +#define STM32L4_OTGFS_HCCHAR11 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCCHAR11_OFFSET) -#define STM32_OTGFS_HCINT(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT_OFFSET(n)) -#define STM32_OTGFS_HCINT0 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT0_OFFSET) -#define STM32_OTGFS_HCINT1 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT1_OFFSET) -#define STM32_OTGFS_HCINT2 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT2_OFFSET) -#define STM32_OTGFS_HCINT3 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT3_OFFSET) -#define STM32_OTGFS_HCINT4 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT4_OFFSET) -#define STM32_OTGFS_HCINT5 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT5_OFFSET) -#define STM32_OTGFS_HCINT6 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT6_OFFSET) -#define STM32_OTGFS_HCINT7 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT7_OFFSET) -#define STM32_OTGFS_HCINT8 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT8_OFFSET) -#define STM32_OTGFS_HCINT9 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT9_OFFSET) -#define STM32_OTGFS_HCINT10 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT10_OFFSET) -#define STM32_OTGFS_HCINT11 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINT11_OFFSET) +#define STM32L4_OTGFS_HCINT(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT_OFFSET(n)) +#define STM32L4_OTGFS_HCINT0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT0_OFFSET) +#define STM32L4_OTGFS_HCINT1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT1_OFFSET) +#define STM32L4_OTGFS_HCINT2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT2_OFFSET) +#define STM32L4_OTGFS_HCINT3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT3_OFFSET) +#define STM32L4_OTGFS_HCINT4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT4_OFFSET) +#define STM32L4_OTGFS_HCINT5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT5_OFFSET) +#define STM32L4_OTGFS_HCINT6 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT6_OFFSET) +#define STM32L4_OTGFS_HCINT7 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT7_OFFSET) +#define STM32L4_OTGFS_HCINT8 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT8_OFFSET) +#define STM32L4_OTGFS_HCINT9 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT9_OFFSET) +#define STM32L4_OTGFS_HCINT10 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT10_OFFSET) +#define STM32L4_OTGFS_HCINT11 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINT11_OFFSET) -#define STM32_OTGFS_HCINTMSK(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK_OFFSET(n)) -#define STM32_OTGFS_HCINTMSK0 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK0_OFFSET) -#define STM32_OTGFS_HCINTMSK1 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK1_OFFSET) -#define STM32_OTGFS_HCINTMSK2 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK2_OFFSET) -#define STM32_OTGFS_HCINTMSK3 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK3_OFFSET) -#define STM32_OTGFS_HCINTMSK4 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK4_OFFSET) -#define STM32_OTGFS_HCINTMSK5 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK5_OFFSET) -#define STM32_OTGFS_HCINTMSK6 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK6_OFFSET) -#define STM32_OTGFS_HCINTMSK7 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK7_OFFSET) -#define STM32_OTGFS_HCINTMSK8 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK8_OFFSET) -#define STM32_OTGFS_HCINTMSK9 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK9_OFFSET) -#define STM32_OTGFS_HCINTMSK10 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK10_OFFSET) -#define STM32_OTGFS_HCINTMSK11 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCINTMSK11_OFFSET) +#define STM32L4_OTGFS_HCINTMSK(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK_OFFSET(n)) +#define STM32L4_OTGFS_HCINTMSK0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK0_OFFSET) +#define STM32L4_OTGFS_HCINTMSK1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK1_OFFSET) +#define STM32L4_OTGFS_HCINTMSK2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK2_OFFSET) +#define STM32L4_OTGFS_HCINTMSK3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK3_OFFSET) +#define STM32L4_OTGFS_HCINTMSK4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK4_OFFSET) +#define STM32L4_OTGFS_HCINTMSK5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK5_OFFSET) +#define STM32L4_OTGFS_HCINTMSK6 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK6_OFFSET) +#define STM32L4_OTGFS_HCINTMSK7 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK7_OFFSET) +#define STM32L4_OTGFS_HCINTMSK8 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK8_OFFSET) +#define STM32L4_OTGFS_HCINTMSK9 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK9_OFFSET) +#define STM32L4_OTGFS_HCINTMSK10 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK10_OFFSET) +#define STM32L4_OTGFS_HCINTMSK11 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCINTMSK11_OFFSET) -#define STM32_OTGFS_HCTSIZ(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ_OFFSET(n)) -#define STM32_OTGFS_HCTSIZ0 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ0_OFFSET) -#define STM32_OTGFS_HCTSIZ1 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ1_OFFSET) -#define STM32_OTGFS_HCTSIZ2 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ2_OFFSET) -#define STM32_OTGFS_HCTSIZ3 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ3_OFFSET) -#define STM32_OTGFS_HCTSIZ4 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ4_OFFSET) -#define STM32_OTGFS_HCTSIZ5 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ5_OFFSET) -#define STM32_OTGFS_HCTSIZ6 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ6_OFFSET) -#define STM32_OTGFS_HCTSIZ7 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ7_OFFSET) -#define STM32_OTGFS_HCTSIZ8 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ8_OFFSET) -#define STM32_OTGFS_HCTSIZ9 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ9_OFFSET) -#define STM32_OTGFS_HCTSIZ10 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ10_OFFSET) -#define STM32_OTGFS_HCTSIZ11 (STM32L4_OTGFS_BASE+STM32_OTGFS_HCTSIZ11_OFFSET) +#define STM32L4_OTGFS_HCTSIZ(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ_OFFSET(n)) +#define STM32L4_OTGFS_HCTSIZ0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ0_OFFSET) +#define STM32L4_OTGFS_HCTSIZ1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ1_OFFSET) +#define STM32L4_OTGFS_HCTSIZ2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ2_OFFSET) +#define STM32L4_OTGFS_HCTSIZ3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ3_OFFSET) +#define STM32L4_OTGFS_HCTSIZ4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ4_OFFSET) +#define STM32L4_OTGFS_HCTSIZ5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ5_OFFSET) +#define STM32L4_OTGFS_HCTSIZ6 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ6_OFFSET) +#define STM32L4_OTGFS_HCTSIZ7 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ7_OFFSET) +#define STM32L4_OTGFS_HCTSIZ8 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ8_OFFSET) +#define STM32L4_OTGFS_HCTSIZ9 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ9_OFFSET) +#define STM32L4_OTGFS_HCTSIZ10 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ10_OFFSET) +#define STM32L4_OTGFS_HCTSIZ11 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_HCTSIZ11_OFFSET) /* Device-mode control and status registers */ -#define STM32_OTGFS_DCFG (STM32L4_OTGFS_BASE+STM32_OTGFS_DCFG_OFFSET) -#define STM32_OTGFS_DCTL (STM32L4_OTGFS_BASE+STM32_OTGFS_DCTL_OFFSET) -#define STM32_OTGFS_DSTS (STM32L4_OTGFS_BASE+STM32_OTGFS_DSTS_OFFSET) -#define STM32_OTGFS_DIEPMSK (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPMSK_OFFSET) -#define STM32_OTGFS_DOEPMSK (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPMSK_OFFSET) -#define STM32_OTGFS_DAINT (STM32L4_OTGFS_BASE+STM32_OTGFS_DAINT_OFFSET) -#define STM32_OTGFS_DAINTMSK (STM32L4_OTGFS_BASE+STM32_OTGFS_DAINTMSK_OFFSET) -#define STM32_OTGFS_DVBUSDIS (STM32L4_OTGFS_BASE+STM32_OTGFS_DVBUSDIS_OFFSET) -#define STM32_OTGFS_DVBUSPULSE (STM32L4_OTGFS_BASE+STM32_OTGFS_DVBUSPULSE_OFFSET) -#define STM32_OTGFS_DIEPEMPMSK (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPEMPMSK_OFFSET) +#define STM32L4_OTGFS_DCFG (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DCFG_OFFSET) +#define STM32L4_OTGFS_DCTL (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DCTL_OFFSET) +#define STM32L4_OTGFS_DSTS (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DSTS_OFFSET) +#define STM32L4_OTGFS_DIEPMSK (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPMSK_OFFSET) +#define STM32L4_OTGFS_DOEPMSK (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPMSK_OFFSET) +#define STM32L4_OTGFS_DAINT (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DAINT_OFFSET) +#define STM32L4_OTGFS_DAINTMSK (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DAINTMSK_OFFSET) +#define STM32L4_OTGFS_DVBUSDIS (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DVBUSDIS_OFFSET) +#define STM32L4_OTGFS_DVBUSPULSE (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DVBUSPULSE_OFFSET) +#define STM32L4_OTGFS_DIEPEMPMSK (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPEMPMSK_OFFSET) -#define STM32_OTGFS_DIEP(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEP_OFFSET(n)) +#define STM32L4_OTGFS_DIEP(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEP_OFFSET(n)) -#define STM32_OTGFS_DIEPCTL(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPCTL_OFFSET(n)) -#define STM32_OTGFS_DIEPCTL0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPCTL0_OFFSET) -#define STM32_OTGFS_DIEPCTL1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPCTL1_OFFSET) -#define STM32_OTGFS_DIEPCTL2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPCTL2_OFFSET) -#define STM32_OTGFS_DIEPCTL3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPCTL3_OFFSET) -#define STM32_OTGFS_DIEPCTL4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPCTL4_OFFSET) -#define STM32_OTGFS_DIEPCTL5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPCTL5_OFFSET) +#define STM32L4_OTGFS_DIEPCTL(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL_OFFSET(n)) +#define STM32L4_OTGFS_DIEPCTL0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL0_OFFSET) +#define STM32L4_OTGFS_DIEPCTL1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL1_OFFSET) +#define STM32L4_OTGFS_DIEPCTL2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL2_OFFSET) +#define STM32L4_OTGFS_DIEPCTL3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL3_OFFSET) +#define STM32L4_OTGFS_DIEPCTL4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL4_OFFSET) +#define STM32L4_OTGFS_DIEPCTL5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPCTL5_OFFSET) -#define STM32_OTGFS_DIEPINT(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPINT_OFFSET(n)) -#define STM32_OTGFS_DIEPINT0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPINT0_OFFSET) -#define STM32_OTGFS_DIEPINT1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPINT1_OFFSET) -#define STM32_OTGFS_DIEPINT2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPINT2_OFFSET) -#define STM32_OTGFS_DIEPINT3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPINT3_OFFSET) -#define STM32_OTGFS_DIEPINT4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPINT4_OFFSET) -#define STM32_OTGFS_DIEPINT5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPINT5_OFFSET) +#define STM32L4_OTGFS_DIEPINT(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT_OFFSET(n)) +#define STM32L4_OTGFS_DIEPINT0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT0_OFFSET) +#define STM32L4_OTGFS_DIEPINT1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT1_OFFSET) +#define STM32L4_OTGFS_DIEPINT2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT2_OFFSET) +#define STM32L4_OTGFS_DIEPINT3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT3_OFFSET) +#define STM32L4_OTGFS_DIEPINT4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT4_OFFSET) +#define STM32L4_OTGFS_DIEPINT5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPINT5_OFFSET) -#define STM32_OTGFS_DIEPTSIZ(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ_OFFSET(n)) -#define STM32_OTGFS_DIEPTSIZ0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ0_OFFSET) -#define STM32_OTGFS_DIEPTSIZ1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ1_OFFSET) -#define STM32_OTGFS_DIEPTSIZ2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ2_OFFSET) -#define STM32_OTGFS_DIEPTSIZ3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ3_OFFSET) -#define STM32_OTGFS_DIEPTSIZ4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ4_OFFSET) -#define STM32_OTGFS_DIEPTSIZ5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DIEPTSIZ5_OFFSET) +#define STM32L4_OTGFS_DIEPTSIZ(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ_OFFSET(n)) +#define STM32L4_OTGFS_DIEPTSIZ0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ0_OFFSET) +#define STM32L4_OTGFS_DIEPTSIZ1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ1_OFFSET) +#define STM32L4_OTGFS_DIEPTSIZ2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ2_OFFSET) +#define STM32L4_OTGFS_DIEPTSIZ3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ3_OFFSET) +#define STM32L4_OTGFS_DIEPTSIZ4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ4_OFFSET) +#define STM32L4_OTGFS_DIEPTSIZ5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DIEPTSIZ5_OFFSET) -#define STM32_OTGFS_DTXFSTS(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DTXFSTS_OFFSET(n)) -#define STM32_OTGFS_DTXFSTS0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DTXFSTS0_OFFSET) -#define STM32_OTGFS_DTXFSTS1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DTXFSTS1_OFFSET) -#define STM32_OTGFS_DTXFSTS2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DTXFSTS2_OFFSET) -#define STM32_OTGFS_DTXFSTS3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DTXFSTS3_OFFSET) -#define STM32_OTGFS_DTXFSTS4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DTXFSTS4_OFFSET) -#define STM32_OTGFS_DTXFSTS5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DTXFSTS5_OFFSET) +#define STM32L4_OTGFS_DTXFSTS(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS_OFFSET(n)) +#define STM32L4_OTGFS_DTXFSTS0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS0_OFFSET) +#define STM32L4_OTGFS_DTXFSTS1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS1_OFFSET) +#define STM32L4_OTGFS_DTXFSTS2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS2_OFFSET) +#define STM32L4_OTGFS_DTXFSTS3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS3_OFFSET) +#define STM32L4_OTGFS_DTXFSTS4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS4_OFFSET) +#define STM32L4_OTGFS_DTXFSTS5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DTXFSTS5_OFFSET) -#define STM32_OTGFS_DOEP(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEP_OFFSET(n)) +#define STM32L4_OTGFS_DOEP(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEP_OFFSET(n)) -#define STM32_OTGFS_DOEPCTL(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPCTL_OFFSET(n)) -#define STM32_OTGFS_DOEPCTL0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPCTL0_OFFSET) -#define STM32_OTGFS_DOEPCTL1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPCTL1_OFFSET) -#define STM32_OTGFS_DOEPCTL2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPCTL2_OFFSET) -#define STM32_OTGFS_DOEPCTL3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPCTL3_OFFSET) -#define STM32_OTGFS_DOEPCTL4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPCTL4_OFFSET) -#define STM32_OTGFS_DOEPCTL5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPCTL5_OFFSET) +#define STM32L4_OTGFS_DOEPCTL(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL_OFFSET(n)) +#define STM32L4_OTGFS_DOEPCTL0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL0_OFFSET) +#define STM32L4_OTGFS_DOEPCTL1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL1_OFFSET) +#define STM32L4_OTGFS_DOEPCTL2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL2_OFFSET) +#define STM32L4_OTGFS_DOEPCTL3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL3_OFFSET) +#define STM32L4_OTGFS_DOEPCTL4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL4_OFFSET) +#define STM32L4_OTGFS_DOEPCTL5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPCTL5_OFFSET) -#define STM32_OTGFS_DOEPINT(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPINT_OFFSET(n)) -#define STM32_OTGFS_DOEPINT0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPINT0_OFFSET) -#define STM32_OTGFS_DOEPINT1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPINT1_OFFSET) -#define STM32_OTGFS_DOEPINT2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPINT2_OFFSET) -#define STM32_OTGFS_DOEPINT3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPINT3_OFFSET) -#define STM32_OTGFS_DOEPINT4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPINT4_OFFSET) -#define STM32_OTGFS_DOEPINT5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPINT5_OFFSET) +#define STM32L4_OTGFS_DOEPINT(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT_OFFSET(n)) +#define STM32L4_OTGFS_DOEPINT0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT0_OFFSET) +#define STM32L4_OTGFS_DOEPINT1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT1_OFFSET) +#define STM32L4_OTGFS_DOEPINT2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT2_OFFSET) +#define STM32L4_OTGFS_DOEPINT3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT3_OFFSET) +#define STM32L4_OTGFS_DOEPINT4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT4_OFFSET) +#define STM32L4_OTGFS_DOEPINT5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPINT5_OFFSET) -#define STM32_OTGFS_DOEPTSIZ(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ_OFFSET(n)) -#define STM32_OTGFS_DOEPTSIZ0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ0_OFFSET) -#define STM32_OTGFS_DOEPTSIZ1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ1_OFFSET) -#define STM32_OTGFS_DOEPTSIZ2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ2_OFFSET) -#define STM32_OTGFS_DOEPTSIZ3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ3_OFFSET) -#define STM32_OTGFS_DOEPTSIZ4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ4_OFFSET) -#define STM32_OTGFS_DOEPTSIZ5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DOEPTSIZ5_OFFSET) +#define STM32L4_OTGFS_DOEPTSIZ(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ_OFFSET(n)) +#define STM32L4_OTGFS_DOEPTSIZ0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ0_OFFSET) +#define STM32L4_OTGFS_DOEPTSIZ1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ1_OFFSET) +#define STM32L4_OTGFS_DOEPTSIZ2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ2_OFFSET) +#define STM32L4_OTGFS_DOEPTSIZ3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ3_OFFSET) +#define STM32L4_OTGFS_DOEPTSIZ4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ4_OFFSET) +#define STM32L4_OTGFS_DOEPTSIZ5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DOEPTSIZ5_OFFSET) /* Power and clock gating registers */ -#define STM32_OTGFS_PCGCCTL (STM32L4_OTGFS_BASE+STM32_OTGFS_PCGCCTL_OFFSET) +#define STM32L4_OTGFS_PCGCCTL (STM32L4_OTGFS_BASE+STM32L4_OTGFS_PCGCCTL_OFFSET) /* Data FIFO (DFIFO) access registers */ -#define STM32_OTGFS_DFIFO_DEP(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP_OFFSET(n)) -#define STM32_OTGFS_DFIFO_HCH(n) (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH_OFFSET(n)) +#define STM32L4_OTGFS_DFIFO_DEP(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP_OFFSET(n)) +#define STM32L4_OTGFS_DFIFO_HCH(n) (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH_OFFSET(n)) -#define STM32_OTGFS_DFIFO_DEP0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP0_OFFSET) -#define STM32_OTGFS_DFIFO_HCH0 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH0_OFFSET) +#define STM32L4_OTGFS_DFIFO_DEP0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP0_OFFSET) +#define STM32L4_OTGFS_DFIFO_HCH0 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH0_OFFSET) -#define STM32_OTGFS_DFIFO_DEP1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP1_OFFSET) -#define STM32_OTGFS_DFIFO_HCH1 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH1_OFFSET) +#define STM32L4_OTGFS_DFIFO_DEP1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP1_OFFSET) +#define STM32L4_OTGFS_DFIFO_HCH1 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH1_OFFSET) -#define STM32_OTGFS_DFIFO_DEP2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP2_OFFSET) -#define STM32_OTGFS_DFIFO_HCH2 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH2_OFFSET) +#define STM32L4_OTGFS_DFIFO_DEP2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP2_OFFSET) +#define STM32L4_OTGFS_DFIFO_HCH2 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH2_OFFSET) -#define STM32_OTGFS_DFIFO_DEP3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP3_OFFSET) -#define STM32_OTGFS_DFIFO_HCH3 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH3_OFFSET) +#define STM32L4_OTGFS_DFIFO_DEP3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP3_OFFSET) +#define STM32L4_OTGFS_DFIFO_HCH3 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH3_OFFSET) -#define STM32_OTGFS_DFIFO_DEP4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP4_OFFSET) -#define STM32_OTGFS_DFIFO_HCH4 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH4_OFFSET) +#define STM32L4_OTGFS_DFIFO_DEP4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP4_OFFSET) +#define STM32L4_OTGFS_DFIFO_HCH4 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH4_OFFSET) -#define STM32_OTGFS_DFIFO_DEP5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_DEP5_OFFSET) -#define STM32_OTGFS_DFIFO_HCH5 (STM32L4_OTGFS_BASE+STM32_OTGFS_DFIFO_HCH5_OFFSET) +#define STM32L4_OTGFS_DFIFO_DEP5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_DEP5_OFFSET) +#define STM32L4_OTGFS_DFIFO_HCH5 (STM32L4_OTGFS_BASE+STM32L4_OTGFS_DFIFO_HCH5_OFFSET) /* Register Bitfield Definitions ********************************************************************/ /* Core global control and status registers */ diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index 406cbbc6de8..06bab127d35 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -3743,7 +3743,7 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) /* USB reset interrupt */ - if ((regval & OTGFS_GINT_USBRST) != 0) + if ((regval & (OTGFS_GINT_USBRST | OTGFS_GINT_RSTDET)) != 0) { usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_DEVRESET), (uint16_t)regval); From 858af4295c9850e21b514ad5075967c84b8cb392 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 6 Sep 2016 07:34:09 -0600 Subject: [PATCH 188/214] The TCB nchildren field should not be incremented when pthreads are created. --- sched/sched/sched_waitid.c | 2 ++ sched/sched/sched_waitpid.c | 1 + sched/task/task_reparent.c | 2 ++ sched/task/task_setup.c | 13 +++++++++++-- 4 files changed, 16 insertions(+), 2 deletions(-) diff --git a/sched/sched/sched_waitid.c b/sched/sched/sched_waitid.c index 003f8b597f9..7f7aa717472 100644 --- a/sched/sched/sched_waitid.c +++ b/sched/sched/sched_waitid.c @@ -239,6 +239,8 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options) } } #else + /* Child status is not retained. */ + if (rtcb->nchildren == 0) { /* There are no children */ diff --git a/sched/sched/sched_waitpid.c b/sched/sched/sched_waitpid.c index 0e3902342b1..a8f164c0397 100644 --- a/sched/sched/sched_waitpid.c +++ b/sched/sched/sched_waitpid.c @@ -383,6 +383,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options) /* Get the TCB corresponding to this PID and make sure it is our child. */ ctcb = sched_gettcb(pid); + #ifdef HAVE_GROUP_MEMBERS if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid) #else diff --git a/sched/task/task_reparent.c b/sched/task/task_reparent.c index 690294ec024..13cbbc39a29 100644 --- a/sched/task/task_reparent.c +++ b/sched/task/task_reparent.c @@ -190,6 +190,7 @@ int task_reparent(pid_t ppid, pid_t chpid) } #else /* CONFIG_SCHED_CHILD_STATUS */ + /* Child task exit status is not retained */ DEBUGASSERT(otcb->nchildren > 0); @@ -302,6 +303,7 @@ int task_reparent(pid_t ppid, pid_t chpid) } #else /* CONFIG_SCHED_CHILD_STATUS */ + /* Child task exit status is not retained */ DEBUGASSERT(otcb->nchildren > 0); diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c index 6d0ea9c2b21..7a2297a1056 100644 --- a/sched/task/task_setup.c +++ b/sched/task/task_setup.c @@ -275,8 +275,17 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) } } #else - DEBUGASSERT(rtcb->nchildren < UINT16_MAX); - rtcb->nchildren++; + /* Child status is not retained. Simply keep track of the number + * child tasks (not pthreads) created. + */ + +#ifndef CONFIG_DISABLE_PTHREAD + if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD) +#endif + { + DEBUGASSERT(rtcb->nchildren < UINT16_MAX); + rtcb->nchildren++; + } #endif } #else From 05aa586aa6a98c23b4a7f725098ff56f24c34978 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 6 Sep 2016 08:28:31 -0600 Subject: [PATCH 189/214] sched/: Move fields related to parent/child task relationship out of TCB into group structure. --- fs/procfs/fs_procfsproc.c | 2 +- include/nuttx/sched.h | 21 ++++++++++----------- sched/sched/sched_waitid.c | 22 ++++++++++++++-------- sched/sched/sched_waitpid.c | 23 ++++++++++++++--------- sched/task/task_exithook.c | 21 +++++++++++---------- sched/task/task_reparent.c | 22 +++++++++++----------- sched/task/task_setup.c | 20 ++++++++++++-------- 7 files changed, 73 insertions(+), 58 deletions(-) diff --git a/fs/procfs/fs_procfsproc.c b/fs/procfs/fs_procfsproc.c index 79abd759ef0..fc15018a032 100644 --- a/fs/procfs/fs_procfsproc.c +++ b/fs/procfs/fs_procfsproc.c @@ -447,7 +447,7 @@ static ssize_t proc_status(FAR struct proc_file_s *procfile, group->tg_pgid); #else linesize = snprintf(procfile->line, STATUS_LINELEN, "%-12s%d\n", "PPID:", - tcb->ppid); + group->tg_ppid); #endif copysize = procfs_memcpy(procfile->line, linesize, buffer, remaining, &offset); diff --git a/include/nuttx/sched.h b/include/nuttx/sched.h index 724be425cad..f56eda47023 100644 --- a/include/nuttx/sched.h +++ b/include/nuttx/sched.h @@ -422,12 +422,21 @@ struct task_group_s # endif #endif -#if defined(CONFIG_SCHED_HAVE_PARENT) && defined(CONFIG_SCHED_CHILD_STATUS) +#ifdef CONFIG_SCHED_HAVE_PARENT /* Child exit status **********************************************************/ +#ifdef CONFIG_SCHED_CHILD_STATUS FAR struct child_status_s *tg_children; /* Head of a list of child status */ #endif +#ifndef HAVE_GROUP_MEMBERS + pid_t tg_ppid; /* This is the ID of the parent thread */ +#ifndef CONFIG_SCHED_CHILD_STATUS + uint16_t tg_nchildren; /* This is the number active children */ +#endif +#endif /* HAVE_GROUP_MEMBERS */ +#endif /* CONFIG_SCHED_HAVE_PARENT */ + #if defined(CONFIG_SCHED_WAITPID) && !defined(CONFIG_SCHED_HAVE_PARENT) /* waitpid support ************************************************************/ /* Simple mechanism used only when there is no support for SIGCHLD */ @@ -537,16 +546,6 @@ struct tcb_s /* Task Management Fields *****************************************************/ pid_t pid; /* This is the ID of the thread */ - -#ifdef CONFIG_SCHED_HAVE_PARENT /* Support parent-child relationship */ -#ifndef HAVE_GROUP_MEMBERS /* Don't know pids of group members */ - pid_t ppid; /* This is the ID of the parent thread */ -#ifndef CONFIG_SCHED_CHILD_STATUS /* Retain child thread status */ - uint16_t nchildren; /* This is the number active children */ -#endif -#endif -#endif /* CONFIG_SCHED_HAVE_PARENT */ - start_t start; /* Thread start function */ entry_t entry; /* Entry Point into the thread */ uint8_t sched_priority; /* Current priority of the thread */ diff --git a/sched/sched/sched_waitid.c b/sched/sched/sched_waitid.c index 7f7aa717472..f4e48d5f649 100644 --- a/sched/sched/sched_waitid.c +++ b/sched/sched/sched_waitid.c @@ -210,13 +210,16 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options) } else if (idtype == P_PID) { - /* Get the TCB corresponding to this PID and make sure it is our child. */ + /* Get the TCB corresponding to this PID and make sure that the + * thread it is our child. + */ ctcb = sched_gettcb((pid_t)id); + #ifdef HAVE_GROUP_MEMBERS - if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid) + if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid) #else - if (!ctcb || ctcb->ppid != rtcb->pid) + if (ctcb == NULL || ctcb->group>tg_ppid != rtcb->pid) #endif { errcode = ECHILD; @@ -241,7 +244,7 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options) #else /* Child status is not retained. */ - if (rtcb->nchildren == 0) + if (rtcb->group->tg_nchildren == 0) { /* There are no children */ @@ -250,13 +253,16 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options) } else if (idtype == P_PID) { - /* Get the TCB corresponding to this PID and make sure it is our child. */ + /* Get the TCB corresponding to this PID and make sure that the + * thread is our child. + */ ctcb = sched_gettcb((pid_t)id); + #ifdef HAVE_GROUP_MEMBERS - if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid) + if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid) #else - if (!ctcb || ctcb->ppid != rtcb->pid) + if (ctcb == NULL || ctcb->group->tg_ppid != rtcb->pid) #endif { errcode = ECHILD; @@ -340,7 +346,7 @@ int waitid(idtype_t idtype, id_t id, FAR siginfo_t *info, int options) * instead). */ - if (rtcb->nchildren == 0 || + if (rtcb->group->tg_nchildren == 0 || (idtype == P_PID && (ret = kill((pid_t)id, 0)) < 0)) { /* We know that the child task was running okay we stared, diff --git a/sched/sched/sched_waitpid.c b/sched/sched/sched_waitpid.c index a8f164c0397..a3ef50674f1 100644 --- a/sched/sched/sched_waitpid.c +++ b/sched/sched/sched_waitpid.c @@ -202,7 +202,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options) /* Get the TCB corresponding to this PID */ ctcb = sched_gettcb(pid); - if (!ctcb) + if (ctcb == NULL) { errcode = ECHILD; goto errout_with_errno; @@ -342,13 +342,16 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options) } else if (pid != (pid_t)-1) { - /* Get the TCB corresponding to this PID and make sure it is our child. */ + /* Get the TCB corresponding to this PID and make sure that the + * thread it is our child. + */ ctcb = sched_gettcb(pid); + #ifdef HAVE_GROUP_MEMBERS - if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid) + if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid) #else - if (!ctcb || ctcb->ppid != rtcb->pid) + if (ctcb == NULL || ctcb->group->tg_ppid != rtcb->pid) #endif { errcode = ECHILD; @@ -371,7 +374,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options) #else /* CONFIG_SCHED_CHILD_STATUS */ - if (rtcb->nchildren == 0) + if (rtcb->group->tg_nchildren == 0) { /* There are no children */ @@ -380,14 +383,16 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options) } else if (pid != (pid_t)-1) { - /* Get the TCB corresponding to this PID and make sure it is our child. */ + /* Get the TCB corresponding to this PID and make sure that the + * thread it is our child. + */ ctcb = sched_gettcb(pid); #ifdef HAVE_GROUP_MEMBERS - if (!ctcb || ctcb->group->tg_pgid != rtcb->group->tg_gid) + if (ctcb == NULL || ctcb->group->tg_pgid != rtcb->group->tg_gid) #else - if (!ctcb || ctcb->ppid != rtcb->pid) + if (ctcb == NULL || ctcb->group->tg_ppid != rtcb->pid) #endif { errcode = ECHILD; @@ -486,7 +491,7 @@ pid_t waitpid(pid_t pid, int *stat_loc, int options) * instead). */ - if (rtcb->nchildren == 0 || + if (rtcb->group->tg_nchildren == 0 || (pid != (pid_t)-1 && (ret = kill(pid, 0)) < 0)) { /* We know that the child task was running okay we stared, diff --git a/sched/task/task_exithook.c b/sched/task/task_exithook.c index aee8dc4242f..cffae18e7d9 100644 --- a/sched/task/task_exithook.c +++ b/sched/task/task_exithook.c @@ -360,11 +360,12 @@ static inline void task_sigchild(FAR struct tcb_s *ptcb, task_exitstatus(ptcb->group, status); #else /* CONFIG_SCHED_CHILD_STATUS */ + /* Exit status is not retained. Just decrement the number of + * children from this parent. + */ - /* Decrement the number of children from this parent */ - - DEBUGASSERT(ptcb->nchildren > 0); - ptcb->nchildren--; + DEBUGASSERT(ptcb->group != NULL && ptcb->group->tg_nchildren > 0); + ptcb->group->tg_nchildren--; #endif /* CONFIG_SCHED_CHILD_STATUS */ @@ -429,13 +430,13 @@ static inline void task_signalparent(FAR struct tcb_s *ctcb, int status) sched_lock(); /* Get the TCB of the receiving, parent task. We do this early to - * handle multiple calls to task_signalparent. ctcb->ppid is set to an - * invalid value below and the following call will fail if we are - * called again. + * handle multiple calls to task_signalparent. ctcb->group->tg_ppid is + * set to an invalid value below and the following call will fail if we + * are called again. */ - ptcb = sched_gettcb(ctcb->ppid); - if (!ptcb) + ptcb = sched_gettcb(ctcb->group->tg_ppid); + if (ptcb == NULL) { /* The parent no longer exists... bail */ @@ -449,7 +450,7 @@ static inline void task_signalparent(FAR struct tcb_s *ctcb, int status) /* Forget who our parent was */ - ctcb->ppid = INVALID_PROCESS_ID; + ctcb->group->tg_ppid = INVALID_PROCESS_ID; sched_unlock(); #endif } diff --git a/sched/task/task_reparent.c b/sched/task/task_reparent.c index 13cbbc39a29..b7fe508badc 100644 --- a/sched/task/task_reparent.c +++ b/sched/task/task_reparent.c @@ -192,10 +192,10 @@ int task_reparent(pid_t ppid, pid_t chpid) #else /* CONFIG_SCHED_CHILD_STATUS */ /* Child task exit status is not retained */ - DEBUGASSERT(otcb->nchildren > 0); + DEBUGASSERT(ogrp->tg_nchildren > 0); - otcb->nchildren--; /* The orignal parent now has one few children */ - ptcb->nchildren++; /* The new parent has one additional child */ + ogrp->tg_nchildren--; /* The orignal parent now has one few children */ + pgrp->tg_nchildren++; /* The new parent has one additional child */ ret = OK; #endif /* CONFIG_SCHED_CHILD_STATUS */ @@ -234,7 +234,7 @@ int task_reparent(pid_t ppid, pid_t chpid) /* Get the PID of the child task's parent (opid) */ - opid = chtcb->ppid; + opid = chtcb->group->tg_ppid; /* Get the TCB of the child task's parent (otcb) */ @@ -245,14 +245,14 @@ int task_reparent(pid_t ppid, pid_t chpid) goto errout_with_ints; } - /* If new parent task's PID (ppid) is zero, then new parent is the + /* If new parent task's PID (tg_ppid) is zero, then new parent is the * grandparent will be the new parent, i.e., the parent of the current * parent task. */ if (ppid == 0) { - ppid = otcb->ppid; + ppid = otcb->group->tg_ppid; } /* Get the new parent task's TCB (ptcb) */ @@ -264,9 +264,9 @@ int task_reparent(pid_t ppid, pid_t chpid) goto errout_with_ints; } - /* Then reparent the child */ + /* Then reparent the child. The task specified by ppid is the new parent. */ - chtcb->ppid = ppid; /* The task specified by ppid is the new parent */ + chtcb->group->tg_ppid = ppid; #ifdef CONFIG_SCHED_CHILD_STATUS /* Remove the child status entry from old parent TCB */ @@ -305,10 +305,10 @@ int task_reparent(pid_t ppid, pid_t chpid) #else /* CONFIG_SCHED_CHILD_STATUS */ /* Child task exit status is not retained */ - DEBUGASSERT(otcb->nchildren > 0); + DEBUGASSERT(otcb->group != NULL && otcb->group->tg_nchildren > 0); - otcb->nchildren--; /* The orignal parent now has one few children */ - ptcb->nchildren++; /* The new parent has one additional child */ + otcb->group->tg_nchildren--; /* The orignal parent now has one few children */ + ptcb->group->tg_nchildren++; /* The new parent has one additional child */ ret = OK; #endif /* CONFIG_SCHED_CHILD_STATUS */ diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c index 7a2297a1056..e775fe6103a 100644 --- a/sched/task/task_setup.c +++ b/sched/task/task_setup.c @@ -204,7 +204,7 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) FAR struct tcb_s *rtcb = this_task(); #if defined(HAVE_GROUP_MEMBERS) || defined(CONFIG_SCHED_CHILD_STATUS) - DEBUGASSERT(tcb && tcb->group && rtcb->group); + DEBUGASSERT(tcb != NULL && tcb->group != NULL && rtcb->group != NULL); #else #endif @@ -228,12 +228,14 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) #else DEBUGASSERT(tcb); - /* Save the parent task's ID in the child task's TCB. I am not sure if - * this makes sense for the case of pthreads or not, but I don't think it - * is harmful in any event. - */ +#ifndef CONFIG_DISABLE_PTHREAD + if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD) +#endif + { + /* Save the parent task's ID in the child task's group. */ - tcb->ppid = rtcb->pid; + tcb->group->tg_ppid = rtcb->pid; + } #endif #ifdef CONFIG_SCHED_CHILD_STATUS @@ -283,8 +285,10 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD) #endif { - DEBUGASSERT(rtcb->nchildren < UINT16_MAX); - rtcb->nchildren++; + DEBUGASSERT(rtcb->group != NULL && + rtcb->group->tg_nchildren < UINT16_MAX); + + rtcb->group->tg_nchildren++; } #endif } From 27919549f1cf7ab2569838fa98e7e83e0a60367f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 6 Sep 2016 08:40:55 -0600 Subject: [PATCH 190/214] sched/: Simplify some child/parent logic --- sched/task/task_setup.c | 97 +++++++++++++++++++---------------------- 1 file changed, 44 insertions(+), 53 deletions(-) diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c index e775fe6103a..ec2883a06f5 100644 --- a/sched/task/task_setup.c +++ b/sched/task/task_setup.c @@ -182,7 +182,7 @@ static inline void task_inherit_affinity(FAR struct tcb_s *tcb) * Name: task_saveparent * * Description: - * Save the task ID of the parent task in the child task's TCB and allocate + * Save the task ID of the parent task in the child task's group and allocate * a child status structure to catch the child task's exit status. * * Parameters: @@ -208,83 +208,74 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) #else #endif -#ifdef HAVE_GROUP_MEMBERS - /* Save the ID of the parent tasks' task group in the child's task group. - * Do nothing for pthreads. The parent and the child are both members of - * the same task group. + /* Only newly created tasks (and kernel threads) have parents. None of + * this logic applies to pthreads with reside in the same group as the + * parent and share that same child/parent relationships. */ #ifndef CONFIG_DISABLE_PTHREAD if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD) #endif { - /* This is a new task in a new task group, we have to copy the ID from - * the parent's task group structure to child's task group. +#ifdef HAVE_GROUP_MEMBERS + /* Save the ID of the parent tasks' task group in the child's task + * group. Copy the ID from the parent's task group structure to + * child's task group. */ tcb->group->tg_pgid = rtcb->group->tg_gid; - } #else - DEBUGASSERT(tcb); + DEBUGASSERT(tcb); -#ifndef CONFIG_DISABLE_PTHREAD - if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD) -#endif - { /* Save the parent task's ID in the child task's group. */ tcb->group->tg_ppid = rtcb->pid; - } #endif #ifdef CONFIG_SCHED_CHILD_STATUS - /* Tasks can also suppress retention of their child status by applying - * the SA_NOCLDWAIT flag with sigaction(). - */ - - if ((rtcb->group->tg_flags && GROUP_FLAG_NOCLDWAIT) == 0) - { - FAR struct child_status_s *child; - - /* Make sure that there is not already a structure for this PID in the - * parent TCB. There should not be. + /* Tasks can also suppress retention of their child status by applying + * the SA_NOCLDWAIT flag with sigaction(). */ - child = group_findchild(rtcb->group, tcb->pid); - DEBUGASSERT(!child); - if (!child) + if ((rtcb->group->tg_flags && GROUP_FLAG_NOCLDWAIT) == 0) { - /* Allocate a new status structure */ + FAR struct child_status_s *child; - child = group_allocchild(); + /* Make sure that there is not already a structure for this PID in + * the parent TCB. There should not be. + */ + + child = group_findchild(rtcb->group, tcb->pid); + DEBUGASSERT(!child); + if (!child) + { + /* Allocate a new status structure */ + + child = group_allocchild(); + } + + /* Did we successfully find/allocate the child status structure? */ + + DEBUGASSERT(child); + if (child) + { + /* Yes.. Initialize the structure */ + + child->ch_flags = ttype; + child->ch_pid = tcb->pid; + child->ch_status = 0; + + /* Add the entry into the group's list of children */ + + group_addchild(rtcb->group, child); + } } - - /* Did we successfully find/allocate the child status structure? */ - - DEBUGASSERT(child); - if (child) - { - /* Yes.. Initialize the structure */ - - child->ch_flags = ttype; - child->ch_pid = tcb->pid; - child->ch_status = 0; - - /* Add the entry into the TCB list of children */ - - group_addchild(rtcb->group, child); - } - } #else - /* Child status is not retained. Simply keep track of the number - * child tasks (not pthreads) created. - */ + /* Child status is not retained. Simply keep track of the number + * child tasks created. + */ -#ifndef CONFIG_DISABLE_PTHREAD - if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD) -#endif - { DEBUGASSERT(rtcb->group != NULL && rtcb->group->tg_nchildren < UINT16_MAX); From e034c785167ea237e8b01c3e6aafd6d100eaff9e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 6 Sep 2016 10:21:41 -0600 Subject: [PATCH 191/214] improve some assertions; add some comments. --- sched/task/task_setup.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c index ec2883a06f5..4f0e3e65428 100644 --- a/sched/task/task_setup.c +++ b/sched/task/task_setup.c @@ -203,10 +203,8 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) { FAR struct tcb_s *rtcb = this_task(); -#if defined(HAVE_GROUP_MEMBERS) || defined(CONFIG_SCHED_CHILD_STATUS) - DEBUGASSERT(tcb != NULL && tcb->group != NULL && rtcb->group != NULL); -#else -#endif + DEBUGASSERT( tcb != NULL && tcb->group != NULL && + rtcb != NULL && rtcb->group != NULL); /* Only newly created tasks (and kernel threads) have parents. None of * this logic applies to pthreads with reside in the same group as the @@ -226,7 +224,7 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) tcb->group->tg_pgid = rtcb->group->tg_gid; #else - DEBUGASSERT(tcb); + DEBUGASSERT(tcb != NULL && tcb->group != NULL); /* Save the parent task's ID in the child task's group. */ @@ -247,8 +245,8 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) */ child = group_findchild(rtcb->group, tcb->pid); - DEBUGASSERT(!child); - if (!child) + DEBUGASSERT(child == NULL); + if (child == NULL) { /* Allocate a new status structure */ @@ -257,8 +255,8 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) /* Did we successfully find/allocate the child status structure? */ - DEBUGASSERT(child); - if (child) + DEBUGASSERT(child != NULL); + if (child != NULL) { /* Yes.. Initialize the structure */ @@ -271,7 +269,8 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) group_addchild(rtcb->group, child); } } -#else + +#else /* CONFIG_SCHED_CHILD_STATUS */ /* Child status is not retained. Simply keep track of the number * child tasks created. */ @@ -281,7 +280,8 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) rtcb->group->tg_nchildren++; } -#endif + +#endif /* CONFIG_SCHED_CHILD_STATUS */ } #else # define task_saveparent(tcb,ttype) From 7582c2344c9cae4aeb9e888b90b491020c6ef0df Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 6 Sep 2016 10:28:19 -0600 Subject: [PATCH 192/214] sched/: Eliminate calculation of a possibly unused value. --- sched/task/task_setup.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c index 4f0e3e65428..553ddd8fa65 100644 --- a/sched/task/task_setup.c +++ b/sched/task/task_setup.c @@ -201,10 +201,7 @@ static inline void task_inherit_affinity(FAR struct tcb_s *tcb) #ifdef CONFIG_SCHED_HAVE_PARENT static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) { - FAR struct tcb_s *rtcb = this_task(); - - DEBUGASSERT( tcb != NULL && tcb->group != NULL && - rtcb != NULL && rtcb->group != NULL); + DEBUGASSERT(tcb != NULL && tcb->group != NULL); /* Only newly created tasks (and kernel threads) have parents. None of * this logic applies to pthreads with reside in the same group as the @@ -215,6 +212,12 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) if ((tcb->flags & TCB_FLAG_TTYPE_MASK) != TCB_FLAG_TTYPE_PTHREAD) #endif { + /* Get the TCB of the parent task. In this case, the calling task. */ + + FAR struct tcb_s *rtcb = this_task(); + + DEBUGASSERT(rtcb != NULL && rtcb->group != NULL); + #ifdef HAVE_GROUP_MEMBERS /* Save the ID of the parent tasks' task group in the child's task * group. Copy the ID from the parent's task group structure to @@ -224,8 +227,6 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) tcb->group->tg_pgid = rtcb->group->tg_gid; #else - DEBUGASSERT(tcb != NULL && tcb->group != NULL); - /* Save the parent task's ID in the child task's group. */ tcb->group->tg_ppid = rtcb->pid; From 952268274a5688d1bb8103e782323b60e3791769 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 6 Sep 2016 12:27:12 -0600 Subject: [PATCH 193/214] sched/: Fix misplaced right bracket; remove redundant assertion. --- sched/task/task_setup.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/sched/task/task_setup.c b/sched/task/task_setup.c index 553ddd8fa65..0819049785c 100644 --- a/sched/task/task_setup.c +++ b/sched/task/task_setup.c @@ -276,13 +276,11 @@ static inline void task_saveparent(FAR struct tcb_s *tcb, uint8_t ttype) * child tasks created. */ - DEBUGASSERT(rtcb->group != NULL && - rtcb->group->tg_nchildren < UINT16_MAX); - + DEBUGASSERT(rtcb->group->tg_nchildren < UINT16_MAX); rtcb->group->tg_nchildren++; - } #endif /* CONFIG_SCHED_CHILD_STATUS */ + } } #else # define task_saveparent(tcb,ttype) From 50dd745e230d110c2e0c64724c322ea88cdbf32e Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Wed, 7 Sep 2016 14:17:38 +0200 Subject: [PATCH 194/214] restore stm32l4 name --- arch/arm/src/stm32l4/stm32l4_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/stm32l4/stm32l4_spi.c b/arch/arm/src/stm32l4/stm32l4_spi.c index 27937c30c92..bc61ed74460 100644 --- a/arch/arm/src/stm32l4/stm32l4_spi.c +++ b/arch/arm/src/stm32l4/stm32l4_spi.c @@ -1147,7 +1147,7 @@ static void spi_setbits(FAR struct spi_dev_s *dev, int nbits) static int spi_hwfeatures(FAR struct spi_dev_s *dev, spi_hwfeatures_t features) { #ifdef CONFIG_SPI_BITORDER - FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev; + FAR struct stm32l4_spidev_s *priv = (FAR struct stm32l4_spidev_s *)dev; uint16_t setbits; uint16_t clrbits; From 8842c2c2146f250a7e7f9a4c08aa0484aa818884 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 7 Sep 2016 09:38:33 -0600 Subject: [PATCH 195/214] Add a definition and a comment --- include/netinet/in.h | 1 + include/nuttx/sched.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/include/netinet/in.h b/include/netinet/in.h index 219f1511945..53e0706b5b8 100644 --- a/include/netinet/in.h +++ b/include/netinet/in.h @@ -80,6 +80,7 @@ #define IPPROTO_COMP 108 /* Compression Header protocol */ #define IPPROTO_SCTP 132 /* Stream Control Transport Protocol */ #define IPPROTO_UDPLITE 136 /* UDP-Lite (RFC 3828) */ +#define IPPROTO_MPLS 137 /* MPLS in IP (RFC 4023) */ #define IPPROTO_RAW 255 /* Raw IP packets */ /* Values used with SIOCSIFMCFILTER and SIOCGIFMCFILTER ioctl's */ diff --git a/include/nuttx/sched.h b/include/nuttx/sched.h index f56eda47023..4d7bb88f11f 100644 --- a/include/nuttx/sched.h +++ b/include/nuttx/sched.h @@ -430,6 +430,8 @@ struct task_group_s #endif #ifndef HAVE_GROUP_MEMBERS + /* REVISIT: What if parent thread exits? Should use tg_pgid. */ + pid_t tg_ppid; /* This is the ID of the parent thread */ #ifndef CONFIG_SCHED_CHILD_STATUS uint16_t tg_nchildren; /* This is the number active children */ From 5d73f114b53eab42456d1abc706dce146a88c438 Mon Sep 17 00:00:00 2001 From: Jim Wylder Date: Wed, 17 Aug 2016 09:49:46 -0500 Subject: [PATCH 196/214] STM32L4: Add support for USART3-USART5 For STM32L4 parts, the higher number USART ports supported varies. Add the HAVE_USARTx definitions to the configuration to allow enabling the higher numbered USART ports. Signed-off-by: Jim Wylder --- arch/arm/src/stm32l4/Kconfig | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig index 66be03660ce..c511faaae69 100644 --- a/arch/arm/src/stm32l4/Kconfig +++ b/arch/arm/src/stm32l4/Kconfig @@ -44,6 +44,7 @@ config STM32L4_STM32L476XX select ARCH_HAVE_DPFPU # REVISIT select ARMV7M_HAVE_ITCM select ARMV7M_HAVE_DTCM + select STM32L4_HAVE_USART3 config STM32L4_STM32L486XX bool @@ -416,6 +417,7 @@ config STM32L4_USART2 config STM32L4_USART3 bool "USART3" default n + depends on STM32L4_HAVE_USART3 select ARCH_HAVE_SERIAL_TERMIOS select USART3_SERIALDRIVER select STM32L4_USART @@ -423,6 +425,7 @@ config STM32L4_USART3 config STM32L4_UART4 bool "UART4" default n + depends on STM32L4_HAVE_USART4 select ARCH_HAVE_SERIAL_TERMIOS select UART4_SERIALDRIVER select STM32L4_USART @@ -430,6 +433,7 @@ config STM32L4_UART4 config STM32L4_UART5 bool "UART5" default n + depends on STM32L4_HAVE_USART5 select ARCH_HAVE_SERIAL_TERMIOS select UART5_SERIALDRIVER select STM32L4_USART @@ -2469,6 +2473,18 @@ config STM32L4_DAC_DMA_BUFFER_SIZE endmenu +config STM32L4_HAVE_USART3 + bool + default n + +config STM32L4_HAVE_USART4 + bool + default n + +config STM32L4_HAVE_USART5 + bool + default n + menu "U[S]ART Configuration" depends on STM32L4_USART From cb4f1a4cecadad1ea7eaf22cec040bddfbba880a Mon Sep 17 00:00:00 2001 From: Jim Wylder Date: Wed, 17 Aug 2016 09:55:02 -0500 Subject: [PATCH 197/214] Support basic booting and nsh on Motorola MDK The Motorola MDK is based off of an earlier version of NuttX. This only provides a basic nsh shell. Signed-off-by: Jim Wylder --- configs/Kconfig | 15 + configs/stm32l476-mdk/Kconfig | 8 + configs/stm32l476-mdk/README.txt | 35 + configs/stm32l476-mdk/include/board.h | 155 +++ .../include/stm32l476-mdk-clocking.h | 302 +++++ configs/stm32l476-mdk/nsh/Make.defs | 116 ++ configs/stm32l476-mdk/nsh/defconfig | 1023 +++++++++++++++++ configs/stm32l476-mdk/nsh/setenv.sh | 64 ++ configs/stm32l476-mdk/scripts/ld.script | 125 ++ configs/stm32l476-mdk/src/Makefile | 53 + configs/stm32l476-mdk/src/stm32_appinit.c | 176 +++ configs/stm32l476-mdk/src/stm32_boot.c | 110 ++ configs/stm32l476-mdk/src/stm32_buttons.c | 166 +++ configs/stm32l476-mdk/src/stm32_clockconfig.c | 239 ++++ configs/stm32l476-mdk/src/stm32_spi.c | 210 ++++ configs/stm32l476-mdk/src/stm32l476-mdk.h | 140 +++ 16 files changed, 2937 insertions(+) create mode 100644 configs/stm32l476-mdk/Kconfig create mode 100644 configs/stm32l476-mdk/README.txt create mode 100644 configs/stm32l476-mdk/include/board.h create mode 100644 configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h create mode 100644 configs/stm32l476-mdk/nsh/Make.defs create mode 100644 configs/stm32l476-mdk/nsh/defconfig create mode 100755 configs/stm32l476-mdk/nsh/setenv.sh create mode 100644 configs/stm32l476-mdk/scripts/ld.script create mode 100644 configs/stm32l476-mdk/src/Makefile create mode 100644 configs/stm32l476-mdk/src/stm32_appinit.c create mode 100644 configs/stm32l476-mdk/src/stm32_boot.c create mode 100644 configs/stm32l476-mdk/src/stm32_buttons.c create mode 100644 configs/stm32l476-mdk/src/stm32_clockconfig.c create mode 100644 configs/stm32l476-mdk/src/stm32_spi.c create mode 100644 configs/stm32l476-mdk/src/stm32l476-mdk.h diff --git a/configs/Kconfig b/configs/Kconfig index bf5f3a4859c..b4552dd05b2 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -1059,6 +1059,17 @@ config ARCH_BOARD_STM32L476VG_DISCO MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM. +config ARCH_BOARD_STM32L476_MDK + bool "Motorola Mods Development Kit (MDK)" + depends on ARCH_CHIP_STM32L476RG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + Motorola Mods Development Board (MDK) features STM32L476ME MCU. + The STM32L476ME is a Cortex-M4 optimised for low-power operation + at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM. + config ARCH_BOARD_STM32L_DISCOVERY bool "STMicro STM32L-Discovery board" depends on ARCH_CHIP_STM32L152RB @@ -1456,6 +1467,7 @@ config ARCH_BOARD default "stm32f746g-disco" if ARCH_BOARD_STM32F746G_DISCO default "stm32f746-ws" if ARCH_BOARD_STM32F746_WS default "stm32l476vg-disco" if ARCH_BOARD_STM32L476VG_DISCO + default "stm32l476-mdk" if ARCH_BOARD_STM32L476_MDK default "stm32ldiscovery" if ARCH_BOARD_STM32L_DISCOVERY default "stm32vldiscovery" if ARCH_BOARD_STM32VL_DISCOVERY default "mikroe-stm32f4" if ARCH_BOARD_MIKROE_STM32F4 @@ -1822,6 +1834,9 @@ endif if ARCH_BOARD_STM32L476VG_DISCO source "configs/stm32l476vg-disco/Kconfig" endif +if ARCH_BOARD_STM32L476_MDK +source "configs/stm32l476-mdk/Kconfig" +endif if ARCH_BOARD_STM32L_DISCOVERY source "configs/stm32ldiscovery/Kconfig" endif diff --git a/configs/stm32l476-mdk/Kconfig b/configs/stm32l476-mdk/Kconfig new file mode 100644 index 00000000000..5c3f42f6bdf --- /dev/null +++ b/configs/stm32l476-mdk/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_STM32L476VG_MDK + +endif # ARCH_BOARD_STM32L476VG_MDK diff --git a/configs/stm32l476-mdk/README.txt b/configs/stm32l476-mdk/README.txt new file mode 100644 index 00000000000..8b60f0d0db1 --- /dev/null +++ b/configs/stm32l476-mdk/README.txt @@ -0,0 +1,35 @@ +README +====== + +This README discusses issues unique to NuttX configurations for Motorola +MDK. + +STM32L476ME: + + Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32L476ME + Memory: 1024 KB Flash and 96+32 KB SRAM + ADC: 3x12-bit, 2.4 MSPS A/D converter: up to 24 channels + DMA: 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 11 timers: up to eight 16-bit, two 32-bit timers, two + watchdog timers, and a SysTick timer + GPIO: Up to 51 I/O ports with interrupt capability + I2C: Up to 3 x I2C interfaces + USARTs: Up to 3 USARTs, 2 UARTs, 1 LPUART + SPIs: Up to 3 SPIs + SAIs: Up to 2 dual-channel audio interfaces + CAN interface + SDIO interface (not connected) + QSPI interface (not connected) + USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY + CRC calculation unit + RTC + +Flashing: + +The MDK has a builtin FTDI to support flashing from openocd. There are a few extensions +to openocd that haven't been integrated upstream yet. To flash (or debug) the MDK, you +will need the code from: + git clone https://github.com/MotorolaMobilityLLC/openocd + +After building, you can flash with the following command: + openocd -f board/moto_mdk_muc.cfg -c "program nuttx.bin 0x08000000 reset exit" diff --git a/configs/stm32l476-mdk/include/board.h b/configs/stm32l476-mdk/include/board.h new file mode 100644 index 00000000000..deb8bba6a75 --- /dev/null +++ b/configs/stm32l476-mdk/include/board.h @@ -0,0 +1,155 @@ +/************************************************************************************ + * configs/stm32l476-mdk/include/board.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Motorola Mobility, LLC. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM32L476_MDK_INCLUDE_BOARD_H +#define __CONFIGS_STM32L476_MDK_INCLUDE_BOARD_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +#include + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +#include + +/* DMA Channel/Stream Selections ****************************************************/ +/* Stream selections are arbitrary for now but might become important in the future + * is we set aside more DMA channels/streams. + */ + +/* Alternate function pin selections ************************************************/ + +/* USART1: + * RXD: PB7 + * TXD: PA6 + * + * these pins are shared with the I2C1, which is used for some onboard + * devices, so I am disabling USART1, however I'm leaving the declarations + * here for documentation for anyone who might want to use it instead of + * those onboard devices. + */ + +/* USART */ + +#define GPIO_USART1_CTS GPIO_USART1_CTS_3 /* PG11 */ +#define GPIO_USART1_RTS GPIO_USART1_RTS_DE_2 /* PB3 */ +#define GPIO_USART1_RX GPIO_USART1_RX_2 /* PB7 */ +#define GPIO_USART1_TX GPIO_USART1_TX_2 /* PB6 */ + +#define GPIO_USART2_CTS GPIO_USART2_CTS_1 /* PA0 */ +#define GPIO_USART2_RTS GPIO_USART2_RTS_DE_1 /* PA1 */ +#define GPIO_USART2_RX GPIO_USART2_RX_1 /* PA3 */ +#define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */ + +#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PC11 */ +#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PC10 */ + +/* I2C */ + +#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 /* PB10 */ +#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 /* PB11 */ + +#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1 /* PC0 */ +#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1 /* PC1 */ + +/* SPI */ + +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 /* PA6 */ +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 /* PA7 */ +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 /* PA5 */ +#define GPIO_SPI1_NSS GPIO_SPI1_NSS_1 /* PA4 */ +#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 +#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 + +#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 /* PB14 */ +#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 /* PB15 */ +#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 /* PB13 */ +#define GPIO_SPI2_NSS GPIO_SPI2_NSS_2 /* PB12 */ + +/***** BUTTONS ********/ +/* The board only has one button */ + +#define BUTTON_POWER 0 +#define NUM_BUTTONS 1 +#define BUTTON_POWER_BIT (1 << BUTTON_POWER) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ +/************************************************************************************ + * Name: stm32l4_boardinitialize + * + * Description: + * All STM32L4 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32l4_boardinitialize(void); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32L476_MDK_INCLUDE_BOARD_H */ diff --git a/configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h b/configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h new file mode 100644 index 00000000000..56f448898ec --- /dev/null +++ b/configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h @@ -0,0 +1,302 @@ +/************************************************************************************ + * configs/stm32l476-mdk/include/stm32l476-mdk-clocking.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Motorola Mobility, LLC. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM32L476_MDK_INCLUDE_STM32L476_MDK_CLOCKING_H +#define __CONFIGS_STM32L476_MDK_INCLUDE_STM32L476_MDK_CLOCKING_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#ifndef __ASSEMBLY__ +# include +#endif + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Clocking *************************************************************************/ + +/* HSI - 16 MHz RC factory-trimmed + * LSI - 32 KHz RC + * HSE - not installed + * LSE - not installed + */ + +#define STM32L4_HSI_FREQUENCY 16000000ul +#define STM32L4_LSI_FREQUENCY 32000 +#define STM32L4_LSE_FREQUENCY 32768 + +#define BOARD_AHB_FREQUENCY 80000000ul + +/* XXX there needs to be independent selections for the System Clock Mux and + * the PLL Source Mux; currently System Clock Mux always is PLL, and PLL + * Source Mux is chosen by the following define. This is probably OK in many + * cases, but should be separated to support other power configurations. + */ + +#if 0 +# define HSI_CLOCK_CONFIG /* HSI-16 clock configuration */ +#else +# define MSI_CLOCK_CONFIG /* MSI @ 4 MHz autotrimmed via LSE */ +#endif + +#if defined(HSI_CLOCK_CONFIG) + +#define STM32L4_BOARD_USEHSI 1 + +/* Prescaler common to all PLL inputs; will be 1 (XXX source is implicitly + as per comment above HSI) */ + +#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1) + +/* 'main' PLL config; we use this to generate our system clock via the R + * output. We set it up as 16 MHz / 1 * 10 / 2 = 80 MHz + * + * XXX NOTE: currently the main PLL is implicitly turned on and is implicitly + * the system clock; this should be configurable since not all applications may + * want things done this way. + */ + +#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(10) +#define STM32L4_PLLCFG_PLLP 0 +#undef STM32L4_PLLCFG_PLLP_ENABLED +#define STM32L4_PLLCFG_PLLQ RCC_PLLCFG_PLLQ_2 +#define STM32L4_PLLCFG_PLLQ_ENABLED +#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2 +#define STM32L4_PLLCFG_PLLR_ENABLED + +/* 'SAIPLL1' is used to generate the 48 MHz clock, since we can't + * do that with the main PLL's N value. We set N = 13, and enable + * the Q output (ultimately for CLK48) with /4. So, + * 16 MHz / 1 * 12 / 4 = 48 MHz + * + * XXX NOTE: currently the SAIPLL /must/ be explicitly selected in the + * menuconfig, or else all this is a moot point, and the various 48 MHz + * peripherals will not work (RNG at present). I would suggest removing + * that option from Kconfig altogether, and simply making it an option + * that is selected via a #define here, like all these other params. + */ + +#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(12) +#define STM32L4_PLLSAI1CFG_PLLP 0 +#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED +#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_4 +#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED +#define STM32L4_PLLSAI1CFG_PLLR 0 +#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED + +/* 'SAIPLL2' is not used in this application */ + +#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8) +#define STM32L4_PLLSAI2CFG_PLLP 0 +#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED +#define STM32L4_PLLSAI2CFG_PLLR 0 +#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED + +#define STM32L4_SYSCLK_FREQUENCY 80000000ul + +/* CLK48 will come from PLLSAI1 (implicitly Q) */ + +#define STM32L4_USE_CLK48 1 +#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1 + +/* Enable the LSE oscillator, used automatically trim the MSI, and for RTC */ + +#define STM32L4_USE_LSE 1 + +/* AHB clock (HCLK) is SYSCLK (80MHz) */ + +#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY +#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ + +/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */ + +#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */ +#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +/* Timers driven from APB1 will be twice PCLK1 */ +/* REVISIT : this can be configured */ + +#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY) + +/* APB2 clock (PCLK2) is HCLK (80MHz) */ + +#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */ +#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +/* Timers driven from APB2 will be twice PCLK2 */ +/* REVISIT : this can be configured */ + +#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY) +#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY) + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8 are on APB2, others on APB1 + */ + +#elif defined(MSI_CLOCK_CONFIG) + +/* Use the MSI; frequ = 4 MHz; autotrim from LSE */ + +#define STM32L4_BOARD_USEMSI 1 +#define STM32L4_BOARD_MSIRANGE RCC_CR_MSIRANGE_4M + +/* Prescaler common to all PLL inputs */ + +#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1) + +/* 'main' PLL config; we use this to generate our system clock */ + +#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(40) +#define STM32L4_PLLCFG_PLLP 0 +#undef STM32L4_PLLCFG_PLLP_ENABLED +#define STM32L4_PLLCFG_PLLQ 0 +#undef STM32L4_PLLCFG_PLLQ_ENABLED +#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2 +#define STM32L4_PLLCFG_PLLR_ENABLED + +/* 'SAIPLL1' is used to generate the 48 MHz clock */ + +#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(24) +#define STM32L4_PLLSAI1CFG_PLLP 0 +#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED +#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_2 +#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED +#define STM32L4_PLLSAI1CFG_PLLR 0 +#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED + +/* 'SAIPLL2' is not used in this application */ + +#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8) +#define STM32L4_PLLSAI2CFG_PLLP 0 +#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED +#define STM32L4_PLLSAI2CFG_PLLR 0 +#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED + +#define STM32L4_SYSCLK_FREQUENCY 80000000ul + +/* Enable CLK48; get it from PLLSAI1 */ + +#define STM32L4_USE_CLK48 +#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1 + +/* Disable LSE (for the RTC) */ + +#undef STM32L4_USE_LSE + +/* Configure the HCLK divisor (for the AHB bus, core, memory, and DMA */ + +#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ +#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY +#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */ + +/* Configure the APB1 prescaler */ + +#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */ +#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY) +#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY) + +/* Configure the APB2 prescaler */ + +#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */ +#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1) + +#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY) +#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY) + +#endif + +/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx + * otherwise frequency is 2xAPBx. + * Note: TIM1,8,15,16,17 are on APB2, others on APB1 + */ + +#define BOARD_TIM1_FREQUENCY STM32L4_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) +#define BOARD_TIM3_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) +#define BOARD_TIM4_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) +#define BOARD_TIM5_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) +#define BOARD_TIM6_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) +#define BOARD_TIM7_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) +#define BOARD_TIM8_FREQUENCY STM32L4_HCLK_FREQUENCY +#define BOARD_TIM15_FREQUENCY STM32L4_HCLK_FREQUENCY +#define BOARD_TIM16_FREQUENCY STM32L4_HCLK_FREQUENCY +#define BOARD_TIM17_FREQUENCY STM32L4_HCLK_FREQUENCY +#define BOARD_LPTIM1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) +#define BOARD_LPTIM2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_STM32L476_MDK_INCLUDE_STM32L476_MDK_CLOCKING_H */ diff --git a/configs/stm32l476-mdk/nsh/Make.defs b/configs/stm32l476-mdk/nsh/Make.defs new file mode 100644 index 00000000000..d67a9182335 --- /dev/null +++ b/configs/stm32l476-mdk/nsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/stm32l476-mdk/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: dev@ziggurat29.com +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mknulldeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +LDFLAGS += -Map=${TOPDIR}/nuttx.map +#CFLAGS += -Wa,-adhln +#CXXFLAGS += -Wa,-adhln + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32l476-mdk/nsh/defconfig b/configs/stm32l476-mdk/nsh/defconfig new file mode 100644 index 00000000000..0166c7e69c4 --- /dev/null +++ b/configs/stm32l476-mdk/nsh/defconfig @@ -0,0 +1,1023 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +# CONFIG_HEAP_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +CONFIG_ARCH_CHIP_STM32L4=y +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32l4" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +# CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART3_RS485 is not set +# CONFIG_USART3_RXDMA is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set + +# +# STM32L4 Configuration Options +# +CONFIG_ARCH_CHIP_STM32L476RG=y +# CONFIG_ARCH_CHIP_STM32L476RE is not set +# CONFIG_ARCH_CHIP_STM32L486 is not set +CONFIG_STM32L4_STM32L476XX=y +# CONFIG_STM32L4_STM32L486XX is not set +# CONFIG_STM32L4_FLASH_256KB is not set +# CONFIG_STM32L4_FLASH_512KB is not set +CONFIG_STM32L4_FLASH_1024KB=y + +# +# STM32L4 SRAM2 Options +# +# CONFIG_STM32L4_SRAM2_HEAP is not set +# CONFIG_STM32L4_SRAM2_INIT is not set + +# +# STM32L4 Peripherals +# + +# +# STM32L4 Peripheral Support +# +# CONFIG_STM32L4_HAVE_LTDC is not set +# CONFIG_STM32L4_ADC is not set +# CONFIG_STM32L4_CAN is not set +# CONFIG_STM32L4_DAC is not set +CONFIG_STM32L4_DMA=y +# CONFIG_STM32L4_I2C is not set +# CONFIG_STM32L4_SAI is not set +# CONFIG_STM32L4_SPI is not set +CONFIG_STM32L4_USART=y +# CONFIG_STM32L4_LPTIM is not set + +# +# AHB1 Peripherals +# +CONFIG_STM32L4_DMA1=y +CONFIG_STM32L4_DMA2=y +# CONFIG_STM32L4_CRC is not set +# CONFIG_STM32L4_TSC is not set + +# +# AHB2 Peripherals +# +# CONFIG_STM32L4_OTGFS is not set +# CONFIG_STM32L4_ADC1 is not set +# CONFIG_STM32L4_ADC2 is not set +# CONFIG_STM32L4_ADC3 is not set +# CONFIG_STM32L4_AES is not set +CONFIG_STM32L4_RNG=y + +# +# AHB3 Peripherals +# +# CONFIG_STM32L4_FMC is not set +# CONFIG_STM32L4_QSPI is not set + +# +# APB1 Peripherals +# +CONFIG_STM32L4_PWR=y +# CONFIG_STM32L4_TIM2 is not set +# CONFIG_STM32L4_TIM3 is not set +# CONFIG_STM32L4_TIM4 is not set +# CONFIG_STM32L4_TIM5 is not set +# CONFIG_STM32L4_TIM6 is not set +# CONFIG_STM32L4_TIM7 is not set +# CONFIG_STM32L4_LCD is not set +# CONFIG_STM32L4_SPI2 is not set +# CONFIG_STM32L4_SPI3 is not set +# CONFIG_STM32L4_USART1 is not set +# CONFIG_STM32L4_USART2 is not set +CONFIG_STM32L4_USART3=y +# CONFIG_STM32L4_I2C1 is not set +# CONFIG_STM32L4_I2C2 is not set +# CONFIG_STM32L4_I2C3 is not set +# CONFIG_STM32L4_CAN1 is not set +# CONFIG_STM32L4_DAC1 is not set +# CONFIG_STM32L4_DAC2 is not set +# CONFIG_STM32L4_OPAMP is not set +# CONFIG_STM32L4_LPTIM1 is not set +# CONFIG_STM32L4_LPUART1 is not set +# CONFIG_STM32L4_SWPMI is not set +# CONFIG_STM32L4_LPTIM2 is not set + +# +# APB2 Peripherals +# +CONFIG_STM32L4_SYSCFG=y +CONFIG_STM32L4_FIREWALL=y +# CONFIG_STM32L4_SDMMC1 is not set +# CONFIG_STM32L4_TIM1 is not set +# CONFIG_STM32L4_SPI1 is not set +# CONFIG_STM32L4_TIM8 is not set +# CONFIG_STM32L4_TIM15 is not set +# CONFIG_STM32L4_TIM16 is not set +# CONFIG_STM32L4_TIM17 is not set +# CONFIG_STM32L4_SAI1 is not set +# CONFIG_STM32L4_SAI2 is not set +# CONFIG_STM32L4_DFSDM is not set + +# +# Other Peripherals +# +# CONFIG_STM32L4_BKPSRAM is not set +# CONFIG_STM32L4_IWDG is not set +# CONFIG_STM32L4_WWDG is not set +CONFIG_STM32L4_FLASH_PREFETCH=y +CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG is not set +CONFIG_STM32L4_RTC_LSECLOCK=y +# CONFIG_STM32L4_RTC_LSICLOCK is not set +# CONFIG_STM32L4_RTC_HSECLOCK is not set +CONFIG_STM32L4_SAI1PLL=y +# CONFIG_STM32L4_SAI2PLL is not set + +# +# Timer Configuration +# +# CONFIG_STM32L4_ONESHOT is not set +# CONFIG_STM32L4_FREERUN is not set +CONFIG_STM32L4_HAVE_USART3=y +# CONFIG_STM32L4_HAVE_USART4 is not set +# CONFIG_STM32L4_HAVE_USART5 is not set + +# +# U[S]ART Configuration +# +# CONFIG_STM32L4_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32L4_USART_BREAKS is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +CONFIG_ARCH_DMA=y +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=8499 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=98304 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_NUCLEO_L476RG is not set +# CONFIG_ARCH_BOARD_STM32L476VG_DISCO is not set +CONFIG_ARCH_BOARD_STM32L476_MDK=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32l476-mdk" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +CONFIG_BOARDCTL_UNIQUEID=y +CONFIG_BOARDCTL_UNIQUEID_SIZE=12 +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_ARCH_HAVE_TICKLESS=y +# CONFIG_SCHED_TICKLESS is not set +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=8 +CONFIG_WDOG_INTRESERVE=1 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +CONFIG_ARCH_HAVE_RNG=y +CONFIG_DEV_RANDOM=y +# CONFIG_DEV_URANDOM is not set +CONFIG_DEV_LOOP=y + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +CONFIG_ARCH_HAVE_SPI_BITORDER=y +# CONFIG_SPI_BITORDER is not set +# CONFIG_SPI_CS_DELAY_CONTROL is not set +# CONFIG_SPI_DRIVER is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +CONFIG_RTC=y +CONFIG_RTC_DATETIME=y +CONFIG_RTC_ALARM=y +CONFIG_RTC_NALARMS=2 +CONFIG_RTC_DRIVER=y +CONFIG_RTC_IOCTL=y +# CONFIG_RTC_EXTERNAL is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +CONFIG_FS_ROMFS=y +CONFIG_FS_TMPFS=y +CONFIG_FS_TMPFS_BLOCKSIZE=512 +CONFIG_FS_TMPFS_DIRECTORY_ALLOCGUARD=64 +CONFIG_FS_TMPFS_DIRECTORY_FREEGUARD=128 +CONFIG_FS_TMPFS_FILE_ALLOCGUARD=512 +CONFIG_FS_TMPFS_FILE_FREEGUARD=1024 +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +CONFIG_LIBM=y +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_ALARM is not set +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_LEDS is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RANDOM is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_ROMFS is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_THTTPD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set +# CONFIG_NSH_ROMFSETC is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32l476-mdk/nsh/setenv.sh b/configs/stm32l476-mdk/nsh/setenv.sh new file mode 100755 index 00000000000..196fbd3993e --- /dev/null +++ b/configs/stm32l476-mdk/nsh/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/stm32l476-mdk/nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32l476-mdk/scripts/ld.script b/configs/stm32l476-mdk/scripts/ld.script new file mode 100644 index 00000000000..27502113e78 --- /dev/null +++ b/configs/stm32l476-mdk/scripts/ld.script @@ -0,0 +1,125 @@ +/**************************************************************************** + * configs/stm32l476-mdk/scripts/l476rg.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Sebastien Lorquet + * dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32L476VG has 1024Kb of FLASH beginning at address 0x0800:0000, + * 96Kb of SRAM beginning at address 0x2000:0000, and 32Kb of SRAM2 beginning + * at address 0x1000:0000. The SRAM2 has special properties (e.g. parity + * check, separate power domain for retention in low power modes, write + * protection). Alas, it is non-contiguous with main SRAM. + * When booting from FLASH, + * FLASH memory is aliased to address 0x0000:0000 where the code expects to + * begin execution by jumping to the entry point in the 0x0800:0000 address + * range. + */ + +MEMORY +{ + flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K + sram2 (rwx) : ORIGIN = 0x10000000, LENGTH = 32K +} + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + /* The STM32L476RG has 96Kb of SRAM beginning at the following address */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/stm32l476-mdk/src/Makefile b/configs/stm32l476-mdk/src/Makefile new file mode 100644 index 00000000000..f74969e08b1 --- /dev/null +++ b/configs/stm32l476-mdk/src/Makefile @@ -0,0 +1,53 @@ +############################################################################ +# configs/stm32l476-mdk/src/Makefile +# +# Copyright (C) 2014 Gregory Nutt. All rights reserved. +# Author: dev@ziggurat29.com +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = stm32_boot.c stm32_spi.c + +ifeq ($(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG),y) +CSRCS += stm32_clockconfig.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += stm32_buttons.c +endif + +ifeq ($(CONFIG_LIB_BOARDCTL),y) +CSRCS += stm32_appinit.c +endif + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/stm32l476-mdk/src/stm32_appinit.c b/configs/stm32l476-mdk/src/stm32_appinit.c new file mode 100644 index 00000000000..99a42e0a4a4 --- /dev/null +++ b/configs/stm32l476-mdk/src/stm32_appinit.c @@ -0,0 +1,176 @@ +/**************************************************************************** + * configs/stm32l476-mdk/src/stm32_appinit.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include + +#include + +#include "stm32l476-mdk.h" + +/* Conditional logic in stm32l476-mdk.h will determine if certain features + * are supported. Tests for these features need to be made after including + * stm32l476-mdk.h. + */ + +#ifdef HAVE_RTC_DRIVER +# include +# include "stm32l4_rtc.h" +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_LIB_BOARDCTL +int board_app_initialize(uintptr_t arg) +{ +#ifdef HAVE_RTC_DRIVER + FAR struct rtc_lowerhalf_s *rtclower; +#endif + int ret; + + (void)ret; + +#ifdef CONFIG_SCHED_INSTRUMENTATION + /* Configure CPU load estimation */ + + cpuload_initialize_once(); +#endif + +#ifdef HAVE_PROC + /* mount the proc filesystem */ + + syslog(LOG_INFO, "Mounting procfs to /proc\n"); + + ret = mount(NULL, CONFIG_NSH_PROC_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", + ret, errno); + return ret; + } +#endif + +#ifdef HAVE_RTC_DRIVER + /* Instantiate the STM32 lower-half RTC driver */ + + rtclower = stm32l4_rtc_lowerhalf(); + if (!rtclower) + { + serr("ERROR: Failed to instantiate the RTC lower-half driver\n"); + return -ENOMEM; + } + else + { + /* Bind the lower half driver and register the combined RTC driver + * as /dev/rtc0 + */ + + ret = rtc_initialize(0, rtclower); + if (ret < 0) + { + serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret); + return ret; + } + } +#endif + + return OK; +} +#endif /* CONFIG_LIB_BOARDCTL */ + +#if defined(CONFIG_BOARDCTL_UNIQUEID) +int board_uniqueid(uint8_t *uniqueid) +{ + if (uniqueid == 0) + { + return -EINVAL; + } + + stm32l4_get_uniqueid(uniqueid); + return OK; +} +#endif diff --git a/configs/stm32l476-mdk/src/stm32_boot.c b/configs/stm32l476-mdk/src/stm32_boot.c new file mode 100644 index 00000000000..3d907d49bb7 --- /dev/null +++ b/configs/stm32l476-mdk/src/stm32_boot.c @@ -0,0 +1,110 @@ +/************************************************************************************ + * configs/stm32l476-mdk/src/stm32_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include + +#include "up_arch.h" +#include "stm32l476-mdk.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32l4_boardinitialize + * + * Description: + * All STM32L4 architectures must provide the following entry point. This entry point + * is called early in the initialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void stm32l4_boardinitialize(void) +{ + /* Configure on-board LEDs if LED support has been selected. */ + +#ifdef CONFIG_ARCH_LEDS + board_autoled_initialize(); +#endif + + /* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function + * stm32_spiinitialize() has been brought into the link. + */ + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + stm32l4_spiinitialize(); +#endif +} + +/**************************************************************************** + * Name: board_initialize + * + * Description: + * If CONFIG_BOARD_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_initialize(). board_initialize() will be + * called immediately after up_intiialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_INITIALIZE +void board_initialize(void) +{ + /* Perform NSH initialization here instead of from the NSH. This + * alternative NSH initialization is necessary when NSH is ran in user-space + * but the initialization function must run in kernel space. + */ + +#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT) + board_app_initialize(0); +#endif +} +#endif diff --git a/configs/stm32l476-mdk/src/stm32_buttons.c b/configs/stm32l476-mdk/src/stm32_buttons.c new file mode 100644 index 00000000000..0a396f664d4 --- /dev/null +++ b/configs/stm32l476-mdk/src/stm32_buttons.c @@ -0,0 +1,166 @@ +/**************************************************************************** + * configs/stm32l476-mdk/src/stm32_buttons.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include + +#include "stm32l476-mdk.h" + +#ifdef CONFIG_ARCH_BUTTONS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* Pin configuration for each button. This array is indexed by + * the BUTTON_* definitions in board.h + */ + +static const uint32_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN_POWER +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + + + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +void board_button_initialize(void) +{ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + stm32l4_configgpio(g_buttons[i]); + } +} + +/**************************************************************************** + * Name: board_buttons + ****************************************************************************/ + +uint8_t board_buttons(void) +{ + uint8_t ret = 0; + int i; + + /* Check that state of each key */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + /* A LOW value means that the key is pressed. */ + + bool released = stm32l4_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } + } + + return ret; +} + +/***************************************************************************** + * Button support. + * + * Description: + * board_button_initialize() must be called to initialize button resources. After + * that, board_buttons() may be called to collect the current state of all + * buttons or board_button_irq() may be called to register button interrupt + * handlers. + * + * After board_button_initialize() has been called, board_buttons() may be called to + * collect the state of all buttons. board_buttons() returns an 8-bit bit set + * with each bit associated with a button. See the BUTTON_*_BIT + * definitions in board.h for the meaning of each bit. + * + * board_button_irq() may be called to register an interrupt handler that will + * be called when a button is depressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. See the + * BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it may + * restored, if so desired). + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +xcpt_t board_button_irq(int id, xcpt_t irqhandler) +{ + xcpt_t oldhandler = NULL; + + if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) + { + oldhandler = stm32l4_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + } + return oldhandler; +} +#endif +#endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/stm32l476-mdk/src/stm32_clockconfig.c b/configs/stm32l476-mdk/src/stm32_clockconfig.c new file mode 100644 index 00000000000..541a4f202f6 --- /dev/null +++ b/configs/stm32l476-mdk/src/stm32_clockconfig.c @@ -0,0 +1,239 @@ +/************************************************************************************ + * configs/stm32l476-mdk/src/stm32_clockconfig.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include +#include + +#include "up_arch.h" +#include "stm32l476-mdk.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_board_clockconfig + * + * Description: + * I provided this module when I was doing some debugging of a problem I had with + * clocking (it was helpful to do A/B tests). I'm leaving it here in the config + * partially because I expect to have similar problems again as I develop more of + * the various peripheral support, but also because it may become necessary in the + * end for certain project configurations which have specialized clock configurations + * that aren't appropriate to expose in the 'arch' default code. + * + ************************************************************************************/ + +#if defined(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG) +void stm32l4_board_clockconfig(void) +{ + uint32_t regval; + + /* Enable Internal High-Speed Clock (HSI) */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_HSION; /* Enable HSI */ + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the HSI is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_HSIRDY) == 0) + { + } + + /* Set the HCLK source/divider */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_HPRE_MASK; + regval |= STM32L4_RCC_CFGR_HPRE; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Set the PCLK2 divider */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE2_MASK; + regval |= STM32L4_RCC_CFGR_PPRE2; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Set the PCLK1 divider */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE1_MASK; + regval |= STM32L4_RCC_CFGR_PPRE1; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Set the PLL source and main divider */ + + regval = getreg32(STM32L4_RCC_PLLCFG); + + /* Configure Main PLL */ + /* Set the PLL dividers and multipliers to configure the main PLL */ + + regval = (STM32L4_PLLCFG_PLLM | STM32L4_PLLCFG_PLLN | STM32L4_PLLCFG_PLLP + | STM32L4_PLLCFG_PLLQ | STM32L4_PLLCFG_PLLR); + regval |= RCC_PLLCFG_PLLQEN; + regval |= RCC_PLLCFG_PLLREN; + + /* XXX The choice of clock source to PLL (all three) is independent + * of the sys clock source choice, review the STM32L4_BOARD_USEHSI + * name; probably split it into two, one for PLL source and one + * for sys clock source. + */ + + regval |= RCC_PLLCFG_PLLSRC_HSI; + putreg32(regval, STM32L4_RCC_PLLCFG); + + /* Enable the main PLL */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_PLLON; + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLRDY) == 0) + { + } + + /* Configure SAI1 PLL */ + + regval = getreg32(STM32L4_RCC_PLLSAI1CFG); + + /* Set the PLL dividers and multipliers to configure the SAI1 PLL */ + + regval = (STM32L4_PLLSAI1CFG_PLLN | STM32L4_PLLSAI1CFG_PLLP | + STM32L4_PLLSAI1CFG_PLLQ | STM32L4_PLLSAI1CFG_PLLR); + regval |= RCC_PLLSAI1CFG_PLLQEN; + putreg32(regval, STM32L4_RCC_PLLSAI1CFG); + + /* Enable the SAI1 PLL */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_PLLSAI1ON; + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0) + { + } + + /* Configure SAI2 PLL */ + + regval = getreg32(STM32L4_RCC_PLLSAI2CFG); + + /* Enable the SAI2 PLL */ + /* Set the PLL dividers and multipliers to configure the SAI2 PLL */ + + regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP | + STM32L4_PLLSAI2CFG_PLLR); + putreg32(regval, STM32L4_RCC_PLLSAI2CFG); + + /* Enable the SAI1 PLL */ + + regval = getreg32(STM32L4_RCC_CR); + regval |= RCC_CR_PLLSAI2ON; + putreg32(regval, STM32L4_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0) + { + } + + /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ + +#ifdef CONFIG_STM32L4_FLASH_PREFETCH + regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | + FLASH_ACR_PRFTEN); +#else + regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); +#endif + putreg32(regval, STM32L4_FLASH_ACR); + + /* Select the main PLL as system clock source */ + + regval = getreg32(STM32L4_RCC_CFGR); + regval &= ~RCC_CFGR_SW_MASK; + regval |= RCC_CFGR_SW_PLL; + putreg32(regval, STM32L4_RCC_CFGR); + + /* Wait until the PLL source is used as the system clock source */ + + while ((getreg32(STM32L4_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL) + { + } + +#if defined(CONFIG_STM32L4_IWDG) || defined(CONFIG_RTC_LSICLOCK) + + /* Low speed internal clock source LSI */ + + stm32l4_rcc_enablelsi(); +#endif + +#if defined(STM32L4_USE_LSE) + + /* Low speed external clock source LSE + * + * TODO: There is another case where the LSE needs to + * be enabled: if the MCO1 pin selects LSE as source. + */ + + stm32l4_pwr_enableclk(true); + stm32l4_rcc_enablelse(); +#endif + + /* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source + * and then we can also do away with STM32L4_USE_CLK48, and give better + * warning messages + * + * XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already + * enabled ZZZ + */ + + regval = getreg32(STM32L4_RCC_CCIPR); + regval &= RCC_CCIPR_CLK48SEL_MASK; + regval |= STM32L4_CLK48_SEL; + putreg32(regval, STM32L4_RCC_CCIPR); +} +#endif diff --git a/configs/stm32l476-mdk/src/stm32_spi.c b/configs/stm32l476-mdk/src/stm32_spi.c new file mode 100644 index 00000000000..8b1cb7a8a6e --- /dev/null +++ b/configs/stm32l476-mdk/src/stm32_spi.c @@ -0,0 +1,210 @@ +/**************************************************************************** + * configs/stm32l476-mdk/src/stm32_spi.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "stm32l476-mdk.h" + +#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) + +/************************************************************************************ + * Public Data + ************************************************************************************/ +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +struct spi_dev_s *g_spi2; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and + * Nucleo-F411RE boards. + * + ************************************************************************************/ + +void weak_function stm32_spiinitialize(void) +{ +#ifdef CONFIG_STM32_SPI1 + /* Configure SPI-based devices */ + + g_spi1 = up_spiinitialize(1); + if (!g_spi1) + { + spierr("ERROR: [boot] FAILED to initialize SPI port 1\n"); + } +#endif + +#ifdef CONFIG_STM32_SPI2 + /* Configure SPI-based devices */ + + g_spi2 = up_spiinitialize(2); + +#endif +} + +/**************************************************************************** + * Name: stm32_spi1/2/3select and stm32_spi1/2/3status + * + * Description: + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be + * provided by board-specific logic. They are implementations of the select + * and status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including up_spiinitialize()) + * are provided by common STM32 logic. To use this common SPI logic on your + * board: + * + * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select + * pins. + * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to up_spiinitialize() in your low level application + * initialization logic + * 4. The handle returned by up_spiinitialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_SPI1 +void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) + + spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); +} + +uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +/**************************************************************************** + * Name: stm32_spi1cmddata + * + * Description: + * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true) + * or command (false). This function must be provided by platform-specific + * logic. This is an implementation of the cmddata method of the SPI + * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). + * + * Input Parameters: + * + * spi - SPI device that controls the bus the device that requires the CMD/ + * DATA selection. + * devid - If there are multiple devices on the bus, this selects which one + * to select cmd or data. NOTE: This design restricts, for example, + * one one SPI display per SPI bus. + * cmd - true: select command; false: select data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CMDDATA +#ifdef CONFIG_STM32_SPI1 +int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI2 +int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif + +#ifdef CONFIG_STM32_SPI3 +int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return OK; +} +#endif +#endif /* CONFIG_SPI_CMDDATA */ + +#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */ diff --git a/configs/stm32l476-mdk/src/stm32l476-mdk.h b/configs/stm32l476-mdk/src/stm32l476-mdk.h new file mode 100644 index 00000000000..51e883907ef --- /dev/null +++ b/configs/stm32l476-mdk/src/stm32l476-mdk.h @@ -0,0 +1,140 @@ +/************************************************************************************ + * configs/stm32l476-mdk/src/stm32l476-mdk.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Frank Bennett + * Gregory Nutt + * Sebastien Lorquet + * dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __CONFIGS_STM32L476_MDK_SRC_STM32L476_MDK_H +#define __CONFIGS_STM32L476_MDK_SRC_STM32L476_MDK_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* Configuration ********************************************************************/ + +#define HAVE_PROC 1 +#define HAVE_RTC_DRIVER 1 + +#if !defined(CONFIG_FS_PROCFS) +# undef HAVE_PROC +#endif + +#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No procfs support +# undef HAVE_PROC +#endif + +/* Check if we can support the RTC driver */ + +#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) +# undef HAVE_RTC_DRIVER +#endif + +/* LED. + * LD4: the red LED on PB2 + * LD5: the green LED on PE8 + * + * - When the I/O is HIGH value, the LED is on. + * - When the I/O is LOW, the LED is off. + */ + +#define GPIO_LED_RED \ + (GPIO_PORTB | GPIO_PIN2 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_PULLUP | GPIO_SPEED_50MHz) + +#define GPIO_LED_GRN \ + (GPIO_PORTE | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \ + GPIO_PULLUP | GPIO_SPEED_50MHz) + +/* BUTTONS -- NOTE that all have EXTI interrupts configured */ + +#define MIN_IRQBUTTON BUTTON_POWER +#define MAX_IRQBUTTON BUTTON_POWER +#define NUM_IRQBUTTONS 1 + +#define GPIO_BTN_POWER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN2) + +/* SPI1 off */ +#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN15) +#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN14) +#define GPIO_SPI1_SCK_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN13) +#define GPIO_SPI1_NSS_OFF (GPIO_INPUT | GPIO_PULLDOWN | \ + GPIO_PORTE | GPIO_PIN12) + +/* Devices on the onboard I2C bus. + * + * Note that these are unshifted addresses. + */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* Global driver instances */ + +#ifdef CONFIG_STM32_SPI1 +extern struct spi_dev_s *g_spi1; +#endif +#ifdef CONFIG_STM32_SPI2 +extern struct spi_dev_s *g_spi2; +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_spiinitialize + * + * Description: + * Called to configure SPI chip select GPIO pins. + * + ************************************************************************************/ + +void stm32_spiinitialize(void); + +#endif /* __CONFIGS_STM32L476_MDK_SRC_STM32L476_MDK_H */ From f61a14454d2bc6a4759cccbaf4bede16f5121177 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 15 Sep 2016 08:06:33 -0600 Subject: [PATCH 198/214] Trivial cosmetic changes from review of PR 133 --- Documentation/README.html | 2 ++ README.txt | 2 ++ configs/README.txt | 5 +++ configs/stm32l476-mdk/include/board.h | 8 ++--- configs/stm32l476-mdk/nsh/defconfig | 2 +- configs/stm32l476-mdk/scripts/ld.script | 2 +- configs/stm32l476-mdk/src/stm32_buttons.c | 34 +++++++++---------- configs/stm32l476-mdk/src/stm32_clockconfig.c | 10 +++--- 8 files changed, 37 insertions(+), 28 deletions(-) diff --git a/Documentation/README.html b/Documentation/README.html index 4bbe2d956d0..bdc92c660c8 100644 --- a/Documentation/README.html +++ b/Documentation/README.html @@ -265,6 +265,8 @@ nuttx/ | | `- README.txt | |- stm32f746g-disco/ | | `- README.txt + | |- stm32l476-mdk/ + | | `- README.txt | |- stm32l476vg-disco/ | | `- README.txt | |- stm32ldiscovery/ diff --git a/README.txt b/README.txt index 3617f874a72..599200988d2 100644 --- a/README.txt +++ b/README.txt @@ -1481,6 +1481,8 @@ nuttx/ | | `- README.txt | |- stm32f746g-disco/ | | `- README.txt + | |- stm32l476-mdk/ + | | `- README.txt | |- stm32l476vg-disco/ | | `- README.txt | |- stm32ldiscovery/ diff --git a/configs/README.txt b/configs/README.txt index 65c481fc129..8bf546a298d 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -672,6 +672,11 @@ configs/stm32f746g-disco configs/stm32f746g-ws Waveshare STM32F746 development board featuring the STM32F746IG MCU. +configs/stm32l476-mdk + Motorola Mods Development Board (MDK) features STM32L476ME MCU. + The STM32L476ME is a Cortex-M4 optimised for low-power operation + at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM. + configs/stm32l476vg-disco STMicro STM32L476VG_DISCO development board featuring the STM32L476VG MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation diff --git a/configs/stm32l476-mdk/include/board.h b/configs/stm32l476-mdk/include/board.h index deb8bba6a75..39f0e861ef7 100644 --- a/configs/stm32l476-mdk/include/board.h +++ b/configs/stm32l476-mdk/include/board.h @@ -109,7 +109,7 @@ #define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 /* PB13 */ #define GPIO_SPI2_NSS GPIO_SPI2_NSS_2 /* PB12 */ -/***** BUTTONS ********/ +/* Buttons **************************************************************************/ /* The board only has one button */ #define BUTTON_POWER 0 @@ -138,9 +138,9 @@ extern "C" * Name: stm32l4_boardinitialize * * Description: - * All STM32L4 architectures must provide the following entry point. This entry point - * is called early in the initialization -- after all memory has been configured - * and mapped but before any devices have been initialized. + * All STM32L4 architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. * ************************************************************************************/ diff --git a/configs/stm32l476-mdk/nsh/defconfig b/configs/stm32l476-mdk/nsh/defconfig index 0166c7e69c4..e1d92b95af3 100644 --- a/configs/stm32l476-mdk/nsh/defconfig +++ b/configs/stm32l476-mdk/nsh/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -CONFIG_APPS_DIR="../apps" +# CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set diff --git a/configs/stm32l476-mdk/scripts/ld.script b/configs/stm32l476-mdk/scripts/ld.script index 27502113e78..9b264217d4c 100644 --- a/configs/stm32l476-mdk/scripts/ld.script +++ b/configs/stm32l476-mdk/scripts/ld.script @@ -1,5 +1,5 @@ /**************************************************************************** - * configs/stm32l476-mdk/scripts/l476rg.ld + * configs/stm32l476-mdk/scripts/ld.script * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/configs/stm32l476-mdk/src/stm32_buttons.c b/configs/stm32l476-mdk/src/stm32_buttons.c index 0a396f664d4..a59430ec82b 100644 --- a/configs/stm32l476-mdk/src/stm32_buttons.c +++ b/configs/stm32l476-mdk/src/stm32_buttons.c @@ -69,8 +69,6 @@ static const uint32_t g_buttons[NUM_BUTTONS] = * Private Functions ****************************************************************************/ - - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -132,22 +130,22 @@ uint8_t board_buttons(void) * Button support. * * Description: - * board_button_initialize() must be called to initialize button resources. After - * that, board_buttons() may be called to collect the current state of all - * buttons or board_button_irq() may be called to register button interrupt - * handlers. + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. * - * After board_button_initialize() has been called, board_buttons() may be called to - * collect the state of all buttons. board_buttons() returns an 8-bit bit set - * with each bit associated with a button. See the BUTTON_*_BIT - * definitions in board.h for the meaning of each bit. + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. * - * board_button_irq() may be called to register an interrupt handler that will - * be called when a button is depressed or released. The ID value is a - * button enumeration value that uniquely identifies a button resource. See the - * BUTTON_* definitions in board.h for the meaning of enumeration - * value. The previous interrupt handler address is returned (so that it may - * restored, if so desired). + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value + * is a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of enumeration + * value. The previous interrupt handler address is returned (so that it + * may be restored, if so desired). * ****************************************************************************/ @@ -158,8 +156,10 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler) if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON) { - oldhandler = stm32l4_gpiosetevent(g_buttons[id], true, true, true, irqhandler); + oldhandler = stm32l4_gpiosetevent(g_buttons[id], true, true, true, + irqhandler); } + return oldhandler; } #endif diff --git a/configs/stm32l476-mdk/src/stm32_clockconfig.c b/configs/stm32l476-mdk/src/stm32_clockconfig.c index 541a4f202f6..d2ae4263e1c 100644 --- a/configs/stm32l476-mdk/src/stm32_clockconfig.c +++ b/configs/stm32l476-mdk/src/stm32_clockconfig.c @@ -56,11 +56,11 @@ * * Description: * I provided this module when I was doing some debugging of a problem I had with - * clocking (it was helpful to do A/B tests). I'm leaving it here in the config - * partially because I expect to have similar problems again as I develop more of - * the various peripheral support, but also because it may become necessary in the - * end for certain project configurations which have specialized clock configurations - * that aren't appropriate to expose in the 'arch' default code. + * clocking (it was helpful to do A/B tests). I'm leaving it here in the config + * partially because I expect to have similar problems again as I develop more of + * the various peripheral support, but also because it may become necessary in the + * end for certain project configurations which have specialized clock + * configurationsthat aren't appropriate to expose in the 'arch' default code. * ************************************************************************************/ From 829de7d5bdbe161cc8317bffbd3408f018487d03 Mon Sep 17 00:00:00 2001 From: Pierre-noel Bouteville Date: Thu, 15 Sep 2016 08:36:45 -0600 Subject: [PATCH 199/214] Set USB address to avoid a failed assertion --- arch/arm/src/stm32/stm32_otgfshost.c | 1 + arch/arm/src/stm32/stm32_otghshost.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c index 6c340c81fb1..9b3c48102db 100644 --- a/arch/arm/src/stm32/stm32_otgfshost.c +++ b/arch/arm/src/stm32/stm32_otgfshost.c @@ -2888,6 +2888,7 @@ static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv) stm32_chan_freeall(priv); priv->rhport.hport.speed = USB_SPEED_FULL; + priv->rhport.hport.funcaddr = 0; /* Notify any waiters that there is a change in the connection state */ diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c index 12a511415bd..da0a114aa8d 100644 --- a/arch/arm/src/stm32/stm32_otghshost.c +++ b/arch/arm/src/stm32/stm32_otghshost.c @@ -2888,6 +2888,7 @@ static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv) stm32_chan_freeall(priv); priv->rhport.hport.speed = USB_SPEED_FULL; + priv->rhport.hport.funcaddr = 0; /* Notify any waiters that there is a change in the connection state */ From 7f1a88e2436ce3edab4078aec0a87de41c9524da Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 15 Sep 2016 08:41:49 -0600 Subject: [PATCH 200/214] Pierre's assertion-avoidance change should also be applied to STM32 F7 and L4 --- arch/arm/src/stm32f7/stm32_otghost.c | 1 + arch/arm/src/stm32l4/stm32l4_otgfshost.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/src/stm32f7/stm32_otghost.c b/arch/arm/src/stm32f7/stm32_otghost.c index 69ac3fbe687..37677a614da 100644 --- a/arch/arm/src/stm32f7/stm32_otghost.c +++ b/arch/arm/src/stm32f7/stm32_otghost.c @@ -2887,6 +2887,7 @@ static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv) stm32_chan_freeall(priv); priv->rhport.hport.speed = USB_SPEED_FULL; + priv->rhport.hport.funcaddr = 0; /* Notify any waiters that there is a change in the connection state */ diff --git a/arch/arm/src/stm32l4/stm32l4_otgfshost.c b/arch/arm/src/stm32l4/stm32l4_otgfshost.c index 543ea7c8817..428a7f80cf5 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfshost.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfshost.c @@ -2893,6 +2893,7 @@ static void stm32l4_gint_disconnected(FAR struct stm32l4_usbhost_s *priv) stm32l4_chan_freeall(priv); priv->rhport.hport.speed = USB_SPEED_FULL; + priv->rhport.hport.funcaddr = 0; /* Notify any waiters that there is a change in the connection state */ From 368f2416377fa2148d59cec89c9a4f3b81bb6cf8 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 15 Sep 2016 08:46:41 -0600 Subject: [PATCH 201/214] Correct some comments --- sched/mqueue/mq_send.c | 2 +- sched/mqueue/mq_sndinternal.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sched/mqueue/mq_send.c b/sched/mqueue/mq_send.c index 84c22b5d765..df1500e035b 100644 --- a/sched/mqueue/mq_send.c +++ b/sched/mqueue/mq_send.c @@ -84,7 +84,7 @@ * On success, mq_send() returns 0 (OK); on error, -1 (ERROR) * is returned, with errno set to indicate the error: * - * EAGAIN The queue was empty, and the O_NONBLOCK flag was set for the + * EAGAIN The queue was full and the O_NONBLOCK flag was set for the * message queue description referred to by mqdes. * EINVAL Either msg or mqdes is NULL or the value of prio is invalid. * EPERM Message queue opened not opened for writing. diff --git a/sched/mqueue/mq_sndinternal.c b/sched/mqueue/mq_sndinternal.c index 782eb84e333..050d71269ab 100644 --- a/sched/mqueue/mq_sndinternal.c +++ b/sched/mqueue/mq_sndinternal.c @@ -208,7 +208,7 @@ FAR struct mqueue_msg_s *mq_msgalloc(void) * On success, mq_send() returns 0 (OK); on error, -1 (ERROR) is * returned, with errno set to indicate the error: * - * EAGAIN The queue was empty, and the O_NONBLOCK flag was set for the + * EAGAIN The queue was full and the O_NONBLOCK flag was set for the * message queue description referred to by mqdes. * EINTR The call was interrupted by a signal handler. * ETIMEOUT A timeout expired before the message queue became non-full From e3bbfa2d8515a9cf83e4f9daef30c522f25835bd Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 15 Sep 2016 12:42:24 -0600 Subject: [PATCH 202/214] mq_send() was not setting the errno value on certain failures to allocate a message --- sched/mqueue/mq_send.c | 16 ++++++++++++++-- sched/mqueue/mq_sndinternal.c | 21 ++++++++++++++------- sched/mqueue/mq_timedsend.c | 6 ++++-- 3 files changed, 32 insertions(+), 11 deletions(-) diff --git a/sched/mqueue/mq_send.c b/sched/mqueue/mq_send.c index df1500e035b..12ce2b85c1e 100644 --- a/sched/mqueue/mq_send.c +++ b/sched/mqueue/mq_send.c @@ -133,6 +133,15 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio) leave_critical_section(flags); mqmsg = mq_msgalloc(); + + /* Check if the message was sucessfully allocated */ + + if (mqmsg == NULL) + { + /* No... mq_msgalloc() does not set the errno value */ + + set_errno(ENOMEM); + } } else { @@ -141,6 +150,8 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio) * - We are not in an interrupt handler AND * - The message queue is full AND * - When we tried waiting, the wait was unsuccessful. + * + * In this case mq_waitsend() has already set the errno value. */ leave_critical_section(flags); @@ -151,9 +162,10 @@ int mq_send(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio) * to allocate it) or because the allocation failed. */ - if (mqmsg) + if (mqmsg != NULL) { - /* Yes, perform the message send. + /* The allocation was successful (implying that we can also send the + * message). Perform the message send. * * NOTE: There is a race condition here: What if a message is added by * interrupt related logic so that queue again becomes non-empty. diff --git a/sched/mqueue/mq_sndinternal.c b/sched/mqueue/mq_sndinternal.c index 050d71269ab..087e1f15dc9 100644 --- a/sched/mqueue/mq_sndinternal.c +++ b/sched/mqueue/mq_sndinternal.c @@ -158,7 +158,7 @@ FAR struct mqueue_msg_s *mq_msgalloc(void) /* Try the general free list */ mqmsg = (FAR struct mqueue_msg_s *)sq_remfirst(&g_msgfree); - if (!mqmsg) + if (mqmsg == NULL) { /* Try the free list reserved for interrupt handlers */ @@ -178,16 +178,23 @@ FAR struct mqueue_msg_s *mq_msgalloc(void) mqmsg = (FAR struct mqueue_msg_s *)sq_remfirst(&g_msgfree); leave_critical_section(flags); - /* If we cannot a message from the free list, then we will have to allocate one. */ + /* If we cannot a message from the free list, then we will have to + * allocate one. + */ - if (!mqmsg) + if (mqmsg == NULL) { - mqmsg = (FAR struct mqueue_msg_s *)kmm_malloc((sizeof (struct mqueue_msg_s))); + mqmsg = (FAR struct mqueue_msg_s *) + kmm_malloc((sizeof (struct mqueue_msg_s))); - /* Check if we got an allocated message */ + /* Check if we allocated the message */ - ASSERT(mqmsg); - mqmsg->type = MQ_ALLOC_DYN; + if (mqmsg != NULL) + { + /* Yes... remember that this message was dynamically allocated */ + + mqmsg->type = MQ_ALLOC_DYN; + } } } diff --git a/sched/mqueue/mq_timedsend.c b/sched/mqueue/mq_timedsend.c index 860e6223db8..ffece37b8c7 100644 --- a/sched/mqueue/mq_timedsend.c +++ b/sched/mqueue/mq_timedsend.c @@ -192,9 +192,11 @@ int mq_timedsend(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio, /* Pre-allocate a message structure */ mqmsg = mq_msgalloc(); - if (!mqmsg) + if (mqmsg == NULL) { - /* Failed to allocate the message */ + /* Failed to allocate the message. mq_msgalloc() will have set the + * errno to ENOMEM. + */ set_errno(ENOMEM); return ERROR; From f0b4705d5771c008de5c85453c474265f38000e4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 15 Sep 2016 13:10:42 -0600 Subject: [PATCH 203/214] Correct a comment --- sched/mqueue/mq_timedsend.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sched/mqueue/mq_timedsend.c b/sched/mqueue/mq_timedsend.c index ffece37b8c7..0b82fb8edb2 100644 --- a/sched/mqueue/mq_timedsend.c +++ b/sched/mqueue/mq_timedsend.c @@ -194,8 +194,8 @@ int mq_timedsend(mqd_t mqdes, FAR const char *msg, size_t msglen, int prio, mqmsg = mq_msgalloc(); if (mqmsg == NULL) { - /* Failed to allocate the message. mq_msgalloc() will have set the - * errno to ENOMEM. + /* Failed to allocate the message. mq_msgalloc() does not set the + * errno value. */ set_errno(ENOMEM); From de3e35f00a6da427507c41061b8dfaf696b8db5a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 16 Sep 2016 09:39:51 -0600 Subject: [PATCH 204/214] include/nuttx/modem: Move all modem-related IOCTL commands to a common file to assure that they will be unique --- drivers/modem/u-blox.c | 1 + include/nuttx/modem/ioctl.h | 71 ++++++++++++++++++++++++++++++++++++ include/nuttx/modem/u-blox.h | 8 ++-- 3 files changed, 76 insertions(+), 4 deletions(-) create mode 100644 include/nuttx/modem/ioctl.h diff --git a/drivers/modem/u-blox.c b/drivers/modem/u-blox.c index b44b4aea5b0..95a7fc29d28 100644 --- a/drivers/modem/u-blox.c +++ b/drivers/modem/u-blox.c @@ -54,6 +54,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Debug ********************************************************************/ /* Non-standard debug that may be enabled just for testing the modem driver */ diff --git a/include/nuttx/modem/ioctl.h b/include/nuttx/modem/ioctl.h new file mode 100644 index 00000000000..2cde4c4a752 --- /dev/null +++ b/include/nuttx/modem/ioctl.h @@ -0,0 +1,71 @@ +/**************************************************************************** + * include/nuttx/modem/ioctl.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_MODEM_IOCTL_H +#define __INCLUDE_NUTTX_MODEM_IOCTL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* All modem-related IOCTL commands are defined here to assure that they are + * globally unique. + */ + +/* U-Blox Modem IOCTL commands */ + +#define MODEM_IOC_POWERON _MODEMIOC(1) +#define MODEM_IOC_POWEROFF _MODEMIOC(2) +#define MODEM_IOC_RESET _MODEMIOC(3) +#define MODEM_IOC_GETSTATUS _MODEMIOC(4) + +/* Unrecognized IOCTL commands are forwarded to the lower half driver. These + * may include the modem commands from include/nuttx/serial/ioctl.h such as + * the following: + * + * TIOCMGET: Get modem status bits: FAR int + * TIOCMSET: Set modem status bits: FAR const int + * TIOCMBIC: Clear modem bits: FAR const int + * TIOCMBIS: Set modem bits: FAR const int + */ + +#endif /* __INCLUDE_NUTTX_MODEM_IOCTL_H */ diff --git a/include/nuttx/modem/u-blox.h b/include/nuttx/modem/u-blox.h index 3b08ac422d7..e81aeb1768c 100644 --- a/include/nuttx/modem/u-blox.h +++ b/include/nuttx/modem/u-blox.h @@ -42,16 +42,16 @@ #include #include + #include +#include + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -#define MODEM_IOC_POWERON _MODEMIOC(1) -#define MODEM_IOC_POWEROFF _MODEMIOC(2) -#define MODEM_IOC_RESET _MODEMIOC(3) -#define MODEM_IOC_GETSTATUS _MODEMIOC(4) +/* See IOCTL definitions in include/nuttx/modem/ioctl.h */ /**************************************************************************** * Public Types From 141a1114399955ff63fbc5f29247d9a54d55b6c6 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 16 Sep 2016 12:31:18 -0600 Subject: [PATCH 205/214] Update a comment --- include/nuttx/fs/ioctl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index 29f6f71a90d..c8e76b3ca35 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -377,7 +377,7 @@ #define _LOOPIOC(nr) _IOC(_LOOPBASE,nr) /* Modem driver ioctl definitions ********************************************/ -/* see nuttx/include/modem/*.h */ +/* see nuttx/include/modem/ioctl.h */ #define _MODEMIOCVALID(c) (_IOC_TYPE(c)==_MODEMBASE) #define _MODEMIOC(nr) _IOC(_MODEMBASE,nr) From 61980caee5093fe3a0434a5066d63f4bbe43a9aa Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Fri, 16 Sep 2016 12:45:53 -0600 Subject: [PATCH 206/214] drivers/sensors: Adds support for the Sensixs XEN1210 3D-boar. This sensor is used on NANOSATC-BR2 a Brazillian CUBESAT project. --- drivers/sensors/Kconfig | 7 + drivers/sensors/Make.defs | 6 + drivers/sensors/xen1210.c | 490 ++++++++++++++++++++++++++++++++ drivers/sensors/xen1210.h | 129 +++++++++ include/nuttx/sensors/xen1210.h | 210 ++++++++++++++ 5 files changed, 842 insertions(+) create mode 100644 drivers/sensors/xen1210.c create mode 100644 drivers/sensors/xen1210.h create mode 100644 include/nuttx/sensors/xen1210.h diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index 95e4a9c385e..3b852a1cd43 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -234,6 +234,13 @@ config QENCODER bool "Qencoder" default n +config XEN1210 + bool "Sensixs XEN1210 Magnetometer" + default n + select SPI + ---help--- + Enable driver support for the Sensixs XEN1210 Magnetometer. + config ZEROCROSS bool "Zero Cross Sensor" default n diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs index 5527e98e4f7..9c2bce29e84 100644 --- a/drivers/sensors/Make.defs +++ b/drivers/sensors/Make.defs @@ -138,6 +138,12 @@ ifeq ($(CONFIG_QENCODER),y) CSRCS += qencoder.c endif +# Sensixs XEN1210 + +ifeq ($(CONFIG_XEN1210),y) + CSRCS += xen1210.c +endif + # Zero Cross upper half ifeq ($(CONFIG_ZEROCROSS),y) diff --git a/drivers/sensors/xen1210.c b/drivers/sensors/xen1210.c new file mode 100644 index 00000000000..ea4de97fff2 --- /dev/null +++ b/drivers/sensors/xen1210.c @@ -0,0 +1,490 @@ +/**************************************************************************** + * drivers/sensors/xen1210.c + * + * Copyright (C) 2016 Alan Carvalho de Assis. All rights reserved. + * Author: Alan Carvalho de Assis + * + * This driver is used to interface with Sensixs XEN1210 3D-board. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "xen1210.h" + +#if defined(CONFIG_XEN1210) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Character driver methods */ + +static int xen1210_open(FAR struct file *filep); +static int xen1210_close(FAR struct file *filep); +static ssize_t xen1210_read(FAR struct file *filep, FAR char *buffer, + size_t len); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This the vtable that supports the character driver interface */ + +static const struct file_operations g_xen1210fops = +{ + xen1210_open, /* open */ + xen1210_close, /* close */ + xen1210_read, /* read */ + NULL, /* write */ + NULL, /* seek */ + NULL /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + , NULL /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: xen1210_configspi + * + * Description: + * + ****************************************************************************/ + +static inline void xen1210_configspi(FAR struct spi_dev_s *spi) +{ + /* Configure SPI for the XEN1210 */ + + SPI_SETMODE(spi, SPIDEV_MODE1); + SPI_SETBITS(spi, 8); + (void)SPI_HWFEATURES(spi, 0); + (void)SPI_SETFREQUENCY(spi, XEN1210_SPI_MAXFREQUENCY); +} + +/**************************************************************************** + * Name: xen1210_open + * + * Description: + * Standard character driver open method. + * + ****************************************************************************/ + +static int xen1210_open(FAR struct file *filep) +{ + return OK; +} + +/**************************************************************************** + * Name: xen1210_close + * + * Description: + * Standard character driver close method. + * + ****************************************************************************/ + +static int xen1210_close(FAR struct file *filep) +{ + return OK; +} + +/**************************************************************************** + * Name: xen1210_read + * + * Description: + * Standard character driver read method. + * + ****************************************************************************/ + +static ssize_t xen1210_read(FAR struct file *filep, FAR char *buffer, + size_t len) +{ + FAR struct inode *inode; + FAR struct xen1210_dev_s *priv; + struct xen1210_sample_s sample; + uint32_t regval; + int ret; + + sninfo("len=%d\n", len); + DEBUGASSERT(filep); + inode = filep->f_inode; + + DEBUGASSERT(inode && inode->i_private); + priv = (FAR struct xen1210_dev_s *)inode->i_private; + + /* Verify that the caller has provided a buffer large enough to receive + * the magnetometer data. + */ + + if (len < sizeof(struct xen1210_sample_s)) + { + /* We could provide logic to break up a touch report into segments and + * handle smaller reads... but why? + */ + + snerr("Failed: Trying to read less bytes than sensor sample!\n"); + return -ENOSYS; + } + + /* Get exclusive access to the driver data structure */ + + ret = sem_wait(&priv->exclsem); + if (ret < 0) + { + /* This should only happen if the wait was canceled by an signal */ + + snerr("Failed: Cannot get exclusive access to driver structure!\n"); + DEBUGASSERT(errno == EINTR); + return -EINTR; + } + + sninfo("X = 0x%06X\n", priv->sample.data_x); + sninfo("Y = 0x%06X\n", priv->sample.data_y); + sninfo("Z = 0x%06X\n", priv->sample.data_z); + + /* Return read sample */ + + buffer = (FAR char *) &priv->sample; + + sem_post(&priv->exclsem); + return sizeof(struct xen1210_sample_s); +} + +/**************************************************************************** + * Name: xen1210_worker + * + * Description: + * This is the "bottom half" of the XEN1210 interrupt handler + * + ****************************************************************************/ + +static void xen1210_worker(FAR void *arg) +{ + FAR struct xen1210_dev_s *priv = (FAR struct xen1210_dev_s *)arg; + + DEBUGASSERT(priv && priv->config); + + /* Read the sensors */ + + xen1210_getdata(priv); + + /* Re-enable the XEN1210 GPIO interrupt */ + + priv->config->enable(priv->config, true); +} + +/**************************************************************************** + * Name: xen1210_interrupt + * + * Description: + * The XEN1210 interrupt handler + * + ****************************************************************************/ + +static void xen1210_interrupt(FAR struct xen1210_config_s *config, + FAR void *arg) +{ + FAR struct xen1210_dev_s *priv = (FAR struct xen1210_dev_s *)arg; + int ret; + + DEBUGASSERT(priv && priv->config == config); + + /* Disable further interrupts */ + + config->enable(config, false); + + /* Check if interrupt work is already queue. If it is already busy, then + * we already have interrupt processing in the pipeline and we need to do + * nothing more. + */ + + if (work_available(&priv->work)) + { + /* Yes.. Transfer processing to the worker thread. Since XEN1210 + * interrupts are disabled while the work is pending, no special + * action should be required to protect the work queue. + */ + + ret = work_queue(HPWORK, &priv->work, xen1210_worker, priv, 0); + if (ret != 0) + { + snerr("ERROR: Failed to queue work: %d\n", ret); + } + } + + /* Clear any pending interrupts and return success */ + + config->clear(config); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: xen1210_instantiate + * + * Description: + * Instantiate and configure the XEN1210 device driver to use the provided + * SPI device instance. + * + * Input Parameters: + * dev - An I2C or SPI driver instance + * config - Persistent board configuration data + * + * Returned Value: + * A non-zero handle is returned on success. This handle may then be used + * to configure the XEN1210 driver as necessary. A NULL handle value is + * returned on failure. + * + ****************************************************************************/ + +XEN1210_HANDLE xen1210_instantiate(FAR struct spi_dev_s *dev, + FAR struct xen1210_config_s *config) +{ + FAR struct xen1210_dev_s *priv; + uint32_t regval; + int ret; + + /* Allocate the XEN1210 driver instance */ + + priv = (FAR struct xen1210_dev_s *)kmm_zalloc(sizeof(struct xen1210_dev_s)); + if (!priv) + { + snerr("ERROR: Failed to allocate the device structure!\n"); + return NULL; + } + + /* Initialize the device state structure */ + + sem_init(&priv->exclsem, 0, 1); + priv->config = config; + + priv->spi = dev; + + /* Attach the XEN1210 interrupt handler. */ + + config->attach(config, (xen1210_handler_t)xen1210_interrupt, + (FAR void *)priv); + + /* Device initialization sequence */ + /* Power off */ + + regval = (XEN1210_POWEROFF); + + xen1210_putdata(priv, regval); + + /* Timing */ + + regval = (XEN1210_TIMING); + regval |= 0x131100; + + xen1210_putdata(priv, regval); + + /* Test */ + + regval = (XEN1210_TEST); + regval |= 0x003A00; + + xen1210_putdata(priv, regval); + + /* Power on */ + + regval = (XEN1210_POWERON); + + xen1210_putdata(priv, regval); /* X axis */ + + config->clear(config); + config->enable(config, true); + + /* Return our private data structure as an opaque handle */ + + return (XEN1210_HANDLE)priv; +} + +/**************************************************************************** + * Name: xen1210_register + * + * Description: + * This function will register the touchscreen driver as /dev/accelN where N + * is the minor device number + * + * Input Parameters: + * handle - The handle previously returned by xen1210_register + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int xen1210_register(XEN1210_HANDLE handle, int minor) +{ + FAR struct xen1210_dev_s *priv = (FAR struct xen1210_dev_s *)handle; + char devname[DEV_NAMELEN]; + int ret; + + sninfo("handle=%p minor=%d\n", handle, minor); + DEBUGASSERT(priv); + + /* Get exclusive access to the device structure */ + + ret = sem_wait(&priv->exclsem); + if (ret < 0) + { + int errval = errno; + snerr("ERROR: sem_wait failed: %d\n", errval); + return -errval; + } + + /* Register the character driver */ + + snprintf(devname, DEV_NAMELEN, DEV_FORMAT, minor); + ret = register_driver(devname, &g_xen1210fops, 0666, priv); + if (ret < 0) + { + snerr("ERROR: Failed to register driver %s: %d\n", devname, ret); + sem_post(&priv->exclsem); + return ret; + } + + /* Indicate that the accelerometer was successfully initialized */ + + priv->status |= XEN1210_STAT_INITIALIZED; /* Accelerometer is initialized */ + sem_post(&priv->exclsem); + return ret; +} + +/**************************************************************************** + * Name: xen1210_getdata + * + * Description: + * Read 24-bit from XEN1210 buffer, read three times (3 sensors) + * + ****************************************************************************/ + +void xen1210_getdata(FAR struct xen1210_dev_s *priv) +{ + uint32_t regval; + + /* If SPI bus is shared then lock and configure it */ + + (void)SPI_LOCK(priv->spi, true); + xen1210_configspi(priv->spi); + + /* Select the XEN1210 */ + + SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, true); + + /* Read three times 3 bytes = 24 bits * 3 */ + + SPI_RECVBLOCK(priv->spi, ®val, 3); + priv->sample.data_x = regval & 0xFFFFFF; + + SPI_RECVBLOCK(priv->spi, ®val, 3); + priv->sample.data_y = regval & 0xFFFFFF; + + SPI_RECVBLOCK(priv->spi, ®val, 3); + priv->sample.data_z = regval & 0xFFFFFF; + + /* Deselect the XEN1210 */ + + SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, false); + + /* Unlock bus */ + + (void)SPI_LOCK(priv->spi, false); + +#ifdef CONFIG_XEN1210_REGDEBUG + _err("%02x->%02x\n", regaddr, regval); +#endif + return regval; +} + +/**************************************************************************** + * Name: xen1210_putdata + * + * Description: + * Write 24-bit to XEN1210 buffer, write three times (3 sensors) + * + ****************************************************************************/ + +void xen1210_putdata(FAR struct xen1210_dev_s *priv, uint32_t regval) +{ +#ifdef CONFIG_XEN1210_REGDEBUG + _err("%02x<-%02x\n", regaddr, regval); +#endif + + /* If SPI bus is shared then lock and configure it */ + + (void)SPI_LOCK(priv->spi, true); + xen1210_configspi(priv->spi); + + /* Select the XEN1210 */ + + SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, true); + + /* We need to write to 3 sensors in the daisy-chain */ + /* Write three times 3 bytes */ + + (void)SPI_SNDBLOCK(priv->spi, ®val, 3); + (void)SPI_SNDBLOCK(priv->spi, ®val, 3); + (void)SPI_SNDBLOCK(priv->spi, ®val, 3); + + /* Deselect the XEN1210 */ + + SPI_SELECT(priv->spi, SPIDEV_ACCELEROMETER, false); + + /* Unlock bus */ + + (void)SPI_LOCK(priv->spi, false); +} + +#endif /* CONFIG_SENSORS_XEN1210 */ diff --git a/drivers/sensors/xen1210.h b/drivers/sensors/xen1210.h new file mode 100644 index 00000000000..08e7b4aba4f --- /dev/null +++ b/drivers/sensors/xen1210.h @@ -0,0 +1,129 @@ +/******************************************************************************************** + * drivers/sensors/xen1210.h + * + * Copyright (C) 2014 Alan Carvalho de Assis + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __DRIVERS_SENSORS_XEN1210_H +#define __DRIVERS_SENSORS_XEN1210_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#if defined(CONFIG_XEN1210) + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +/* Driver support ***************************************************************************/ +/* This format is used to construct the /dev/mag[n] device driver path. It is defined here + * so that it will be used consistently in all places. + */ + +#define DEV_FORMAT "/dev/mag%d" +#define DEV_NAMELEN 16 + +/* Driver flags */ + +#define XEN1210_STAT_INITIALIZED 1 /* Device has been initialized */ + +/******************************************************************************************** + * Public Types + ********************************************************************************************/ + +/* This structure describes the results of one XEN1210 sample */ + +struct xen1210_sample_s +{ + uint32_t data_x; /* Measured X-axis magnetic field */ + uint32_t data_y; /* Measured Y-axis magnetic field */ + uint32_t data_z; /* Measured Z-axis magnetic filed */ +}; + +/* This structure represents the state of the XEN1210 driver */ + +struct xen1210_dev_s +{ + /* Common fields */ + + FAR struct xen1210_config_s *config; /* Board configuration data */ + sem_t exclsem; /* Manages exclusive access to this structure */ + FAR struct spi_dev_s *spi; /* Saved SPI driver instance */ + + uint8_t status; /* See XEN1210_STAT_* definitions */ + struct work_s work; /* Supports the interrupt handling "bottom half" */ + + uint8_t nwaiters; /* Number of threads waiting for XEN1210 data */ + + sem_t waitsem; /* Used to wait for the availability of data */ + + struct work_s timeout; /* Supports timeout work */ + struct xen1210_sample_s sample; /* Last sampled accelerometer data */ +}; + +/******************************************************************************************** + * Public Function Prototypes + ********************************************************************************************/ + +/******************************************************************************************** + * Name: xen1210_getdata + * + * Description: + * Read 24-bit from XEN1210 buffer, read three times (3 sensors) + * + ********************************************************************************************/ + +void xen1210_getdata(FAR struct xen1210_dev_s *priv); + +/******************************************************************************************** + * Name: xen1210_putdata + * + * Description: + * Write 24-bit to XEN1210 buffer, write three times (3 sensors) + * + ********************************************************************************************/ + +void xen1210_putdata(FAR struct xen1210_dev_s *priv, uint32_t regval); + +#endif /* CONFIG_SENSORS_XEN1210 */ +#endif /* __DRIVERS_SENSORS_XEN1210_H */ diff --git a/include/nuttx/sensors/xen1210.h b/include/nuttx/sensors/xen1210.h new file mode 100644 index 00000000000..de92cd5225b --- /dev/null +++ b/include/nuttx/sensors/xen1210.h @@ -0,0 +1,210 @@ +/******************************************************************************************** + * include/nuttx/input/xen1210.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Alan Carvalho de Assis + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __INCLUDE_NUTTX_SENSORS_XEN1210_H +#define __INCLUDE_NUTTX_SENSORS_XEN1210_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include +#include + +#if defined(CONFIG_XEN1210) + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +/* Configuration ****************************************************************************/ +/* Prerequisites: + * + * CONFIG_SCHED_WORKQUEUE - Work queue support is required + * + * Settings that effect the driver: CONFIG_DISABLE_POLL + * + * CONFIG_XEN1210 + * Enables support for the XEN1210 driver + */ + +#ifdef CONFIG_DISABLE_SIGNALS +# error "Signals are required. CONFIG_DISABLE_SIGNALS must not be selected." +#endif + +#ifndef CONFIG_SCHED_WORKQUEUE +# error "Work queue support required. CONFIG_SCHED_WORKQUEUE must be selected." +#endif + +/* The XEN1210 interfaces with the target CPU via a SPI interface. */ + +/* SPI **************************************************************************************/ +/* The device always operates in mode 1 */ + +#define XEN1210_SPI_MODE SPIDEV_MODE1 /* Mode 1 */ + +/* SPI frequency */ + +#define XEN1210_SPI_MAXFREQUENCY 100000 /* 100KHz */ + +/* XEN1210 Commands ************************************************************************/ +/* Operation Commands */ + +#define XEN1210_RESET 0x10 /* System-Reset command */ +#define XEN1210_POWERON 0x20 /* Power-ON command */ +#define XEN1210_POWEROFF 0x40 /* Power-OFF command */ +#define XEN1210_SINGLESHOT 0x60 /* Single-Shot command */ + +/* Settings Commands */ + +#define XEN1210_TIMING 0x01 /* Timing and biasing settings */ +#define XEN1210_TEST 0x02 /* Testing */ + +/* Timming Cycles */ + +#define XEN1210_1K_CYCLES 0x1113 /* 1024 cycles used be internale ADC */ +#define XEN1210_2K_CYCLES 0x2113 /* 2048 cycles used be internale ADC */ +#define XEN1210_4K_CYCLES 0x3113 /* 4096 cycles used be internale ADC */ +#define XEN1210_8K_CYCLES 0x4113 /* 8192 cycles used be internale ADC */ +#define XEN1210_16K_CYCLES 0x5113 /* 16384 cycles used be internale ADC */ +#define XEN1210_32K_CYCLES 0x6113 /* 32768 cycles used be internale ADC */ +#define XEN1210_64K_CYCLES 0x7113 /* 64536 cycles used be internale ADC */ + +/* Test setting */ + +#define XEN1210_TESTVALUE 0x3A00 /* Default value to be used with Test command */ + +/******************************************************************************************** + * Public Types + ********************************************************************************************/ + +/* Form of the GPIO "interrupt handler" callback. Callbacks do not occur from an interrupt + * handler but rather from the context of the worker thread with interrupts enabled. + */ + +typedef void (*xen1210_handler_t)(FAR struct xen1210_config_s *config, FAR void *arg); + +/* A reference to a structure of this type must be passed to the XEN1210 driver when the + * driver is instantiated. This structure provides information about the configuration of + * the XEN1210 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied by the driver + * and is presumed to persist while the driver is active. The memory must be writeable + * because, under certain circumstances, the driver may modify the frequency. + */ + +struct xen1210_config_s +{ + /* Device characterization */ + + uint32_t frequency; /* SPI frequency */ + + /* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XEN1210 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach the XEN1210 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + + int (*attach)(FAR struct xen1210_config_s *state, xen1210_handler_t handler, + FAR void *arg); + void (*enable)(FAR struct xen1210_config_s *state, bool enable); + void (*clear)(FAR struct xen1210_config_s *state); +}; + +typedef FAR void *XEN1210_HANDLE; + +struct spi_dev_s; + +/******************************************************************************************** + * Public Function Prototypes + ********************************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/******************************************************************************************** + * Name: xen1210_instantiate + * + * Description: + * Instantiate and configure the XEN1210 device driver to use the provided I2C or SPI + * device instance. + * + * Input Parameters: + * dev - A SPI driver instance + * config - Persistent board configuration data + * + * Returned Value: + * A non-zero handle is returned on success. This handle may then be used to configure + * the XEN1210 driver as necessary. A NULL handle value is returned on failure. + * + ********************************************************************************************/ + +XEN1210_HANDLE xen1210_instantiate(FAR struct spi_dev_s *dev, + FAR struct xen1210_config_s *config); + +/******************************************************************************************** + * Name: xen1210_register + * + * Description: + * This function will register the magnetometer driver as /dev/magN + * where N is the minor device number + * + * Input Parameters: + * handle - The handle previously returned by xen1210_instantiate + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is returned to indicate + * the nature of the failure. + * + ********************************************************************************************/ + +int xen1210_register(XEN1210_HANDLE handle, int minor); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_SENSORS_XEN1210 */ +#endif /* __INCLUDE_NUTTX_SENSORS_XEN1210_H */ From 23c89b806a9c121e23a0147c1816c640a4e1620b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 17 Sep 2016 08:33:40 -0600 Subject: [PATCH 207/214] Add board support for XEN1210 driver in the STM32F4 Discovery. --- configs/stm32f4discovery/src/Makefile | 4 + configs/stm32f4discovery/src/stm32_bringup.c | 4 + configs/stm32f4discovery/src/stm32_xen1210.c | 353 ++++++++++++++++++ .../stm32f4discovery/src/stm32f4discovery.h | 34 ++ 4 files changed, 395 insertions(+) create mode 100644 configs/stm32f4discovery/src/stm32_xen1210.c diff --git a/configs/stm32f4discovery/src/Makefile b/configs/stm32f4discovery/src/Makefile index 060baf3eec4..d51d09ce1da 100644 --- a/configs/stm32f4discovery/src/Makefile +++ b/configs/stm32f4discovery/src/Makefile @@ -96,6 +96,10 @@ ifeq ($(CONFIG_QENCODER),y) CSRCS += stm32_qencoder.c endif +ifeq ($(CONFIG_XEN1210),y) +CSRCS += stm32_xen1210.c +endif + ifeq ($(CONFIG_NSH_LIBRARY),y) CSRCS += stm32_appinit.c endif diff --git a/configs/stm32f4discovery/src/stm32_bringup.c b/configs/stm32f4discovery/src/stm32_bringup.c index a6aec33f857..d0b002bb33d 100644 --- a/configs/stm32f4discovery/src/stm32_bringup.c +++ b/configs/stm32f4discovery/src/stm32_bringup.c @@ -212,5 +212,9 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_XEN1210 + ret = xen1210_archinitialize(0); +#endif + return ret; } diff --git a/configs/stm32f4discovery/src/stm32_xen1210.c b/configs/stm32f4discovery/src/stm32_xen1210.c new file mode 100644 index 00000000000..d397dd5ccc0 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_xen1210.c @@ -0,0 +1,353 @@ +/************************************************************************************ + * configs/nanosatc/src/stm32_xen1210.c + * + * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include +#include + +#include "stm32_gpio.h" +#include "stm32_spi.h" +#include "stm32_pwm.h" + +#include "stm32f4discovery.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ + +#ifdef CONFIG_XEN1210 +#ifndef CONFIG_STM32_SPI1 +# error "XEN1210 support requires CONFIG_STM32_SPI1" +#endif + +#define CONFIG_XEN1210_SPIDEV 1 + +#ifndef CONFIG_XEN1210_DEVMINOR +# define CONFIG_XEN1210_DEVMINOR 0 +#endif + +#ifndef CONFIG_STM32_TIM1 +# error "XEN1210 needs PWM on TIM1 CH1 to be its clock!" +#endif + +#ifndef CONFIG_STM32_TIM1_PWM +# error "XEN1210 needs PWM on TIM1 CH1 to be its clock!" +#endif + +#if CONFIG_STM32_TIM1_CHANNEL != XEN1210_PWMCHANNEL +# error "XEN1210 needs PWM on TIM1 CH1 to be its clock!" +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_xen1210config_s +{ + /* Configuration structure as seen by the XEN1210 driver */ + + struct xen1210_config_s config; + + /* Additional private definitions only known to this driver */ + + XEN1210_HANDLE handle; /* The XEN1210 driver handle */ + xen1210_handler_t handler; /* The XEN1210 interrupt handler */ + FAR void *arg; /* Argument to pass to the interrupt handler */ +}; + +/**************************************************************************** + * Static Function Prototypes + ****************************************************************************/ + +/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks + * to isolate the XEN1210 driver from differences in GPIO interrupt handling + * by varying boards and MCUs. + * + * attach - Attach the XEN1210 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int xen1210_attach(FAR struct xen1210_config_s *state, + xen1210_handler_t handler, FAR void *arg); +static void xen1210_enable(FAR struct xen1210_config_s *state, bool enable); +static void xen1210_clear(FAR struct xen1210_config_s *state); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the XEN1210 + * driver. This structure provides information about the configuration + * of the XEN1210 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. The + * memory must be writable because, under certain circumstances, the driver + * may modify frequency or X plate resistance values. + */ + +static struct stm32_xen1210config_s g_xen1210config = +{ + .config = + { + .frequency = XEN1210_SPI_MAXFREQUENCY, + .attach = xen1210_attach, + .enable = xen1210_enable, + .clear = xen1210_clear, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ +/* This is the XEN1210 Interrupt handler */ + +int xen1210_interrupt(int irq, FAR void *context) +{ + /* Verify that we have a handler attached */ + + if (g_xen1210config.handler) + { + /* Yes.. forward with interrupt along with its argument */ + + g_xen1210config.handler(&g_xen1210config.config, g_xen1210config.arg); + } + + return OK; +} + +/* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the XEN1210 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. + * + * attach - Attach the XEN1210 interrupt handler to the GPIO interrupt + * enable - Enable or disable the GPIO interrupt + * clear - Acknowledge/clear any pending GPIO interrupt + */ + +static int xen1210_attach(FAR struct xen1210_config_s *state, + xen1210_handler_t handler, FAR void *arg) +{ + FAR struct stm32_xen1210config_s *priv = (FAR struct stm32_xen1210config_s *)state; + + sninfo("Saving handler %p\n", handler); + DEBUGASSERT(priv); + + /* Just save the handler and its argument. We will use it when interrupts + * are enabled + */ + + priv->handler = handler; + priv->arg = arg; + return OK; +} + +static void xen1210_enable(FAR struct xen1210_config_s *state, bool enable) +{ + irqstate_t flags; + + /* Attach and enable, or detach and disable. Enabling and disabling GPIO + * interrupts is a multi-step process so the safest thing is to keep + * interrupts disabled during the reconfiguration. + */ + + flags = enter_critical_section(); + if (enable) + { + /* Configure the interrupt using the SAVED handler */ + + stm32_configgpio(GPIO_XEN1210_INT); + (void)stm32_gpiosetevent(GPIO_XEN1210_INT, false, true, + true, xen1210_interrupt); + } + else + { + /* Configure the interrupt with a NULL handler to disable it */ + + (void)stm32_gpiosetevent(GPIO_XEN1210_INT, false, false, false, NULL); + } + + leave_critical_section(flags); +} + +static void xen1210_clear(FAR struct xen1210_config_s *state) +{ + /* Does nothing */ +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/************************************************************************************ + * Name: xen1210_pwm_setup + * + * Description: + * All STM32 architectures must provide the following interface to work with + * examples/pwm. + * + ************************************************************************************/ + +int xen1210_pwm_setup(void) +{ + static bool initialized = false; + struct pwm_lowerhalf_s *pwm; + struct pwm_info_s info; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_pwminitialize() to get an instance of the PWM interface */ + + pwm = stm32_pwminitialize(XEN1210_PWMTIMER); + if (!pwm) + { + _err("ERROR: Failed to get the STM32 PWM lower half\n"); + return -ENODEV; + } + + /* Define frequency and duty cycle: 2MHz @ 50% */ + + info.frequency = 2000000; /* 2MHz */ + info.duty = 32768; /* this value means 50% */ + + /* Initialize PWM */ + + pwm->ops->setup(pwm); + pwm->ops->start(pwm, &info); + + /* Now we are initialized */ + + initialized = true; + } + + return 0; +} + +/**************************************************************************** + * Name: xen1210_archinitialize + * + * Description: + * Each board that supports an xen1210 device must provide this function. + * This function is called by application-specific, setup logic to + * configure the accelerometer device. This function will register the + * driver as /dev/accelN where N is the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int xen1210_archinitialize(int minor) +{ + FAR struct spi_dev_s *dev; + int ret; + + sninfo("minor %d\n", minor); + DEBUGASSERT(minor == 0); + + /* Check if we are already initialized */ + + if (!g_xen1210config.handle) + { + sninfo("Initializing\n"); + + /* XEN1210 needs an external clock 1-4MHz + * We are using PWM on TIM1 CH1 to do it! + */ + + (void)xen1210_pwm_setup(); + + /* Configure the XEN1210 interrupt pin as an input */ + + (void)stm32_configgpio(GPIO_XEN1210_INT); + + /* Get an instance of the I2C interface */ + + dev = stm32_spibus_initialize(CONFIG_XEN1210_SPIDEV); + if (!dev) + { + snerr("ERROR: Failed to initialize SPI bus %d\n", CONFIG_XEN1210_SPIDEV); + return -ENODEV; + } + + /* Instantiate the XEN1210 driver */ + + g_xen1210config.handle = + xen1210_instantiate(dev, (FAR struct xen1210_config_s *)&g_xen1210config); + if (!g_xen1210config.handle) + { + snerr("ERROR: Failed to instantiate the XEN1210 driver\n"); + return -ENODEV; + } + + /* Initialize and register the XEN1210 driver */ + + ret = xen1210_register(g_xen1210config.handle, CONFIG_XEN1210_DEVMINOR); + if (ret < 0) + { + snerr("ERROR: Failed to register XEN1210 driver: %d\n", ret); + return ret; + } + } + + return OK; +} + +#endif /* CONFIG_SENSORS_XEN1210 */ diff --git a/configs/stm32f4discovery/src/stm32f4discovery.h b/configs/stm32f4discovery/src/stm32f4discovery.h index bc2f7f98bdc..50495addf38 100644 --- a/configs/stm32f4discovery/src/stm32f4discovery.h +++ b/configs/stm32f4discovery/src/stm32f4discovery.h @@ -49,6 +49,12 @@ * Pre-processor Definitions ****************************************************************************/ /* Configuration *************************************************************/ + +/* Define what timer and channel to use as XEN1210 CLK */ + +#define XEN1210_PWMTIMER 1 +#define XEN1210_PWMCHANNEL 1 + /* How many SPI modules does this chip support? */ #if STM32_NSPI < 1 @@ -230,6 +236,14 @@ #define GPIO_MAX6675_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN8) +/* XEN1210 magnetic sensor */ + +#define GPIO_XEN1210_INT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|\ + GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN5) + +#define GPIO_CS_XEN1210 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\ + GPIO_OUTPUT_SET|GPIO_PORTA|GPIO_PIN4) + /* USB OTG FS * * PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED) @@ -635,5 +649,25 @@ int stm32_rgbled_setup(void); int stm32_timer_driver_setup(FAR const char *devpath, int timer); #endif +/**************************************************************************** + * Name xen1210_archinitialize + * + * Description: + * This function is called by board initialization logic to configure the + * XEN1210 driver. This function will register the driver as /dev/mag0 + * + * Input Parameters: + * None + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_XEN1210 +int xen1210_archinitialize(int minor); +#endif + #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_STM32F4DISCOVERY_SRC_STM32F4DISCOVERY_H */ From df26e80c63408bfd945f4c286eea4b3beb11c4ed Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 17 Sep 2016 09:21:26 -0600 Subject: [PATCH 208/214] Review of last commit --- configs/stm32f4discovery/src/stm32_xen1210.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/configs/stm32f4discovery/src/stm32_xen1210.c b/configs/stm32f4discovery/src/stm32_xen1210.c index d397dd5ccc0..a8dc104ebe2 100644 --- a/configs/stm32f4discovery/src/stm32_xen1210.c +++ b/configs/stm32f4discovery/src/stm32_xen1210.c @@ -1,8 +1,8 @@ /************************************************************************************ - * configs/nanosatc/src/stm32_xen1210.c + * configs/stm32f4discovery/src/stm32_xen1210.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Alan Carvalho de Assis * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -151,6 +151,7 @@ static struct stm32_xen1210config_s g_xen1210config = /**************************************************************************** * Private Functions ****************************************************************************/ + /* This is the XEN1210 Interrupt handler */ int xen1210_interrupt(int irq, FAR void *context) @@ -179,7 +180,8 @@ int xen1210_interrupt(int irq, FAR void *context) static int xen1210_attach(FAR struct xen1210_config_s *state, xen1210_handler_t handler, FAR void *arg) { - FAR struct stm32_xen1210config_s *priv = (FAR struct stm32_xen1210config_s *)state; + FAR struct stm32_xen1210config_s *priv = + (FAR struct stm32_xen1210config_s *)state; sninfo("Saving handler %p\n", handler); DEBUGASSERT(priv); @@ -261,7 +263,7 @@ int xen1210_pwm_setup(void) /* Define frequency and duty cycle: 2MHz @ 50% */ info.frequency = 2000000; /* 2MHz */ - info.duty = 32768; /* this value means 50% */ + info.duty = 32768; /* This value means 50% */ /* Initialize PWM */ From 9838cc0cc9eb74c7e64629cb628c73405c56c557 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc=20Recht=C3=A9?= Date: Tue, 20 Sep 2016 08:04:32 -0600 Subject: [PATCH 209/214] Make DAC structure packed --- include/nuttx/analog/dac.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/nuttx/analog/dac.h b/include/nuttx/analog/dac.h index db2cf5a7368..4f34709a847 100644 --- a/include/nuttx/analog/dac.h +++ b/include/nuttx/analog/dac.h @@ -47,6 +47,7 @@ ************************************************************************************/ #include +#include #include #include @@ -77,7 +78,7 @@ struct dac_msg_s { uint8_t am_channel; /* The 8-bit DAC Channel */ int32_t am_data; /* DAC convert result (4 bytes) */ -}; +} packed_struct; struct dac_fifo_s { From 4dc3521743a897e15c8cb4ed80350e2481282358 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 20 Sep 2016 08:56:36 -0600 Subject: [PATCH 210/214] All SAM Ethernet Drivers: Add support so that the drivers can be built with CONFIG_NET_MULTIBUFFER=y --- arch/arm/src/sam34/sam_emac.c | 29 ++++++++++------- arch/arm/src/sama5/sam_emaca.c | 29 ++++++++++------- arch/arm/src/sama5/sam_emacb.c | 57 +++++++++++++++++++++++++++------- arch/arm/src/sama5/sam_gmac.c | 29 ++++++++++------- arch/arm/src/samv7/sam_emac.c | 57 +++++++++++++++++++++++++++------- 5 files changed, 141 insertions(+), 60 deletions(-) diff --git a/arch/arm/src/sam34/sam_emac.c b/arch/arm/src/sam34/sam_emac.c index 5e4e348f6c0..a7a9bc21410 100644 --- a/arch/arm/src/sam34/sam_emac.c +++ b/arch/arm/src/sam34/sam_emac.c @@ -207,18 +207,7 @@ #endif -/* EMAC buffer sizes, number of buffers, and number of descriptors. - * - * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible - * to use this option to send and receive messages directly into the DMA - * buffers, saving a copy. There might be complications on the receiving - * side, however, where buffers may wrap and where the size of the received - * frame will typically be smaller than a full packet. - */ - -#ifdef CONFIG_NET_MULTIBUFFER -# error CONFIG_NET_MULTIBUFFER must not be set -#endif +/* EMAC buffer sizes, number of buffers, and number of descriptors. *********/ #define EMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */ #define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */ @@ -312,6 +301,19 @@ struct sam_emac_s static struct sam_emac_s g_emac; +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used + * + * REVISIT: It might be possible to use this option to send and receive + * messages directly into the DMA buffers, saving a copy. There might be + * complications on the receiving side, however, where buffers may wrap + * and where the size of the received frame will typically be smaller than + * a full packet. + */ + +static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + #ifdef CONFIG_SAM34_EMAC_PREALLOCATE /* Preallocated data */ /* TX descriptors list */ @@ -3806,6 +3808,9 @@ void up_netinitialize(void) /* Initialize the driver structure */ memset(priv, 0, sizeof(struct sam_emac_s)); +#ifdef CONFIG_NET_MULTIBUFFER + priv->dev.d_buf = g_pktbuf; /* Single packet buffer */ +#endif priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */ priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */ priv->dev.d_txavail = sam_txavail; /* New TX data callback */ diff --git a/arch/arm/src/sama5/sam_emaca.c b/arch/arm/src/sama5/sam_emaca.c index 3972f2324ac..672a3efc7fb 100644 --- a/arch/arm/src/sama5/sam_emaca.c +++ b/arch/arm/src/sama5/sam_emaca.c @@ -199,18 +199,7 @@ #endif -/* EMAC buffer sizes, number of buffers, and number of descriptors. - * - * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible - * to use this option to send and receive messages directly into the DMA - * buffers, saving a copy. There might be complications on the receiving - * side, however, where buffers may wrap and where the size of the received - * frame will typically be smaller than a full packet. - */ - -#ifdef CONFIG_NET_MULTIBUFFER -# error CONFIG_NET_MULTIBUFFER must not be set -#endif +/* EMAC buffer sizes, number of buffers, and number of descriptors. *********/ #define EMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */ #define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */ @@ -301,6 +290,19 @@ struct sam_emac_s static struct sam_emac_s g_emac; +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used + * + * REVISIT: It might be possible to use this option to send and receive + * messages directly into the DMA buffers, saving a copy. There might be + * complications on the receiving side, however, where buffers may wrap + * and where the size of the received frame will typically be smaller than + * a full packet. + */ + +static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + #ifdef CONFIG_SAMA5_EMACA_PREALLOCATE /* Preallocated data */ /* TX descriptors list */ @@ -3484,6 +3486,9 @@ int sam_emac_initialize(void) /* Initialize the driver structure */ memset(priv, 0, sizeof(struct sam_emac_s)); +#ifdef CONFIG_NET_MULTIBUFFER + priv->dev.d_buf = g_pktbuf; /* Single packet buffer */ +#endif priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */ priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */ priv->dev.d_txavail = sam_txavail; /* New TX data callback */ diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c index 9b64fbc5ab9..ba118484e1f 100644 --- a/arch/arm/src/sama5/sam_emacb.c +++ b/arch/arm/src/sama5/sam_emacb.c @@ -305,18 +305,7 @@ # define sam_dumppacket(m,a,n) #endif -/* EMAC buffer sizes, number of buffers, and number of descriptors ********** - * - * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible - * to use this option to send and receive messages directly into the DMA - * buffers, saving a copy. There might be complications on the receiving - * side, however, where buffers may wrap and where the size of the received - * frame will typically be smaller than a full packet. - */ - -#ifdef CONFIG_NET_MULTIBUFFER -# error CONFIG_NET_MULTIBUFFER must not be set -#endif +/* EMAC buffer sizes, number of buffers, and number of descriptors **********/ #define EMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */ #define EMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */ @@ -709,6 +698,21 @@ static const struct sam_emacattr_s g_emac0_attr = #endif }; +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used + * + * REVISIT: It might be possible to use this option to send and receive + * messages directly into the DMA buffers, saving a copy. There might be + * complications on the receiving side, however, where buffers may wrap + * and where the size of the received frame will typically be smaller than + * a full packet. + */ + +static uint8_t g_pktbuf0[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + +/* EMAC0 peripheral state */ + static struct sam_emac_s g_emac0; #endif @@ -777,6 +781,21 @@ static const struct sam_emacattr_s g_emac1_attr = #endif }; +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used + * + * REVISIT: It might be possible to use this option to send and receive + * messages directly into the DMA buffers, saving a copy. There might be + * complications on the receiving side, however, where buffers may wrap + * and where the size of the received frame will typically be smaller than + * a full packet. + */ + +static uint8_t g_pktbuf1[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + +/* EMAC1 peripheral state */ + static struct sam_emac_s g_emac1; #endif @@ -4515,6 +4534,9 @@ int sam_emac_initialize(int intf) { struct sam_emac_s *priv; const struct sam_emacattr_s *attr; +#ifdef CONFIG_NET_MULTIBUFFER + uint8_t *pktbuf; +#endif #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) uint8_t phytype; #endif @@ -4526,6 +4548,10 @@ int sam_emac_initialize(int intf) priv = &g_emac0; attr = &g_emac0_attr; +#ifdef CONFIG_NET_MULTIBUFFER + pktbuf = g_pktbuf0; +#endif + #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) phytype = SAMA5_EMAC0_PHY_TYPE; #endif @@ -4538,6 +4564,10 @@ int sam_emac_initialize(int intf) priv = &g_emac1; attr = &g_emac1_attr; +#ifdef CONFIG_NET_MULTIBUFFER + pktbuf = g_pktbuf1; +#endif + #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) phytype = SAMA5_EMAC1_PHY_TYPE; #endif @@ -4553,6 +4583,9 @@ int sam_emac_initialize(int intf) memset(priv, 0, sizeof(struct sam_emac_s)); priv->attr = attr; /* Save the constant attributes */ +#ifdef CONFIG_NET_MULTIBUFFER + priv->dev.d_buf = pktbuf; /* Single packet buffer */ +#endif priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */ priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */ priv->dev.d_txavail = sam_txavail; /* New TX data callback */ diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c index 75a38365540..5442920ee03 100644 --- a/arch/arm/src/sama5/sam_gmac.c +++ b/arch/arm/src/sama5/sam_gmac.c @@ -118,18 +118,7 @@ # error Unknown PHY #endif -/* GMAC buffer sizes, number of buffers, and number of descriptors. - * - * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible - * to use this option to send and receive messages directly into the DMA - * buffers, saving a copy. There might be complications on the receiving - * side, however, where buffers may wrap and where the size of the received - * frame will typically be smaller than a full packet. - */ - -#ifdef CONFIG_NET_MULTIBUFFER -# error CONFIG_NET_MULTIBUFFER must not be set -#endif +/* GMAC buffer sizes, number of buffers, and number of descriptors. *********/ #define GMAC_RX_UNITSIZE 128 /* Fixed size for RX buffer */ #define GMAC_TX_UNITSIZE CONFIG_NET_ETH_MTU /* MAX size for Ethernet packet */ @@ -227,6 +216,19 @@ struct sam_gmac_s static struct sam_gmac_s g_gmac; +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used + * + * REVISIT: It might be possible to use this option to send and receive + * messages directly into the DMA buffers, saving a copy. There might be + * complications on the receiving side, however, where buffers may wrap + * and where the size of the received frame will typically be smaller than + * a full packet. + */ + +static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + #ifdef CONFIG_SAMA5_GMAC_PREALLOCATE /* Preallocated data */ /* TX descriptors list */ @@ -3556,6 +3558,9 @@ int sam_gmac_initialize(void) /* Initialize the driver structure */ memset(priv, 0, sizeof(struct sam_gmac_s)); +#ifdef CONFIG_NET_MULTIBUFFER + priv->dev.d_buf = g_pktbuf; /* Single packet buffer */ +#endif priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */ priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */ priv->dev.d_txavail = sam_txavail; /* New TX data callback */ diff --git a/arch/arm/src/samv7/sam_emac.c b/arch/arm/src/samv7/sam_emac.c index 7fcedd85716..c246140138d 100644 --- a/arch/arm/src/samv7/sam_emac.c +++ b/arch/arm/src/samv7/sam_emac.c @@ -317,18 +317,7 @@ # undef CONFIG_SAMV7_EMAC_REGDEBUG #endif -/* EMAC buffer sizes, number of buffers, and number of descriptors *********** - * - * REVISIT: The CONFIG_NET_MULTIBUFFER might be useful. It might be possible - * to use this option to send and receive messages directly into the DMA - * buffers, saving a copy. There might be complications on the receiving - * side, however, where buffers may wrap and where the size of the received - * frame will typically be smaller than a full packet. - */ - -#ifdef CONFIG_NET_MULTIBUFFER -# error CONFIG_NET_MULTIBUFFER must not be set -#endif +/* EMAC buffer sizes, number of buffers, and number of descriptors **********/ /* Queue identifiers/indices */ @@ -855,6 +844,21 @@ static const struct sam_emacattr_s g_emac0_attr = #endif }; +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used + * + * REVISIT: It might be possible to use this option to send and receive + * messages directly into the DMA buffers, saving a copy. There might be + * complications on the receiving side, however, where buffers may wrap + * and where the size of the received frame will typically be smaller than + * a full packet. + */ + +static uint8_t g_pktbuf0[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + +/* EMAC0 peripheral state */ + static struct sam_emac_s g_emac0; #endif @@ -923,6 +927,21 @@ static const struct sam_emacattr_s g_emac1_attr = #endif }; +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used + * + * REVISIT: It might be possible to use this option to send and receive + * messages directly into the DMA buffers, saving a copy. There might be + * complications on the receiving side, however, where buffers may wrap + * and where the size of the received frame will typically be smaller than + * a full packet. + */ + +static uint8_t g_pktbuf1[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + +/* EMAC1 peripheral state */ + static struct sam_emac_s g_emac1; #endif @@ -5081,6 +5100,9 @@ int sam_emac_initialize(int intf) { struct sam_emac_s *priv; const struct sam_emacattr_s *attr; +#ifdef CONFIG_NET_MULTIBUFFER + uint8_t *pktbuf; +#endif #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) uint8_t phytype; #endif @@ -5092,6 +5114,10 @@ int sam_emac_initialize(int intf) priv = &g_emac0; attr = &g_emac0_attr; +#ifdef CONFIG_NET_MULTIBUFFER + pktbuf = g_pktbuf0; +#endif + #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) phytype = SAMV7_EMAC0_PHY_TYPE; #endif @@ -5104,6 +5130,10 @@ int sam_emac_initialize(int intf) priv = &g_emac1; attr = &g_emac1_attr; +#ifdef CONFIG_NET_MULTIBUFFER + pktbuf = g_pktbuf1; +#endif + #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) phytype = SAMV7_EMAC1_PHY_TYPE; #endif @@ -5119,6 +5149,9 @@ int sam_emac_initialize(int intf) memset(priv, 0, sizeof(struct sam_emac_s)); priv->attr = attr; /* Save the constant attributes */ +#ifdef CONFIG_NET_MULTIBUFFER + priv->dev.d_buf = pktbuf; /* Single packet buffer */ +#endif priv->dev.d_ifup = sam_ifup; /* I/F up (new IP address) callback */ priv->dev.d_ifdown = sam_ifdown; /* I/F down callback */ priv->dev.d_txavail = sam_txavail; /* New TX data callback */ From ed22c93d7ad1b9919964fff415c31dab13a0bb68 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 20 Sep 2016 13:02:24 -0600 Subject: [PATCH 211/214] Tiva Ethernet: Needs support for CONFIG_NET_MULTIBUFFER=y --- arch/arm/src/tiva/lm3s_ethernet.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/arch/arm/src/tiva/lm3s_ethernet.c b/arch/arm/src/tiva/lm3s_ethernet.c index ab9bd289016..cbdf0dac530 100644 --- a/arch/arm/src/tiva/lm3s_ethernet.c +++ b/arch/arm/src/tiva/lm3s_ethernet.c @@ -70,11 +70,6 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/* Configuration ************************************************************/ - -#ifdef CONFIG_NET_MULTIBUFFER -# error CONFIG_NET_MULTIBUFFER should not be selected -#endif /* Half duplex can be forced if CONFIG_TIVA_ETHHDUPLEX is defined. */ @@ -196,6 +191,14 @@ struct tiva_driver_s * Private Data ****************************************************************************/ +#ifdef CONFIG_NET_MULTIBUFFER +/* A single packet buffer is used */ + +static uint8_t g_pktbuf[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE]; +#endif + +/* Ethernet peripheral state */ + static struct tiva_driver_s g_lm3sdev[TIVA_NETHCONTROLLERS]; /**************************************************************************** @@ -1469,6 +1472,9 @@ static inline int tiva_ethinitialize(int intf) /* Initialize the driver structure */ memset(priv, 0, sizeof(struct tiva_driver_s)); +#ifdef CONFIG_NET_MULTIBUFFER + priv->ld_dev.d_buf = g_pktbuf; /* Single packet buffer */ +#endif priv->ld_dev.d_ifup = tiva_ifup; /* I/F down callback */ priv->ld_dev.d_ifdown = tiva_ifdown; /* I/F up (new IP address) callback */ priv->ld_dev.d_txavail = tiva_txavail; /* New TX data callback */ From e5cffc40fc57fb1676378c5a71c0b43a25761784 Mon Sep 17 00:00:00 2001 From: Vladimir Komendantskiy Date: Tue, 20 Sep 2016 13:06:47 -0600 Subject: [PATCH 212/214] NET_TUN=y => NET_MULTIBUFFER=y --- net/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/net/Kconfig b/net/Kconfig index 3f454f4288d..733e993f9dc 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -228,6 +228,7 @@ config NET_TUN default n select NETDEV_MULTINIC if NET_ETHERNET || NET_LOOPBACK || NET_SLIP select NET_MULTILINK if NET_ETHERNET || NET_LOOPBACK || NET_SLIP + select NET_MULTIBUFFER select ARCH_HAVE_NETDEV_STATISTICS if NET_TUN From 3f22b633218264db80ac5dd1091f385ae726be55 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Wolfgang=20Rei=C3=9Fnegger?= Date: Tue, 20 Sep 2016 13:24:39 -0700 Subject: [PATCH 213/214] SAM3/4: Fix GPIO pull-up/down code. Enabling the pull-down resistor while the pull-up resistor is still enabled is not possible. In this case, the write of PIO_PPDER for the relevant I/O line is discarded. Likewise, enabling the pull-up resistor while the pull-down resistor is still enabled is not possible. In this case, the write of PIO_PUER for the relevant I/O line is discarded. --- arch/arm/src/sam34/sam_gpio.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c index 5fda366fe00..27a500f07cd 100644 --- a/arch/arm/src/sam34/sam_gpio.c +++ b/arch/arm/src/sam34/sam_gpio.c @@ -190,6 +190,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLUP) != 0) { + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -202,6 +208,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else From 1c20376e39ab25d0ad49ffc829c0673bd0a4ce0a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 20 Sep 2016 15:33:31 -0600 Subject: [PATCH 214/214] SAM GPIO: Apply Wolfgang's change for SAM3/4 to SAMA5 and SAMV7 --- arch/arm/src/sam34/sam_gpio.c | 30 +++++++++++++++++++++ arch/arm/src/sama5/sama5d3x4x_pio.c | 42 +++++++++++++++++++++++++++++ arch/arm/src/samv7/sam_gpio.c | 42 +++++++++++++++++++++++++++++ 3 files changed, 114 insertions(+) diff --git a/arch/arm/src/sam34/sam_gpio.c b/arch/arm/src/sam34/sam_gpio.c index 27a500f07cd..d1dc1ef64bd 100644 --- a/arch/arm/src/sam34/sam_gpio.c +++ b/arch/arm/src/sam34/sam_gpio.c @@ -190,12 +190,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLUP) != 0) { +#ifdef GPIO_HAVE_PULLDOWN /* The pull-up on a pin can not be enabled if its pull-down is still * active. Therefore, we need to disable the pull-down first before * enabling the pull-up. */ putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -286,6 +288,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLUP) != 0) { +#ifdef GPIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -298,6 +308,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else @@ -357,6 +373,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLUP) != 0) { +#ifdef GPIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -369,6 +393,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else diff --git a/arch/arm/src/sama5/sama5d3x4x_pio.c b/arch/arm/src/sama5/sama5d3x4x_pio.c index 0165a382acf..806fb9fc089 100644 --- a/arch/arm/src/sama5/sama5d3x4x_pio.c +++ b/arch/arm/src/sama5/sama5d3x4x_pio.c @@ -349,6 +349,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, if ((cfgset & PIO_CFG_PULLUP) != 0) { +#ifdef PIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -361,6 +369,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, if ((cfgset & PIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else @@ -464,6 +478,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, if ((cfgset & PIO_CFG_PULLUP) != 0) { +#ifdef PIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -476,6 +498,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, if ((cfgset & PIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else @@ -546,6 +574,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, if ((cfgset & PIO_CFG_PULLUP) != 0) { +#ifdef PIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -558,6 +594,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, if ((cfgset & PIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else diff --git a/arch/arm/src/samv7/sam_gpio.c b/arch/arm/src/samv7/sam_gpio.c index cf681e76620..1eac04d5765 100644 --- a/arch/arm/src/samv7/sam_gpio.c +++ b/arch/arm/src/samv7/sam_gpio.c @@ -152,6 +152,14 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLUP) != 0) { +#ifdef GPIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -164,6 +172,12 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else @@ -243,6 +257,14 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLUP) != 0) { +#ifdef GPIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -255,6 +277,12 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else @@ -330,6 +358,14 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLUP) != 0) { +#ifdef GPIO_HAVE_PULLDOWN + /* The pull-up on a pin can not be enabled if its pull-down is still + * active. Therefore, we need to disable the pull-down first before + * enabling the pull-up. + */ + + putreg32(pin, base + SAM_PIO_PPDDR_OFFSET); +#endif putreg32(pin, base + SAM_PIO_PUER_OFFSET); } else @@ -342,6 +378,12 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, if ((cfgset & GPIO_CFG_PULLDOWN) != 0) { + /* The pull-down on a pin can not be enabled if its pull-up is still + * active. Therefore, we need to disable the pull-up first before + * enabling the pull-down. + */ + + putreg32(pin, base + SAM_PIO_PUDR_OFFSET); putreg32(pin, base + SAM_PIO_PPDER_OFFSET); } else