From 8b2a94b82c8e2913ac70c8ee6775cf52ed1a40ac Mon Sep 17 00:00:00 2001 From: Titus von Boxberg Date: Tue, 18 Jul 2017 19:24:11 +0200 Subject: [PATCH] correct macro name for DSI clock source --- configs/stm32f769i-disco/include/board.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32f769i-disco/include/board.h b/configs/stm32f769i-disco/include/board.h index d09b1b67c12..545cc617414 100755 --- a/configs/stm32f769i-disco/include/board.h +++ b/configs/stm32f769i-disco/include/board.h @@ -205,7 +205,7 @@ #define STM32_RCC_DCKCFGR2_CK48MSRC RCC_DCKCFGR2_CK48MSEL_PLLSAI #define STM32_RCC_DCKCFGR2_SDMMCSRC RCC_DCKCFGR2_SDMMCSEL_48MHZ #define STM32_RCC_DCKCFGR2_SDMMC2SRC RCC_DCKCFGR2_SDMMC2SEL_48MHZ -#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_48MHZ +#define STM32_RCC_DCKCFGR2_DSISRC RCC_DCKCFGR2_DSISEL_PHY /* Several prescalers allow the configuration of the two AHB buses, the * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum