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https://github.com/apache/nuttx.git
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Kinetis: Add LPUART as lowlevel console
This commit is contained in:
David Sidrane
parent
29ab603a66
commit
86c9f97f78
2 changed files with 393 additions and 89 deletions
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@ -1,8 +1,9 @@
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/************************************************************************************
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* arch/arm/src/kinetis/kinetis.h
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*
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* Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Copyright (C) 2011, 2013, 2017 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -364,6 +365,18 @@ void kinetis_lowsetup(void);
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void kinetis_uartreset(uintptr_t uart_base);
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#endif
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/****************************************************************************
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* Name: kinetis_lpuartreset
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*
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* Description:
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* Reset a UART.
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*
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****************************************************************************/
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#ifdef HAVE_LPUART_DEVICE
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void kinetis_lpuartreset(uintptr_t uart_base);
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#endif
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/****************************************************************************
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* Name: kinetis_uartconfigure
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*
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@ -374,7 +387,22 @@ void kinetis_uartreset(uintptr_t uart_base);
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#ifdef HAVE_UART_DEVICE
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void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
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unsigned int parity, unsigned int nbits);
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unsigned int parity, unsigned int nbits,
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unsigned int stop2);
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#endif
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/****************************************************************************
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* Name: kinetis_lpuartconfigure
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*
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* Description:
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* Configure a UART as a RS-232 UART.
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*
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****************************************************************************/
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#ifdef HAVE_LPUART_DEVICE
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void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
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unsigned int parity, unsigned int nbits,
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unsigned int stop2);
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#endif
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/************************************************************************************
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@ -1,8 +1,9 @@
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/****************************************************************************
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* arch/arm/src/kinetis/kinetis_lowputc.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane<david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -50,6 +51,7 @@
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#include "kinetis_config.h"
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#include "kinetis.h"
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#include "chip/kinetis_uart.h"
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#include "chip/kinetis_lpuart.h"
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#include "chip/kinetis_sim.h"
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#include "chip/kinetis_pinmux.h"
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@ -59,46 +61,85 @@
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/* Select UART parameters for the selected console */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART0_BASE
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# define CONSOLE_FREQ BOARD_CORECLK_FREQ
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# define CONSOLE_BAUD CONFIG_UART0_BAUD
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# define CONSOLE_BITS CONFIG_UART0_BITS
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# define CONSOLE_PARITY CONFIG_UART0_PARITY
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART1_BASE
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# define CONSOLE_FREQ BOARD_CORECLK_FREQ
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# define CONSOLE_BAUD CONFIG_UART1_BAUD
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# define CONSOLE_BITS CONFIG_UART1_BITS
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# define CONSOLE_PARITY CONFIG_UART1_PARITY
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART2_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART2_BAUD
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# define CONSOLE_BITS CONFIG_UART2_BITS
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# define CONSOLE_PARITY CONFIG_UART2_PARITY
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#elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART3_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART3_BAUD
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# define CONSOLE_BITS CONFIG_UART3_BITS
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# define CONSOLE_PARITY CONFIG_UART3_PARITY
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#elif defined(CONFIG_UART4_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART4_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART4_BAUD
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# define CONSOLE_BITS CONFIG_UART4_BITS
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# define CONSOLE_PARITY CONFIG_UART4_PARITY
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#elif defined(CONFIG_UART5_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART5_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART5_BAUD
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# define CONSOLE_BITS CONFIG_UART5_BITS
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# define CONSOLE_PARITY CONFIG_UART5_PARITY
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#elif defined(HAVE_SERIAL_CONSOLE)
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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#endif
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#if defined(HAVE_UART_CONSOLE)
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# if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART0_BASE
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# define CONSOLE_FREQ BOARD_CORECLK_FREQ
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# define CONSOLE_BAUD CONFIG_UART0_BAUD
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# define CONSOLE_BITS CONFIG_UART0_BITS
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# define CONSOLE_2STOP CONFIG_UART0_2STOP
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# define CONSOLE_PARITY CONFIG_UART0_PARITY
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# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART1_BASE
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# define CONSOLE_FREQ BOARD_CORECLK_FREQ
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# define CONSOLE_BAUD CONFIG_UART1_BAUD
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# define CONSOLE_BITS CONFIG_UART1_BITS
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# define CONSOLE_2STOP CONFIG_UART1_2STOP
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# define CONSOLE_PARITY CONFIG_UART1_PARITY
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# elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART2_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART2_BAUD
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# define CONSOLE_BITS CONFIG_UART2_BITS
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# define CONSOLE_2STOP CONFIG_UART2_2STOP
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# define CONSOLE_PARITY CONFIG_UART2_PARITY
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# elif defined(CONFIG_UART3_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART3_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART3_BAUD
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# define CONSOLE_BITS CONFIG_UART3_BITS
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# define CONSOLE_2STOP CONFIG_UART3_2STOP
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# define CONSOLE_PARITY CONFIG_UART3_PARITY
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# elif defined(CONFIG_UART4_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART4_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART4_BAUD
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# define CONSOLE_BITS CONFIG_UART4_BITS
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# define CONSOLE_2STOP CONFIG_UART4_2STOP
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# define CONSOLE_PARITY CONFIG_UART4_PARITY
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# elif defined(CONFIG_UART5_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_UART5_BASE
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# define CONSOLE_FREQ BOARD_BUS_FREQ
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# define CONSOLE_BAUD CONFIG_UART5_BAUD
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# define CONSOLE_BITS CONFIG_UART5_BITS
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# define CONSOLE_2STOP CONFIG_UART5_2STOP
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# define CONSOLE_PARITY CONFIG_UART5_PARITY
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# elif defined(HAVE_UART_CONSOLE)
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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# endif
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#elif defined(HAVE_LPUART_CONSOLE)
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# if defined(CONFIG_LPUART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_LPUART0_BASE
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# define CONSOLE_FREQ BOARD_LPUART0_FREQ
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# define CONSOLE_BAUD CONFIG_LPUART0_BAUD
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# define CONSOLE_PARITY CONFIG_LPUART0_PARITY
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# define CONSOLE_BITS CONFIG_LPUART0_BITS
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# define CONSOLE_2STOP CONFIG_LPUART0_2STOP
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# elif defined(CONFIG_LPUART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE KINETIS_LPUART1_BASE
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# define CONSOLE_FREQ BOARD_LPUART1_FREQ
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# define CONSOLE_BAUD CONFIG_LPUART1_BAUD
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# define CONSOLE_PARITY CONFIG_LPUART1_PARITY
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# define CONSOLE_BITS CONFIG_LPUART1_BITS
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# define CONSOLE_2STOP CONFIG_LPUART1_2STOP
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# else
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# error "No LPUART console is selected"
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# endif
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#endif /* HAVE_UART_CONSOLE */
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#if defined(HAVE_LPUART_CONSOLE)
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# if ((CONSOLE_FREQ / (CONSOLE_BAUD * 32)) > (LPUART_BAUD_SBR_MASK >> LPUART_BAUD_SBR_SHIFT))
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# error "LPUART Console: Baud rate not obtainable with this input clock!"
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# endif
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# define LPUART_BAUD_INIT (LPUART_BAUD_SBR_MASK | LPUART_BAUD_SBNS | \
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LPUART_BAUD_RXEDGIE | LPUART_BAUD_LBKDIE | \
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LPUART_BAUD_RESYNCDIS |LPUART_BAUD_BOTHEDGE | \
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LPUART_BAUD_MATCFG_MASK | LPUART_BAUD_RDMAE | \
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LPUART_BAUD_TDMAE | LPUART_BAUD_OSR_MASK | \
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LPUART_BAUD_M10 | LPUART_BAUD_MAEN2 | \
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LPUART_BAUD_MAEN2)
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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@ -141,20 +182,20 @@ static uint8_t g_sizemap[8] = {1, 4, 8, 16, 32, 64, 128, 0};
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void up_lowputc(char ch)
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{
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#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
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#ifdef CONFIG_KINETIS_UARTFIFOS
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#if defined(HAVE_UART_CONSOLE)
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# ifdef CONFIG_KINETIS_UARTFIFOS
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/* Wait until there is space in the TX FIFO: Read the number of bytes
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* currently in the FIFO and compare that to the size of the FIFO. If
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* there are fewer bytes in the FIFO than the size of the FIFO, then we
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* are able to transmit.
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*/
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# error "Missing logic"
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#else
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# error "Missing logic"
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# else
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/* Wait until the transmit data register is "empty" (TDRE). This state
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* depends on the TX watermark setting and may not mean that the transmit
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* buffer is truly empty. It just means that we can now add another
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* characterto the transmit buffer without exceeding the watermark.
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* character to the transmit buffer without exceeding the watermark.
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*
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* NOTE: UART0 has an 8-byte deep FIFO; the other UARTs have no FIFOs
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* (1-deep). There appears to be no way to know when the FIFO is not
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@ -167,11 +208,18 @@ void up_lowputc(char ch)
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*/
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while ((getreg8(CONSOLE_BASE+KINETIS_UART_S1_OFFSET) & UART_S1_TDRE) == 0);
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#endif
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# endif
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/* Then write the character to the UART data register */
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putreg8((uint8_t)ch, CONSOLE_BASE+KINETIS_UART_D_OFFSET);
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}
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#elif defined(HAVE_LPUART_CONSOLE)
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while ((getreg32(CONSOLE_BASE + KINETIS_LPUART_STAT_OFFSET) & LPUART_STAT_TDRE) == 0);
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/* Then send the character */
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putreg32((uint32_t)ch, CONSOLE_BASE + KINETIS_LPUART_DATA_OFFSET);
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#endif
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}
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@ -180,7 +228,7 @@ void up_lowputc(char ch)
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*
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* Description:
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* This performs basic initialization of the UART used for the serial
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* console. Its purpose is to get the console output availabe as soon
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* console. Its purpose is to get the console output available as soon
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* as possible.
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*
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****************************************************************************/
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@ -194,77 +242,113 @@ void kinetis_lowsetup(void)
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* 0-3 is enabled in the SCGC4 register.
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*/
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#if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
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defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3)
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# if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
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defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3)
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regval = getreg32(KINETIS_SIM_SCGC4);
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# ifdef CONFIG_KINETIS_UART0
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# ifdef CONFIG_KINETIS_UART0
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regval |= SIM_SCGC4_UART0;
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# endif
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# ifdef CONFIG_KINETIS_UART1
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# endif
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# ifdef CONFIG_KINETIS_UART1
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regval |= SIM_SCGC4_UART1;
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# endif
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# ifdef CONFIG_KINETIS_UART2
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# endif
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# ifdef CONFIG_KINETIS_UART2
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regval |= SIM_SCGC4_UART2;
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# endif
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# ifdef CONFIG_KINETIS_UART3
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# endif
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# ifdef CONFIG_KINETIS_UART3
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regval |= SIM_SCGC4_UART3;
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# endif
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# endif
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putreg32(regval, KINETIS_SIM_SCGC4);
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#endif
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# endif
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/* Clocking for UARTs 4-5 is enabled in the SCGC1 register. */
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#if defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
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# if defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
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regval = getreg32(KINETIS_SIM_SCGC1);
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# ifdef CONFIG_KINETIS_UART4
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# ifdef CONFIG_KINETIS_UART4
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regval |= SIM_SCGC1_UART4;
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# endif
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# ifdef CONFIG_KINETIS_UART5
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# endif
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# ifdef CONFIG_KINETIS_UART5
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regval |= SIM_SCGC1_UART5;
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# endif
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# endif
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putreg32(regval, KINETIS_SIM_SCGC1);
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#endif
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# endif
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/* Configure UART pins for the all enabled UARTs */
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#ifdef CONFIG_KINETIS_UART0
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# ifdef CONFIG_KINETIS_UART0
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kinetis_pinconfig(PIN_UART0_TX);
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kinetis_pinconfig(PIN_UART0_RX);
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#endif
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#ifdef CONFIG_KINETIS_UART1
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# endif
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# ifdef CONFIG_KINETIS_UART1
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kinetis_pinconfig(PIN_UART1_TX);
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kinetis_pinconfig(PIN_UART1_RX);
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#endif
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#ifdef CONFIG_KINETIS_UART2
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# endif
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# ifdef CONFIG_KINETIS_UART2
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kinetis_pinconfig(PIN_UART2_TX);
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kinetis_pinconfig(PIN_UART2_RX);
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#endif
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#ifdef CONFIG_KINETIS_UART3
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# endif
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# ifdef CONFIG_KINETIS_UART3
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kinetis_pinconfig(PIN_UART3_TX);
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kinetis_pinconfig(PIN_UART3_RX);
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#endif
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#ifdef CONFIG_KINETIS_UART4
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# endif
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# ifdef CONFIG_KINETIS_UART4
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kinetis_pinconfig(PIN_UART4_TX);
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kinetis_pinconfig(PIN_UART4_RX);
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#endif
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#ifdef CONFIG_KINETIS_UART5
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# endif
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# ifdef CONFIG_KINETIS_UART5
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kinetis_pinconfig(PIN_UART5_TX);
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kinetis_pinconfig(PIN_UART5_RX);
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#endif
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# endif
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/* Configure the console (only) now. Other UARTs will be configured
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* when the serial driver is opened.
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*/
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#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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# if defined(HAVE_UART_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ,
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CONSOLE_PARITY, CONSOLE_BITS);
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#endif
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kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ, \
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CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP);
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# endif
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#endif /* HAVE_UART_DEVICE */
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#if HAVE_LPUART_DEVICE
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/* Clocking Source for LPUARTs 0 selected in SIM_SOPT2 */
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# if defined(CONFIG_KINETIS_LPUART0)
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regval = getreg32(KINETIS_SIM_SOPT2);
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regval &= ~(SIM_SOPT2_LPUARTSRC_MASK);
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regval |= BOARD_LPUART0_CLKSRC;
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putreg32(regval, KINETIS_SIM_SOPT2);
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/* Clocking for LPUARTs 0-1 is enabled in the SCGC2 register. */
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regval = getreg32(KINETIS_SIM_SCGC2);
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regval |= SIM_SCGC2_LPUART0;
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putreg32(regval, KINETIS_SIM_SCGC2);
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# endif
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/* Configure UART pins for the all enabled UARTs */
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# ifdef CONFIG_KINETIS_LPUART0
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kinetis_pinconfig(PIN_LPUART0_TX);
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kinetis_pinconfig(PIN_LPUART0_RX);
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# endif
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# ifdef CONFIG_KINETIS_LPUART1
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kinetis_pinconfig(PIN_LPUART1_TX);
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kinetis_pinconfig(PIN_LPUART1_RX);
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# endif
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# if defined(HAVE_LPUART_CONSOLE) && !defined(CONFIG_SUPPRESS_LPUART_CONFIG)
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kinetis_lpuartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ, \
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CONSOLE_PARITY, CONSOLE_BITS, CONSOLE_2STOP);
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# endif
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#endif /* HAVE_UART_DEVICE */
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}
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@ -289,6 +373,27 @@ void kinetis_uartreset(uintptr_t uart_base)
|
|||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_lpuartreset
|
||||
*
|
||||
* Description:
|
||||
* Reset a UART.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef HAVE_LPUART_DEVICE
|
||||
void kinetis_lpuartreset(uintptr_t uart_base)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Just disable the transmitter and receiver */
|
||||
|
||||
regval = getreg32(uart_base+KINETIS_LPUART_CTRL_OFFSET);
|
||||
regval &= ~(LPUART_CTRL_RE | LPUART_CTRL_TE);
|
||||
putreg32(regval, uart_base+KINETIS_LPUART_CTRL_OFFSET);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_uartconfigure
|
||||
*
|
||||
|
|
@ -300,7 +405,7 @@ void kinetis_uartreset(uintptr_t uart_base)
|
|||
#ifdef HAVE_UART_DEVICE
|
||||
void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
|
||||
uint32_t clock, unsigned int parity,
|
||||
unsigned int nbits)
|
||||
unsigned int nbits, unsigned int stop2)
|
||||
{
|
||||
uint32_t sbr;
|
||||
uint32_t brfa;
|
||||
|
|
@ -362,11 +467,16 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
|
|||
sbr = clock / (baud << 4);
|
||||
DEBUGASSERT(sbr < 0x2000);
|
||||
|
||||
/* Save the new baud divisor, retaining other bits in the UARTx_BDH
|
||||
* register.
|
||||
/* Save the new baud divisor and stop bits, retaining other bits in the
|
||||
* UARTx_BDH register.
|
||||
*/
|
||||
|
||||
regval = getreg8(uart_base+KINETIS_UART_BDH_OFFSET) & UART_BDH_SBR_MASK;
|
||||
regval = getreg8(uart_base+KINETIS_UART_BDH_OFFSET);
|
||||
regval &= ~(UART_BDH_SBR_MASK | UART_BDH_SBNS);
|
||||
if (stop2)
|
||||
{
|
||||
regval |= UART_BDH_SBNS;
|
||||
}
|
||||
tmp = sbr >> 8;
|
||||
regval |= (((uint8_t)tmp) << UART_BDH_SBR_SHIFT) & UART_BDH_SBR_MASK;
|
||||
putreg8(regval, uart_base+KINETIS_UART_BDH_OFFSET);
|
||||
|
|
@ -378,7 +488,7 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
|
|||
* The fractional divider, BRFA, is a 5 bit fractional value that is
|
||||
* logically added to the SBR:
|
||||
*
|
||||
* UART baud rate = clock / (16 × (SBR + BRFD))
|
||||
* UART baud rate = clock / (16 <EFBFBD> (SBR + BRFD))
|
||||
*
|
||||
* The BRFA the remainder. This will be a non-negative value since the SBR
|
||||
* was calculated by truncation.
|
||||
|
|
@ -448,3 +558,169 @@ void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
|
|||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_lpuartconfigure
|
||||
*
|
||||
* Description:
|
||||
* Configure a LPUART as a RS-232 UART.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef HAVE_LPUART_DEVICE
|
||||
void kinetis_lpuartconfigure(uintptr_t uart_base, uint32_t baud,
|
||||
uint32_t clock, unsigned int parity,
|
||||
unsigned int nbits, unsigned int stop2)
|
||||
{
|
||||
uint32_t sbrreg;
|
||||
uint32_t osrreg;
|
||||
uint32_t sbr;
|
||||
uint32_t osr;
|
||||
uint32_t actual_baud;
|
||||
uint32_t current_baud;
|
||||
uint32_t baud_error;
|
||||
uint32_t min_baud_error;
|
||||
uint32_t regval;
|
||||
|
||||
/* General note: LPART block input clock can be sourced by
|
||||
* SIM_CLKDIV3[PLLFLLFRAC, PLLFLLDIV] since this can be shared with TPM, we
|
||||
* would ideally want to maximize the input frequency. This also helps to
|
||||
* maximize the oversampling.
|
||||
*
|
||||
* We would like to maximize oversample and minimize the baud rate error
|
||||
*
|
||||
* USART baud is generated according to:
|
||||
*
|
||||
* baud = clock / (SBR[0:12] * (OSR +1 ))
|
||||
*
|
||||
* Or, equivalently:
|
||||
*
|
||||
* SBR = clock / (baud * (OSR + 1))
|
||||
* OSR = clock / (baud * SBR) -1
|
||||
*
|
||||
* SBR must be 1..8191
|
||||
* OSR must be 3..31 (macro value 4..32)
|
||||
*/
|
||||
|
||||
min_baud_error = baud;
|
||||
sbrreg = 0;
|
||||
osrreg = 0;
|
||||
|
||||
/* While maximizing OSR look for a SBR that minimizes the difference
|
||||
* between actual baud and requested baud rate
|
||||
*/
|
||||
|
||||
for (osr = 32; osr >= 4; osr--)
|
||||
{
|
||||
sbr = clock / (baud * osr);
|
||||
|
||||
/* Ensure the minimum SBR */
|
||||
|
||||
if (sbr == 0)
|
||||
{
|
||||
sbr++;
|
||||
}
|
||||
|
||||
/* Calculate the actual baud rate */
|
||||
|
||||
current_baud = clock / (sbr * osr);
|
||||
|
||||
/* look at the deviation of current baud to requested */
|
||||
|
||||
baud_error = current_baud - baud;
|
||||
if (baud_error <= min_baud_error)
|
||||
{
|
||||
min_baud_error = baud_error;
|
||||
actual_baud = current_baud;
|
||||
sbrreg = sbr;
|
||||
osrreg = osr;
|
||||
}
|
||||
}
|
||||
UNUSED(actual_baud);
|
||||
DEBUGASSERT(actual_baud-baud < (baud /100) * 2);
|
||||
DEBUGASSERT(sbrreg != 0 && sbrreg < 8192);
|
||||
DEBUGASSERT(osrreg != 0);
|
||||
|
||||
/* Disable the transmitter and receiver throughout the reconfiguration */
|
||||
|
||||
regval = getreg32(uart_base+KINETIS_LPUART_CTRL_OFFSET);
|
||||
regval &= ~(LPUART_CTRL_RE | LPUART_CTRL_TE);
|
||||
putreg32(regval, uart_base+KINETIS_LPUART_CTRL_OFFSET);
|
||||
|
||||
/* Reset the BAUD register */
|
||||
|
||||
regval = getreg32(uart_base+KINETIS_LPUART_BAUD_OFFSET);
|
||||
regval &= ~(LPUART_BAUD_INIT);
|
||||
|
||||
/* Set the Baud rate, nbits and stop bits */
|
||||
|
||||
regval |= LPUART_BAUD_OSR(osrreg);
|
||||
regval |= LPUART_BAUD_SBR(sbrreg);
|
||||
|
||||
/* Set the 10 bit mode */
|
||||
|
||||
if (nbits == 10)
|
||||
{
|
||||
regval |= LPUART_BAUD_M10;
|
||||
}
|
||||
|
||||
/* Set the 2 stop bit mode */
|
||||
|
||||
if (stop2)
|
||||
{
|
||||
regval |= LPUART_BAUD_SBNS;
|
||||
}
|
||||
|
||||
/* BOTHEDG needs to be turned on for 4X-7X */
|
||||
|
||||
if (osrreg >= 4 && osrreg <= 7)
|
||||
{
|
||||
regval |= LPUART_BAUD_BOTHEDGE;
|
||||
}
|
||||
|
||||
putreg32(regval, uart_base+KINETIS_LPUART_BAUD_OFFSET);
|
||||
|
||||
/* Configure number of bits and parity */
|
||||
|
||||
regval = 0;
|
||||
|
||||
/* Check for odd parity */
|
||||
|
||||
if (parity == 1)
|
||||
{
|
||||
regval |= (LPUART_CTRL_PE | LPUART_CTRL_PT); /* Enable + odd parity type */
|
||||
}
|
||||
|
||||
/* Check for even parity */
|
||||
|
||||
else if (parity == 2)
|
||||
{
|
||||
regval |= LPUART_CTRL_PE; /* Enable (even parity default) */
|
||||
}
|
||||
|
||||
/* The only other option is no parity */
|
||||
|
||||
else
|
||||
{
|
||||
DEBUGASSERT(parity == 0);
|
||||
}
|
||||
|
||||
/* Check for 9-bit operation */
|
||||
|
||||
if (nbits == 9)
|
||||
{
|
||||
regval |= LPUART_CTRL_M;
|
||||
}
|
||||
|
||||
/* The only other option is 8-bit operation */
|
||||
|
||||
else
|
||||
{
|
||||
DEBUGASSERT(nbits == 8);
|
||||
}
|
||||
|
||||
/* Now we can (re-)enable the transmitter and receiver */
|
||||
|
||||
regval |= (LPUART_CTRL_RE | LPUART_CTRL_TE);
|
||||
putreg32(regval, uart_base+KINETIS_LPUART_CTRL_OFFSET);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue