From 844f39fc67bf045cb6cc84eea34dc3167963aa15 Mon Sep 17 00:00:00 2001 From: Abdelatif Guettouche Date: Fri, 2 Oct 2020 12:54:02 +0100 Subject: [PATCH] arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA bits so that the call to up_cpu_index is only performed when SMP is enabled. Signed-off-by: Abdelatif Guettouche --- arch/xtensa/src/esp32/esp32_gpio.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c index cb994cc2efb..25bf4fac9a5 100644 --- a/arch/xtensa/src/esp32/esp32_gpio.c +++ b/arch/xtensa/src/esp32/esp32_gpio.c @@ -354,7 +354,9 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) { uintptr_t regaddr; uint32_t regval; +#ifdef CONFIG_SMP int cpu; +#endif int pin; DEBUGASSERT(irq <= ESP32_FIRST_GPIOIRQ && irq <= ESP32_LAST_GPIOIRQ); @@ -380,19 +382,21 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) * Bit 5: SDIO's extent interrupt enable. */ +#ifdef CONFIG_SMP cpu = up_cpu_index(); - if (cpu == 0) - { - /* PRO_CPU */ - - regval |= ((1 << 2) << GPIO_PIN_INT_ENA_S); - } - else + if (cpu != 0) { /* APP_CPU */ regval |= ((1 << 0) << GPIO_PIN_INT_ENA_S); } + else +#endif + { + /* PRO_CPU */ + + regval |= ((1 << 2) << GPIO_PIN_INT_ENA_S); + } regval |= (intrtype << GPIO_PIN_INT_TYPE_S); putreg32(regval, regaddr);