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Changed the x86 64 pci driver
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com> Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
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125884ae95
commit
7cbb7d36d8
3 changed files with 211 additions and 79 deletions
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@ -152,6 +152,24 @@
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#define pci_write_config_dword(dev, where, val) \
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pci_bus_write_config_dword((dev)->bus, (dev)->devfn, where, val)
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#define pci_read_io_byte(dev, addr, val) \
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pci_bus_read_io_byte((dev)->bus, addr, val)
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#define pci_read_io_word(dev, addr, val) \
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pci_bus_read_io_word((dev)->bus, addr, val)
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#define pci_read_io_dword(dev, addr, val) \
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pci_bus_read_io_dword((dev)->bus, addr, val)
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#define pci_write_io_byte(dev, addr, val) \
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pci_bus_write_io_byte((dev)->bus, addr, val)
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#define pci_write_io_word(dev, addr, val) \
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pci_bus_write_io_word((dev)->bus, addr, val)
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#define pci_write_io_dword(dev, addr, val) \
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pci_bus_write_io_dword((dev)->bus, addr, val)
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/****************************************************************************
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* Public Types
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****************************************************************************/
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@ -232,6 +250,10 @@ struct pci_ops_s
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CODE uintptr_t (*map)(FAR struct pci_bus_s *bus, uintptr_t start,
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uintptr_t end);
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CODE int (*read_io)(FAR struct pci_bus_s *bus, uintptr_t addr,
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int size, FAR uint32_t *val);
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CODE int (*write_io)(FAR struct pci_bus_s *bus, uintptr_t addr,
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int size, uint32_t val);
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};
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/* Each pci channel is a top-level PCI bus seem by CPU. A machine with
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