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arch/risc-v: Correct FPU register save area in riscv_copystate

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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2022-03-10 14:05:08 +08:00 • committed by Xiang Xiao
parent dc1b6776b9
commit 7022c630fe
1 changed files with 1 additions and 5 deletions
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6
arch/risc-v/src/common/riscv_copystate.c
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@ -55,10 +55,6 @@ void riscv_copystate(uintptr_t *dest, uintptr_t *src)
{
int i;
#ifdef CONFIG_ARCH_FPU
uintptr_t *regs = dest;
#endif
/* In the RISC-V model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
@ -79,7 +75,7 @@ void riscv_copystate(uintptr_t *dest, uintptr_t *src)
*/
#ifdef CONFIG_ARCH_FPU
riscv_savefpu(regs);
riscv_savefpu(dest);
#endif
}
}