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driver/timers: Simplify Goldfish timer driver.
This commit simplified goldfish timer driver for better performance. Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit is contained in:
ouyangxiangzhen
Xiang Xiao
parent
5296b8d3e3
commit
6f17f1ce81
1 changed files with 106 additions and 121 deletions
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@ -27,7 +27,6 @@
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/timers/oneshot.h>
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#include <nuttx/spinlock.h>
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@ -65,129 +64,21 @@ struct goldfish_timer_lowerhalf_s
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{
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struct oneshot_lowerhalf_s lh; /* Lower half operations */
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uintptr_t base; /* Base address of registers */
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spinlock_t lock; /* Lock for interrupt handling */
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spinlock_t lock; /* Lock for setting timer */
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spinlock_t read_lock; /* Lock for reading time */
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};
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/****************************************************************************
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* Inline Functions
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* Private Function Prototypes
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****************************************************************************/
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static inline_function uint64_t goldfish_timer_get_nsec(uintptr_t base)
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{
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uint32_t l32;
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uint32_t h32;
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l32 = getreg32(base + GOLDFISH_TIMER_TIME_LOW);
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h32 = getreg32(base + GOLDFISH_TIMER_TIME_HIGH);
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return ((uint64_t)h32 << 32) | l32;
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}
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static inline_function
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void goldfish_timer_set_nsec(uintptr_t base, uint64_t expected)
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{
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putreg32(1, base + GOLDFISH_TIMER_CLEAR_ALARM);
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putreg32(expected >> 32, base + GOLDFISH_TIMER_ALARM_HIGH);
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putreg32(expected, base + GOLDFISH_TIMER_ALARM_LOW);
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}
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static int goldfish_timer_interrupt(int irq,
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FAR void *context,
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FAR void *arg)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower = arg;
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irqstate_t flags;
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DEBUGASSERT(lower != NULL);
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flags = spin_lock_irqsave(&lower->lock);
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putreg32(1, lower->base + GOLDFISH_TIMER_CLEAR_INTERRUPT);
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spin_unlock_irqrestore(&lower->lock, flags);
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/* Then perform the callback */
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oneshot_process_callback(&lower->lh);
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return 0;
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}
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static clkcnt_t goldfish_timer_max_delay(struct oneshot_lowerhalf_s *lower)
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{
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return UINT64_MAX;
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}
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static clkcnt_t goldfish_timer_current(struct oneshot_lowerhalf_s *lower_)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower =
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(FAR struct goldfish_timer_lowerhalf_s *)lower_;
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irqstate_t flags;
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uint64_t nsec;
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DEBUGASSERT(lower != NULL);
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flags = spin_lock_irqsave(&lower->lock);
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nsec = goldfish_timer_get_nsec(lower->base);
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spin_unlock_irqrestore(&lower->lock, flags);
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return nsec;
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}
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static clkcnt_t goldfish_timer_max_delay(struct oneshot_lowerhalf_s *lower);
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static clkcnt_t goldfish_timer_current(struct oneshot_lowerhalf_s *lower_);
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static void goldfish_timer_start_absolute(struct oneshot_lowerhalf_s *lower_,
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clkcnt_t expected)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower =
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(FAR struct goldfish_timer_lowerhalf_s *)lower_;
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irqstate_t flags;
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DEBUGASSERT(lower != NULL);
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flags = spin_lock_irqsave(&lower->lock);
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goldfish_timer_set_nsec(lower->base, expected);
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spin_unlock_irqrestore(&lower->lock, flags);
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}
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clkcnt_t expected);
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static void goldfish_timer_start(struct oneshot_lowerhalf_s *lower_,
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clkcnt_t delta)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower =
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(FAR struct goldfish_timer_lowerhalf_s *)lower_;
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irqstate_t flags;
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DEBUGASSERT(lower != NULL);
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flags = spin_lock_irqsave(&lower->lock);
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delta += goldfish_timer_get_nsec(lower->base);
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goldfish_timer_set_nsec(lower->base, delta);
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spin_unlock_irqrestore(&lower->lock, flags);
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}
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static void goldfish_timer_cancel(struct oneshot_lowerhalf_s *lower_)
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{
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struct goldfish_timer_lowerhalf_s *lower =
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(struct goldfish_timer_lowerhalf_s *)lower_;
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irqstate_t flags;
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DEBUGASSERT(lower != NULL);
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flags = spin_lock_irqsave(&lower->lock);
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goldfish_timer_set_nsec(lower->base, UINT64_MAX);
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spin_unlock_irqrestore(&lower->lock, flags);
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}
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clkcnt_t delta);
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static void goldfish_timer_cancel(struct oneshot_lowerhalf_s *lower_);
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/****************************************************************************
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* Private Data
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@ -207,6 +98,99 @@ static struct goldfish_timer_lowerhalf_s g_goldfish_timer_lowerhalf =
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.lh.ops = &g_goldfish_timer_ops
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};
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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static inline_function uint64_t goldfish_timer_get_nsec(uintptr_t base)
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{
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uint32_t l32 = getreg32(base + GOLDFISH_TIMER_TIME_LOW);
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uint32_t h32 = getreg32(base + GOLDFISH_TIMER_TIME_HIGH);
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return ((uint64_t)h32 << 32) | l32;
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}
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static inline_function
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void goldfish_timer_set_nsec(uintptr_t base, uint64_t expected)
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{
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putreg32(expected >> 32, base + GOLDFISH_TIMER_ALARM_HIGH);
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putreg32(expected, base + GOLDFISH_TIMER_ALARM_LOW);
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}
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static int goldfish_timer_interrupt(int irq, FAR void *context,
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FAR void *arg)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower = &g_goldfish_timer_lowerhalf;
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/* Only one core can handle the IRQ, so lock is not required. */
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putreg32(1, lower->base + GOLDFISH_TIMER_CLEAR_INTERRUPT);
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/* Then perform the callback */
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oneshot_process_callback(&lower->lh);
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return 0;
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}
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static clkcnt_t goldfish_timer_max_delay(struct oneshot_lowerhalf_s *lower)
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{
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return UINT64_MAX;
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}
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static clkcnt_t goldfish_timer_current(struct oneshot_lowerhalf_s *lower_)
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{
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/* Do not remove the read lock here, because the access to the
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* GOLDFISH_TIMER_TIME_LOW will update the whole GOLDFISH_TIMER_TIME.
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*/
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FAR struct goldfish_timer_lowerhalf_s *lower = &g_goldfish_timer_lowerhalf;
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irqstate_t flags = spin_lock_irqsave(&lower->read_lock);
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uint64_t nsec = goldfish_timer_get_nsec(lower->base);
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spin_unlock_irqrestore(&lower->read_lock, flags);
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return nsec;
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}
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static void goldfish_timer_start_absolute(struct oneshot_lowerhalf_s *lower_,
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clkcnt_t expected)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower = &g_goldfish_timer_lowerhalf;
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irqstate_t flags = spin_lock_irqsave(&lower->lock);
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goldfish_timer_set_nsec(lower->base, expected);
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spin_unlock_irqrestore(&lower->lock, flags);
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}
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static void goldfish_timer_start(struct oneshot_lowerhalf_s *lower_,
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clkcnt_t delta)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower = &g_goldfish_timer_lowerhalf;
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irqstate_t flags = spin_lock_irqsave(&lower->lock);
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delta += goldfish_timer_get_nsec(lower->base);
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goldfish_timer_set_nsec(lower->base, delta);
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spin_unlock_irqrestore(&lower->lock, flags);
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}
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static void goldfish_timer_cancel(struct oneshot_lowerhalf_s *lower_)
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{
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FAR struct goldfish_timer_lowerhalf_s *lower = &g_goldfish_timer_lowerhalf;
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irqstate_t flags = spin_lock_irqsave(&lower->lock);
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/* Disable the timer and clear the interrupt. */
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putreg32(1, lower->base + GOLDFISH_TIMER_CLEAR_ALARM);
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spin_unlock_irqrestore(&lower->lock, flags);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -219,13 +203,14 @@ goldfish_timer_initialize(uintptr_t base, int irq)
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lower->base = base;
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spin_lock_init(&lower->lock);
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/* Enable timer, but disable interrupt */
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spin_lock_init(&lower->read_lock);
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oneshot_count_init(&lower->lh, NSEC_PER_SEC);
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putreg32(1, lower->base + GOLDFISH_TIMER_CLEAR_INTERRUPT);
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goldfish_timer_set_nsec(lower->base, UINT64_MAX);
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/* Reset the timer registers. */
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putreg32(1, base + GOLDFISH_TIMER_CLEAR_ALARM);
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putreg32(1, base + GOLDFISH_TIMER_CLEAR_INTERRUPT);
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putreg32(1, base + GOLDFISH_TIMER_IRQ_ENABLED);
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irq_attach(irq, goldfish_timer_interrupt, lower);
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