arch/arm/src/lpc2378/Kconfig: Create Kconfig for the platform; Adjust configuration names for compatibility, configs/olimex-lpc2378/nsh: Convert to use the kconfig-frontends tools

This commit is contained in:
Gregory Nutt 2014-03-02 11:08:23 -06:00
parent 1aba98dcaa
commit 6b1aebdcae
10 changed files with 980 additions and 386 deletions

View file

@ -6696,51 +6696,53 @@
cases where there wass some good argument to retain the ostest
configuration) (2014-2-28)
* configurations (2014-2-28).
* configs/stm3240g-eval/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/stm3220g-eval/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/stm3210e-eval/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/stm3210e-eval/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/stm3240g-eval/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/stm3220g-eval/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/stm3210e-eval/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/stm3210e-eval/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/lincoln60/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
kconfig-frontends tools (2014-3-1).
* configs/lpcxpresso-lpc1768/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/nucleus2g/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/vsn/nsh: Configuration converted to use the kconfig-frontends
kconfig-frontends tools (2014-3-1).
* configs/nucleus2g/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/vsn/nsh: Configuration converted to use the kconfig-frontends
tools (2014-3-1).
* configs/mirtoo/nsh: Configuration converted to use the kconfig-frontends
tools (2014-3-1).
* configs/pic32-starterkit/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/pic32-starterkit/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1)
* configs/mirtoo/nsh: Configuration converted to use the kconfig-frontends
tools (2014-3-1).
* configs/pic32-starterkit/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
* configs/pic32-starterkit/nsh2: Configuration converted to use the
kconfig-frontends tools (2014-3-1)
* configs/pic32mx7mmb/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
kconfig-frontends tools (2014-3-1).
* configs/ubw32/nsh: Configuration converted to use the kconfig-frontends
tools (2014-3-1).
tools (2014-3-1).
* configs/sim/nsh2: Configuration converted to use the kconfig-frontends
tools (2014-3-1).
tools (2014-3-1).
* configs/lm3s6432-s2e/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1)
kconfig-frontends tools (2014-3-1)
* configs/lm3s8962-ek/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
kconfig-frontends tools (2014-3-1).
* configs/eagle100/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
kconfig-frontends tools (2014-3-1).
* configs/stm32f4discovery/src/Makefile: Fix type: stm32_pwm.c not
stm32_psm.c. Noted by Max Kriegleder (2014-3-1).
* configs/lpc4330-xplorer/nsh Configuration converted to use the
kconfig-frontends tools (2014-3-1).
kconfig-frontends tools (2014-3-1).
* configs/ea3152/ostest: Configuration converted to use the
kconfig-frontends tools (2014-3-1).
kconfig-frontends tools (2014-3-1).
* configs/stm3210e-eval/RIDE, nxlines, and nxtext: Remove some old
style configurations that are not worth converting to use the
kconfig-frontends tools (2014-3-2).
* configs/stm3210e-eval/nx: Configuration converted to use the
kconfig-frontends tools (2014-3-2).
kconfig-frontends tools (2014-3-2).
* configs/mirtoo/nxffs: Configuration converted to use the kconfig-frontends
tools (2014-3-1).
tools (2014-3-1).
* configs/olimex-lpc2378/nsh: Configuration converted to use the
kconfig-frontends tools (2014-3-2)

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@ -37,7 +37,7 @@ config DEFAULT_MODE
endchoice
config CODE_BASE
hex "Execuation Base Address"
hex "Execution Base Address"
default 0x00000000
---help---
This must match the expected address for the selected "Memory
@ -45,7 +45,7 @@ config CODE_BASE
EXTMEM_MODE: 0x8000:0000
RAM_MODE: 0x4000:0000
DEFAULT)MODE: 0x0000:0000
DEFAULT_MODE: 0x0000:0000
config PLL_SETUP
bool "Configure the PLL"

View file

@ -4,3 +4,163 @@
#
comment "LPC2378 Configuration Options"
choice
prompt "Memory Execution Mode"
default LPC2378_DEFAULT_MODE
config LPC2378_EXTMEM_MODE
bool "External Memory Mode"
depends on EXPERIMENTAL # Not used
---help---
Code executes from external memory starting at address 0x8000:0000.
config LPC2378_RAM_MODE
bool "RAM Memory Mode"
depends on EXPERIMENTAL # Not used
---help---
Code executes from on-chip RAM at address 0x4000:0000.
config LPC2378_DEFAULT_MODE
bool "Default Memory Mode"
---help---
Executes from 0x0000:0000. In non-default modes, the MEMAP register
is set override the settings of the CPU configuration pins.
endchoice
config LPC2378_CODE_BASE
hex "Execution Base Address"
default 0x00000000
---help---
This must match the expected address for the selected "Memory
Execution Address":
LPC2378_EXTMEM_MODE: 0x8000:0000
LPC2378_RAM_MODE: 0x4000:0000
LPC2378_DEFAULT_MODE: 0x0000:0000
config LPC2378_PLL_SETUP
bool "Configure the PLL"
default y
config LPC2378_PLL_CLKSRC
int "PLL clock source"
default 1
range 0 2
depends on LPC2378_PLL_SETUP
---help---
PLL clock source
config LPC2378_MAM_SETUP
bool "Configure the Memory Accelerator Module (MAM)"
default y
config LPC2378_LPC2378_MAMCR_VALUE
int "Memory accelerator mode"
default 1
range 0 2
---help---
Memory accelerator mode:
OFF 0
PART 1
FULL 2
config LPC2378_LPC2378_MAMTIM_VALUE
int "Memory accelerator timing value"
default 3
---help---
Memory accelerator timing value
config LPC2378_APBDIV_SETUP
bool "Configure the APB Divider"
default y
depends on EXPERIMENTAL # Not used
config LPC2378_APBDIV_VALUE
int "APB Divisor"
default 1
depends on EXPERIMENTAL # Not used
config LPC2378_EMC_SETUP
bool "Configure EMC"
default n
depends on EXPERIMENTAL # Not used
config LPC2378_BCFG0_SETUP
bool "Configure BCFG0"
default n
depends on EXPERIMENTAL # Not used
config LPC2378_BCFG1_SETUP
bool "Configure BCFG1"
default n
depends on EXPERIMENTAL # Not used
config LPC2378_BCFG2_SETUP
bool "Configure BCFG2"
default n
depends on EXPERIMENTAL # Not used
config BCFG3_SETUP
bool "Configure BCFG3"
default n
depends on EXPERIMENTAL # Not used
config LPC2378_ADC_SETUP
bool "Configure ADC"
default y
depends on EXPERIMENTAL # Not used
menu "LPC2378 Peripheral Support"
config LPC2378_UART0
bool "UART0"
default y
select ARCH_HAVE_UART0
config LPC2378_UART1
bool "UART1"
default y
select ARCH_HAVE_UART1
config LPC2378_UART2
bool "UART2"
default y
select ARCH_HAVE_UART2
config LPC2378_USBDEV
bool "USB Device"
default y
depends on USBDEV
endmenu
if LPC2378_USBDEV
menu "LPC2378 USB Device Configuration"
config LPC2378_USBDEV_DMA
bool "USB Device DMA Support"
default n
config LPC2378_USBDEV_NDMADESCRIPTORS
int "Number of USB DMA Descriptors"
default 8
depends on LPC2378_USBDEV_DMA
config LPC2378_USBDEV_EPFAST_INTERRUPT
bool "USB Device Fast Endpoint Interrupts"
default n
config LPC2378_USBDEV_FRAME_INTERRUPT
bool "USB Device Frame Interrupts"
default n
config LPC2378_USBDEV_REGDEBUG
bool "USB Device Register-Level Debug Output"
default n
depends on DEBUG
endmenu
endif

View file

@ -6,7 +6,7 @@
*
* This file is part of the NuttX RTOS and based on the lpc2148 port:
*
* Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -59,6 +59,7 @@
/* Print a character on the UART to show boot status. This macro will
* modify r0, r1, r2 and r14
*/
#ifdef CONFIG_DEBUG
.macro showprogress, code
mov r0, #\code
@ -80,7 +81,7 @@
*
* Description:
* Interrrupt vector table. This must be located at the beginning
* of the memory space (at CONFIG_CODE_BASE). The first entry in
* of the memory space (at CONFIG_LPC2378_CODE_BASE). The first entry in
* the vector table is the reset vector and this is the code that
* will execute whn the processor is reset.
*
@ -136,6 +137,7 @@ _vector_table:
__start:
/* Call lowlevel init C-function */
.extern ConfigurePLL
ldr r0, =ConfigurePLL
mov lr, pc
@ -153,7 +155,6 @@ __start:
showprogress 'A'
/* Setup system stack (and get the BSS range) */
adr r0, LC0
@ -231,4 +232,3 @@ g_idle_topstack:
.size g_idle_topstack, .-g_idle_topstack
.end

View file

@ -6,7 +6,7 @@
*
* This file is part of the NuttX RTOS:
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -46,13 +46,13 @@
* MEMAP register is set override the settings of the CPU configuration
* pins.
*
* CONFIG_EXTMEM_MODE: Code executes from external memory starting at
* CONFIG_LPC2378_EXTMEM_MODE: Code executes from external memory starting at
* address 0x8000:0000.
*
* CONFIG_RAM_MODE: Code executes from on-chip RAM at address
* CONFIG_LPC2378_RAM_MODE: Code executes from on-chip RAM at address
* 0x4000:0000.
*
* Starupt Code must be linked to run at the correct address
* Start-up Code must be linked to run at the correct address
* corresponding to the selected mode.
*/
@ -70,10 +70,10 @@
#include "lpc23xx_pinsel.h"
#include "lpc23xx_scb.h"
extern void IO_Init(void);
void IO_Init(void);
/***********************************************************************
* Definitions
* Pre-processor Definitions
**********************************************************************/
#if ((FOSC < 32000) || (FOSC > 50000000))
@ -105,8 +105,8 @@ extern void IO_Init(void);
* RTC 2
*/
#ifdef CONFIG_PLL_CLKSRC
# if ( (CONFIG_PLL_CLKSRC < 0) || (CONFIG_PLL_CLKSRC > 2) )
#ifdef CONFIG_LPC2378_PLL_CLKSRC
# if ( (CONFIG_LPC2378_PLL_CLKSRC < 0) || (CONFIG_LPC2378_PLL_CLKSRC > 2) )
# error "PLL clock source not valid, check configuration "
# endif
#else
@ -138,13 +138,13 @@ extern void IO_Init(void);
/* LPC2378 Rev. '-' errata MAM may not work if fully enabled */
#ifdef CONFIG_MAM_SETUP
# ifndef CONFIG_MAMCR_VALUE /* Can be selected from config file */
# define CONFIG_MAMCR_VALUE (MAMCR_PART)
#ifdef CONFIG_LPC2378_MAM_SETUP
# ifndef CONFIG_LPC2378_MAMCR_VALUE /* Can be selected from config file */
# define CONFIG_LPC2378_MAMCR_VALUE (MAMCR_PART)
# endif
# ifndef CONFIG_MAMTIM_VALUE /* Can be selected from config file */
# define CONFIG_MAMTIM_VALUE (0x00000003)
# ifndef CONFIG_LPC2378_MAMTIM_VALUE /* Can be selected from config file */
# define CONFIG_LPC2378_MAMTIM_VALUE (0x00000003)
# endif
#endif
@ -171,12 +171,15 @@ void ConfigurePLL(void)
uint32_t MSel, NSel;
/* LPC2378 Rev.'-' errata Enable the Ethernet block to enable 16k EnetRAM */
SCB_PCONP |= PCENET;
/* Vectors are remapped to Flash */
SCB_MEMMAP = MEMMAP2FLASH;
/* Enable PLL, disconnected */
if (SCB_PLLSTAT & (1 << 25))
{
SCB_PLLCON = 0x01;
@ -184,37 +187,48 @@ void ConfigurePLL(void)
}
/* Disable PLL, disconnected */
SCB_PLLCON = 0;
up_scbpllfeed();
/* Enable main OSC */
SCB_SCS |= 0x20;
/* Wait until main OSC is usable */
while (!(SCB_SCS & 0x40));
/* select main OSC, 12MHz, as the PLL clock source */
SCB_CLKSRCSEL = CONFIG_PLL_CLKSRC;
SCB_CLKSRCSEL = CONFIG_LPC2378_PLL_CLKSRC;
/* Reconfigure PLL */
SCB_PLLCFG = PLL;
up_scbpllfeed();
/* Enable PLL */
SCB_PLLCON = 0x01;
up_scbpllfeed();
/* Set clock divider */
SCB_CCLKCFG = CCLK_DIV;
#ifdef CONFIG_USBDEV
/* usbclk = 288 MHz/6 = 48 MHz */
SCB_USBCLKCFG = USBCLK_DIV;
/* Turn On USB PCLK */
SCB_PCONP |= PCUSB;
#endif
/* Wait for PLL to lock */
while ((SCB_PLLSTAT & (1 << 26)) == 0);
MSel = SCB_PLLSTAT & 0x00007FFF;
@ -222,18 +236,22 @@ void ConfigurePLL(void)
while ((MSel != PLL_M) && (NSel != PLL_N));
/* Enable and connect */
SCB_PLLCON = 0x03;
up_scbpllfeed();
/* Check connect bit status */
while ((SCB_PLLSTAT & (1 << 25)) == 0);
/* Set memory accelerater module */
SCB_MAMCR = 0;
SCB_MAMTIM = CONFIG_MAMTIM_VALUE;
SCB_MAMCR = CONFIG_MAMCR_VALUE;
SCB_MAMTIM = CONFIG_LPC2378_MAMTIM_VALUE;
SCB_MAMCR = CONFIG_LPC2378_MAMCR_VALUE;
/* Enable FastIO on P0:P1 */
SCB_SCS |= 0x01;
IO_Init();

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@ -6,7 +6,7 @@
*
* This file is part of the NuttX RTOS and based on the lpc2148 port:
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -49,17 +49,20 @@
#include "lpc23xx_vic.h"
/****************************************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************************************/
#define scb_getreg(o) getreg32(LPC23XX_SCB_BASE + (o))
#define scb_putreg(v,o) putreg32((v),LPC23XX_SCB_BASE + (o))
/* Memory Accelerator Mode */
#define MAMCR_OFF 0
#define MAMCR_PART 1
#define MAMCR_FULL 2
/* Memory Mapping */
#define MEMMAP2BBLK 0 /* Interrupt Vectors in Boot Block */
#define MEMMAP2FLASH 1 /* Interrupt Vectors in FLASH */
#define MEMMAP2SRAM 2 /* Interrupt Vectors in RAM */
@ -68,58 +71,58 @@
/* PLL Control Register Bit Settings */
#define PLLCON_PLLE (1 << 0) /* PLL Enable */
#define PLLCON_PLLC (1 << 1) /* PLL Connect */
#define PLLCON_PLLE (1 << 0) /* PLL Enable */
#define PLLCON_PLLC (1 << 1) /* PLL Connect */
/* PLL Configuration Register Bit Settings */
#define PLLCFG_MSEL (0x0000FFFF << 0) /* PLL Multiplier (minus 1) */
#define PLLCFG_NSEL (0x000000FF << 16) /* PLL Divider */
#define PLLCFG_MSEL (0x0000ffff << 0) /* PLL Multiplier (minus 1) */
#define PLLCFG_NSEL (0x000000ff << 16) /* PLL Divider */
/* PLL Status Register Bit Settings */
#define PLLSTAT_MSEL (0x7FFF << 0) /* PLL Multiplier Readback */
#define PLLSTAT_NSEL (0xFF << 16) /* PLL Divider Readback */
#define PLLSTAT_PLLE (1 << 24) /* PLL Enable Readback */
#define PLLSTAT_PLLC (1 << 25) /* PLL Connect Readback */
#define PLLSTAT_PLOCK (1 << 26) /* PLL Lock Status */
#define PLLSTAT_MSEL (0x7fff << 0) /* PLL Multiplier Readback */
#define PLLSTAT_NSEL (0xff << 16) /* PLL Divider Readback */
#define PLLSTAT_PLLE (1 << 24) /* PLL Enable Readback */
#define PLLSTAT_PLLC (1 << 25) /* PLL Connect Readback */
#define PLLSTAT_PLOCK (1 << 26) /* PLL Lock Status */
/* PLL Feed Register values */
#define PLLFEED1 0xaa
#define PLLFEED2 0x55
#define PLLFEED1 0xaa
#define PLLFEED2 0x55
/* Peripheral Power Control (PCONP) Register 0xE01FC0C4 */
#define PCTIM0 (1 << 1) /* Timer/Counter 0 */
#define PCTIM1 (1 << 2) /* Timer/Counter 1 */
#define PCUART0 (1 << 3) /* UART0 power/clock */
#define PCUART1 (1 << 4) /* UART1 power/clock */
#define PCPWM1 (1 << 5) /* Unused, always 0 */
#define PWM1 (1 << 6) /* Pulse Width Modulation 1 */
#define PCI2C0 (1 << 7) /* I2C0 interface */
#define PCSPI (1 << 8) /* SPI */
#define PCRTC (1 << 9) /* Real Time Clock*/
#define PCSSP1 (1 << 10) /* SSP1 */
#define PCEMC (1 << 11) /* External Memory Controller */
#define PCAD (1 << 12) /* A/D converter (ADC) Note: Clear the PDN bit in the AD0CR before
clearing this bit, and set this bit before setting PDN */
#define PCAN1 (1 << 13) /* CAN Controller 1 */
#define PCAN2 (1 << 14) /* CAN Controller 2 */
#define PCI2C1 (1 << 19) /* The I2C1 interface power/clock control bit */
#define PCSSP0 (1 << 21) /* The SSP0 interface power/clock control bit */
#define PCTIM2 (1 << 22) /* Timer 2 */
#define PCTIM3 (1 << 23) /* Timer 3 */
#define PCUART2 (1 << 24) /* UART 2 */
#define PCUART3 (1 << 25) /* UART 3 */
#define PCI2C2 (1 << 26) /* I2C interface 2 */
#define PCI2S (1 << 27) /* I2S interface */
#define PCSDC (1 << 28) /* SD card interface */
#define PCGPDMA (1 << 29) /* GP DMA function */
#define PCENET (1 << 30) /* Ethernet block */
#define PCUSB (1 << 31) /* USB interface */
#define PCTIM0 (1 << 1) /* Timer/Counter 0 */
#define PCTIM1 (1 << 2) /* Timer/Counter 1 */
#define PCUART0 (1 << 3) /* UART0 power/clock */
#define PCUART1 (1 << 4) /* UART1 power/clock */
#define PCPWM1 (1 << 5) /* Unused, always 0 */
#define PWM1 (1 << 6) /* Pulse Width Modulation 1 */
#define PCI2C0 (1 << 7) /* I2C0 interface */
#define PCSPI (1 << 8) /* SPI */
#define PCRTC (1 << 9) /* Real Time Clock*/
#define PCSSP1 (1 << 10) /* SSP1 */
#define PCEMC (1 << 11) /* External Memory Controller */
#define PCAD (1 << 12) /* A/D converter (ADC) Note: Clear the PDN
* bit in the AD0CR before clearing this bit,
* and set this bit before setting PDN */
#define PCAN1 (1 << 13) /* CAN Controller 1 */
#define PCAN2 (1 << 14) /* CAN Controller 2 */
#define PCI2C1 (1 << 19) /* The I2C1 interface power/clock control bit */
#define PCSSP0 (1 << 21) /* The SSP0 interface power/clock control bit */
#define PCTIM2 (1 << 22) /* Timer 2 */
#define PCTIM3 (1 << 23) /* Timer 3 */
#define PCUART2 (1 << 24) /* UART 2 */
#define PCUART3 (1 << 25) /* UART 3 */
#define PCI2C2 (1 << 26) /* I2C interface 2 */
#define PCI2S (1 << 27) /* I2S interface */
#define PCSDC (1 << 28) /* SD card interface */
#define PCGPDMA (1 << 29) /* GP DMA function */
#define PCENET (1 << 30) /* Ethernet block */
#define PCUSB (1 << 31) /* USB interface */
/****************************************************************************************************
* Inline Functions
****************************************************************************************************/

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@ -136,7 +136,7 @@ static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
/* This describes the state of the LPC214X uart0 port. */
#ifdef CONFIG_UART0
#ifdef CONFIG_LPC2378_UART0
static struct up_dev_s g_uart0priv =
{
.uartbase = UART0_BASE_ADDR,
@ -164,7 +164,7 @@ static uart_dev_t g_uart0port =
};
#endif
#ifdef CONFIG_UART2
#ifdef CONFIG_LPC2378_UART2
/* This describes the state of the LPC23XX uart2 port. */

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@ -1,44 +0,0 @@
############################################################################
# configs/olimex-lpc2378/nsh/appconfig
#
# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
# Path to example in apps/examples containing the user_start entry point
CONFIGURED_APPS += examples/nsh
# The NSH library
CONFIGURED_APPS += system/readline
CONFIGURED_APPS += nshlib

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@ -1,189 +1,235 @@
############################################################################
# configs/olimex-lpc2378/nsh/defconfig
#
# Copyright (C) 2010 Rommel Marcelo. All rights reserved.
# Author: Rommel Marcelo
# Automatically generated file; DO NOT EDIT.
# Nuttx/ Configuration
#
# This is part of the NuttX RTOS and based on the LPC2148 port:
#
# Copyright (C) 2010 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
#
# Architecture selection
#
CONFIG_ARCH="arm"
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM7TDMI=y
CONFIG_ARCH_CHIP="lpc2378"
CONFIG_ARCH_CHIP_LPC2378=y
CONFIG_ARCH_BOARD="olimex-lpc2378"
CONFIG_ARCH_BOARD_OLIMEXLPC2378=y
CONFIG_ARCH_IRQPRIO=y
CONFIG_BOARD_LOOPSPERMSEC=3270
CONFIG_ARCH_LEDS=y
CONFIG_RAM_SIZE=32768
CONFIG_RAM_START=0x40000000
CONFIG_ARCH_INTERRUPTSTACK=0
CONFIG_ARCH_STACKDUMP=y
# Identify toolchain and linker options
#
CONFIG_OLIMEX_LPC2378_CODESOURCERYW=n
CONFIG_OLIMEX_LPC2378_CODESOURCERYL=y
CONFIG_OLIMEX_LPC2378_DEVKITARM=n
CONFIG_OLIMEX_LPC2378_BUILDROOT=n
CONFIG_NUTTX_NEWCONFIG=y
#
# LPC2378 specific chip initialization
#CONFIG_PLL_CLKSRC - identifies the clock source to use
# IRC = 0, MAIN = 1, RTC = 2
# Build Setup
#
CONFIG_EXTMEM_MODE=n
CONFIG_RAM_MODE=n
CONFIG_CODE_BASE=0x00000000
CONFIG_PLL_SETUP=y
CONFIG_PLL_CLKSRC= 1
CONFIG_MAM_SETUP=y
#TODO: CONFIG_EMC_SETUP=n
CONFIG_ADC_SETUP=n
CONFIG_USBDEV=n
CONFIG_UART0=y
CONFIG_UART2=y
# CONFIG_EXPERIMENTAL is not set
# CONFIG_DEFAULT_SMALL is not set
CONFIG_HOST_LINUX=y
# CONFIG_HOST_OSX is not set
# CONFIG_HOST_WINDOWS is not set
# CONFIG_HOST_OTHER is not set
#
# LPC23xx specific device driver settings
# Build Configuration
#
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART2_SERIAL_CONSOLE=n
CONFIG_UART0_TXBUFSIZE=128
CONFIG_UART2_TXBUFSIZE=256
CONFIG_UART0_RXBUFSIZE=128
CONFIG_UART2_RXBUFSIZE=256
# Baud Rate
CONFIG_UART0_BAUD=9600
CONFIG_UART2_BAUD=576000
# Data Bits
CONFIG_UART0_BITS=8
CONFIG_UART2_BITS=8
# Parity Bits
CONFIG_UART0_PARITY=0
CONFIG_UART2_PARITY=0
# 2 Stop Bits ?
CONFIG_UART0_2STOP=0
CONFIG_UART2_2STOP=0
# CONFIG_APPS_DIR="../apps"
# CONFIG_BUILD_2PASS is not set
#
# General build options
# Binary Output Formats
#
CONFIG_RRLOAD_BINARY=n
CONFIG_INTELHEX_BINARY=n
# CONFIG_RRLOAD_BINARY is not set
# CONFIG_INTELHEX_BINARY is not set
# CONFIG_MOTOROLA_SREC is not set
CONFIG_RAW_BINARY=y
#
# General OS setup
# Customize Header Files
#
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
#CONFIG_DEBUG_MM=y
#CONFIG_DEBUG_SCHED=y
CONFIG_DEBUG_FS=y
CONFIG_MM_REGIONS=1
CONFIG_ARCH_LOWPUTC=y
# CONFIG_ARCH_STDBOOL_H is not set
# CONFIG_ARCH_MATH_H is not set
# CONFIG_ARCH_FLOAT_H is not set
# CONFIG_ARCH_STDARG_H is not set
#
# Debug Options
#
# CONFIG_DEBUG is not set
CONFIG_ARCH_HAVE_STACKCHECK=y
# CONFIG_ARCH_HAVE_HEAPCHECK is not set
# CONFIG_DEBUG_SYMBOLS is not set
CONFIG_ARCH_HAVE_CUSTOMOPT=y
# CONFIG_DEBUG_NOOPT is not set
# CONFIG_DEBUG_CUSTOMOPT is not set
CONFIG_DEBUG_FULLOPT=y
#
# System Type
#
# CONFIG_ARCH_8051 is not set
CONFIG_ARCH_ARM=y
# CONFIG_ARCH_AVR is not set
# CONFIG_ARCH_HC is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_RGMP is not set
# CONFIG_ARCH_SH is not set
# CONFIG_ARCH_SIM is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_ARCH_Z16 is not set
# CONFIG_ARCH_Z80 is not set
CONFIG_ARCH="arm"
#
# ARM Options
#
# CONFIG_ARCH_CHIP_A1X is not set
# CONFIG_ARCH_CHIP_C5471 is not set
# CONFIG_ARCH_CHIP_CALYPSO is not set
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_IMX is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_KL is not set
# CONFIG_ARCH_CHIP_LM is not set
# CONFIG_ARCH_CHIP_LPC17XX is not set
# CONFIG_ARCH_CHIP_LPC214X is not set
CONFIG_ARCH_CHIP_LPC2378=y
# CONFIG_ARCH_CHIP_LPC31XX is not set
# CONFIG_ARCH_CHIP_LPC43XX is not set
# CONFIG_ARCH_CHIP_NUC1XX is not set
# CONFIG_ARCH_CHIP_SAMA5 is not set
# CONFIG_ARCH_CHIP_SAMD is not set
# CONFIG_ARCH_CHIP_SAM34 is not set
# CONFIG_ARCH_CHIP_STM32 is not set
# CONFIG_ARCH_CHIP_STR71X is not set
CONFIG_ARCH_ARM7TDMI=y
# CONFIG_ARCH_ARM926EJS is not set
# CONFIG_ARCH_ARM920T is not set
# CONFIG_ARCH_CORTEXM0 is not set
# CONFIG_ARCH_CORTEXM3 is not set
# CONFIG_ARCH_CORTEXM4 is not set
# CONFIG_ARCH_CORTEXA5 is not set
# CONFIG_ARCH_CORTEXA8 is not set
CONFIG_ARCH_FAMILY="arm"
CONFIG_ARCH_CHIP="lpc2378"
# CONFIG_ARCH_HAVE_FPU is not set
# CONFIG_ARCH_HAVE_MPU is not set
CONFIG_ARCH_HAVE_LOWVECTORS=y
# CONFIG_ARCH_LOWVECTORS is not set
#
# ARM Configuration Options
#
# CONFIG_ARM_TOOLCHAIN_BUILDROOT is not set
CONFIG_ARM_TOOLCHAIN_CODESOURCERYL=y
# CONFIG_ARM_TOOLCHAIN_GNU_EABIL is not set
# CONFIG_ARM_TOOLCHAIN_GNU_OABI is not set
#
# LPC2378 Configuration Options
#
CONFIG_LPC2378_DEFAULT_MODE=y
CONFIG_LPC2378_CODE_BASE=0x00000000
CONFIG_LPC2378_PLL_SETUP=y
CONFIG_LPC2378_PLL_CLKSRC=1
CONFIG_LPC2378_MAM_SETUP=y
#
# LPC2378 Peripheral Support
#
CONFIG_LPC2378_UART0=y
# CONFIG_LPC2378_UART1 is not set
CONFIG_LPC2378_UART2=y
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
# CONFIG_ARCH_VECNOTIRQ is not set
# CONFIG_ARCH_DMA is not set
# CONFIG_ARCH_HAVE_IRQPRIO is not set
# CONFIG_CUSTOM_STACK is not set
# CONFIG_ADDRENV is not set
CONFIG_ARCH_HAVE_VFORK=y
# CONFIG_ARCH_HAVE_MMU is not set
# CONFIG_ARCH_NAND_HWECC is not set
CONFIG_ARCH_STACKDUMP=y
# CONFIG_ENDIAN_BIG is not set
# CONFIG_ARCH_HAVE_RAMFUNCS is not set
# CONFIG_ARCH_HAVE_RAMVECTORS is not set
#
# Board Settings
#
CONFIG_BOARD_LOOPSPERMSEC=3270
# CONFIG_ARCH_CALIBRATION is not set
#
# Interrupt options
#
CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
CONFIG_ARCH_INTERRUPTSTACK=0
# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set
#
# Boot options
#
# CONFIG_BOOT_RUNFROMEXTSRAM is not set
CONFIG_BOOT_RUNFROMFLASH=y
# CONFIG_BOOT_RUNFROMISRAM is not set
# CONFIG_BOOT_RUNFROMSDRAM is not set
# CONFIG_BOOT_COPYTORAM is not set
#
# Boot Memory Configuration
#
CONFIG_RAM_START=0x40000000
CONFIG_RAM_SIZE=32768
# CONFIG_ARCH_HAVE_SDRAM is not set
#
# Board Selection
#
CONFIG_ARCH_BOARD_OLIMEXLPC2378=y
# CONFIG_ARCH_BOARD_CUSTOM is not set
CONFIG_ARCH_BOARD="olimex-lpc2378"
#
# Common Board Options
#
CONFIG_ARCH_HAVE_LEDS=y
CONFIG_ARCH_LEDS=y
CONFIG_NSH_MMCSDMINOR=0
#
# Board-Specific Options
#
#
# RTOS Features
#
# CONFIG_BOARD_INITIALIZE is not set
CONFIG_MSEC_PER_TICK=10
# CONFIG_SYSTEM_TIME64 is not set
CONFIG_RR_INTERVAL=0
CONFIG_SCHED_INSTRUMENTATION=n
# CONFIG_SCHED_CPULOAD is not set
# CONFIG_SCHED_INSTRUMENTATION is not set
CONFIG_TASK_NAME_SIZE=0
# CONFIG_SCHED_HAVE_PARENT is not set
# CONFIG_JULIAN_TIME is not set
CONFIG_START_YEAR=2010
CONFIG_START_MONTH=4
CONFIG_START_DAY=8
CONFIG_JULIAN_TIME=n
CONFIG_DEV_CONSOLE=y
CONFIG_DEV_LOWCONSOLE=
CONFIG_MUTEX_TYPES=n
CONFIG_PRIORITY_INHERITANCE=n
CONFIG_SEM_PREALLOCHOLDERS=0
CONFIG_SEM_NNESTPRIO=0
CONFIG_FDCLONE_DISABLE=n
CONFIG_FDCLONE_STDIO=n
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PRIORITY_INHERITANCE is not set
# CONFIG_FDCLONE_DISABLE is not set
# CONFIG_FDCLONE_STDIO is not set
CONFIG_SDCLONE_DISABLE=y
CONFIG_NXFLAT=n
#
# The following can be used to disable categories of
# APIs supported by the OS. If the compiler supports
# weak functions, then it should not be necessary to
# disable functions unless you want to restrict usage
# of those APIs.
#
# There are certain dependency relationships in these
# features.
#
# o mq_notify logic depends on signals to awaken tasks
# waiting for queues to become full or empty.
# o pthread_condtimedwait() depends on signals to wake
# up waiting tasks.
#
CONFIG_DISABLE_CLOCK=n
CONFIG_DISABLE_POSIX_TIMERS=n
CONFIG_DISABLE_PTHREAD=n
CONFIG_DISABLE_SIGNALS=n
CONFIG_DISABLE_MQUEUE=n
CONFIG_DISABLE_MOUNTPOINT=n
CONFIG_DISABLE_ENVIRON=n
CONFIG_DISABLE_POLL=y
# CONFIG_SCHED_WAITPID is not set
# CONFIG_SCHED_STARTHOOK is not set
# CONFIG_SCHED_ATEXIT is not set
# CONFIG_SCHED_ONEXIT is not set
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_DISABLE_OS_API=y
# CONFIG_DISABLE_CLOCK is not set
# CONFIG_DISABLE_POSIX_TIMERS is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_DISABLE_SIGNALS is not set
# CONFIG_DISABLE_MQUEUE is not set
# CONFIG_DISABLE_ENVIRON is not set
#
# Misc libc settings
# Signal Numbers
#
CONFIG_NOPRINTF_FIELDWIDTH=n
#
# Allow for architecture optimized implementations
#
# The architecture can provide optimized versions of the
# following to improve sysem performance
#
CONFIG_ARCH_MEMCPY=n
CONFIG_ARCH_MEMCMP=n
CONFIG_ARCH_MEMMOVE=n
CONFIG_ARCH_MEMSET=n
CONFIG_ARCH_STRCMP=n
CONFIG_ARCH_STRCPY=n
CONFIG_ARCH_STRNCPY=n
CONFIG_ARCH_STRLEN=n
CONFIG_ARCH_STRNLEN=n
CONFIG_ARCH_BZERO=n
CONFIG_SIG_SIGUSR1=1
CONFIG_SIG_SIGUSR2=2
CONFIG_SIG_SIGALARM=3
CONFIG_SIG_SIGCONDTIMEDOUT=16
#
# Sizes of configurable things (0 disables)
@ -194,8 +240,6 @@ CONFIG_NPTHREAD_KEYS=4
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NAME_MAX=32
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_NUNGET_CHARS=2
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_MQ_MAXMSGSIZE=32
CONFIG_MAX_WDOGPARMS=2
@ -203,69 +247,489 @@ CONFIG_PREALLOC_WDOGS=4
CONFIG_PREALLOC_TIMERS=4
#
# Filesystem configuration
#
CONFIG_FS_FAT=y
CONFIG_FS_ROMFS=n
#
# Maintain legacy build behavior (revisit)
#
CONFIG_MMCSD=y
CONFIG_MMCSD_SPI=y
CONFIG_MTD=y
#
# SPI-based MMC/SD driver
#
CONFIG_MMCSD_NSLOTS=1
CONFIG_MMCSD_READONLY=n
CONFIG_MMCSD_SPICLOCK=20000000
#
# Settings for examples/hello
CONFIG_EXAMPLES_OSTEST_LOOPS=1
CONFIG_EXAMPLES_OSTEST_STACKSIZE=4096
CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
# Settings for examples/serloop
CONFIG_EXAMPLES_SERLOOP_BUFIO=
#
# Settings for examples/nsh
#
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_STRERROR=n
CONFIG_NSH_LINELEN=64
CONFIG_NSH_NESTDEPTH=3
CONFIG_NSH_DISABLESCRIPT=n
CONFIG_NSH_DISABLEBG=n
CONFIG_NSH_ROMFSETC=n
CONFIG_NSH_CONSOLE=y
CONFIG_NSH_TELNET=n
CONFIG_NSH_ARCHINIT=n
CONFIG_NSH_IOBUFFER_SIZE=512
CONFIG_NSH_DHCPC=n
CONFIG_NSH_NOMAC=n
CONFIG_NSH_IPADDR=0x0a000002
CONFIG_NSH_DRIPADDR=0x0a000001
CONFIG_NSH_NETMASK=0xffffff00
CONFIG_NSH_ROMFSMOUNTPT="/etc"
CONFIG_NSH_INITSCRIPT="init.d/rcS"
CONFIG_NSH_ROMFSDEVNO=0
CONFIG_NSH_ROMFSSECTSIZE=64
CONFIG_NSH_FATDEVNO=1
CONFIG_NSH_FATSECTSIZE=512
CONFIG_NSH_FATNSECTORS=1024
CONFIG_NSH_FATMOUNTPT="/tmp"
# Stack and heap information
#
CONFIG_BOOT_COPYTORAM=n
CONFIG_CUSTOM_STACK=n
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_USERMAIN_STACKSIZE=2048
CONFIG_PTHREAD_STACK_MIN=256
CONFIG_PTHREAD_STACK_DEFAULT=2048
#
# Device Drivers
#
CONFIG_DISABLE_POLL=y
CONFIG_DEV_NULL=y
# CONFIG_DEV_ZERO is not set
# CONFIG_LOOP is not set
# CONFIG_RAMDISK is not set
# CONFIG_CAN is not set
# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
# CONFIG_PWM is not set
# CONFIG_ARCH_HAVE_I2CRESET is not set
# CONFIG_I2C is not set
# CONFIG_SPI is not set
# CONFIG_I2S is not set
# CONFIG_RTC is not set
# CONFIG_WATCHDOG is not set
# CONFIG_ANALOG is not set
# CONFIG_AUDIO_DEVICES is not set
# CONFIG_VIDEO_DEVICES is not set
# CONFIG_BCH is not set
# CONFIG_INPUT is not set
# CONFIG_LCD is not set
# CONFIG_MMCSD is not set
# CONFIG_MTD is not set
# CONFIG_PIPES is not set
# CONFIG_PM is not set
# CONFIG_POWER is not set
# CONFIG_SENSORS is not set
# CONFIG_SERCOMM_CONSOLE is not set
CONFIG_SERIAL=y
# CONFIG_DEV_LOWCONSOLE is not set
# CONFIG_16550_UART is not set
CONFIG_ARCH_HAVE_UART0=y
CONFIG_ARCH_HAVE_UART1=y
CONFIG_ARCH_HAVE_UART2=y
#
# USART Configuration
#
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_UART0_SERIAL_CONSOLE=y
# CONFIG_UART1_SERIAL_CONSOLE is not set
# CONFIG_UART2_SERIAL_CONSOLE is not set
# CONFIG_NO_SERIAL_CONSOLE is not set
#
# UART0 Configuration
#
CONFIG_UART0_RXBUFSIZE=128
CONFIG_UART0_TXBUFSIZE=128
CONFIG_UART0_BAUD=9600
CONFIG_UART0_BITS=8
CONFIG_UART0_PARITY=0
CONFIG_UART0_2STOP=0
# CONFIG_UART0_IFLOWCONTROL is not set
# CONFIG_UART0_OFLOWCONTROL is not set
#
# UART1 Configuration
#
CONFIG_UART1_RXBUFSIZE=256
CONFIG_UART1_TXBUFSIZE=256
CONFIG_UART1_BAUD=115200
CONFIG_UART1_BITS=8
CONFIG_UART1_PARITY=0
CONFIG_UART1_2STOP=0
# CONFIG_UART1_IFLOWCONTROL is not set
# CONFIG_UART1_OFLOWCONTROL is not set
#
# UART2 Configuration
#
CONFIG_UART2_RXBUFSIZE=256
CONFIG_UART2_TXBUFSIZE=256
CONFIG_UART2_BAUD=576000
CONFIG_UART2_BITS=8
CONFIG_UART2_PARITY=0
CONFIG_UART2_2STOP=0
# CONFIG_UART2_IFLOWCONTROL is not set
# CONFIG_UART2_OFLOWCONTROL is not set
# CONFIG_SERIAL_IFLOWCONTROL is not set
# CONFIG_SERIAL_OFLOWCONTROL is not set
# CONFIG_USBDEV is not set
# CONFIG_USBHOST is not set
# CONFIG_WIRELESS is not set
#
# System Logging Device Options
#
#
# System Logging
#
# CONFIG_RAMLOG is not set
#
# Networking Support
#
# CONFIG_ARCH_HAVE_NET is not set
# CONFIG_ARCH_HAVE_PHY is not set
# CONFIG_NET is not set
#
# File Systems
#
#
# File system configuration
#
# CONFIG_DISABLE_MOUNTPOINT is not set
# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
# CONFIG_FS_READABLE is not set
# CONFIG_FS_WRITABLE is not set
# CONFIG_FS_RAMMAP is not set
# CONFIG_FS_FAT is not set
# CONFIG_FS_NXFFS is not set
# CONFIG_FS_ROMFS is not set
# CONFIG_FS_SMARTFS is not set
# CONFIG_FS_PROCFS is not set
#
# System Logging
#
# CONFIG_SYSLOG_ENABLE is not set
# CONFIG_SYSLOG is not set
#
# Graphics Support
#
# CONFIG_NX is not set
#
# Memory Management
#
# CONFIG_MM_MULTIHEAP is not set
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=1
# CONFIG_ARCH_HAVE_HEAP2 is not set
# CONFIG_GRAN is not set
#
# Audio Support
#
# CONFIG_AUDIO is not set
#
# Binary Formats
#
# CONFIG_BINFMT_DISABLE is not set
# CONFIG_BINFMT_EXEPATH is not set
# CONFIG_NXFLAT is not set
# CONFIG_ELF is not set
# CONFIG_BUILTIN is not set
# CONFIG_PIC is not set
# CONFIG_SYMTAB_ORDEREDBYNAME is not set
#
# Library Routines
#
#
# Standard C Library Options
#
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
CONFIG_LIB_HOMEDIR="/"
# CONFIG_LIBM is not set
# CONFIG_NOPRINTF_FIELDWIDTH is not set
# CONFIG_LIBC_FLOATINGPOINT is not set
CONFIG_LIB_RAND_ORDER=1
# CONFIG_EOL_IS_CR is not set
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_ARCH_LOWPUTC=y
CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
#
# Non-standard Library Support
#
# CONFIG_SCHED_WORKQUEUE is not set
# CONFIG_LIB_KBDCODEC is not set
# CONFIG_LIB_SLCDCODEC is not set
#
# Basic CXX Support
#
# CONFIG_C99_BOOL8 is not set
# CONFIG_HAVE_CXX is not set
#
# Application Configuration
#
#
# Built-In Applications
#
#
# Examples
#
# CONFIG_EXAMPLES_BUTTONS is not set
# CONFIG_EXAMPLES_CAN is not set
# CONFIG_EXAMPLES_CONFIGDATA is not set
# CONFIG_EXAMPLES_DHCPD is not set
# CONFIG_EXAMPLES_ELF is not set
# CONFIG_EXAMPLES_FTPC is not set
# CONFIG_EXAMPLES_FTPD is not set
# CONFIG_EXAMPLES_HELLO is not set
# CONFIG_EXAMPLES_HELLOXX is not set
# CONFIG_EXAMPLES_JSON is not set
# CONFIG_EXAMPLES_HIDKBD is not set
# CONFIG_EXAMPLES_KEYPADTEST is not set
# CONFIG_EXAMPLES_IGMP is not set
# CONFIG_EXAMPLES_LCDRW is not set
# CONFIG_EXAMPLES_MM is not set
# CONFIG_EXAMPLES_MODBUS is not set
# CONFIG_EXAMPLES_MOUNT is not set
# CONFIG_EXAMPLES_NRF24L01TERM is not set
CONFIG_EXAMPLES_NSH=y
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
# CONFIG_EXAMPLES_NXCONSOLE is not set
# CONFIG_EXAMPLES_NXFFS is not set
# CONFIG_EXAMPLES_NXFLAT is not set
# CONFIG_EXAMPLES_NXHELLO is not set
# CONFIG_EXAMPLES_NXIMAGE is not set
# CONFIG_EXAMPLES_NXLINES is not set
# CONFIG_EXAMPLES_NXTEXT is not set
# CONFIG_EXAMPLES_OSTEST is not set
# CONFIG_EXAMPLES_PASHELLO is not set
# CONFIG_EXAMPLES_PIPE is not set
# CONFIG_EXAMPLES_POLL is not set
# CONFIG_EXAMPLES_POSIXSPAWN is not set
# CONFIG_EXAMPLES_QENCODER is not set
# CONFIG_EXAMPLES_RGMP is not set
# CONFIG_EXAMPLES_ROMFS is not set
# CONFIG_EXAMPLES_SENDMAIL is not set
# CONFIG_EXAMPLES_SERLOOP is not set
# CONFIG_EXAMPLES_SLCD is not set
# CONFIG_EXAMPLES_SMART is not set
# CONFIG_EXAMPLES_TCPECHO is not set
# CONFIG_EXAMPLES_TELNETD is not set
# CONFIG_EXAMPLES_THTTPD is not set
# CONFIG_EXAMPLES_TIFF is not set
# CONFIG_EXAMPLES_TOUCHSCREEN is not set
# CONFIG_EXAMPLES_UDP is not set
# CONFIG_EXAMPLES_UIP is not set
# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
#
# Graphics Support
#
# CONFIG_TIFF is not set
#
# Interpreters
#
# CONFIG_INTERPRETERS_FICL is not set
# CONFIG_INTERPRETERS_PCODE is not set
#
# Network Utilities
#
#
# Networking Utilities
#
# CONFIG_NETUTILS_CODECS is not set
# CONFIG_NETUTILS_DHCPD is not set
# CONFIG_NETUTILS_FTPC is not set
# CONFIG_NETUTILS_FTPD is not set
# CONFIG_NETUTILS_JSON is not set
# CONFIG_NETUTILS_SMTP is not set
# CONFIG_NETUTILS_TFTPC is not set
# CONFIG_NETUTILS_THTTPD is not set
# CONFIG_NETUTILS_UIPLIB is not set
# CONFIG_NETUTILS_WEBCLIENT is not set
#
# FreeModBus
#
# CONFIG_MODBUS is not set
#
# NSH Library
#
CONFIG_NSH_LIBRARY=y
CONFIG_NSH_READLINE=y
# CONFIG_NSH_CLE is not set
#
# Disable Individual commands
#
# CONFIG_NSH_DISABLE_ADDROUTE is not set
# CONFIG_NSH_DISABLE_CAT is not set
# CONFIG_NSH_DISABLE_CD is not set
# CONFIG_NSH_DISABLE_CP is not set
# CONFIG_NSH_DISABLE_CMP is not set
# CONFIG_NSH_DISABLE_DD is not set
# CONFIG_NSH_DISABLE_DF is not set
# CONFIG_NSH_DISABLE_DELROUTE is not set
# CONFIG_NSH_DISABLE_ECHO is not set
# CONFIG_NSH_DISABLE_EXEC is not set
# CONFIG_NSH_DISABLE_EXIT is not set
# CONFIG_NSH_DISABLE_FREE is not set
# CONFIG_NSH_DISABLE_GET is not set
# CONFIG_NSH_DISABLE_HELP is not set
# CONFIG_NSH_DISABLE_HEXDUMP is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_KILL is not set
# CONFIG_NSH_DISABLE_LOSETUP is not set
# CONFIG_NSH_DISABLE_LS is not set
# CONFIG_NSH_DISABLE_MB is not set
# CONFIG_NSH_DISABLE_MKDIR is not set
# CONFIG_NSH_DISABLE_MKFIFO is not set
# CONFIG_NSH_DISABLE_MKRD is not set
# CONFIG_NSH_DISABLE_MH is not set
# CONFIG_NSH_DISABLE_MOUNT is not set
# CONFIG_NSH_DISABLE_MW is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NSH_DISABLE_PUT is not set
# CONFIG_NSH_DISABLE_PWD is not set
# CONFIG_NSH_DISABLE_RM is not set
# CONFIG_NSH_DISABLE_RMDIR is not set
# CONFIG_NSH_DISABLE_SET is not set
# CONFIG_NSH_DISABLE_SH is not set
# CONFIG_NSH_DISABLE_SLEEP is not set
# CONFIG_NSH_DISABLE_TEST is not set
# CONFIG_NSH_DISABLE_UMOUNT is not set
# CONFIG_NSH_DISABLE_UNSET is not set
# CONFIG_NSH_DISABLE_USLEEP is not set
# CONFIG_NSH_DISABLE_WGET is not set
# CONFIG_NSH_DISABLE_XD is not set
#
# Configure Command Options
#
CONFIG_NSH_CMDOPT_DF_H=y
CONFIG_NSH_CODECS_BUFSIZE=128
CONFIG_NSH_CMDOPT_HEXDUMP=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
# CONFIG_NSH_DISABLE_SEMICOLON is not set
CONFIG_NSH_CMDPARMS=y
CONFIG_NSH_TMPDIR="/tmp"
CONFIG_NSH_MAXARGUMENTS=6
CONFIG_NSH_ARGCAT=y
CONFIG_NSH_NESTDEPTH=3
# CONFIG_NSH_DISABLESCRIPT is not set
# CONFIG_NSH_DISABLE_ITEF is not set
# CONFIG_NSH_DISABLE_LOOPS is not set
# CONFIG_NSH_DISABLEBG is not set
CONFIG_NSH_CONSOLE=y
#
# USB Trace Support
#
# CONFIG_NSH_CONDEV is not set
# CONFIG_NSH_ARCHINIT is not set
#
# NxWidgets/NxWM
#
#
# Platform-specific Support
#
# CONFIG_PLATFORM_CONFIGDATA is not set
#
# System Libraries and NSH Add-Ons
#
#
# USB CDC/ACM Device Commands
#
#
# USB Composite Device Commands
#
#
# Custom Free Memory Command
#
# CONFIG_SYSTEM_FREE is not set
#
# I2C tool
#
#
# INI File Parser
#
# CONFIG_SYSTEM_INIFILE is not set
#
# FLASH Program Installation
#
# CONFIG_SYSTEM_INSTALL is not set
#
# FLASH Erase-all Command
#
#
# NxPlayer media player library / command Line
#
# CONFIG_SYSTEM_NXPLAYER is not set
#
# RAM test
#
# CONFIG_SYSTEM_RAMTEST is not set
#
# readline()
#
CONFIG_SYSTEM_READLINE=y
CONFIG_READLINE_ECHO=y
#
# Power Off
#
# CONFIG_SYSTEM_POWEROFF is not set
#
# RAMTRON
#
# CONFIG_SYSTEM_RAMTRON is not set
#
# SD Card
#
# CONFIG_SYSTEM_SDCARD is not set
#
# Sysinfo
#
# CONFIG_SYSTEM_SYSINFO is not set
#
# USB Monitor
#
#
# EMACS-like Command Line Editor
#
# CONFIG_SYSTEM_CLE is not set
#
# VI Work-Alike Editor
#
# CONFIG_SYSTEM_VI is not set
#
# Stack Monitor
#
#
# USB Mass Storage Device Commands
#
#
# Zmodem Commands
#
# CONFIG_SYSTEM_ZMODEM is not set

View file

@ -6,7 +6,7 @@
*
* This is part of the NuttX RTOS and based on the LPC2148 port:
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -48,34 +48,25 @@
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
//~ #define LPC23XX_FIO_BASE 0x3fffc000 /* Fast I/O 0 base address */
/****************************************************************************
* Definitions
* Pre-processor Definitions
****************************************************************************/
/* P3.0 : P0.7 PINSEL6 LEDS 1-8 */
#define LEDBIT(led) (0x01 << (led))
#define ALL_LEDS (0xFF)
#define STATLED (0x08)
//~ #ifdef CONFIG_LPC23XX_FIO
# define putled8(v,o) putreg8((v), (LPC23XX_FIO_BASE+(o)))
# define putled32(v,r) putreg32((v),(LPC23XX_FIO_BASE+(r)))
# define CLRLEDS putled(ALL_LEDS,FIO3CLR0_OFFSET)
# define LED_SET_OFFSET FIO3SET0_OFFSET
# define LED_CLR_OFFSET FIO3CLR0_OFFSET
# define LED_DIR_OFFSET FIO3DIR0_OFFSET
# define LED_MASK_OFFSET FIO3MASK0_OFFSET
#define LEDBIT(led) (0x01 << (led))
#define ALL_LEDS (0xff)
#define STATLED (0x08)
//~ #else
//~ # define putled(v,r) putreg32((v),(LPC23XX_GPIO1_BASE+(r)))
//~ # define CLRLEDS putled(STATLED,LPC23XX_GPIO1_SET_OFFSET)
//~
//~ # define LED_SET_OFFSET LPC23XX_GPIO_SET_OFFSET
//~ # define LED_CLR_OFFSET LPC23XX_GPIO_CLR_OFFSET
//~ # define LED_DIR_OFFSET LPC23XX_GPIO_DIR_OFFSET
//~ #endif
#define putled8(v,o) putreg8((v), (LPC23XX_FIO_BASE+(o)))
#define putled32(v,r) putreg32((v),(LPC23XX_FIO_BASE+(r)))
#define CLRLEDS putled(ALL_LEDS,FIO3CLR0_OFFSET)
#define LED_SET_OFFSET FIO3SET0_OFFSET
#define LED_CLR_OFFSET FIO3CLR0_OFFSET
#define LED_DIR_OFFSET FIO3DIR0_OFFSET
#define LED_MASK_OFFSET FIO3MASK0_OFFSET
/****************************************************************************
* Private Data
@ -86,7 +77,7 @@
****************************************************************************/
/****************************************************************************
* Public Funtions
* Public Functions
****************************************************************************/
/****************************************************************************
@ -96,7 +87,7 @@
#ifdef CONFIG_ARCH_LEDS
void board_led_initialize(void)
{
/* Initilize GIOs P1.16-P1.23 */
/* Initialize GIOs P1.16-P1.23 */
putled8(ALL_LEDS, LED_DIR_OFFSET);
putled8(ALL_LEDS, LED_CLR_OFFSET);