From 6a9f10327f941b94973ab509379a6ea25a0d362b Mon Sep 17 00:00:00 2001 From: leocafonso Date: Mon, 5 Oct 2026 10:55:10 -0700 Subject: [PATCH] boards/arm/ra8m1/ek-ra8m1: Add SCI0 pins and a serial-test config board.h gains GPIO_SCI0_RX/TX (P610/P609, SCI0 pin group 3), needed to exercise CONFIG_RA_SCI0_UART on this board at all -- previously only SCI9's console pins existed. The new serial-test defconfig builds on nsh with SCI0 enabled as /dev/ttyS1 with its FIFO (CONFIG_RA_SCI0_FIFO, measured on hardware as the best overrun-resistant setting: TTRG=15, RXTRG=0), 1024-byte RX/TX ring buffers (up from the 256-byte default, to better absorb bursts during testing), CONFIG_SERIAL_TERMIOS + apps/system/stty (to change its baud rate live), and apps/examples/serialblaster + serialrx pointed at it, for exercising the SCI_B driver's FIFO/overrun-recovery paths independently of the SCI9 console. Co-Authored-By: Claude Sonnet 5 Assisted-by: Claude:claude-sonnet-5 Signed-off-by: leocafonso --- .../ek-ra8m1/configs/serial-test/defconfig | 53 +++++++++++++++++++ boards/arm/ra8m1/ek-ra8m1/include/board.h | 3 ++ 2 files changed, 56 insertions(+) create mode 100644 boards/arm/ra8m1/ek-ra8m1/configs/serial-test/defconfig diff --git a/boards/arm/ra8m1/ek-ra8m1/configs/serial-test/defconfig b/boards/arm/ra8m1/ek-ra8m1/configs/serial-test/defconfig new file mode 100644 index 00000000000..a48af98a7fd --- /dev/null +++ b/boards/arm/ra8m1/ek-ra8m1/configs/serial-test/defconfig @@ -0,0 +1,53 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="ek-ra8m1" +CONFIG_ARCH_BOARD_EK_RA8M1=y +CONFIG_ARCH_CHIP="ra8m1" +CONFIG_ARCH_CHIP_R7FA8M1AHECBD=y +CONFIG_ARCH_CHIP_RA8M1=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=43103 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_SERIALBLASTER=y +CONFIG_EXAMPLES_SERIALBLASTER_DEVPATH="/dev/ttyS1" +CONFIG_EXAMPLES_SERIALRX=y +CONFIG_EXAMPLES_SERIALRX_DEVPATH="/dev/ttyS1" +CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=917504 +CONFIG_RAM_START=0x22000000 +CONFIG_RA_SCI0_FIFO=y +CONFIG_RA_SCI0_FIFO_RXTRG=0 +CONFIG_RA_SCI0_FIFO_TXTRG=15 +CONFIG_RA_SCI0_UART=y +CONFIG_RA_SCI9_UART=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SCI0_RXBUFSIZE=1024 +CONFIG_SCI0_TXBUFSIZE=1024 +CONFIG_SCI9_SERIAL_CONSOLE=y +CONFIG_SERIAL_TERMIOS=y +CONFIG_START_DAY=28 +CONFIG_START_MONTH=6 +CONFIG_START_YEAR=2013 +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_STTY=y +CONFIG_TASK_NAME_SIZE=32 +CONFIG_TESTING_OSTEST=y +CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3 +CONFIG_TESTING_OSTEST_STACKSIZE=2048 diff --git a/boards/arm/ra8m1/ek-ra8m1/include/board.h b/boards/arm/ra8m1/ek-ra8m1/include/board.h index 881c3eed67f..c2e1d16dcf3 100644 --- a/boards/arm/ra8m1/ek-ra8m1/include/board.h +++ b/boards/arm/ra8m1/ek-ra8m1/include/board.h @@ -321,6 +321,9 @@ #define GPIO_SCI9_RX GPIO_RXD9_MISO9_SCL9_3 /* PA15 */ #define GPIO_SCI9_TX GPIO_TXD9_MOSI9_SDA9_3 /* PA14 */ +#define GPIO_SCI0_RX GPIO_RXD0_MISO0_SCL0_3 /* P610 */ +#define GPIO_SCI0_TX GPIO_TXD0_MOSI0_SDA0_3 /* P609 */ + /* Arduino shield header pin selections *************************************/ /* D2-D5 are wired as inputs, D6-D13 as outputs (see