From 5c5df7aefe2c17e6311ea425bd307865be56a958 Mon Sep 17 00:00:00 2001
From: David Sidrane <david_s5@usa.net>
Date: Tue, 21 Jul 2015 11:25:29 -0600
Subject: [PATCH] STM32 F229: Fix bad inclusion guard in a header file

---
 arch/arm/src/stm32/chip/stm32f42xxx_syscfg.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/src/stm32/chip/stm32f42xxx_syscfg.h b/arch/arm/src/stm32/chip/stm32f42xxx_syscfg.h
index 72c83ef48aa..93ed8b8da03 100644
--- a/arch/arm/src/stm32/chip/stm32f42xxx_syscfg.h
+++ b/arch/arm/src/stm32/chip/stm32f42xxx_syscfg.h
@@ -1,5 +1,5 @@
 /****************************************************************************************************
- * arch/arm/src/stm32/chip/stm32f40xxx_syscfg.h
+ * arch/arm/src/stm32/chip/stm32f42xxx_syscfg.h
  *
  *   Copyright (C) 2014-2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,8 +33,8 @@
  *
  ****************************************************************************************************/
 
-#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F40XXX_SYSCFG_H
-#define __ARCH_ARM_SRC_STM32_CHIP_STM32F40XXX_SYSCFG_H
+#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F42XXX_SYSCFG_H
+#define __ARCH_ARM_SRC_STM32_CHIP_STM32F42XXX_SYSCFG_H
 
 /****************************************************************************************************
  * Included Files
@@ -151,4 +151,4 @@
 #define SYSCFG_CMPCR_READY            (1 << 8)  /* Bit 8: Compensation cell ready flag */
 
 #endif /* CONFIG_STM32_STM32F427 || CONFIG_STM32_STM32F429 */
-#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F40XXX_SYSCFG_H */
+#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F42XXX_SYSCFG_H */