diff --git a/arch/arm/src/imxrt/imxrt_usdhc.c b/arch/arm/src/imxrt/imxrt_usdhc.c index 9e72b016b46..d8425a5b2dc 100644 --- a/arch/arm/src/imxrt/imxrt_usdhc.c +++ b/arch/arm/src/imxrt/imxrt_usdhc.c @@ -41,6 +41,7 @@ #include +#include #include #include #include @@ -1159,7 +1160,8 @@ static int imxrt_interrupt(int irq, void *context, FAR void *arg) regval = getreg32(priv->addr + IMXRT_USDHC_IRQSIGEN_OFFSET); enabled = getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET) & regval; - mcinfo("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n", + mcinfo("IRQSTAT: %08" PRIx32 " IRQSIGEN %08" PRIx32 + " enabled: %08" PRIx32 "\n", getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET), regval, enabled); /* Clear all pending interrupts */ @@ -1378,7 +1380,8 @@ static void imxrt_reset(FAR struct sdio_dev_s *dev) putreg32(USDHC_INT_ALL, priv->addr + IMXRT_USDHC_IRQSTATEN_OFFSET); - mcinfo("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n", + mcinfo("SYSCTL: %08" PRIx32 " PRSSTAT: %08" PRIx32 + " IRQSTATEN: %08" PRIx32 "\n", getreg32(priv->addr + IMXRT_USDHC_SYSCTL_OFFSET), getreg32(priv->addr + IMXRT_USDHC_PRSSTAT_OFFSET), getreg32(priv->addr + IMXRT_USDHC_IRQSTATEN_OFFSET)); @@ -1724,7 +1727,7 @@ static void imxrt_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate) /* Clear the prescaler and divisor settings */ putreg32(regval, priv->addr + IMXRT_USDHC_SYSCTL_OFFSET); - mcinfo("DISABLED, SYSCTRL: %08x\n", + mcinfo("DISABLED, SYSCTRL: %08" PRIx32 "\n", getreg32(priv->addr + IMXRT_USDHC_SYSCTL_OFFSET)); return; } break; @@ -1787,7 +1790,7 @@ static void imxrt_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate) { } - mcinfo("SYSCTRL: %08x\n", + mcinfo("SYSCTRL: %08" PRIx32 "\n", getreg32(priv->addr + IMXRT_USDHC_SYSCTL_OFFSET)); } @@ -2052,7 +2055,8 @@ static int imxrt_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, regval |= USDHC_XFERTYP_CMDTYP_ABORT; } - mcinfo("cmd: %08x arg: %08x regval: %08x mcrval: %08x\n", cmd, arg, + mcinfo("cmd: %08" PRIx32 " arg: %08" PRIx32 + " regval: %08" PRIx32 " mcrval: %08" PRIx32 "\n", cmd, arg, regval, mcrregval); /* If there has been a response error then perform a reset and wait for it @@ -2089,7 +2093,8 @@ static int imxrt_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, elapsed = clock_systime_ticks() - start; if (elapsed >= timeout) { - mcerr("ERROR: Timeout (waiting CIHB) cmd: %08x PRSSTAT: %08x\n", + mcerr("ERROR: Timeout (waiting CIHB) cmd: %08" PRIx32 + " PRSSTAT: %08" PRIx32 "\n", cmd, getreg32(priv->addr + IMXRT_USDHC_PRSSTAT_OFFSET)); return -EBUSY; } @@ -2131,7 +2136,7 @@ static void imxrt_blocksetup(FAR struct sdio_dev_s *dev, { FAR struct imxrt_dev_s *priv = (FAR struct imxrt_dev_s *)dev; - mcinfo("blocklen=%ld, total transfer=%ld (%ld blocks)\n", blocklen, + mcinfo("blocklen=%d, total transfer=%d (%d blocks)\n", blocklen, blocklen * nblocks, nblocks); /* Configure block size for next transfer */ @@ -2370,7 +2375,8 @@ static int imxrt_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd) elapsed = clock_systime_ticks() - start; if (elapsed >= timeout) { - mcerr("ERROR: Timeout cmd: %08x IRQSTAT: %08x\n", cmd, + mcerr("ERROR: Timeout cmd: %08" PRIx32 + " IRQSTAT: %08" PRIx32 "\n", cmd, getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET)); ret = -ETIMEDOUT; break; @@ -2382,7 +2388,8 @@ static int imxrt_waitresponse(FAR struct sdio_dev_s *dev, uint32_t cmd) enerrors = getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET) & errors; if (enerrors != 0) { - mcerr("ERROR: cmd: %08x errors: %08x, fired %08x IRQSTAT: %08x\n", + mcerr("ERROR: cmd: %08" PRIx32 " errors: %08" PRIx32 ", " + "fired %08" PRIx32 " IRQSTAT: %08" PRIx32 "\n", cmd, errors, enerrors, getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET)); @@ -2457,7 +2464,7 @@ static int imxrt_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R5_RESPONSE && (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R6_RESPONSE) { - mcerr("ERROR: Wrong response CMD=%08x\n", cmd); + mcerr("ERROR: Wrong response CMD=%08" PRIx32 "\n", cmd); ret = -EINVAL; } else @@ -2468,12 +2475,12 @@ static int imxrt_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd, regval = getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET); if ((regval & USDHC_INT_CTOE) != 0) { - mcerr("ERROR: Command timeout: %08x\n", regval); + mcerr("ERROR: Command timeout: %08" PRIx32 "\n", regval); ret = -ETIMEDOUT; } else if ((regval & USDHC_INT_CCE) != 0) { - mcerr("ERROR: CRC failure: %08x\n", regval); ret = -EIO; + mcerr("ERROR: CRC failure: %08" PRIx32 "\n", regval); ret = -EIO; } } @@ -2506,7 +2513,7 @@ static int imxrt_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, if ((cmd & MMCSD_RESPONSE_MASK) != MMCSD_R2_RESPONSE) { - mcerr("ERROR: Wrong response CMD=%08x\n", cmd); + mcerr("ERROR: Wrong response CMD=%08" PRIx32 "\n", cmd); ret = -EINVAL; } else @@ -2517,12 +2524,12 @@ static int imxrt_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd, regval = getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET); if (regval & USDHC_INT_CTOE) { - mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval); + mcerr("ERROR: Timeout IRQSTAT: %08" PRIx32 "\n", regval); ret = -ETIMEDOUT; } else if (regval & USDHC_INT_CCE) { - mcerr("ERROR: CRC fail IRQSTAT: %08x\n", regval); + mcerr("ERROR: CRC fail IRQSTAT: %08" PRIx32 "\n", regval); ret = -EIO; } } @@ -2567,7 +2574,7 @@ static int imxrt_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R4_RESPONSE && (cmd & MMCSD_RESPONSE_MASK) != MMCSD_R7_RESPONSE) { - mcerr("ERROR: Wrong response CMD=%08x\n", cmd); + mcerr("ERROR: Wrong response CMD=%08" PRIx32 "\n", cmd); ret = -EINVAL; } else @@ -2580,7 +2587,7 @@ static int imxrt_recvshort(FAR struct sdio_dev_s *dev, uint32_t cmd, regval = getreg32(priv->addr + IMXRT_USDHC_IRQSTAT_OFFSET); if (regval & USDHC_INT_CTOE) { - mcerr("ERROR: Timeout IRQSTAT: %08x\n", regval); + mcerr("ERROR: Timeout IRQSTAT: %08" PRIx32 "\n", regval); ret = -ETIMEDOUT; } }