From 4813b9d751f1d8088b4a6ff16e65e30475f376cd Mon Sep 17 00:00:00 2001 From: taikoyaP Date: Mon, 27 Jan 2020 14:56:17 +0000 Subject: [PATCH] arch/arm/src/stm32l4/stm32l4_flash.c: Fix flash_erase(page) when page >= 256 (#170) All STM32L4 MPUs have FLASH_CR_PNB bits (8 bits), and some MPUs have FLASH_CR_BKER bit to change bank if page >= 256. The code wasn't setting or clearing FLASH_CR_BKER correctly. --- arch/arm/src/stm32l4/stm32l4_flash.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/stm32l4/stm32l4_flash.c b/arch/arm/src/stm32l4/stm32l4_flash.c index 633d79fce4c..dcb75e60aac 100644 --- a/arch/arm/src/stm32l4/stm32l4_flash.c +++ b/arch/arm/src/stm32l4/stm32l4_flash.c @@ -176,7 +176,21 @@ static inline void flash_erase(size_t page) finfo("erase page %u\n", page); modifyreg32(STM32L4_FLASH_CR, 0, FLASH_CR_PAGE_ERASE); - modifyreg32(STM32L4_FLASH_CR, FLASH_CR_PNB_MASK, FLASH_CR_PNB(page)); + modifyreg32(STM32L4_FLASH_CR, FLASH_CR_PNB_MASK, FLASH_CR_PNB(page & 0xff)); + +#if defined(CONFIG_STM32L4_STM32L4X5) || \ + defined(CONFIG_STM32L4_STM32L4X6) || \ + defined(CONFIG_STM32L4_STM32L4XR) + if (page <= 0xff) + { + modifyreg32(STM32L4_FLASH_CR, FLASH_CR_BKER, 0); + } + else + { + modifyreg32(STM32L4_FLASH_CR, 0, FLASH_CR_BKER); + } +#endif + modifyreg32(STM32L4_FLASH_CR, 0, FLASH_CR_START); while (getreg32(STM32L4_FLASH_SR) & FLASH_SR_BSY)