diff --git a/arch/arm/src/nrf52/nrf52_ppi.c b/arch/arm/src/nrf52/nrf52_ppi.c index dcc6d41687e..1a8f412dcdc 100644 --- a/arch/arm/src/nrf52/nrf52_ppi.c +++ b/arch/arm/src/nrf52/nrf52_ppi.c @@ -79,33 +79,33 @@ void nrf52_ppi_channel_enable(uint8_t ch, bool enable) * Name: nrf52_ppi_set_event_ep ****************************************************************************/ -void nrf52_ppi_set_event_ep(uint8_t ch, volatile uint32_t *event_reg) +void nrf52_ppi_set_event_ep(uint8_t ch, uint32_t event_reg) { DEBUGASSERT(ch < NRF52_PPI_NUM_CONFIGURABLE_CHANNELS); - putreg32((uint32_t)event_reg, NRF52_PPI_CHEEP(ch)); + putreg32(event_reg, NRF52_PPI_CHEEP(ch)); } /**************************************************************************** * Name: nrf52_ppi_set_task_ep ****************************************************************************/ -void nrf52_ppi_set_task_ep(uint8_t ch, volatile uint32_t *task_reg) +void nrf52_ppi_set_task_ep(uint8_t ch, uint32_t task_reg) { DEBUGASSERT(ch < NRF52_PPI_NUM_CONFIGURABLE_CHANNELS); - putreg32((uint32_t)task_reg, NRF52_PPI_CHTEP(ch)); + putreg32(task_reg, NRF52_PPI_CHTEP(ch)); } /**************************************************************************** * Name: nrf52_ppi_set_task2_ep ****************************************************************************/ -void nrf52_ppi_set_task2_ep(uint8_t ch, volatile uint32_t *task_reg) +void nrf52_ppi_set_task2_ep(uint8_t ch, uint32_t task_reg) { DEBUGASSERT(ch < NRF52_PPI_NUM_CHANNELS); - putreg32((uint32_t)task_reg, NRF52_PPI_FORKTEP(ch)); + putreg32(task_reg, NRF52_PPI_FORKTEP(ch)); } /**************************************************************************** diff --git a/arch/arm/src/nrf52/nrf52_ppi.h b/arch/arm/src/nrf52/nrf52_ppi.h index 299eda8ac55..81c1ed46930 100644 --- a/arch/arm/src/nrf52/nrf52_ppi.h +++ b/arch/arm/src/nrf52/nrf52_ppi.h @@ -86,7 +86,7 @@ void nrf52_ppi_channel_enable(uint8_t ch, bool enable); * ****************************************************************************/ -void nrf52_ppi_set_event_ep(uint8_t ch, volatile uint32_t *event_reg); +void nrf52_ppi_set_event_ep(uint8_t ch, uint32_t event_reg); /**************************************************************************** * Name: nrf52_ppi_set_task_ep @@ -100,7 +100,7 @@ void nrf52_ppi_set_event_ep(uint8_t ch, volatile uint32_t *event_reg); * ****************************************************************************/ -void nrf52_ppi_set_task_ep(uint8_t ch, volatile uint32_t *task_reg); +void nrf52_ppi_set_task_ep(uint8_t ch, uint32_t task_reg); /**************************************************************************** * Name: nrf52_ppi_set_task2_ep @@ -114,7 +114,7 @@ void nrf52_ppi_set_task_ep(uint8_t ch, volatile uint32_t *task_reg); * ****************************************************************************/ -void nrf52_ppi_set_task2_ep(uint8_t ch, volatile uint32_t *task_reg); +void nrf52_ppi_set_task2_ep(uint8_t ch, uint32_t task_reg); /**************************************************************************** * Name: nrf52_ppi_grp_channel_enable