From 42b7097cc2e717b37bcc66aa1965391147a1069e Mon Sep 17 00:00:00 2001 From: Filipe Cavalcanti Date: Tue, 8 Oct 2024 09:04:53 -0300 Subject: [PATCH] xtensa/esp32s3: fix missing peripheral initialization for watchdog timer --- arch/xtensa/src/esp32s3/esp32s3_wdt_lowerhalf.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/xtensa/src/esp32s3/esp32s3_wdt_lowerhalf.c b/arch/xtensa/src/esp32s3/esp32s3_wdt_lowerhalf.c index ed9af91f975..8a73161f0f4 100644 --- a/arch/xtensa/src/esp32s3/esp32s3_wdt_lowerhalf.c +++ b/arch/xtensa/src/esp32s3/esp32s3_wdt_lowerhalf.c @@ -42,6 +42,9 @@ #include "esp32s3_wdt_lowerhalf.h" #include "hardware/esp32s3_soc.h" +#include "soc/periph_defs.h" +#include "esp_private/periph_ctrl.h" + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -827,6 +830,10 @@ int esp32s3_wdt_initialize(const char *devpath, enum esp32s3_wdt_inst_e wdt) DEBUGASSERT(devpath); + /* Timer Group 0 and RTC are initialized on system start. + * Timer Group 1 must be initialized for MWDT1. + */ + switch (wdt) { #ifdef CONFIG_ESP32S3_MWDT0 @@ -843,6 +850,7 @@ int esp32s3_wdt_initialize(const char *devpath, enum esp32s3_wdt_inst_e wdt) { lower = &g_esp32s3_mwdt1_lowerhalf; lower->peripheral = TIMER; + periph_module_enable(PERIPH_TIMG1_MODULE); break; } #endif