From 3e456050d3fa66f297bde19828ff882938926eba Mon Sep 17 00:00:00 2001 From: Ari Kimari Date: Fri, 2 Oct 2026 14:35:16 +0300 Subject: [PATCH] arch/arm/imxrt: RT1180evk QSPI flash pin and clock configs Add QSPI flash pin and clock configs Signed-off-by: Ari Kimari --- arch/arm/src/imxrt/imxrt_clockconfig_ver3.h | 7 +++++++ .../arm/imxrt/imxrt1180-evk/include/board.h | 19 +++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/src/imxrt/imxrt_clockconfig_ver3.h b/arch/arm/src/imxrt/imxrt_clockconfig_ver3.h index a5c12da6206..ac7199b1531 100644 --- a/arch/arm/src/imxrt/imxrt_clockconfig_ver3.h +++ b/arch/arm/src/imxrt/imxrt_clockconfig_ver3.h @@ -282,6 +282,13 @@ EXTERN const struct clock_configuration_s g_initial_clkconfig; #define imxrt_clockoff_usboh3() imxrt_ccm_gate_on(CCM_LPCG_USB, false) #define imxrt_clockrun_usboh3() imxrt_ccm_gate_on(CCM_LPCG_USB, true) +#define imxrt_clockall_flexspi() imxrt_ccm_gate_on(CCM_LPCG_FLEXSPI1, true) +#define imxrt_clockoff_flexspi() imxrt_ccm_gate_on(CCM_LPCG_FLEXSPI1, false) +#define imxrt_clockrun_flexspi() imxrt_ccm_gate_on(CCM_LPCG_FLEXSPI1, true) +#define imxrt_clockall_flexspi2() imxrt_ccm_gate_on(CCM_LPCG_FLEXSPI2, true) +#define imxrt_clockoff_flexspi2() imxrt_ccm_gate_on(CCM_LPCG_FLEXSPI2, false) +#define imxrt_clockrun_flexspi2() imxrt_ccm_gate_on(CCM_LPCG_FLEXSPI2, true) + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1180-evk/include/board.h b/boards/arm/imxrt/imxrt1180-evk/include/board.h index 0d647ae3dc9..c1c0a080520 100644 --- a/boards/arm/imxrt/imxrt1180-evk/include/board.h +++ b/boards/arm/imxrt/imxrt1180-evk/include/board.h @@ -33,6 +33,25 @@ #include "hardware/rt118x/imxrt118x_pinmux.h" #include "imxrt_iomuxc.h" +/* FlexSPI1 Port A is connected to the EVK's 16 MiB W25Q128JW NOR. These + * assignments match the MCUXpresso SDK evkmimxrt1180 XIP example. + */ + +#define GPIO_FLEXSPI_DQS IOMUX_PIN( \ + IOMUXC_PAD_GPIO_B2_07_FLEXSPI1_BUS2BIT_A_DQS, 0, 0) +#define GPIO_FLEXSPI_SCK IOMUX_PIN( \ + IOMUXC_PAD_GPIO_B2_08_FLEXSPI1_BUS2BIT_A_SCLK, 0, 0) +#define GPIO_FLEXSPI_CS IOMUX_PIN( \ + IOMUXC_PAD_GPIO_B2_09_FLEXSPI1_BUS2BIT_A_SS0_B, 0, 0) +#define GPIO_FLEXSPI_IO0 IOMUX_PIN( \ + IOMUXC_PAD_GPIO_B2_10_FLEXSPI1_BUS2BIT_A_DATA00, 0, 0) +#define GPIO_FLEXSPI_IO1 IOMUX_PIN( \ + IOMUXC_PAD_GPIO_B2_11_FLEXSPI1_BUS2BIT_A_DATA01, 0, 0) +#define GPIO_FLEXSPI_IO2 IOMUX_PIN( \ + IOMUXC_PAD_GPIO_B2_12_FLEXSPI1_BUS2BIT_A_DATA02, 0, 0) +#define GPIO_FLEXSPI_IO3 IOMUX_PIN( \ + IOMUXC_PAD_GPIO_B2_13_FLEXSPI1_BUS2BIT_A_DATA03, 0, 0) + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/