From 3d2771c49a5253243ca3a1ff8dc9720f1b956052 Mon Sep 17 00:00:00 2001 From: Abdelatif Guettouche Date: Thu, 17 Feb 2022 21:04:01 +0100 Subject: [PATCH] esp32_irq.c: Move interrupt initialisation for special drivers to `up_irqinitialize`. `esp32_cpuint_initialize` is not a good place as it's also called from CPU1. Signed-off-by: Abdelatif Guettouche --- arch/xtensa/src/esp32/esp32_irq.c | 33 ++++++++++++++++--------------- 1 file changed, 17 insertions(+), 16 deletions(-) diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c index 76a686a4350..5624a9a360c 100644 --- a/arch/xtensa/src/esp32/esp32_irq.c +++ b/arch/xtensa/src/esp32/esp32_irq.c @@ -452,6 +452,7 @@ static void esp32_free_cpuint(int cpuint) void up_irqinitialize(void) { int i; + for (i = 0; i < NR_IRQS; i++) { g_irqmap[i] = IRQ_UNMAPPED; @@ -475,6 +476,22 @@ void up_irqinitialize(void) esp32_cpuint_initialize(); + /* Reserve CPU0 interrupt for some special drivers */ + +#ifdef CONFIG_ESP32_WIRELESS + g_cpu0_intmap[ESP32_CPUINT_MAC] = CPUINT_ASSIGN(ESP32_IRQ_MAC); + xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_CPUINT_MAC); +#endif + +#ifdef CONFIG_ESP32_BLE + g_cpu0_intmap[ESP32_PERIPH_BT_BB_NMI] = CPUINT_ASSIGN(ESP32_IRQ_BT_BB_NMI); + g_cpu0_intmap[ESP32_PERIPH_RWBT_NMI] = CPUINT_ASSIGN(ESP32_IRQ_RWBT_NMI); + g_cpu0_intmap[ESP32_PERIPH_RWBLE_IRQ] = CPUINT_ASSIGN(ESP32_IRQ_RWBLE_IRQ); + xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_PERIPH_BT_BB_NMI); + xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_PERIPH_RWBT_NMI); + xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_PERIPH_RWBLE_IRQ); +#endif + /* Attach and enable internal interrupts */ #ifdef CONFIG_SMP @@ -735,22 +752,6 @@ int esp32_cpuint_initialize(void) intmap[ESP32_CPUINT_TIMER1] = CPUINT_ASSIGN(XTENSA_IRQ_TIMER1); intmap[ESP32_CPUINT_TIMER2] = CPUINT_ASSIGN(XTENSA_IRQ_TIMER2); - /* Reserve CPU interrupt for some special drivers */ - -#ifdef CONFIG_ESP32_WIRELESS - intmap[ESP32_CPUINT_MAC] = CPUINT_ASSIGN(ESP32_IRQ_MAC); - xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_CPUINT_MAC); -#endif - -#ifdef CONFIG_ESP32_BLE - intmap[ESP32_PERIPH_BT_BB_NMI] = CPUINT_ASSIGN(ESP32_IRQ_BT_BB_NMI); - intmap[ESP32_PERIPH_RWBT_NMI] = CPUINT_ASSIGN(ESP32_IRQ_RWBT_NMI); - intmap[ESP32_PERIPH_RWBLE_IRQ] = CPUINT_ASSIGN(ESP32_IRQ_RWBLE_IRQ); - xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_PERIPH_BT_BB_NMI); - xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_PERIPH_RWBT_NMI); - xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_PERIPH_RWBLE_IRQ); -#endif - return OK; }