From 3ba3dfd9bcc5e6ffde0a2705281945978a958bbd Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Sun, 1 Sep 2013 11:29:51 -0600
Subject: [PATCH] SAMA5 UDPHS: Support USPHS clock configuration

---
 arch/arm/src/sama5/sam_clockconfig.c | 14 +++++++++++---
 arch/arm/src/sama5/sam_periphclks.h  |  4 ++--
 2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/arch/arm/src/sama5/sam_clockconfig.c b/arch/arm/src/sama5/sam_clockconfig.c
index 1c82e9e3ea3..a8c0613ef90 100644
--- a/arch/arm/src/sama5/sam_clockconfig.c
+++ b/arch/arm/src/sama5/sam_clockconfig.c
@@ -330,7 +330,14 @@ static inline void sam_selectplla(void)
 
 static inline void sam_usbclockconfig(void)
 {
-#if defined(CONFIG_SAMA5_EHCI)
+#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
+    defined(CONFIG_SAMA5_UDPHS)
+
+  /* We can either get the clock from the UPLL or from PLLA.  In this latter
+   * case, however, the PLLACK frequency must be a multiple of 48MHz.
+   */
+
+#if defined(BOARD_USE_UPLL)
   uint32_t regval;
 
   /* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the
@@ -395,7 +402,7 @@ static inline void sam_usbclockconfig(void)
   regval |= PMC_USB_USBDIV(9);
   putreg32(regval, SAM_PMC_USB);
 
-#elif defined(CONFIG_SAMA5_OHCI)
+#else /* BOARD_USE_UPLL */
   /* For OHCI Full-speed operations only, the user has to perform the
    * following:
    *
@@ -415,7 +422,8 @@ static inline void sam_usbclockconfig(void)
   putreg32(BOARD_OHCI_INPUT | BOARD_OHCI_DIVIDER << PMC_USB_USBDIV_SHIFT,
           SAM_PMC_USB);
 
-#endif
+#endif /* BOARD_USE_UPLL */
+#endif /* CONFIG_SAMA5_EHCI ||CONFIG_SAMA5_OHCI) || CONFIG_SAMA5_UDPHS */
 }
 
 /****************************************************************************
diff --git a/arch/arm/src/sama5/sam_periphclks.h b/arch/arm/src/sama5/sam_periphclks.h
index a89d0f95ff7..2d188378b59 100644
--- a/arch/arm/src/sama5/sam_periphclks.h
+++ b/arch/arm/src/sama5/sam_periphclks.h
@@ -52,8 +52,8 @@
 
 #define sam_enableperiph0(s)       putreg32((1 << (s)), SAM_PMC_PCER0)
 #define sam_enableperiph1(s)       putreg32((1 << ((s) - 32)), SAM_PMC_PCER1)
-#define sam_disableperiph0(s)      putreg32((1 << (s)), SAM_PMC_PDER0)
-#define sam_disableperiph1(s)      putreg32((1 << ((s) - 32)), SAM_PMC_PDER1)
+#define sam_disableperiph0(s)      putreg32((1 << (s)), SAM_PMC_PCDR0)
+#define sam_disableperiph1(s)      putreg32((1 << ((s) - 32)), SAM_PMC_PCDR1)
 #define sam_isenabled0(s)          (getreg32(SAM_PMC_PCER0) & (1 << (s)) != 0)
 #define sam_isenabled1(s)          (getreg32(SAM_PMC_PCER1) & (1 << ((s) - 32)) != 0)