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arch/arm/stm32: implement PTP hardware clock driver (/dev/ptp0)
Implement lower-half PTP hardware clock operations (struct ptp_lowerhalf_s and struct ptp_ops_s) in the STM32 Ethernet driver and register it with the generic PTP clock framework (drivers/timers/ptp_clock.c) to expose /dev/ptp0. Supported operations: - adjfine: adjust PTP clock frequency in parts per billion (ppb) - adjphase: adjust PTP clock phase via hardware TSSTU - adjtime: shift PTP clock time by signed delta in nanoseconds - gettime: atomic double-read of hardware timestamp registers - settime: initialize hardware timestamp counter via TSSTI - getres: return 1 ns clock resolution Also fix a sign bug in stm32_eth_ptp_adjust() where uint64_t addend promoted negative ppb adjustments to unsigned, corrupting frequency trim for crystals running faster than nominal. Follow-up to #20148 per review recommendation to use the standard POSIX /dev/ptp0 character driver instead of custom socket ioctls. Assisted-by: Gemini:gemini-3.8-pro Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
This commit is contained in:
Daniel P. Carvalho
Alan C. Assis
parent
c21d96eb68
commit
3589fceab3
1 changed files with 249 additions and 12 deletions
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@ -31,6 +31,7 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include <time.h>
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#include <stdlib.h>
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#include <string.h>
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#include <assert.h>
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#include <nuttx/debug.h>
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@ -54,6 +55,10 @@
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# include <nuttx/net/pkt.h>
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#endif
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#if defined(CONFIG_PTP_CLOCK) || defined(CONFIG_STM32_ETH_PTP)
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# include <nuttx/timers/ptp_clock.h>
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#endif
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#include "arm_internal.h"
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#include "chip.h"
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#include "stm32_gpio.h"
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@ -630,6 +635,9 @@ struct stm32_ethmac_s
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uint32_t rxtimelow; /* Received packet timestamp subsecond */
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uint32_t rxtimehigh; /* Received packet timestamp seconds */
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#endif
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#if defined(CONFIG_STM32_ETH_PTP) && defined(CONFIG_PTP_CLOCK)
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struct ptp_lowerhalf_s ptp_lower; /* PTP hardware clock lower half */
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#endif
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};
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/****************************************************************************
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@ -772,7 +780,10 @@ static int stm32_ethconfig(struct stm32_ethmac_s *priv);
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/* PTP initialization and access */
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#ifdef CONFIG_STM32_ETH_PTP
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static int stm32_eth_ptp_adjust(long ppb);
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static int stm32_ptp_adjfine(struct ptp_lowerhalf_s *lower, long ppb);
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#ifdef CONFIG_PTP_CLOCK
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static int stm32_ptp_adjtime(struct ptp_lowerhalf_s *lower, int64_t delta);
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#endif
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static void stm32_eth_ptp_init(uint64_t timestamp);
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#ifdef CONFIG_STM32_ETH_PTP_RTC_HIRES
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static uint64_t stm32_eth_ptp_gettime(void);
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@ -3567,15 +3578,19 @@ static inline void stm32_ethgpioconfig(struct stm32_ethmac_s *priv)
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#ifdef CONFIG_STM32_ETH_PTP
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/****************************************************************************
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* Function: stm32_eth_ptp_adjust
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* Name: stm32_ptp_adjfine
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*
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* Description:
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* Adjust PTP timer run rate.
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* Adjust the PTP clock frequency in parts per billion (ppb).
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*
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* Input Parameters:
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* ppb - Adjustment in parts per billion (nanoseconds per second).
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* Zero is default rate, positive value makes clock run faster
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* and negative value slower.
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* lower - Pointer to the PTP clock lower-half instance (unused; this
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* implementation also serves as the PTP timer's own internal
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* rate setter, called with lower == NULL from
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* stm32_eth_ptp_init() and up_rtc_adjtime()).
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* ppb - Adjustment in parts per billion (nanoseconds per second).
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* Zero is default rate, positive value makes clock run faster
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* and negative value slower.
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*
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* Returned Value:
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* OK on success, negated errno on failure.
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@ -3585,12 +3600,14 @@ static inline void stm32_ethgpioconfig(struct stm32_ethmac_s *priv)
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*
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****************************************************************************/
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static int stm32_eth_ptp_adjust(long ppb)
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static int stm32_ptp_adjfine(struct ptp_lowerhalf_s *lower, long ppb)
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{
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uint32_t regval;
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uint64_t addend;
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int64_t addend;
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uint32_t increment;
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UNUSED(lower);
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/* Compute addend value to achieve nominal timer rate.
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* Increment is set by stm32_eth_ptp_init() and remains constants after
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* that.
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@ -3608,9 +3625,9 @@ static int stm32_eth_ptp_adjust(long ppb)
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/* Check for overflows */
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if (addend == 0 || (uint32_t)addend != addend)
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if (addend <= 0 || addend > UINT32_MAX)
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{
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nerr("PTP adjustment out of range: ppb=%ld, addend=%lld\n",
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nerr("PTP adjustment out of range: ppb=%ld, addend=%" PRId64 "\n",
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ppb, addend);
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return -EINVAL;
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}
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@ -3632,6 +3649,72 @@ static int stm32_eth_ptp_adjust(long ppb)
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return OK;
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}
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#ifdef CONFIG_PTP_CLOCK
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/****************************************************************************
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* Name: stm32_ptp_adjtime
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*
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* Description:
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* Nudge the PTP hardware counter's phase by a signed delta, in
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* nanoseconds, via the System Time Update (TSSTU) mechanism. Unlike
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* stm32_eth_ptp_init(), this does not reset the rate (addend) that
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* stm32_ptp_adjfine() may already have applied.
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*
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* Input Parameters:
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* lower - Pointer to the PTP clock lower-half instance (unused; this
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* implementation also serves as the PTP timer's own internal
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* phase setter, called with lower == NULL from
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* stm32_ptp_adjphase()).
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* delta - Amount to add to (positive) or subtract from (negative) the
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* current counter value, in nanoseconds.
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*
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* Returned Value:
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* OK on success, negated errno on failure.
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*
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****************************************************************************/
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static int stm32_ptp_adjtime(struct ptp_lowerhalf_s *lower, int64_t delta)
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{
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uint32_t regval;
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uint32_t sec;
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uint32_t subsec;
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uint32_t abs_nsec;
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uint64_t abs_ns;
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bool negative;
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UNUSED(lower);
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negative = (delta < 0);
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abs_ns = llabs(delta);
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sec = abs_ns / NSEC_PER_SEC;
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abs_nsec = abs_ns % NSEC_PER_SEC;
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/* Convert the nanosecond remainder to the same 32-bit binary fraction
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* of a second used by ptp_to_timespec()/stm32_eth_ptp_init(), then
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* halve it to fit the 31-bit TSUSS field (mirrors the >>1 done in
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* stm32_eth_ptp_init()).
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*/
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subsec = (((uint64_t)abs_nsec << 32) / NSEC_PER_SEC) >> 1;
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subsec &= ETH_PTPTSLR_MASK;
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stm32_putreg(sec, STM32_ETH_PTPTSHUR);
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stm32_putreg(subsec | (negative ? ETH_PTPTSLU_TSUPNS : 0),
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STM32_ETH_PTPTSLUR);
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regval = stm32_getreg(STM32_ETH_PTPTSCR);
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stm32_putreg(regval | ETH_PTPTSCR_TSSTU, STM32_ETH_PTPTSCR);
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up_udelay(1);
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if (stm32_getreg(STM32_ETH_PTPTSCR) & ETH_PTPTSCR_TSSTU)
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{
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nerr("PTP phase update failed\n");
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return -EBUSY;
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}
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return OK;
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}
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#endif /* CONFIG_PTP_CLOCK */
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/****************************************************************************
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* Function: stm32_eth_ptp_init
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*
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@ -3678,7 +3761,7 @@ static void stm32_eth_ptp_init(uint64_t timestamp)
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/* Update addend value to default rate */
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stm32_eth_ptp_adjust(0);
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stm32_ptp_adjfine(NULL, 0);
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/* Enable fine update mode */
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@ -3709,6 +3792,148 @@ static void stm32_eth_ptp_init(uint64_t timestamp)
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#endif
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}
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#if defined(CONFIG_STM32_ETH_PTP) && defined(CONFIG_PTP_CLOCK)
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/****************************************************************************
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* Name: stm32_ptp_adjphase
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*
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* Description:
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* Adjust the PTP clock phase by a signed offset in nanoseconds.
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*
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* Input Parameters:
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* lower - Pointer to the PTP clock lower-half instance
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* phase - Phase adjustment in nanoseconds
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*
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* Returned Value:
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* OK on success, negated errno on failure.
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*
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****************************************************************************/
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static int stm32_ptp_adjphase(struct ptp_lowerhalf_s *lower, int32_t phase)
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{
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return stm32_ptp_adjtime(lower, phase);
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}
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/****************************************************************************
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* Name: stm32_ptp_gettime
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*
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* Description:
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* Read the current time from the PTP hardware clock.
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*
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* Input Parameters:
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* lower - Pointer to the PTP clock lower-half instance
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* ts - Location to store the current PTP time
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* sts - System timestamp pair (unused, can be NULL)
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*
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* Returned Value:
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* OK on success, negated errno on failure.
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*
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****************************************************************************/
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static int stm32_ptp_gettime(struct ptp_lowerhalf_s *lower,
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struct timespec *ts,
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struct ptp_system_timestamp *sts)
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{
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uint32_t high1;
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uint32_t low;
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uint32_t high2;
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uint32_t subsec;
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high1 = getreg32(STM32_ETH_PTPTSHR);
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low = getreg32(STM32_ETH_PTPTSLR);
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high2 = getreg32(STM32_ETH_PTPTSHR);
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if (high1 != high2)
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{
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low = getreg32(STM32_ETH_PTPTSLR);
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}
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ts->tv_sec = high2;
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subsec = (low & ETH_PTPTSLR_MASK) << 1;
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ts->tv_nsec = ((uint64_t)subsec * NSEC_PER_SEC) >> 32;
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return OK;
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}
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/****************************************************************************
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* Name: stm32_ptp_settime
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*
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* Description:
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* Set the current time on the PTP hardware clock.
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*
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* Input Parameters:
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* lower - Pointer to the PTP clock lower-half instance
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* ts - Time value to set
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*
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* Returned Value:
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* OK on success, negated errno on failure.
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*
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****************************************************************************/
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static int stm32_ptp_settime(struct ptp_lowerhalf_s *lower,
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const struct timespec *ts)
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{
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uint32_t regval;
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uint32_t subsec;
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if (ts->tv_nsec < 0 || ts->tv_nsec >= NSEC_PER_SEC)
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{
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return -EINVAL;
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}
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subsec = (((uint64_t)ts->tv_nsec << 32) / NSEC_PER_SEC) >> 1;
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subsec &= ETH_PTPTSLR_MASK;
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stm32_putreg((uint32_t)ts->tv_sec, STM32_ETH_PTPTSHUR);
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stm32_putreg(subsec, STM32_ETH_PTPTSLUR);
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regval = stm32_getreg(STM32_ETH_PTPTSCR);
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stm32_putreg(regval | ETH_PTPTSCR_TSSTI, STM32_ETH_PTPTSCR);
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up_udelay(1);
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if (stm32_getreg(STM32_ETH_PTPTSCR) & ETH_PTPTSCR_TSSTI)
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{
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nerr("PTP timestamp update failed\n");
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return -EBUSY;
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}
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return OK;
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}
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/****************************************************************************
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* Name: stm32_ptp_getres
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*
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* Description:
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* Get the resolution of the PTP hardware clock (1 ns).
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*
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* Input Parameters:
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* lower - Pointer to the PTP clock lower-half instance
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* res - Location to store the resolution
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*
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* Returned Value:
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* OK on success.
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*
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****************************************************************************/
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static int stm32_ptp_getres(struct ptp_lowerhalf_s *lower,
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struct timespec *res)
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{
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res->tv_sec = 0;
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res->tv_nsec = 1;
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return OK;
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}
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static const struct ptp_ops_s g_stm32_ptp_ops =
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{
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stm32_ptp_adjfine, /* adjfine */
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stm32_ptp_adjphase, /* adjphase */
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stm32_ptp_adjtime, /* adjtime */
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stm32_ptp_gettime, /* gettime */
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NULL, /* getcrosststamp */
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stm32_ptp_settime, /* settime */
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stm32_ptp_getres, /* getres */
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};
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#endif
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#ifdef CONFIG_STM32_ETH_PTP_RTC_HIRES
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/****************************************************************************
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* Name: stm32_eth_ptp_gettime
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@ -4242,6 +4467,18 @@ int stm32_ethinitialize(int intf)
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/* Register the device with the OS so that socket IOCTLs can be performed */
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netdev_register(&priv->dev, NET_LL_ETHERNET);
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#if defined(CONFIG_STM32_ETH_PTP) && defined(CONFIG_PTP_CLOCK)
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/* Register the PTP clock character driver (/dev/ptp0) */
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priv->ptp_lower.ops = &g_stm32_ptp_ops;
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ret = ptp_clock_register(&priv->ptp_lower, 500000000, intf);
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if (ret < 0)
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{
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nerr("ERROR: Failed to register PTP clock: %d\n", ret);
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}
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#endif
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return OK;
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}
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@ -4416,7 +4653,7 @@ int up_rtc_settime(const struct timespec *tp)
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int up_rtc_adjtime(long ppb)
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{
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return stm32_eth_ptp_adjust(ppb);
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return stm32_ptp_adjfine(NULL, ppb);
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}
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#endif /* CONFIG_STM32_ETH_PTP_RTC_HIRES */
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