From 32e417c3ac6bcd3d9716b40c79e721083ddce831 Mon Sep 17 00:00:00 2001 From: Titus von Boxberg Date: Mon, 17 Jul 2017 15:39:08 +0200 Subject: [PATCH] renamed STM32_LCDTFT_BASE to STM32_LTDC_BASE for consistency --- arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h | 2 +- arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) mode change 100644 => 100755 arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h mode change 100644 => 100755 arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h old mode 100644 new mode 100755 index 41675c60b37..7c7d25241bc --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h @@ -160,7 +160,7 @@ #define STM32_SPI6_BASE 0x40015400 /* 0x40015400-0x400157ff: SPI6 */ #define STM32_SAI1_BASE 0x40015800 /* 0x40015800-0x40015bff: SAI1 */ #define STM32_SAI2_BASE 0x40015c00 /* 0x40015c00-0x40015fff: SAI2 */ -#define STM32_LCDTFT_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */ +#define STM32_LTDC_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */ /* AHB1 Base Addresses **************************************************************/ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h old mode 100644 new mode 100755 index db2ca6d3a95..7af9b5243de --- a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h @@ -162,7 +162,7 @@ #define STM32_SPI6_BASE 0x40015400 /* 0x40015400-0x400157ff: SPI6 */ #define STM32_SAI1_BASE 0x40015800 /* 0x40015800-0x40015bff: SAI1 */ #define STM32_SAI2_BASE 0x40015c00 /* 0x40015c00-0x40015fff: SAI2 */ -#define STM32_LCDTFT_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */ +#define STM32_LTDC_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */ #define STM32_DSIHOST_BASE 0x40016c00 /* 0x40016c00-0x400173ff: DSI Host */ #define STM32_DFSDM1_BASE 0x40017400 /* 0x40017400-0x400174ff: DFSDM1 */ #define STM32_MDIOS_BASE 0x40017800 /* 0x40017800-0x40017bff: MDIOS */