diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.c b/arch/arm/src/stm32l4/stm32l4_pwr.c
index 674790cc09d..d34a2bd7b9c 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.c
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.c
@@ -213,15 +213,13 @@ bool stm32l4_pwr_enableusv(bool set)
 }
 
 /****************************************************************************
- * Name: stm32l4_pwr_vddio2_valid
+ * Name: stm32l4_pwr_enable_pvme2
  *
  * Description:
- *   Report that the Vddio2 independent I/Os supply voltage is valid or not.
- *   Setting this bit is mandatory to use the PG2 - PG15 I/Os.
+ *   Enables or disables the peripheral voltage monitoring for Vddio2.
  *
  * Input Parameters:
- *   set - True: Vddio2 is value; False: Vddio2 is not present.  Logical and
- *         electrical isolation is applied to ignore this supply.
+ *   set - True: Vddio2 monitoring enable; False: Vddio2 monitoring disable.
  *
  * Returned Value:
  *   True: The bit was previously set.
@@ -229,6 +227,103 @@ bool stm32l4_pwr_enableusv(bool set)
  ****************************************************************************/
 
 #if !defined(CONFIG_STM32L4_STM32L4X3)
+bool stm32l4_pwr_enable_pvme2(bool set)
+{
+  uint32_t regval;
+  bool was_set;
+  bool was_clk_enabled;
+
+  regval = getreg32(STM32L4_RCC_APB1ENR1);
+  was_clk_enabled = ((regval & RCC_APB1ENR1_PWREN) != 0);
+
+  if (!was_clk_enabled)
+    {
+      stm32l4_pwr_enableclk(true);
+    }
+
+  /* Get the current state of the STM32L4 PWR control register 2 */
+
+  regval  = stm32l4_pwr_getreg(STM32L4_PWR_CR2_OFFSET);
+  was_set = ((regval & PWR_CR2_PVME2) != 0);
+
+  /* Enable or disable the ability to write */
+
+  if (was_set && !set)
+    {
+      /* Disable the Vddio2 monitoring */
+
+      regval &= ~PWR_CR2_PVME2;
+      stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval);
+    }
+  else if (!was_set && set)
+    {
+      /* Enable the Vddio2 monitoring */
+
+      regval |= PWR_CR2_PVME2;
+      stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval);
+    }
+
+  if (!was_clk_enabled)
+    {
+      stm32l4_pwr_enableclk(false);
+    }
+
+  return was_set;
+}
+
+/****************************************************************************
+ * Name: stm32l4_pwr_get_pvmo2
+ *
+ * Description:
+ *   Get value of peripheral voltage monitor output 2 (Vddio2).
+ *
+ * Returned Value:
+ *   True: Vddio2 voltage is below PVM2 threshold.
+ *   False: Vddio2 voltage is above PVM2 threshold.
+ *
+ ****************************************************************************/
+
+bool stm32l4_pwr_get_pvmo2(void)
+{
+  uint32_t regval;
+  bool was_clk_enabled;
+
+  regval = getreg32(STM32L4_RCC_APB1ENR1);
+  was_clk_enabled = ((regval & RCC_APB1ENR1_PWREN) != 0);
+
+  if (!was_clk_enabled)
+    {
+      stm32l4_pwr_enableclk(true);
+    }
+
+  /* Get the current state of the STM32L4 SR2 control register 2 */
+
+  regval = stm32l4_pwr_getreg(STM32L4_PWR_SR2_OFFSET);
+
+  if (!was_clk_enabled)
+    {
+      stm32l4_pwr_enableclk(false);
+    }
+
+  return !!(regval & PWR_SR2_PVMO2);
+}
+
+/****************************************************************************
+ * Name: stm32l4_pwr_vddio2_valid
+ *
+ * Description:
+ *   Report that the Vddio2 independent I/Os supply voltage is valid or not.
+ *   Setting this bit is mandatory to use the PG2 - PG15 I/Os.
+ *
+ * Input Parameters:
+ *   set - True: Vddio2 is valid; False: Vddio2 is not present.  Logical and
+ *         electrical isolation is applied to ignore this supply.
+ *
+ * Returned Value:
+ *   True: The bit was previously set.
+ *
+ ****************************************************************************/
+
 bool stm32l4_pwr_vddio2_valid(bool set)
 {
   uint32_t regval;
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.h b/arch/arm/src/stm32l4/stm32l4_pwr.h
index 5d15397ca1d..4bbe661aacd 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.h
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.h
@@ -105,6 +105,40 @@ bool stm32l4_pwr_enablebkp(bool writable);
 
 bool stm32l4_pwr_enableusv(bool set);
 
+/****************************************************************************
+ * Name: stm32l4_pwr_enable_pvme2
+ *
+ * Description:
+ *   Enables or disables the peripheral voltage monitoring for Vddio2.
+ *
+ * Input Parameters:
+ *   set - True: Vddio2 monitoring enable; False: Vddio2 monitoring disable.
+ *
+ * Returned Value:
+ *   True: The bit was previously set.
+ *
+ ****************************************************************************/
+
+#if !defined(CONFIG_STM32L4_STM32L4X3)
+bool stm32l4_pwr_enable_pvme2(bool set);
+#endif
+
+/****************************************************************************
+ * Name: stm32l4_pwr_get_pvmo2
+ *
+ * Description:
+ *   Get value of peripheral voltage monitor output 2 (Vddio2).
+ *
+ * Returned Value:
+ *   True: Vddio2 voltage is below PVM2 threshold.
+ *   False: Vddio2 voltage is above PVM2 threshold.
+ *
+ ****************************************************************************/
+
+#if !defined(CONFIG_STM32L4_STM32L4X3)
+bool stm32l4_pwr_get_pvmo2(void);
+#endif
+
 /****************************************************************************
  * Name: stm32l4_pwr_vddio2_valid
  *
@@ -113,7 +147,7 @@ bool stm32l4_pwr_enableusv(bool set);
  *   Setting this bit is mandatory to use the PG2 - PG15 I/Os.
  *
  * Input Parameters:
- *   set - True: Vddio2 is value; False: Vddio2 is not present.  Logical and
+ *   set - True: Vddio2 is valid; False: Vddio2 is not present.  Logical and
  *         electrical isolation is applied to ignore this supply.
  *
  * Returned Value: