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arch/arm/rtl8721f: add GPIO character driver support

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Wire the shared Ameba GPIO driver into the RTL8721F (amebagreen2) build and
add the EVB board glue:

  - arch/arm/src/rtl8721f: build ameba_gpio.c (CMake/Make.defs), source the
    common Ameba Kconfig, and add ameba_gpio_chip.h describing the chip's
    three GPIO ports (A/B/C), their IRQs and the APBPeriph clock bit.
  - arch/arm/src/common/ameba: teach the driver that amebagreen2's ROM
    GPIO_Init does not call PAD_PullCtrl or GPIO_INTMode, so call both
    explicitly after GPIO_Init; on RTL8721Dx (ram_common) these are harmless
    redundant writes.  Add the AMEBA_PORT_C / AMEBA_PC() helpers.
  - boards/arm/rtl8721f/rtl8721f_evb: register output/input/interrupt demo
    pins, add the bringup hook, and provide a minimal 'gpio' NSH defconfig.
  - Documentation: add a GPIO section for the RTL8721F EVB and fix a
    rising/falling typo in the PKE8721DAF page.

Hardware-verified on the RTL8721F EVB: output, input, and all interrupt
trigger/polarity combinations (rising/falling edge, level high/low).

Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
This commit is contained in:
dechao_gong 2026-07-30 18:09:57 +08:00
parent 2b4ec0845f
commit 2dd3ed4ff5
15 changed files with 344 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

2
Documentation/platforms/arm/rtl8721dx/boards/pke8721daf/index.rst
View file

@ -74,7 +74,7 @@ the example::
nsh> gpio -o 1 /dev/gpio0 # drive the output high
nsh> gpio /dev/gpio1 # read the input
nsh> gpio -w 1 /dev/gpio2 # wait for a rising-edge interrupt
nsh> gpio -w 1 /dev/gpio2 # wait for a falling-edge interrupt
Pins are encoded with the ``AMEBA_PA()`` / ``AMEBA_PB()`` helpers from
``arch/arm/src/common/ameba/ameba_gpio.h`` (port A/B, pin 0-31), matching the

18
Documentation/platforms/arm/rtl8721f/boards/rtl8721f_evb/index.rst
View file

@ -47,6 +47,24 @@ rtl8721f_evb`` first (the make build needs no sourcing).
$ ./tools/configure.sh rtl8721f_evb:<config-name>
gpio
----
Minimal NSH with the GPIO driver and the ``gpio`` example enabled (no Wi-Fi).
The board registers three pins from its pin table (see
``boards/arm/rtl8721f/rtl8721f_evb/src/rtl8721f_gpio.c``): an output at
``/dev/gpio0``, an input at ``/dev/gpio1`` and an interrupt pin at
``/dev/gpio2``. Edit that table to match a board's wiring. Exercise them with
the example::
nsh> gpio -o 1 /dev/gpio0 # drive the output high
nsh> gpio /dev/gpio1 # read the input
nsh> gpio -w 1 /dev/gpio2 # wait for a falling-edge interrupt
Pins are encoded with the ``AMEBA_PA()`` / ``AMEBA_PB()`` helpers from
``arch/arm/src/common/ameba/ameba_gpio.h`` (port A/B, pin 0-31), matching the
Ameba SDK ``PinName`` layout.
nsh
---

47
arch/arm/src/common/ameba/ameba_gpio.c
View file

@ -146,10 +146,12 @@ struct ameba_gpio_dev_s
* at link time either by the on-chip ROM symbol table or by a fwlib object
* compiled into libameba_fwlib.a. Which source applies is per-chip:
*
* RCC_PeriphClockCmd, GPIO_Init, GPIO_WriteBit, GPIO_ReadDataBit and
* GPIO_INTConfig are in ROM on every Ameba ARM chip. (GPIO_Init also
* reaches Pinmux_Config, GPIO_Direction, GPIO_INTMode and PAD_PullCtrl
* internally, resolved inside ROM, so the driver never names them.)
* RCC_PeriphClockCmd, GPIO_Init, GPIO_WriteBit, GPIO_ReadDataBit,
* GPIO_INTConfig and GPIO_INTMode are in ROM on every Ameba ARM chip.
* GPIO_Init calls Pinmux_Config and GPIO_Direction internally. On
* RTL8721Dx its ram_common override also calls PAD_PullCtrl and (for
* INT mode) GPIO_INTMode; on amebagreen2 the ROM version does neither,
* so the driver calls both explicitly after GPIO_Init.
*
* GPIO_INTStatusGet and GPIO_INTStatusClearEdge are the gap. On RTL8721Dx
* they come from fwlib ram_common/ameba_gpio.c, compiled in via
@ -164,9 +166,12 @@ struct ameba_gpio_dev_s
extern void RCC_PeriphClockCmd(uint32_t periph, uint32_t clock,
uint8_t newstate);
extern void GPIO_Init(struct ameba_gpio_init_s *init);
extern void GPIO_INTMode(uint32_t pin, uint32_t newstate, uint32_t trigger,
uint32_t polarity, uint32_t debounce);
extern void GPIO_WriteBit(uint32_t pin, uint32_t state);
extern uint32_t GPIO_ReadDataBit(uint32_t pin);
extern void GPIO_INTConfig(uint32_t pin, uint32_t newstate);
extern void PAD_PullCtrl(uint32_t pin, uint32_t pupd);
extern uint32_t GPIO_INTStatusGet(uint32_t port);
extern void GPIO_INTStatusClearEdge(uint32_t port);
@ -279,18 +284,21 @@ static void ameba_gpio_configure(struct ameba_gpio_dev_s *priv,
init.mode = AMEBA_GPIO_MODE_INT;
init.ittrigger = AMEBA_GPIO_IT_LEVEL;
init.itpolarity = AMEBA_GPIO_POL_HIGH;
init.pupd = AMEBA_GPIO_PUPD_DOWN;
break;
case GPIO_INTERRUPT_LOW_PIN:
init.mode = AMEBA_GPIO_MODE_INT;
init.ittrigger = AMEBA_GPIO_IT_LEVEL;
init.itpolarity = AMEBA_GPIO_POL_LOW;
init.pupd = AMEBA_GPIO_PUPD_UP;
break;
case GPIO_INTERRUPT_RISING_PIN:
init.mode = AMEBA_GPIO_MODE_INT;
init.ittrigger = AMEBA_GPIO_IT_EDGE;
init.itpolarity = AMEBA_GPIO_POL_HIGH;
init.pupd = AMEBA_GPIO_PUPD_DOWN;
break;
case GPIO_INTERRUPT_BOTH_PIN:
@ -305,6 +313,7 @@ static void ameba_gpio_configure(struct ameba_gpio_dev_s *priv,
init.mode = AMEBA_GPIO_MODE_INT;
init.ittrigger = AMEBA_GPIO_IT_EDGE;
init.itpolarity = AMEBA_GPIO_POL_LOW;
init.pupd = AMEBA_GPIO_PUPD_UP;
break;
}
@ -320,21 +329,33 @@ static void ameba_gpio_configure(struct ameba_gpio_dev_s *priv,
GPIO_Init(&init);
/* GPIO_Init() leaves the interrupt source enabled, and setting up the
* trigger can latch a stale edge. While the pin is still unmasked, clear
* that latch, then mask the pin until the application enables it. Order
* matters: GPIO_INTStatusClearEdge() acts through the masked
* GPIO_INT_STATUS, so it clears only a currently-unmasked pin --
* clearing after masking would miss this pin. The clear+mask pair runs
* under the port lock so the ISR cannot dispatch a stale edge in between;
* clearing the whole port's edge latches is safe during registration, as
* no interrupt pin is application-enabled yet.
/* On amebagreen2 (and similar), the ROM GPIO_Init does not call
* PAD_PullCtrl for interrupt or input modes. Call it explicitly here so
* the pad pull always matches init.pupd. On RTL8721Dx whose ram_common
* GPIO_Init already calls it this is a harmless redundant write.
*/
PAD_PullCtrl(init.pin, init.pupd);
/* On chips whose ROM GPIO_Init does not call GPIO_INTMode internally
* (confirmed for amebagreen2; harmless double-call on RTL8721Dx where
* ram_common already does it), explicitly programme the trigger/polarity
* into the GPIO interrupt controller now. GPIO_INTMode with ENABLE
* also unmasks the pin in the controller, so immediately follow with
* GPIO_INTConfig(DISABLE) to keep it masked until the application
* calls go_enable(). Clear stale edge latches first while the pin is
* still unmasked; GPIO_INTStatusClearEdge operates on the unmasked
* status so clearing after masking would miss this pin. The whole
* sequence runs under the port lock to prevent the ISR from dispatching
* a stale edge between the clear and the mask.
*/
if (init.mode == AMEBA_GPIO_MODE_INT)
{
irqstate_t flags = spin_lock_irqsave(&g_ameba_gpio.lock);
GPIO_INTMode(priv->pin, AMEBA_ENABLE, init.ittrigger,
init.itpolarity, init.itdebounce);
GPIO_INTStatusClearEdge(AMEBA_PIN_PORT(priv->pin));
GPIO_INTConfig(priv->pin, AMEBA_DISABLE);

8
arch/arm/src/common/ameba/ameba_gpio.h
View file

@ -48,10 +48,16 @@
#define AMEBA_PIN(port, num) ((uint8_t)(((port) << 5) | ((num) & 0x1f)))
/* Convenience: the RTL8721Dx / RTL8720F break out ports A and B. */
/* Convenience helpers: one per port exposed by the family.
* RTL8721Dx / RTL8720F: ports A and B.
* RTL8721F (Green2): ports A, B and C.
*/
#define AMEBA_PORT_C 2
#define AMEBA_PA(num) AMEBA_PIN(AMEBA_PORT_A, (num))
#define AMEBA_PB(num) AMEBA_PIN(AMEBA_PORT_B, (num))
#define AMEBA_PC(num) AMEBA_PIN(AMEBA_PORT_C, (num))
/****************************************************************************
* Public Function Prototypes

4
arch/arm/src/rtl8721f/CMakeLists.txt
View file

@ -46,6 +46,10 @@ if(CONFIG_RTL8721F_FLASH_FS)
list(APPEND SRCS ${AMEBA_COMMON}/ameba_flash_mtd.c)
endif()
if(CONFIG_AMEBA_GPIO)
list(APPEND SRCS ${AMEBA_COMMON}/ameba_gpio.c)
endif()
target_include_directories(arch PRIVATE ${AMEBA_COMMON})
target_sources(arch PRIVATE ${SRCS})

5
arch/arm/src/rtl8721f/Kconfig
View file

@ -82,4 +82,9 @@ config RTL8721F_FLASH_FS
endmenu # RTL8721F Storage
# Shared Ameba peripheral drivers (GPIO, ...) live in the common IC-agnostic
# tree and are configured through one Kconfig reused by every Ameba chip.
source "arch/arm/src/common/ameba/Kconfig"
endif # ARCH_CHIP_RTL8721F

4
arch/arm/src/rtl8721f/Make.defs
View file

@ -56,6 +56,10 @@ ifeq ($(CONFIG_RTL8721F_FLASH_FS),y)
CHIP_CSRCS += ameba_flash_mtd.c
endif
ifeq ($(CONFIG_AMEBA_GPIO),y)
CHIP_CSRCS += ameba_gpio.c
endif
############################################################################
# Realtek RTL8721F SDK integration
#

5
arch/arm/src/rtl8721f/ameba_board.mk
View file

@ -135,6 +135,11 @@ AMEBA_FWLIB_SRCS += $(TOPDIR)/arch/arm/src/rtl8721f/ameba_app_start.c \
ifeq ($(CONFIG_RTL8721F_FLASH_FS),y)
AMEBA_FWLIB_SRCS += $(AMEBA_SOC)/fwlib/ram_common/ameba_flash_ram.c
endif
# GPIO register layer. The GPIO driver (arch/.../common/ameba/ameba_gpio.c)
# calls the fwlib GPIO API. On RTL8721F (amebagreen2) GPIO_INTStatusGet and
# GPIO_INTStatusClearEdge ARE in the ROM symbol table (ameba_rom_symbol_bcut.ld),
# so unlike RTL8721Dx no fwlib ram_common source needs to be compiled in here.
# -Wno-int-conversion: the vendored SDK passes NULL to irq_register()'s u32
# "Data" (interrupt context) argument in many places -- an intentional
# NULL-as-context idiom. Silence -Wint-conversion for the SDK fwlib sources

75
arch/arm/src/rtl8721f/ameba_gpio_chip.h Normal file
View file

@ -0,0 +1,75 @@
/****************************************************************************
* arch/arm/src/rtl8721f/ameba_gpio_chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_RTL8721F_AMEBA_GPIO_CHIP_H
#define __ARCH_ARM_SRC_RTL8721F_AMEBA_GPIO_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/irq.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Per-chip GPIO parameters for the shared driver
* (arch/arm/src/common/ameba/ameba_gpio.c). The driver logic, pin encoding
* and fwlib API are identical across every Ameba ARM chip, but the port
* count, the per-port NVIC vectors and the RCC gate bits are not. Each chip
* supplies its own <ameba_gpio_chip.h> on the include path (arch/.../chip);
* the common driver sizes its tables and wires its vectors from the macros
* below, so nothing IC-specific is left in common.
*
* RTL8721F (Green2 / amebagreen2) breaks out three GPIO ports, A, B and C,
* each a 32-pin bank with its own interrupt vector.
*
* GPIO_INTStatusGet and GPIO_INTStatusClearEdge are in the amebagreen2 ROM
* symbol table (ameba_rom_symbol_bcut.ld), so fwlib ram_common/ameba_gpio.c
* does NOT need to be compiled in -- unlike RTL8721Dx where those symbols
* live in ram_common.
*/
/* Number of GPIO ports (banks) this chip exposes. */
#define AMEBA_GPIO_NPORTS 3
/* NVIC vector for each port, as an initialiser indexed by port number
* (0 = A, 1 = B, 2 = C). Its width must match AMEBA_GPIO_NPORTS.
*/
#define AMEBA_GPIO_PORT_IRQS \
{ RTL8721F_IRQ_GPIOA, RTL8721F_IRQ_GPIOB, RTL8721F_IRQ_GPIOC }
/* APBPeriph_GPIO / APBPeriph_GPIO_CLOCK (sysreg_lsys.h): the peripheral and
* clock bits RCC_PeriphClockCmd() gates for the GPIO block. On RTL8721F
* both are ((1 << 30) | (1 << 4)); same value as RTL8721Dx.
*/
#define AMEBA_APBPERIPH_GPIO (((uint32_t)1 << 30) | ((uint32_t)1 << 4))
#endif /* __ARCH_ARM_SRC_RTL8721F_AMEBA_GPIO_CHIP_H */

50
boards/arm/rtl8721f/rtl8721f_evb/configs/gpio/defconfig Normal file
View file

@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEBUG_WARN is not set
CONFIG_AMEBA_GPIO=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="rtl8721f_evb"
CONFIG_ARCH_BOARD_RTL8721F_EVB=y
CONFIG_ARCH_CHIP="rtl8721f"
CONFIG_ARCH_CHIP_RTL8721F=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV8M_SYSTICK=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEFAULT_TASK_STACKSIZE=4096
CONFIG_EXAMPLES_GPIO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_PROCFS=y
CONFIG_FS_TMPFS=y
CONFIG_IDLETHREAD_STACKSIZE=4096
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_LIBC_MEMFD_ERROR=y
CONFIG_MM_DEFAULT_ALIGNMENT=32
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=401408
CONFIG_RAM_START=0x20006000
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPWORK=y
CONFIG_STACK_COLORATION=y
CONFIG_START_DAY=16
CONFIG_START_MONTH=6
CONFIG_START_YEAR=2026
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NSH_STACKSIZE=2500
CONFIG_TIMER=y
CONFIG_TIMER_ARCH=y
CONFIG_USEC_PER_TICK=1000

11
boards/arm/rtl8721f/rtl8721f_evb/src/CMakeLists.txt
View file

@ -22,7 +22,18 @@
set(SRCS rtl8721f_boot.c rtl8721f_bringup.c)
if(CONFIG_AMEBA_GPIO)
list(APPEND SRCS rtl8721f_gpio.c)
endif()
target_sources(board PRIVATE ${SRCS})
if(CONFIG_AMEBA_GPIO)
# The board pin table pulls in the shared driver's public headers from
# arch/arm/src/common/ameba/, not on the default board include path.
target_include_directories(board
PRIVATE ${NUTTX_DIR}/arch/arm/src/common/ameba)
endif()
# LD_SCRIPT is not set here: the Ameba image2 linker script is generated
# (prebuilt/ld.script.gen) and published by the shared ameba_board.cmake.

9
boards/arm/rtl8721f/rtl8721f_evb/src/Makefile
View file

@ -24,4 +24,13 @@ include $(TOPDIR)/Make.defs
CSRCS = rtl8721f_boot.c rtl8721f_bringup.c
ifeq ($(CONFIG_AMEBA_GPIO),y)
CSRCS += rtl8721f_gpio.c
# The board pin table pulls in the shared driver's public header from
# arch/arm/src/common/ameba/, which is not on the default board include path.
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)common$(DELIM)ameba
endif
include $(TOPDIR)/boards/Board.mk

10
boards/arm/rtl8721f/rtl8721f_evb/src/rtl8721f_bringup.c
View file

@ -134,6 +134,16 @@ int rtl8721f_bringup(void)
* follows runs in a task and yields properly.
*/
#ifdef CONFIG_AMEBA_GPIO
/* Register the board's GPIO pins at /dev/gpioN. */
ret = rtl8721f_gpio_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: rtl8721f_gpio_initialize failed: %d\n", ret);
}
#endif
IPC_patch_function(rtos_critical_enter, rtos_critical_exit,
AMEBA_RTOS_CRITICAL_SEMA);
IPC_SEMDelayStub(rtos_time_delay_ms);

98
boards/arm/rtl8721f/rtl8721f_evb/src/rtl8721f_gpio.c Normal file
View file

@ -0,0 +1,98 @@
/****************************************************************************
* boards/arm/rtl8721f/rtl8721f_evb/src/rtl8721f_gpio.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/param.h>
#include <syslog.h>
#include <nuttx/ioexpander/gpio.h>
#include "ameba_gpio.h"
#include "rtl8721f_rtl8721f_evb.h"
#ifdef CONFIG_AMEBA_GPIO
/****************************************************************************
* Private Types
****************************************************************************/
/* One entry per GPIO pin exposed to NuttX. PA_25/26/27 are safe validation
* pins: no SWD (PA_18/19) or LOGUART (PA_2/PB_20) overlap. They are
* registered in order as /dev/gpio0, /dev/gpio1, ...
*/
struct rtl8721f_gpio_s
{
uint8_t pin; /* AMEBA_PA() pin encoding */
enum gpio_pintype_e pintype; /* Input, output or interrupt */
};
/****************************************************************************
* Private Data
****************************************************************************/
static const struct rtl8721f_gpio_s g_gpio_pins[] =
{
{ AMEBA_PA(25), GPIO_OUTPUT_PIN }, /* /dev/gpio0: output */
{ AMEBA_PA(24), GPIO_INPUT_PIN }, /* /dev/gpio1: input */
{ AMEBA_PA(26), GPIO_INTERRUPT_PIN }, /* /dev/gpio2: interrupt */
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: rtl8721f_gpio_initialize
*
* Description:
* Register the board's GPIO pins with the NuttX GPIO upper half.
*
****************************************************************************/
int rtl8721f_gpio_initialize(void)
{
int ret;
size_t i;
for (i = 0; i < nitems(g_gpio_pins); i++)
{
ret = ameba_gpio_register(i, g_gpio_pins[i].pin,
g_gpio_pins[i].pintype);
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: ameba_gpio_register(/dev/gpio%zu) failed: %d\n",
i, ret);
return ret;
}
}
return OK;
}
#endif /* CONFIG_AMEBA_GPIO */

13
boards/arm/rtl8721f/rtl8721f_evb/src/rtl8721f_rtl8721f_evb.h
View file

@ -82,6 +82,19 @@ int rtl8721f_wifi_initialize(void);
void ameba_ipc_initialize(void);
#endif
#ifdef CONFIG_AMEBA_GPIO
/****************************************************************************
* Name: rtl8721f_gpio_initialize
*
* Description:
* Register the board's GPIO pins with the NuttX GPIO upper half
* (boards/arm/rtl8721f/rtl8721f_evb/src/rtl8721f_gpio.c).
*
****************************************************************************/
int rtl8721f_gpio_initialize(void);
#endif
#ifdef CONFIG_RTL8721F_FLASH_FS
/****************************************************************************
* Name: ameba_flash_fs_initialize