From 2a8b076b38bfbc8ff1b68bb0686030c07e6e5921 Mon Sep 17 00:00:00 2001 From: Peter Bee Date: Mon, 13 Sep 2021 14:37:43 +0800 Subject: [PATCH] risc-v/esp32c3: fix pwm driver bug Wrong offset sign and pwm multichan fix Signed-off-by: Peter Bee --- arch/risc-v/src/esp32c3/Kconfig | 1 + arch/risc-v/src/esp32c3/esp32c3_ledc.c | 14 +++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/risc-v/src/esp32c3/Kconfig b/arch/risc-v/src/esp32c3/Kconfig index 87ed7b4f6a9..30126a60c18 100644 --- a/arch/risc-v/src/esp32c3/Kconfig +++ b/arch/risc-v/src/esp32c3/Kconfig @@ -207,6 +207,7 @@ config ESP32C3_LEDC bool "LEDC (PWM)" default n select PWM + select ARCH_HAVE_PWM_MULTICHAN config ESP32C3_GPIO_IRQ bool "GPIO pin interrupts" diff --git a/arch/risc-v/src/esp32c3/esp32c3_ledc.c b/arch/risc-v/src/esp32c3/esp32c3_ledc.c index c769d26a163..2d265bbad73 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_ledc.c +++ b/arch/risc-v/src/esp32c3/esp32c3_ledc.c @@ -105,12 +105,12 @@ /* LEDC timer registers mapping */ #define LEDC_TIMER_REG(r, n) ((r) + (n) * (LEDC_TIMER1_CONF_REG - \ - LEDC_TIMER2_CONF_REG)) + LEDC_TIMER0_CONF_REG)) /* LEDC timer channel registers mapping */ -#define LEDC_CHAN_REG(r, n) ((r) + (n) * (LEDC_CH0_CONF0_REG - \ - LEDC_CH1_CONF0_REG)) +#define LEDC_CHAN_REG(r, n) ((r) + (n) * (LEDC_CH1_CONF0_REG - \ + LEDC_CH0_CONF0_REG)) #define SET_TIMER_BITS(t, r, b) setbits(b, LEDC_TIMER_REG(r, (t)->num)); #define SET_TIMER_REG(t, r, v) putreg32(v, LEDC_TIMER_REG(r, (t)->num)); @@ -632,9 +632,17 @@ static int pwm_start(struct pwm_lowerhalf_s *dev, for (int i = 0; i < channels; i++) { +#ifdef CONFIG_PWM_NCHANNELS + if (priv->chans[i].duty != info->channels[i].duty) +#else if (priv->chans[i].duty != info[i].duty) +#endif { +#ifdef CONFIG_PWM_NCHANNELS + priv->chans[i].duty = info->channels[i].duty; +#else priv->chans[i].duty = info[i].duty; +#endif setup_channel(priv, i); } }