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arch/risc-v/esp32c2: add ESP32-C2 chip support
Introduce RV32IMC chip architecture with HAL integration and Espressif common Kconfig for the ESP8684 SoC, including XTAL, UART0 pin range, and SPI flash clock options. Assisted-by: Claude:claude-opus-5 Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
This commit is contained in:
Marcio Ribeiro
Xiang Xiao
parent
5513029711
commit
25a3aaaa9d
15 changed files with 1155 additions and 13 deletions
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@ -116,6 +116,40 @@ config ARCH_CHIP_ESP32C3_LEGACY
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---help---
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Espressif ESP32-C3 (RV32IMC). Legacy implementation.
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config ARCH_CHIP_ESP32C2
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bool "ESP32-C2"
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select ARCH_RV32
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select ARCH_RV_ISA_M
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select ARCH_RV_ISA_C
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select ARCH_VECNOTIRQ
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select ARCH_HAVE_BOOTLOADER if !ESPRESSIF_SIMPLE_BOOT
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select ARCH_HAVE_I2CRESET
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select ARCH_HAVE_MPU
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select ARCH_HAVE_RESET
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select ARCH_HAVE_RNG
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select ARCH_HAVE_TICKLESS
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select LIBC_ARCH_MEMCPY
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select LIBC_ARCH_MEMCHR
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select LIBC_ARCH_MEMCMP
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select LIBC_ARCH_MEMMOVE
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select LIBC_ARCH_MEMSET
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select LIBC_ARCH_STRCHR
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select LIBC_ARCH_STRCMP
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select LIBC_ARCH_STRCPY
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select LIBC_ARCH_STRLCPY
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select LIBC_ARCH_STRNCPY
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select LIBC_ARCH_STRLEN
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select LIBC_ARCH_STRNLEN
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select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
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select ARCH_HAVE_DEBUG
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select ARCH_HAVE_RAMFUNCS
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select ONESHOT_COUNT if ONESHOT
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select ONESHOT_FAST_DIVISION if ONESHOT
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select ARCH_MINIMAL_VECTORTABLE
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select LIBC_ATOMIC_IRQ
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---help---
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ESP32-C2 chip (ESP8684) with a single RISC-V IMC core @ 120 MHz
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config ARCH_CHIP_ESP32C3
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bool "ESP32-C3"
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select ARCH_RV32
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@ -684,6 +718,7 @@ config ARCH_CHIP
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default "gd32vw55x" if ARCH_CHIP_GD32VW55X
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default "bl602" if ARCH_CHIP_BL602
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default "esp32c3-legacy" if ARCH_CHIP_ESP32C3_LEGACY
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default "esp32c2" if ARCH_CHIP_ESP32C2
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default "esp32c3" if ARCH_CHIP_ESP32C3
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default "esp32c6" if ARCH_CHIP_ESP32C6
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default "esp32h2" if ARCH_CHIP_ESP32H2
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@ -933,6 +968,9 @@ endif
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if ARCH_CHIP_ESP32C3_LEGACY
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source "arch/risc-v/src/esp32c3-legacy/Kconfig"
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endif
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if ARCH_CHIP_ESP32C2
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source "arch/risc-v/src/esp32c2/Kconfig"
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endif
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if ARCH_CHIP_ESP32C3
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source "arch/risc-v/src/esp32c3/Kconfig"
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endif
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2
arch/risc-v/include/esp32c2/.gitignore
vendored
Normal file
2
arch/risc-v/include/esp32c2/.gitignore
vendored
Normal file
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@ -0,0 +1,2 @@
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/gpio_sig_map.h
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/irq.h
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34
arch/risc-v/include/esp32c2/chip.h
Normal file
34
arch/risc-v/include/esp32c2/chip.h
Normal file
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@ -0,0 +1,34 @@
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/****************************************************************************
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* arch/risc-v/include/esp32c2/chip.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_INCLUDE_ESP32C2_CHIP_H
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#define __ARCH_RISCV_INCLUDE_ESP32C2_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#endif /* __ARCH_RISCV_INCLUDE_ESP32C2_CHIP_H */
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@ -233,7 +233,7 @@ if(DEFINED ENV{ESP_HAL_3RDPARTY_VERSION})
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CACHE STRING "ESP HAL 3rdparty version")
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else()
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set(ESP_HAL_3RDPARTY_VERSION
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8d0a898910084206721a0892ab093021bca1496a
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772738e470cbf64b7c0e481fe17b03c922cc6fb5
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CACHE STRING "ESP HAL 3rdparty version")
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endif()
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@ -3,10 +3,11 @@
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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config ESPRESSIF_CHIP_SERIES
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string
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default "esp32c2" if ARCH_CHIP_ESP32C2
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default "esp32c3" if ARCH_CHIP_ESP32C3
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default "esp32c6" if ARCH_CHIP_ESP32C6
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default "esp32h2" if ARCH_CHIP_ESP32H2
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@ -15,6 +16,7 @@ config ESPRESSIF_CHIP_SERIES
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choice ESPRESSIF_FLASH
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prompt "Flash Size"
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default ESPRESSIF_FLASH_2M if ARCH_CHIP_ESP32C2
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default ESPRESSIF_FLASH_4M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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config ESPRESSIF_FLASH_2M
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@ -152,13 +154,14 @@ config ESPRESSIF_FLASH_DETECT
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config ESPRESSIF_NUM_CPUS
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int
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default 1 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
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default 1 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
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default 2 if ARCH_CHIP_ESP32P4
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choice ESPRESSIF_CPU_FREQ
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prompt "CPU frequency"
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default ESPRESSIF_CPU_FREQ_40 if ARCH_CHIP_ESP32P4 && ESPRESSIF_IDF_ENV_FPGA
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default ESPRESSIF_CPU_FREQ_96 if ARCH_CHIP_ESP32H2
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default ESPRESSIF_CPU_FREQ_120 if ARCH_CHIP_ESP32C2
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default ESPRESSIF_CPU_FREQ_160 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
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default ESPRESSIF_CPU_FREQ_360 if ARCH_CHIP_ESP32P4 && ESP32P4_SELECTS_REV_LESS_V3
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default ESPRESSIF_CPU_FREQ_400 if ARCH_CHIP_ESP32P4 && !ESP32P4_SELECTS_REV_LESS_V3
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@ -185,7 +188,7 @@ config ESPRESSIF_CPU_FREQ_64
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config ESPRESSIF_CPU_FREQ_80
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bool "80 MHz"
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depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
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depends on ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
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---help---
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Set the CPU frequency to 80 MHz.
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@ -195,6 +198,12 @@ config ESPRESSIF_CPU_FREQ_96
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---help---
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Set the CPU frequency to 96 MHz.
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config ESPRESSIF_CPU_FREQ_120
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bool "120 MHz"
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depends on ARCH_CHIP_ESP32C2
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---help---
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Set the CPU frequency to 120 MHz.
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config ESPRESSIF_CPU_FREQ_160
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bool "160 MHz"
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depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6
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@ -222,10 +231,30 @@ config ESPRESSIF_CPU_FREQ_MHZ
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default 64 if ESPRESSIF_CPU_FREQ_64
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default 80 if ESPRESSIF_CPU_FREQ_80
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default 96 if ESPRESSIF_CPU_FREQ_96
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default 120 if ESPRESSIF_CPU_FREQ_120
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default 160 if ESPRESSIF_CPU_FREQ_160
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default 360 if ESPRESSIF_CPU_FREQ_360
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default 400 if ESPRESSIF_CPU_FREQ_400
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if ARCH_CHIP_ESP32C2
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choice ESPRESSIF_XTAL_FREQ
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prompt "Main XTAL frequency"
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default ESPRESSIF_XTAL_FREQ_26M
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---help---
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Operating frequency of the main crystal (XTAL) clock.
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Must match the hardware crystal. ESP8684-MINI-1 modules use 26 MHz.
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config ESPRESSIF_XTAL_FREQ_26M
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bool "26 MHz"
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config ESPRESSIF_XTAL_FREQ_40M
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bool "40 MHz"
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endchoice # ESPRESSIF_XTAL_FREQ
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endif # ARCH_CHIP_ESP32C2
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config ESPRESSIF_DFS
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bool "Enable DFS (Dynamic Frequency Scaling)"
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select PM
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@ -1916,6 +1945,7 @@ config ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH_OFFSET
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hex "E-Fuses offset in flash"
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depends on ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH
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default 0x10000 if ESPRESSIF_BOOTLOADER_MCUBOOT
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default 0x100000 if ESPRESSIF_FLASH_2M
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default 0x250000 if !ESPRESSIF_BOOTLOADER_MCUBOOT
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---help---
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Offset in flash where the E-Fuses will be stored when using the "E-Fuses size to keep in flash" option.
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@ -3274,10 +3304,12 @@ config ESPRESSIF_UART0_RS485_DIR_POLARITY
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config ESPRESSIF_UART0_TXPIN
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int "UART0 TX Pin"
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default 20 if ARCH_CHIP_ESP32C2
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default 21 if ARCH_CHIP_ESP32C3
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default 16 if ARCH_CHIP_ESP32C6
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default 24 if ARCH_CHIP_ESP32H2
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default 37 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3285,10 +3317,12 @@ config ESPRESSIF_UART0_TXPIN
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config ESPRESSIF_UART0_RXPIN
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int "UART0 RX Pin"
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default 19 if ARCH_CHIP_ESP32C2
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default 20 if ARCH_CHIP_ESP32C3
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default 17 if ARCH_CHIP_ESP32C6
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default 23 if ARCH_CHIP_ESP32H2
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default 38 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3297,10 +3331,12 @@ config ESPRESSIF_UART0_RXPIN
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config ESPRESSIF_UART0_RTSPIN
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int "UART0 RTS Pin"
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depends on SERIAL_IFLOWCONTROL
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default 18 if ARCH_CHIP_ESP32C2
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default 16 if ARCH_CHIP_ESP32C3
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default 15 if ARCH_CHIP_ESP32C6
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default 22 if ARCH_CHIP_ESP32H2
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default 35 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3309,10 +3345,12 @@ config ESPRESSIF_UART0_RTSPIN
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config ESPRESSIF_UART0_CTSPIN
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int "UART0 CTS Pin"
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depends on SERIAL_OFLOWCONTROL
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default 19 if ARCH_CHIP_ESP32C2
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default 15 if ARCH_CHIP_ESP32C3
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default 14 if ARCH_CHIP_ESP32C6
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default 21 if ARCH_CHIP_ESP32H2
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default 36 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3352,16 +3390,27 @@ config ESPRESSIF_UART1_RS485_DIR_POLARITY
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config ESPRESSIF_UART1_TXPIN
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int "UART1 TX Pin"
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default 8 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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default 8 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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range 0 54 if ARCH_CHIP_ESP32P4
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config ESPRESSIF_UART1_RXPIN
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int "UART1 RX Pin"
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default 9 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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default 9 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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range 0 54 if ARCH_CHIP_ESP32P4
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config ESPRESSIF_UART1_RTSPIN
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int "UART1 RTS Pin"
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depends on SERIAL_IFLOWCONTROL
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default 1 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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default 1 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2 || ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3370,7 +3419,8 @@ config ESPRESSIF_UART1_RTSPIN
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config ESPRESSIF_UART1_CTSPIN
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int "UART1 CTS Pin"
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depends on SERIAL_OFLOWCONTROL
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default 2 if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
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default 2 if ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32H2
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3622,10 +3672,12 @@ config ESPRESSIF_SPI2_SLAVE_BUFSIZE
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config ESPRESSIF_SPI2_CSPIN
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int "SPI2 CS Pin"
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default 10 if ARCH_CHIP_ESP32C2
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default 10 if ARCH_CHIP_ESP32C3
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default 16 if ARCH_CHIP_ESP32C6
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default 1 if ARCH_CHIP_ESP32H2
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default 28 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3633,10 +3685,12 @@ config ESPRESSIF_SPI2_CSPIN
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config ESPRESSIF_SPI2_CLKPIN
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int "SPI2 CLK Pin"
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default 6 if ARCH_CHIP_ESP32C2
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default 6 if ARCH_CHIP_ESP32C3
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default 6 if ARCH_CHIP_ESP32C6
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default 4 if ARCH_CHIP_ESP32H2
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default 30 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3644,10 +3698,12 @@ config ESPRESSIF_SPI2_CLKPIN
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config ESPRESSIF_SPI2_MOSIPIN
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int "SPI2 MOSI Pin"
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default 7 if ARCH_CHIP_ESP32C2
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default 7 if ARCH_CHIP_ESP32C3
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default 7 if ARCH_CHIP_ESP32C6
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default 5 if ARCH_CHIP_ESP32H2
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default 29 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3655,10 +3711,12 @@ config ESPRESSIF_SPI2_MOSIPIN
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config ESPRESSIF_SPI2_MISOPIN
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int "SPI2 MISO Pin"
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default 2 if ARCH_CHIP_ESP32C2
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default 2 if ARCH_CHIP_ESP32C3
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default 2 if ARCH_CHIP_ESP32C6
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default 0 if ARCH_CHIP_ESP32H2
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default 31 if ARCH_CHIP_ESP32P4
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range 0 20 if ARCH_CHIP_ESP32C2
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range 0 21 if ARCH_CHIP_ESP32C3
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range 0 30 if ARCH_CHIP_ESP32C6
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range 0 27 if ARCH_CHIP_ESP32H2
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@ -3883,6 +3941,7 @@ choice ESPRESSIF_FLASH_FREQ
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default ESPRESSIF_FLASH_FREQ_40M if ESP32P4_REV_MIN_0
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default ESPRESSIF_FLASH_FREQ_40M if ARCH_CHIP_ESP32P4 && ESPRESSIF_IDF_ENV_FPGA
|
||||
default ESPRESSIF_FLASH_FREQ_80M if ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
|
||||
default ESPRESSIF_FLASH_FREQ_60M if ARCH_CHIP_ESP32C2
|
||||
default ESPRESSIF_FLASH_FREQ_64M if ARCH_CHIP_ESP32H2
|
||||
---help---
|
||||
SPI Flash frequency.
|
||||
|
|
@ -3896,6 +3955,14 @@ config ESPRESSIF_FLASH_FREQ_64M
|
|||
bool "64 MHz"
|
||||
depends on ARCH_CHIP_ESP32H2
|
||||
|
||||
config ESPRESSIF_FLASH_FREQ_60M
|
||||
bool "60 MHz"
|
||||
depends on ARCH_CHIP_ESP32C2
|
||||
|
||||
config ESPRESSIF_FLASH_FREQ_30M
|
||||
bool "30 MHz"
|
||||
depends on ARCH_CHIP_ESP32C2
|
||||
|
||||
config ESPRESSIF_FLASH_FREQ_40M
|
||||
bool "40 MHz"
|
||||
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
|
||||
|
|
@ -3906,7 +3973,11 @@ config ESPRESSIF_FLASH_FREQ_26M
|
|||
|
||||
config ESPRESSIF_FLASH_FREQ_20M
|
||||
bool "20 MHz"
|
||||
depends on ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
|
||||
depends on ARCH_CHIP_ESP32C2 || ARCH_CHIP_ESP32C3 || ARCH_CHIP_ESP32C6 || ARCH_CHIP_ESP32P4
|
||||
|
||||
config ESPRESSIF_FLASH_FREQ_15M
|
||||
bool "15 MHz"
|
||||
depends on ARCH_CHIP_ESP32C2
|
||||
|
||||
endchoice # ESPRESSIF_FLASH_FREQ
|
||||
|
||||
|
|
@ -3925,6 +3996,7 @@ config ESPRESSIF_FLASH_FREQ
|
|||
default '40m' if ESPRESSIF_FLASH_FREQ_40M
|
||||
default '26m' if ESPRESSIF_FLASH_FREQ_26M
|
||||
default '20m' if ESPRESSIF_FLASH_FREQ_20M
|
||||
default '15m' if ESPRESSIF_FLASH_FREQ_15M
|
||||
default '12m' if ESPRESSIF_FLASH_FREQ_16M
|
||||
default '20m' # if no clock can match in bin headers, go with minimal.
|
||||
|
||||
|
|
@ -3977,14 +4049,16 @@ config ESPRESSIF_STORAGE_MTD_DEBUG
|
|||
|
||||
config ESPRESSIF_STORAGE_MTD_OFFSET
|
||||
hex "Storage MTD base address in SPI Flash"
|
||||
default 0x180000 if !ESPRESSIF_BOOTLOADER_MCUBOOT
|
||||
default 0x300000 if ESPRESSIF_BOOTLOADER_MCUBOOT
|
||||
default 0x110000 if ESPRESSIF_FLASH_2M
|
||||
default 0x180000 if !ESPRESSIF_BOOTLOADER_MCUBOOT
|
||||
depends on ESPRESSIF_MTD
|
||||
---help---
|
||||
MTD base address in SPI Flash.
|
||||
|
||||
config ESPRESSIF_STORAGE_MTD_SIZE
|
||||
hex "Storage MTD size in SPI Flash"
|
||||
default 0xf0000 if ESPRESSIF_FLASH_2M
|
||||
default 0x100000
|
||||
depends on ESPRESSIF_MTD
|
||||
---help---
|
||||
|
|
|
|||
|
|
@ -243,7 +243,7 @@ endif
|
|||
|
||||
ESP_HAL_3RDPARTY_REPO = esp-hal-3rdparty
|
||||
ifndef ESP_HAL_3RDPARTY_VERSION
|
||||
ESP_HAL_3RDPARTY_VERSION = 8d0a898910084206721a0892ab093021bca1496a
|
||||
ESP_HAL_3RDPARTY_VERSION = 772738e470cbf64b7c0e481fe17b03c922cc6fb5
|
||||
endif
|
||||
|
||||
ifndef ESP_HAL_3RDPARTY_URL
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@
|
|||
|
||||
#include "esp_private/vectors_const.h"
|
||||
|
||||
#ifndef CONFIG_ARCH_CHIP_ESP32C3
|
||||
#if !defined(CONFIG_ARCH_CHIP_ESP32C3) && !defined(CONFIG_ARCH_CHIP_ESP32C2)
|
||||
# include "soc/hp_system_reg.h"
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -93,7 +93,12 @@
|
|||
# define MISO_PIN_ATTR (INPUT_FUNCTION_2 | PULLUP)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_ESP32C3)
|
||||
#if defined(CONFIG_ARCH_CHIP_ESP32C2)
|
||||
#define SPI2_IOMUX_MISOPIN 2
|
||||
#define SPI2_IOMUX_MOSIPIN 7
|
||||
#define SPI2_IOMUX_CLKPIN 6
|
||||
#define SPI2_IOMUX_CSPIN 10
|
||||
#elif defined(CONFIG_ARCH_CHIP_ESP32C3)
|
||||
#define SPI2_IOMUX_MISOPIN 2
|
||||
#define SPI2_IOMUX_MOSIPIN 7
|
||||
#define SPI2_IOMUX_CLKPIN 6
|
||||
|
|
@ -1068,6 +1073,7 @@ static void esp_spi_dma_exchange(struct esp_spi_priv_s *priv,
|
|||
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
|
||||
esp_err_t ret = esp_cache_msync((void *)txbuffer_temp,
|
||||
tx_byte_len, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
|
||||
|
||||
assert(ret == ESP_OK);
|
||||
#endif
|
||||
|
||||
|
|
|
|||
4
arch/risc-v/src/esp32c2/.gitignore
vendored
Normal file
4
arch/risc-v/src/esp32c2/.gitignore
vendored
Normal file
|
|
@ -0,0 +1,4 @@
|
|||
/bootloader
|
||||
/esp-nuttx-bootloader
|
||||
/*.zip
|
||||
/esp-hal-3rdparty
|
||||
31
arch/risc-v/src/esp32c2/CMakeLists.txt
Normal file
31
arch/risc-v/src/esp32c2/CMakeLists.txt
Normal file
|
|
@ -0,0 +1,31 @@
|
|||
# ##############################################################################
|
||||
# arch/risc-v/src/esp32c2/CMakeLists.txt
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
|
||||
# license agreements. See the NOTICE file distributed with this work for
|
||||
# additional information regarding copyright ownership. The ASF licenses this
|
||||
# file to you under the Apache License, Version 2.0 (the "License"); you may not
|
||||
# use this file except in compliance with the License. You may obtain a copy of
|
||||
# the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations under
|
||||
# the License.
|
||||
#
|
||||
# ##############################################################################
|
||||
|
||||
add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common/espressif espressif)
|
||||
|
||||
set(SRCS esp_chip_rev.c)
|
||||
|
||||
target_compile_definitions(arch PRIVATE _RETARGETABLE_LOCKING)
|
||||
|
||||
if(SRCS)
|
||||
target_sources(arch PRIVATE ${SRCS})
|
||||
endif()
|
||||
10
arch/risc-v/src/esp32c2/Kconfig
Normal file
10
arch/risc-v/src/esp32c2/Kconfig
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#
|
||||
# For a description of the syntax of this configuration file,
|
||||
# see the file kconfig-language.txt in the NuttX tools repository.
|
||||
#
|
||||
|
||||
if ARCH_CHIP_ESP32C2
|
||||
|
||||
source "arch/risc-v/src/common/espressif/Kconfig"
|
||||
|
||||
endif # ARCH_CHIP_ESP32C2
|
||||
28
arch/risc-v/src/esp32c2/Make.defs
Normal file
28
arch/risc-v/src/esp32c2/Make.defs
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
############################################################################
|
||||
# arch/risc-v/src/esp32c2/Make.defs
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
include common/Make.defs
|
||||
include common/espressif/Make.defs
|
||||
|
||||
CHIP_CSRCS += esp_chip_rev.c
|
||||
|
||||
CFLAGS += ${DEFINE_PREFIX}_RETARGETABLE_LOCKING
|
||||
50
arch/risc-v/src/esp32c2/esp_chip_rev.c
Normal file
50
arch/risc-v/src/esp32c2/esp_chip_rev.c
Normal file
|
|
@ -0,0 +1,50 @@
|
|||
/****************************************************************************
|
||||
* arch/risc-v/src/esp32c2/esp_chip_rev.c
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: esp_chip_revision_check
|
||||
*
|
||||
* Description:
|
||||
* Checks if the current chip revision is greater than the minimum
|
||||
* revision supported by NuttX. If the chip revision is not supported, an
|
||||
* error or warning message is printed, and the system may halt unless
|
||||
* the configuration allows ignoring the chip revision check.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void esp_chip_revision_check(void)
|
||||
{
|
||||
}
|
||||
523
arch/risc-v/src/esp32c2/hal_esp32c2.cmake
Normal file
523
arch/risc-v/src/esp32c2/hal_esp32c2.cmake
Normal file
|
|
@ -0,0 +1,523 @@
|
|||
# ##############################################################################
|
||||
# arch/risc-v/src/esp32c2/hal_esp32c2.cmake
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more contributor
|
||||
# license agreements. See the NOTICE file distributed with this work for
|
||||
# additional information regarding copyright ownership. The ASF licenses this
|
||||
# file to you under the Apache License, Version 2.0 (the "License"); you may not
|
||||
# use this file except in compliance with the License. You may obtain a copy of
|
||||
# the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations under
|
||||
# the License.
|
||||
#
|
||||
# ##############################################################################
|
||||
|
||||
# ##############################################################################
|
||||
# Include Paths
|
||||
# ##############################################################################
|
||||
|
||||
if(NOT EXISTS ${ESP_HAL_3RDPARTY_REPO})
|
||||
message(
|
||||
FATAL_ERROR
|
||||
"ESP_HAL_3RDPARTY_REPO does not exist: ${ESP_HAL_3RDPARTY_REPO}. Please ensure the HAL 3rd party repository is cloned correctly."
|
||||
)
|
||||
endif()
|
||||
|
||||
target_include_directories(
|
||||
arch
|
||||
PRIVATE
|
||||
# NuttX specific includes
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/include/mbedtls
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_driver_uart/include
|
||||
# Bootloader support
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/private_include
|
||||
# Driver components
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/driver/spi/include
|
||||
# EFUSE
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/private_include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/private_include
|
||||
# ESP ADC
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/interface
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/include
|
||||
# ESP Common
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_common/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_event/include
|
||||
# ESP HAL components (upper HAL and per-chip)
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_uart/include
|
||||
# ESP HW Support
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/dma/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/esp_private
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/include/soc/${CHIP_SERIES}
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/ldo/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_intr/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi/mspi_timing_tuning/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/private_include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mspi_timing_tuning/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/etm/include
|
||||
# ESP MM
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_mm
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/include
|
||||
# ESP PHY
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/include
|
||||
# ESP PM
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_pm
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/include
|
||||
# ESP ROM
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/include/${CHIP_SERIES}
|
||||
# ESP System
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/include/private
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/public_compat
|
||||
# ESP Timer
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/private_include
|
||||
# ESP Wi-Fi
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_wifi/include
|
||||
# ESP Security
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_security/include
|
||||
# HAL
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/platform_port/include
|
||||
# HAL sub-components (hal/*.h)
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/${CHIP_SERIES}/include
|
||||
# ESP HAL PMU (for sleep_cpu: hal/rtc_hal.h)
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_rtc_timer/${CHIP_SERIES}/include
|
||||
# ESP HAL TIMG (for wdt: hal/timg_ll.h)
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/include
|
||||
# ESP HAL UART (for sleep_uart: hal/uart_hal.h)
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/include
|
||||
# ESP HAL WDT (for bootloader: hal/wdt_hal.h)
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/${CHIP_SERIES}/include
|
||||
# Heap
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/heap/include
|
||||
# Log
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level
|
||||
# mbedTLS (tf-psa-crypto builtin must come before mbedtls/include so
|
||||
# mbedtls/private/* are found)
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/include/aes
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/port/psa_driver/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/drivers/builtin/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/core
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/mbedtls/mbedtls/tf-psa-crypto/include
|
||||
# Newlib / esp_libc
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/newlib/priv_include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_libc/priv_include
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/esp_libc/platform_include
|
||||
# RISC-V
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/riscv/include
|
||||
# SOC
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/soc/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/register
|
||||
# SPI Flash
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/spi_flash
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/include/esp_flash_chips
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_blockdev/include)
|
||||
|
||||
# Additional includes for simple boot
|
||||
if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
|
||||
target_include_directories(
|
||||
arch PRIVATE ${ESP_HAL_3RDPARTY_REPO}/components/esp_app_format/include)
|
||||
endif()
|
||||
|
||||
# ##############################################################################
|
||||
# Linker Scripts
|
||||
# ##############################################################################
|
||||
|
||||
set(ESP_ROM_LD_DIR
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/${CHIP_SERIES}/ld)
|
||||
set(ESP_SOC_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/ld)
|
||||
set(ESP_RISCV_LD_DIR ${ESP_HAL_3RDPARTY_REPO}/components/riscv/ld)
|
||||
|
||||
set(_esp32c2_rom_ld_files
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.api.ld
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.bt_funcs.ld
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.ld
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc.ld
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libc-suboptimal_for_misaligned_mem.ld
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.libgcc.ld
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.newlib.ld
|
||||
${ESP_ROM_LD_DIR}/${CHIP_SERIES}.rom.version.ld
|
||||
${ESP_SOC_LD_DIR}/${CHIP_SERIES}.peripherals.ld
|
||||
${ESP_RISCV_LD_DIR}/rom.api.ld)
|
||||
|
||||
# Add these files to the GLOBAL PROPERTY LD_SCRIPT
|
||||
set_property(GLOBAL APPEND PROPERTY LD_SCRIPT ${_esp32c2_rom_ld_files})
|
||||
|
||||
# ##############################################################################
|
||||
# HAL Source Files
|
||||
# ##############################################################################
|
||||
|
||||
set(HAL_SRCS)
|
||||
|
||||
# ESP ADC sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/adc_cali.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_adc/${CHIP_SERIES}/adc_cali_line_fitting.c
|
||||
)
|
||||
|
||||
# Bootloader support sources
|
||||
list(
|
||||
APPEND HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_efuse.c)
|
||||
|
||||
# EFUSE sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_api.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_utility.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_fields.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/esp_efuse_startup.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_fields.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_rtc_calib.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_table.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/${CHIP_SERIES}/esp_efuse_utility.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/efuse/src/efuse_controller/keys/without_key_purposes/one_key_block/esp_efuse_api_key.c
|
||||
)
|
||||
|
||||
# ESP Common sources
|
||||
list(APPEND HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_common/src/esp_err_to_name.c)
|
||||
|
||||
# ESP HW Support sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/adc_share_hw_ctrl.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_ctrl_os.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/clk_utils.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/cpu.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_dma/src/gdma.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_clk.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_gpio_reserve.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/esp_memory_utils.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/hw_random.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/intr_alloc.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/mac_addr.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/periph_ctrl.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/regi2c_ctrl.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/rtc_module.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modes.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_uart.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_modem.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/esp_clk_tree_common.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_clk_tree.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/esp_cpu_intr.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/cpu_region_protect.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_clk_init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_sleep.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/rtc_time.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/sar_periph_ctrl.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/port/${CHIP_SERIES}/systimer.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/power_supply/brownout.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_console.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_event.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hw_support/sleep_gpio.c)
|
||||
|
||||
# ESP MM sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_msync.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_mmu_map.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/esp_cache_utils.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_mm/port/${CHIP_SERIES}/ext_mem_layout.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/heap/port/${CHIP_SERIES}/memory_layout.c)
|
||||
|
||||
# ESP PHY sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/lib_printf.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_common.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/src/phy_init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_phy/${CHIP_SERIES}/phy_init_data.c)
|
||||
|
||||
# ESP PM sources
|
||||
list(APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/pm_locks.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_pm/pm_impl.c)
|
||||
|
||||
# ESP ROM sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_sys.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_print.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_crc.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_serial_output.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_spiflash.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_efuse.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_gpio.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_rom/patches/esp_rom_systimer.c)
|
||||
|
||||
# ESP System sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_err.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/esp_system.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/startup_funcs.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/system_time.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/clk.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_system/port/soc/${CHIP_SERIES}/system_internal.c
|
||||
)
|
||||
|
||||
# ESP Timer
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer_init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer_impl_systimer.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/system_time.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_timer/src/esp_timer_impl_common.c)
|
||||
|
||||
# Make) HAL sources (paths from hal_esp32c2.mk: esp_hal_* and hal components)
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_hal_common.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/adc_oneshot_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/brownout_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_pmu/${CHIP_SERIES}/rtc_cntl_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/cache_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/efuse_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/gpio_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_ahb_v1.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/gdma_hal_top.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/hal_utils.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/ledc_hal_iram.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/systimer_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/timer_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/mmu_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/i2c_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_security/sha_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/spi_hal_iram.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/uart_hal_iram.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_wdt/wdt_hal_iram.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_iram.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_hal_gpspi.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_mspi/spi_flash_encrypt_hal_iram.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_clock/${CHIP_SERIES}/clk_tree_hal.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/hal/${CHIP_SERIES}/efuse_hal.c)
|
||||
|
||||
# Log sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/log.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/log_level.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/tag_log_level.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/log_level/tag_log_level/linked_list/log_linked_list.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_lock.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/noos/log_timestamp.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/log_write.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/log/src/os/util.c)
|
||||
|
||||
# RISC-V sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/riscv/instruction_decode.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/riscv/interrupt_intc.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/riscv/rv_utils.c)
|
||||
|
||||
# SPI Flash sources
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_generic.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_boya.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_gd.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_winbond.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_issi.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_mxic_opi.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_mxic.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_th.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_chip_drivers.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/memspi_host_driver.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_brownout_hook.c)
|
||||
|
||||
# Cache (relates to SPI Flash)
|
||||
|
||||
set(CACHE_SRCS)
|
||||
list(
|
||||
APPEND
|
||||
CACHE_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/cache_utils.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_mmap.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/flash_ops.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_api.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/esp_flash_spi_init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_app.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_os_func_noos.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/spi_flash/spi_flash_wrap.c)
|
||||
|
||||
list(APPEND HAL_SRCS ${CACHE_SRCS})
|
||||
|
||||
# Avoid cache miss by unexpected inlineing when built by -Os
|
||||
set_source_files_properties(
|
||||
${CACHE_SRCS} DIRECTORY ../../../../
|
||||
PROPERTIES
|
||||
COMPILE_FLAGS
|
||||
"-fno-inline-functions -fno-inline-small-functions -fno-inline-functions-called-once"
|
||||
)
|
||||
|
||||
# SOC sources (paths from hal_esp32c2.mk: esp_hal_* periph and soc)
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/soc/lldesc.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/adc_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpio/${CHIP_SERIES}/dedic_gpio_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_dma/${CHIP_SERIES}/gdma_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/gpio_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ledc/${CHIP_SERIES}/ledc_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_i2c/${CHIP_SERIES}/i2c_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/soc/${CHIP_SERIES}/interrupts.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_gpspi/${CHIP_SERIES}/spi_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_ana_conv/${CHIP_SERIES}/temperature_sensor_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_timg/${CHIP_SERIES}/timer_periph.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_hal_uart/${CHIP_SERIES}/uart_periph.c)
|
||||
|
||||
# ESP Security sources
|
||||
list(
|
||||
APPEND HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_lock.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/esp_security/src/esp_crypto_periph_clk.c)
|
||||
|
||||
# init)
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/src/platform/os.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/src/heap_caps.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/src/components/newlib/newlib/libc/misc/init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/gpio.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_gpio/src/rtc_io.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/upper_hal_uart/src/uart_wakeup.c)
|
||||
|
||||
if(CONFIG_ESPRESSIF_WIFI OR CONFIG_ESPRESSIF_EMAC)
|
||||
list(APPEND HAL_SRCS ${ESP_HAL_3RDPARTY_REPO}/nuttx/src/esp_event.c)
|
||||
endif()
|
||||
|
||||
# Bootloader flash encrypt source
|
||||
list(APPEND HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/flash_encrypt.c)
|
||||
|
||||
# Bootloader common
|
||||
list(
|
||||
APPEND HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_mem.c)
|
||||
|
||||
# ##############################################################################
|
||||
# Simple Boot Sources
|
||||
# ##############################################################################
|
||||
|
||||
if(CONFIG_ESPRESSIF_SIMPLE_BOOT)
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/nuttx/src/bootloader_banner_wrap.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_console_loader.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_${CHIP_SERIES}.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_common_loader.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_clock_init.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/bootloader_random_${CHIP_SERIES}.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/esp_image_format.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/src/${CHIP_SERIES}/bootloader_soc.c
|
||||
)
|
||||
|
||||
target_link_options(nuttx PRIVATE -Wl,--wrap=bootloader_print_banner)
|
||||
|
||||
elseif(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH)
|
||||
# Special case for bootloader_flash when using efuse virtual mode
|
||||
list(
|
||||
APPEND
|
||||
HAL_SRCS
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
|
||||
${ESP_HAL_3RDPARTY_REPO}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${CHIP_SERIES}.c
|
||||
)
|
||||
endif()
|
||||
|
||||
# ##############################################################################
|
||||
# Add HAL sources to arch target
|
||||
# ##############################################################################
|
||||
|
||||
target_sources(arch PRIVATE ${HAL_SRCS})
|
||||
342
arch/risc-v/src/esp32c2/hal_esp32c2.mk
Normal file
342
arch/risc-v/src/esp32c2/hal_esp32c2.mk
Normal file
|
|
@ -0,0 +1,342 @@
|
|||
############################################################################
|
||||
# arch/risc-v/src/esp32c2/esp32c2.mk
|
||||
#
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
# Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
# contributor license agreements. See the NOTICE file distributed with
|
||||
# this work for additional information regarding copyright ownership. The
|
||||
# ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
# "License"); you may not use this file except in compliance with the
|
||||
# License. You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
# License for the specific language governing permissions and limitations
|
||||
# under the License.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# Include header paths
|
||||
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_driver_uart$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)driver$(DELIM)spi$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)interface
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_blockdev$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)dma$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)etm$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_intr$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi_timing_tuning$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)public_compat
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)private_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_wifi$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include$(DELIM)aes
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)psa_driver$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)core
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)drivers$(DELIM)builtin$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_libc$(DELIM)priv_include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)esp_flash_chips
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_uart$(DELIM)include
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_libc$(DELIM)platform_include
|
||||
|
||||
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
|
||||
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_app_format$(DELIM)include
|
||||
endif
|
||||
|
||||
# Linker scripts
|
||||
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ble.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.mbedtls.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
|
||||
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
|
||||
|
||||
# Source files
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_cali_line_fitting.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_efuse.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_api.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_utility.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_startup.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_calib.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)without_key_purposes$(DELIM)one_key_block$(DELIM)esp_efuse_api_key.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_gpio_reserve.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_memory_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)intr_alloc.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)rtc_module.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_uart.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modem.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_cpu_intr.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_sleep.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_console.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_event.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_msync.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_mmu_map.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)ext_mem_layout.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)lib_printf.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)$(CHIP_SERIES)$(DELIM)phy_init_data.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)pm_locks.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)pm_impl.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_sys.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_print.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_crc.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_serial_output.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_spiflash.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_efuse.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_system.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup_funcs.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)system_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_systimer.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)system_time.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)src$(DELIM)esp_timer_impl_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_hal_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_oneshot_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)brownout_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_cntl_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)gpio_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_ahb_v1.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_top.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)hal_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)systimer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)timer_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)i2c_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)sha_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)wdt_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_gpspi.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_encrypt_hal_iram.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)port$(DELIM)${CHIP_SERIES}$(DELIM)memory_layout.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)linked_list$(DELIM)log_linked_list.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_lock.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)util.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)instruction_decode.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_intc.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_noos.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_app.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_generic.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_boya.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_gd.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_winbond.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_issi.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_mxic_opi.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_mxic.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_th.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_api.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_ops.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_drivers.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)memspi_host_driver.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_spi_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_mmap.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_brownout_hook.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)cache_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)lldesc.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)dedic_gpio_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)gdma_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)i2c_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)interrupts.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)${CHIP_SERIES}$(DELIM)uart_periph.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_lock.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_periph_clk.c
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)platform$(DELIM)os.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)heap_caps.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)newlib$(DELIM)newlib$(DELIM)libc$(DELIM)misc$(DELIM)init.c
|
||||
|
||||
ifneq ($(CONFIG_ESPRESSIF_WIFI)$(CONFIG_ESPRESSIF_EMAC),)
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)esp_event.c
|
||||
endif
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)gpio.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)rtc_io.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_uart$(DELIM)src$(DELIM)uart_wakeup.c
|
||||
|
||||
# Bootloader files
|
||||
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
|
||||
|
||||
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console_loader.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_${CHIP_SERIES}.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common_loader.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)flash_qio_mode.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_init.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
|
||||
|
||||
LDFLAGS += --wrap=bootloader_print_banner
|
||||
else
|
||||
ifeq ($(CONFIG_ESPRESSIF_EFUSE_VIRTUAL_KEEP_IN_FLASH),y)
|
||||
# Special case for bootloader_flash when using efuse virtual mode
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c
|
||||
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
|
||||
endif
|
||||
endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue