From 2248a2022402abd852893e9ca83226760541a7eb Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 30 Sep 2014 08:03:39 -0600 Subject: [PATCH] Repartition some message queue logic: sched/mqueue should have all mqueue knowledge; fs/mqueue should deal only with inodes --- configs/galileo/README.txt | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/configs/galileo/README.txt b/configs/galileo/README.txt index 2e1452e5289..f25bd29ae88 100755 --- a/configs/galileo/README.txt +++ b/configs/galileo/README.txt @@ -48,5 +48,28 @@ Serial Console UART1 may be convenient because of its built-in RS232 drivers. But if you have a standard RS-232 shield, then UART0 may be the better choice. +Running from SRAM +================= + + The Host Bridge contains an interface to 512KB of on-chip, low latency, + embedded SRAM (eSRAM). The eSRAM memory may be used as either 128 x 4KB + pages, or in block mode as a single contiguous 512KB block page. The + eSRAM pages may be mapped anywhere in the physical address space as a + DRAM overlay. + + To map the eSRAM as a single 512KB block page, the register + ESRAMPGCTRL_BLOCK is used. If any of the 4KB pages are already enabled, + it is not possible to enable the block page. + + To map and enable the 512KB block page, the following steps should be + followed: + + - Set ESRAMPGCTRL_BLOCK.BLOCK_PG_SYSTEM_ADDRESS_16MB to the required + address value + - Set ESRAMPGCTRL_BLOCK.BLOCK_ENABLE_PG to 1 + + Once an eSRAM page is enabled, it is implicitly locked and any further + configuration change attempts will fail. + Configurations ==============