boards/stm32wb: Flipper Zero initial support

boards/Kconfig

@@ -1494,6 +1494,15 @@ config ARCH_BOARD_NUCLEO_L552ZE
 	---help---
 		STMicro Nucleo STM32L552 board based on the STMicro STM32L552ZET6 MCU.
 
+config ARCH_BOARD_FLIPPERZERO
+	bool "Flipper Zero"
+	depends on ARCH_CHIP_STM32WB55RG
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		Flipper Zero device based on the STMicro STM32WB55RGV6 MCU.
+
 config ARCH_BOARD_NUCLEO_WB55RG
 	bool "STM32WB55 Nucleo WB55RG"
 	depends on ARCH_CHIP_STM32WB55RG
@@ -2737,6 +2746,7 @@ config ARCH_BOARD
 	default "steval-stlcs01v1"         if ARCH_BOARD_STEVAL_STLCS01V1
 	default "nucleo-l496zg"            if ARCH_BOARD_NUCLEO_L496ZG
 	default "nucleo-l552ze"            if ARCH_BOARD_NUCLEO_L552ZE
+	default "flipperzero"              if ARCH_BOARD_FLIPPERZERO
 	default "nucleo-wb55rg"            if ARCH_BOARD_NUCLEO_WB55RG
 	default "nucleo-wl55jc"            if ARCH_BOARD_NUCLEO_WL55JC
 	default "nutiny-nuc120"            if ARCH_BOARD_NUTINY_NUC120
@@ -3308,6 +3318,9 @@ endif
 if ARCH_BOARD_STM32L562E_DK
 source "boards/arm/stm32l5/stm32l562e-dk/Kconfig"
 endif
+if ARCH_BOARD_FLIPPERZERO
+source "boards/arm/stm32wb/flipperzero/Kconfig"
+endif
 if ARCH_BOARD_NUCLEO_WB55RG
 source "boards/arm/stm32wb/nucleo-wb55rg/Kconfig"
 endif

boards/arm/stm32wb/flipperzero/Kconfig

@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_FLIPPERZERO
+
+endif # ARCH_BOARD_FLIPPERZERO

boards/arm/stm32wb/flipperzero/README.txt

@@ -0,0 +1,60 @@
+README.txt
+==========
+
+  This README file discusses the port of NuttX to the Flipper Zero multi-tool
+  device. See https://flipperzero.one/ for device details.
+
+Contents
+========
+
+  - Device features
+  - Status
+  - Programming
+  - Serial Console
+  - Configurations
+
+Device features
+===============
+
+  - Multi-protocol wireless STM32WB55RGV6 MCU with 1MiB of Flash and 256KiB of SRAM.
+  - USB Type-C connector for communication and charging
+  - LiPo battery with charger BQ25896 and fuel gauge BQ27220
+  - 5-button joystick and a Back button
+  - ST7565 128x64 LCD
+  - RGB LED with LP5562 I2C driver
+  - Buzzer
+  - Vibration motor
+  - Micro SD slot connected over SPI
+  - CC1101 RF transceiver
+  - ST25R3916 high-performance NFC Universal Device and EMVCo reader
+  - 125 kHz RFID analog circuit
+  - IR led
+  - TSOP75538 IR receiver
+  - iButton connector
+  - GPIO connector with power out and SWD pins
+
+Status
+======
+
+  Oct 2022: initial nsh configuration.
+
+Programming
+===========
+
+  The device can be normally flashing and debugging over SWD interface or flashing via
+  USB interface when the device is in DFU mode using STMicro's STM32CubeProgrammer. The
+  DFU mode will be activated after pressing two round button for 30s. Original firmware
+  can be flashed back and stay working until the secure flash area is not changed.
+
+Serial Console
+==============
+
+  The MCU's USART1 PB6/PB7 pins are available as external GPIO pins 13/14.
+
+Configurations
+==============
+
+  nsh:
+
+    Configures the NuttShell (nsh) located at examples/nsh.  This
+    configuration is focused on low level, command-line driver testing.

boards/arm/stm32wb/flipperzero/configs/nsh/defconfig

@@ -0,0 +1,42 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_LEDS is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="flipperzero"
+CONFIG_ARCH_BOARD_FLIPPERZERO=y
+CONFIG_ARCH_CHIP="stm32wb"
+CONFIG_ARCH_CHIP_STM32WB55RG=y
+CONFIG_ARCH_CHIP_STM32WB=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=6500
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INTELHEX_BINARY=y
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=196608
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_STM32WB_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+CONFIG_STM32WB_DMA1=y
+CONFIG_STM32WB_PWR=y
+CONFIG_STM32WB_USART1=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_TESTING_OSTEST=y
+CONFIG_USART1_SERIAL_CONSOLE=y

boards/arm/stm32wb/flipperzero/include/board.h

@@ -0,0 +1,115 @@
+/****************************************************************************
+ * boards/arm/stm32wb/flipperzero/include/board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32WB_FLIPPERZERO_INCLUDE_BOARD_H
+#define __BOARDS_ARM_STM32WB_FLIPPERZERO_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#ifndef __ASSEMBLY__
+#  include <stdint.h>
+#endif
+
+/* Clocking *****************************************************************/
+
+#include "flipperzero-clocking.h"
+
+/* Do not include STM32WB header files here */
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* USART */
+
+#define GPIO_USART1_TX GPIO_USART1_TX_2    /* PB6 */
+#define GPIO_USART1_RX GPIO_USART1_RX_2    /* PB7 */
+
+/* LEDs */
+
+/* LED index values for use with board_userled() */
+
+/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
+ * defined.  In that case, the usage by the board port is defined in
+ * include/board.h and src/stm32_autoleds.c.
+ */
+
+#define LED_STARTED      0
+#define LED_HEAPALLOCATE 0
+#define LED_IRQSENABLED  0
+#define LED_STACKCREATED 1
+#define LED_INIRQ        1
+#define LED_SIGNAL       2
+#define LED_ASSERTION    2
+#define LED_PANIC        1
+
+/* Buttons */
+
+#define BUTTON_SW1        0  /* PC4, needs SB47 close */
+#define BUTTON_SW2        1  /* PD0 */
+#define BUTTON_SW3        2  /* PD1 */
+#define NUM_BUTTONS       3
+
+#define BUTTON_SW1_BIT    (1 << BUTTON_SW1)
+#define BUTTON_SW2_BIT    (1 << BUTTON_SW2)
+#define BUTTON_SW3_BIT    (1 << BUTTON_SW3)
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32wb_board_initialize
+ *
+ * Description:
+ *   All STM32WB architectures must provide the following entry point.
+ *   This entry point is called early in the initialization -- after all
+ *   memory has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void stm32wb_board_initialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_STM32WB_FLIPPERZERO_INCLUDE_BOARD_H */

boards/arm/stm32wb/flipperzero/include/flipperzero-clocking.h

@@ -0,0 +1,261 @@
+/****************************************************************************
+ * boards/arm/stm32wb/flipperzero/include/flipperzero-clocking.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32WB_FLIPPERZERO_INCLUDE_FLIPPERZERO_CLOCKING_H
+#define __BOARDS_ARM_STM32WB_FLIPPERZERO_INCLUDE_FLIPPERZERO_CLOCKING_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#ifndef __ASSEMBLY__
+#  include <stdint.h>
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* The Flipper Zero has 32MHz HSE crystal X1. The device can run off the HSI
+ * clock, or the MSI, or the HSE.  Here we configure HSE to give us 64MHz
+ * system clock (maximum supported for STM32WB chips)
+ */
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC
+ * MSI - variable up to 48 MHz, synchronized to LSE
+ * HSE - 32 MHz installed
+ * LSE - 32.768 kHz installed
+ * HSI48 - 48 MHz fine-granularity trimmable RC with CRS
+ */
+
+#define STM32WB_HSI_FREQUENCY           16000000ul
+#define STM32WB_LSI_FREQUENCY           32000
+#define STM32WB_LSE_FREQUENCY           32768
+#define STM32WB_HSE_FREQUENCY           32000000ul
+
+/* XXX there needs to be independent selections for the System Clock Mux and
+ * the PLL Source Mux; currently System Clock Mux always is PLL, and PLL
+ * Source Mux is chosen by the following define.  This is probably OK in many
+ * cases, but should be separated to support other power configurations.
+ */
+
+#if 0
+#  define HSI_CLOCK_CONFIG              1 /* HSI clock configuration */
+#elif 1
+#  define HSE_CLOCK_CONFIG              1 /* HSE with 32MHz xtal */
+#else
+#  define MSI_CLOCK_CONFIG              1 /* MSI @ 4MHz autotrimmed via LSE */
+#endif
+
+#if 0
+#  define STM32WB_BOARD_RFWKP_USEHSE    1 /* CPU2 use HSE/1024 on RF wakeup */
+#elif 1
+#  define STM32WB_BOARD_RFWKP_USELSE    1 /* CPU2 use LSE on RF wakeup */
+#endif
+
+#if defined(HSI_CLOCK_CONFIG)
+
+#define STM32WB_BOARD_USEHSI            1
+
+#define STM32WB_SYSCLK_FREQUENCY        64000000ul
+
+/* Prescaler common to all PLL inputs; will be 1 */
+
+#define STM32WB_PLLCFG_PLLM             RCC_PLLCFG_PLLM(1)
+
+/* 'main' PLL config; we use this to generate our system clock via the R
+ *  output.  We set it up as (((16MHz / 1) * 8) / 2) = 64MHz
+ */
+
+#define STM32WB_PLLCFG_PLLN             RCC_PLLCFG_PLLN(8)
+#define STM32WB_PLLCFG_PLLR_ENABLED
+#define STM32WB_PLLCFG_PLLR             RCC_PLLCFG_PLLR(2)
+
+/* 'SAIPLL1' is not used */
+
+#define STM32WB_PLLSAI1CFG_PLLN         RCC_PLLSAI1CFG_PLLN(8)
+
+/* CLK48 will come from HSI48 */
+
+#define STM32WB_USE_CLK48               1
+#define STM32WB_CLK48_SEL               RCC_CCIPR_CLK48SEL_HSI48
+#define STM32WB_HSI48_SYNCSRC           SYNCSRC_LSE
+
+/* Enable LSE oscillator, used automatically trim the HSI48, and for RTC */
+
+#define STM32WB_USE_LSE                 1
+
+#elif defined(HSE_CLOCK_CONFIG)
+
+/* Use the HSE */
+
+#define STM32WB_BOARD_USEHSE            1
+
+#define STM32WB_SYSCLK_FREQUENCY        64000000ul
+
+/* Prescaler common to all PLL inputs; will be 2 */
+
+#define STM32WB_PLLCFG_PLLM             RCC_PLLCFG_PLLM(2)
+
+/* 'main' PLL config; we use this to generate our system clock via the R
+ *  output.  We set it up as (((32MHz / 2) * 12) / 3) = 64MHz
+ *  And the Q output is set as (((32MHz / 2) * 12) / 4) = 48MHz
+ */
+
+#define STM32WB_PLLCFG_PLLN             RCC_PLLCFG_PLLN(12)
+#define STM32WB_PLLCFG_PLLR_ENABLED
+#define STM32WB_PLLCFG_PLLR             RCC_PLLCFG_PLLR(3)
+#define STM32WB_PLLCFG_PLLQ_ENABLED
+#define STM32WB_PLLCFG_PLLQ             RCC_PLLCFG_PLLQ(4)
+
+/* 'SAIPLL1' is not used */
+
+#define STM32WB_PLLSAI1CFG_PLLN         RCC_PLLSAI1CFG_PLLN(8)
+
+/* CLK48 will come from the PLLMAIN via the Q output */
+
+#define STM32WB_USE_CLK48               1
+#define STM32WB_CLK48_SEL               RCC_CCIPR_CLK48SEL_PLLMAIN
+#define STM32WB_HSI48_SYNCSRC           SYNCSRC_NONE
+
+/* Enable LSE (for the RTC) */
+
+#define STM32WB_USE_LSE                 1
+
+#elif defined(MSI_CLOCK_CONFIG)
+
+/* Use the MSI */
+
+#define STM32WB_BOARD_USEMSI            1
+
+#define STM32WB_BOARD_MSIRANGE          RCC_CR_MSIRANGE_4M
+
+#define STM32WB_SYSCLK_FREQUENCY        64000000ul
+
+/* Prescaler common to all PLL inputs; will be 1 */
+
+#define STM32WB_PLLCFG_PLLM             RCC_PLLCFG_PLLM(1)
+
+/* 'main' PLL config; we use this to generate our system clock via the R
+ *  output.  We set it up as (((4MHz / 1) * 48) / 3) = 64MHz
+ *  And the Q output is set as (((4MHz / 1) * 48) / 4) = 48MHz
+ */
+
+#define STM32WB_PLLCFG_PLLN             RCC_PLLCFG_PLLN(48)
+#define STM32WB_PLLCFG_PLLR_ENABLED
+#define STM32WB_PLLCFG_PLLR             RCC_PLLCFG_PLLR(3)
+#define STM32WB_PLLCFG_PLLQ_ENABLED
+#define STM32WB_PLLCFG_PLLQ             RCC_PLLCFG_PLLQ(4)
+
+/* 'SAIPLL1' is not used */
+
+#define STM32WB_PLLSAI1CFG_PLLN         RCC_PLLSAI1CFG_PLLN(8)
+
+/* CLK48 will come from the PLLMAIN via the Q output */
+
+#define STM32WB_USE_CLK48               1
+#define STM32WB_CLK48_SEL               RCC_CCIPR_CLK48SEL_PLLMAIN
+#define STM32WB_HSI48_SYNCSRC           SYNCSRC_NONE
+
+/* Enable the LSE oscillator, used automatically trim the MSI, and for RTC */
+
+#define STM32WB_USE_LSE                 1
+
+#endif
+
+/* AHB clock (HCLK) is SYSCLK (64MHz) */
+
+#define BOARD_AHB_FREQUENCY         STM32WB_SYSCLK_FREQUENCY
+
+#define STM32WB_RCC_CFGR_HPRE       RCC_CFGR_HPRE_SYSCLK
+#define STM32WB_HCLK_FREQUENCY      STM32WB_SYSCLK_FREQUENCY
+
+/* CPU2 clock (HCLK2) is SYSCLK/2 (32MHz) */
+
+#define STM32WB_RCC_EXTCFGR_C2HPRE  RCC_EXTCFGR_C2HPRE_2
+
+/* AHB4 clock (HCLK4) is SYSCLK (64MHz) */
+
+#define STM32WB_RCC_EXTCFGR_SHDHPRE RCC_EXTCFGR_SHDHPRE_1
+
+/* APB1 clock (PCLK1) is HCLK/1 (64MHz) */
+
+#define STM32WB_RCC_CFGR_PPRE1      RCC_CFGR_PPRE1_HCLK1
+#define STM32WB_PCLK1_FREQUENCY     (STM32WB_HCLK_FREQUENCY / 1)
+
+/* APB2 clock (PCLK2) is HCLK/1 (64MHz) */
+
+#define STM32WB_RCC_CFGR_PPRE2      RCC_CFGR_PPRE2_HCLK1
+#define STM32WB_PCLK2_FREQUENCY     (STM32WB_HCLK_FREQUENCY / 1)
+
+/* Timer Frequencies, if APB prescaler is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,16,17 are on APB2, TIM2 is on APB1
+ */
+
+/* Timers driven from APB1 will be the same frequency as PCLK1 */
+
+#define STM32WB_APB1_TIM2_CLKIN     (1 * STM32WB_PCLK1_FREQUENCY)
+
+/* Timers driven from APB2 will be the same frequency as PCLK2 */
+
+#define STM32WB_APB2_TIM1_CLKIN     (1 * STM32WB_PCLK2_FREQUENCY)
+#define STM32WB_APB2_TIM16_CLKIN    (1 * STM32WB_PCLK2_FREQUENCY)
+#define STM32WB_APB2_TIM17_CLKIN    (1 * STM32WB_PCLK2_FREQUENCY)
+
+#define BOARD_TIM1_FREQUENCY        STM32WB_APB2_TIM1_CLKIN
+#define BOARD_TIM2_FREQUENCY        STM32WB_APB1_TIM2_CLKIN
+#define BOARD_TIM16_FREQUENCY       STM32WB_APB2_TIM16_CLKIN
+#define BOARD_TIM17_FREQUENCY       STM32WB_APB2_TIM17_CLKIN
+
+/* Higher SYSCLK reguires more flash wait states. */
+
+#define BOARD_FLASH_WAITSTATES      3
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_STM32WB_FLIPPERZERO_INCLUDE_FLIPPERZERO_CLOCKING_H */

boards/arm/stm32wb/flipperzero/scripts/Make.defs

@@ -0,0 +1,39 @@
+############################################################################
+# boards/arm/stm32wb/flipperzero/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/.config
+include $(TOPDIR)/tools/Config.mk
+include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flipperzero.ld
+ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
+
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
+AFLAGS := $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048

boards/arm/stm32wb/flipperzero/scripts/flipperzero.ld

@@ -0,0 +1,114 @@
+/****************************************************************************
+ * boards/arm/stm32wb/flipperzero/scripts/flipperzero.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The STM32WB55RG has 1024Kb of FLASH beginning at address 0x0800:0000,
+ * and 256Kb SRAM, split in three blocks:
+ *   SRAM1: 192Kb mapped at address 0x2000:0000
+ *   SRAM2a: 32Kb located at address 0x2003:0000 (contiguous to SRAM1)
+ * also mirrored at 0x1000:0000 with hardware parity check and can be
+ * retained in Standby mode.
+ *   SRAM2b: 32Kb located at address 0x2003:8000 (contiguous with SRAM2a)
+ * also mirrored at 0x1000:8000 with hardware parity check.
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point
+ * in the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+  flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K
+  sram1 (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
+  sram2a (rwx) : ORIGIN = 0x20030000, LENGTH = 32K
+  sram2b (rwx) : ORIGIN = 0x20038000, LENGTH = 32K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > flash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > flash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > flash
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    /* The STM32WB55RG has 192Kb of SRAM1 beginning at the following address */
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram1 AT > flash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > sram1
+
+    /* Stabs debugging sections. */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}

boards/arm/stm32wb/flipperzero/src/Makefile

@@ -0,0 +1,29 @@
+############################################################################
+# boards/arm/stm32wb/flipperzero/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements.  See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership.  The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License.  You may obtain a copy of the License at
+#
+#   http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include $(TOPDIR)/Make.defs
+
+CSRCS = stm32_boot.c
+
+ifeq ($(CONFIG_BOARDCTL),y)
+CSRCS += stm32_appinit.c
+endif
+
+include $(TOPDIR)/boards/Board.mk

boards/arm/stm32wb/flipperzero/src/flipperzero.h

@@ -0,0 +1,83 @@
+/****************************************************************************
+ * boards/arm/stm32wb/flipperzero/src/flipperzero.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32WB_FLIPPERZERO_SRC_FLIPPERZERO_H
+#define __BOARDS_ARM_STM32WB_FLIPPERZERO_SRC_FLIPPERZERO_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+#include <stm32wb_gpio.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#define HAVE_PROC             1
+#define HAVE_RTC_DRIVER       1
+
+#if !defined(CONFIG_FS_PROCFS)
+#  undef HAVE_PROC
+#endif
+
+#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
+#  warning Mountpoints disabled.  No procfs support
+#  undef HAVE_PROC
+#endif
+
+/* Check if we can support the RTC driver */
+
+#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
+#  undef HAVE_RTC_DRIVER
+#endif
+
+/* Flipper Zero GPIOs *******************************************************/
+
+/* Button definitions *******************************************************/
+
+#define GPIO_BTN_UP     (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_BTN_DOWN   (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN6)
+#define GPIO_BTN_LEFT   (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTB | GPIO_PIN11)
+#define GPIO_BTN_RIGH   (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTB | GPIO_PIN12)
+#define GPIO_BTN_BACK   (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_STM32WB_FLIPPERZERO_SRC_FLIPPERZERO_H */

boards/arm/stm32wb/flipperzero/src/stm32_appinit.c

@@ -0,0 +1,186 @@
+/****************************************************************************
+ * boards/arm/stm32wb/flipperzero/src/stm32_appinit.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <sys/mount.h>
+#include <stdio.h>
+#include <syslog.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+#include <nuttx/sdio.h>
+#include <arch/board/board.h>
+
+#include "stm32wb_tim.h"
+
+#ifdef CONFIG_RTC_DRIVER
+#  include <nuttx/timers/rtc.h>
+#  include "stm32wb_rtc.h"
+#endif
+
+#ifdef CONFIG_STM32WB_BLE
+#  include "stm32wb_blehci.h"
+#endif
+
+#include "flipperzero.h"
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: arm_netinitialize
+ *
+ * Description:
+ *   Dummy function expected to start-up logic.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_NET) && !defined(CONFIG_NETDEV_LATEINIT)
+void arm_netinitialize(void)
+{
+}
+#endif
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ *   arg - The boardctl() argument is passed to the board_app_initialize()
+ *         implementation without modification.  The argument has no
+ *         meaning to NuttX; the meaning of the argument is a contract
+ *         between the board-specific initialization logic and the
+ *         matching application logic.  The value could be such things as a
+ *         mode enumeration value, a set of DIP switch switch settings, a
+ *         pointer to configuration data read from a file or serial FLASH,
+ *         or whatever you would like to do with it.  Every implementation
+ *         should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned on
+ *   any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARDCTL
+int board_app_initialize(uintptr_t arg)
+{
+#ifdef CONFIG_RTC_DRIVER
+  struct rtc_lowerhalf_s *rtclower;
+#endif
+  int ret = OK;
+
+#ifdef HAVE_PROC
+  /* Mount the proc filesystem */
+
+  syslog(LOG_INFO, "Mounting procfs to /proc\n");
+
+  ret = nx_mount(NULL, CONFIG_NSH_PROC_MOUNTPOINT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
+             ret, errno);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_RTC_DRIVER
+  /* Instantiate the STM32WB lower-half RTC driver */
+
+  rtclower = stm32wb_rtc_lowerhalf();
+  if (!rtclower)
+    {
+      serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
+      return -ENOMEM;
+    }
+  else
+    {
+      /* Bind the lower half driver and register the combined RTC driver
+       * as /dev/rtc0
+       */
+
+      ret = rtc_initialize(0, rtclower);
+      if (ret < 0)
+        {
+          serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
+          return ret;
+        }
+    }
+#endif
+
+#ifdef CONFIG_TIMER
+  /* Initialize and register the timer driver */
+
+  ret = stm32wb_timer_initialize("/dev/timer0", 1);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: Failed to register the timer driver: %d\n",
+             ret);
+      return ret;
+    }
+#endif
+
+#ifdef CONFIG_STM32WB_BLE
+  /* Initialize and register BLE HCI driver */
+
+  stm32wb_blehci_initialize();
+#endif
+
+  return ret;
+}
+#endif /* CONFIG_BOARDCTL */
+
+#ifdef CONFIG_BOARDCTL_IOCTL
+int board_ioctl(unsigned int cmd, uintptr_t arg)
+{
+  return -ENOTTY;
+}
+#endif
+
+#if defined(CONFIG_BOARDCTL_UNIQUEID)
+int board_uniqueid(uint8_t *uniqueid)
+{
+  if (uniqueid == NULL)
+    {
+      return -EINVAL;
+    }
+
+  stm32wb_get_uniqueid(uniqueid);
+  return OK;
+}
+#endif

boards/arm/stm32wb/flipperzero/src/stm32_boot.c

@@ -0,0 +1,86 @@
+/****************************************************************************
+ * boards/arm/stm32wb/flipperzero/src/stm32_boot.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#include <arch/board/board.h>
+
+#include "flipperzero.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32wb_board_initialize
+ *
+ * Description:
+ *   All STM32WB architectures must provide the following entry point.  This
+ *   entry point is called early in the initialization -- after all memory
+ *   has been configured and mapped but before any devices have been
+ *   initialized.
+ *
+ ****************************************************************************/
+
+void stm32wb_board_initialize(void)
+{
+  /* Configure on-board LEDs if LED support has been selected. */
+
+#ifdef CONFIG_ARCH_LEDS
+  board_autoled_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ *   initialization call will be performed in the boot-up sequence to a
+ *   function called board_late_initialize().  board_late_initialize() will
+ *   be called immediately after up_initialize() is called and just before
+ *   the initial application is started.  This additional initialization
+ *   phase may be used, for example, to initialize board-specific device
+ *   drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+  /* Perform NSH initialization here instead of from the NSH.  This
+   * alternative NSH initialization is necessary when NSH is ran in
+   * user-space but the initialization function must run in kernel space.
+   */
+
+#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT)
+  board_app_initialize(0);
+#endif
+}
+#endif