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arch/arm/stm32h7: fix the period of the PPS output.

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The interval and the width of the pulse train of the PPS output were
programmed as the number of increments of the system time minus one,
but the MAC takes them as they are. Each period was one increment (10 ns
with HCLK at 200 MHz) shorter than a second, so the pulses came 10 ns
early each second, about 36 us in an hour, and the output drifted away
from the system time.

Program the interval and the width without subtracting one.

On a run of 8.2 hours against a grandmaster clock the pulse moved 0.29 ms
ahead of the system time, which is 10 ns per second, while the system time
stayed within 1 us of the grandmaster. With the change, a run of 11 hours
showed no drift of the pulse against the system time, within 3 us per hour
on samples of 1 ms of resolution.

Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com>
Assisted-by: Claude:claude-sonnet-5
This commit is contained in:
Daniel P. Carvalho 2026-09-21 18:48:27 -03:00 • committed by Alan C. Assis
parent 89b8c5fc7f
commit 1f9793b7b5
1 changed files with 3 additions and 4 deletions
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7
arch/arm/src/stm32h7/stm32_ethernet.c
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@ -296,13 +296,12 @@
* second and a width of half of it, that starts at a whole second of the
* system time. The first pulse is at least STM32_PTP_PPS_MARGIN_NS ahead,
* so the target time is loaded before it. The interval and the width are
* in increments of the system time, minus one.
* in increments of the system time.
*/
# define STM32_PTP_PPS_MARGIN_NS (100000000)
# define STM32_PTP_PPS_INTERVAL (NSEC_PER_SEC / STM32_PTP_SSINC - 1)
# define STM32_PTP_PPS_WIDTH ((NSEC_PER_SEC / 2) / \
STM32_PTP_SSINC - 1)
# define STM32_PTP_PPS_INTERVAL (NSEC_PER_SEC / STM32_PTP_SSINC)
# define STM32_PTP_PPS_WIDTH ((NSEC_PER_SEC / 2) / STM32_PTP_SSINC)
# endif
#endif