boards/nucleo-g0b1re: Add USB device configurations

Add HSI48 clock selection, USB pull-up control, automatic CDC/ACM registration during board bring-up, USB test configurations, and board documentation.

Assisted-by: OpenAI Codex
Signed-off-by: jsanchez-2g <jsanchez@2g-eng.com>

Documentation/platforms/arm/stm32g0/boards/nucleo-g0b1re/index.rst

@@ -55,3 +55,19 @@ nsh:
 
 This configuration provides a basic NuttShell configuration (NSH) on the
 Nucleo virtual console (VCOM on UART2).
+
+usb-clocks:
+-----------
+
+This configuration enables the STM32G0 USB device controller and its HSI48
+clock source.  It provides NSH on the Nucleo virtual console but does not
+register a USB device class.
+
+usb-cdc:
+--------
+
+This configuration extends ``usb-clocks`` with the CDC/ACM serial device
+class and the ``sercon`` and ``serdis`` commands.  Connect an external USB
+device connector to PA11 (USB DM) and PA12 (USB DP).  The CDC/ACM device is
+registered during board bring-up and enumerates when connected to the host.
+Run ``serdis`` to disconnect it and ``sercon`` to connect it again.

boards/arm/stm32g0/nucleo-g0b1re/configs/usb-cdc/defconfig

@@ -0,0 +1,59 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-g0b1re"
+CONFIG_ARCH_BOARD_NUCLEO_G0B1RE=y
+CONFIG_ARCH_CHIP="stm32g0"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32G0=y
+CONFIG_ARCH_CHIP_STM32G0B1RE=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=4164
+CONFIG_BUILTIN=y
+CONFIG_CDCACM=y
+CONFIG_CDCACM_RXBUFSIZE=256
+CONFIG_CDCACM_TXBUFSIZE=256
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEBUG_USB=y
+CONFIG_DISABLE_ENVIRON=y
+CONFIG_DISABLE_MQUEUE=y
+CONFIG_DISABLE_POSIX_TIMERS=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=1536
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LINE_MAX=64
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=64
+CONFIG_NSH_READLINE=y
+CONFIG_NUNGET_CHARS=0
+CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=1536
+CONFIG_PTHREAD_MUTEX_UNSAFE=y
+CONFIG_PTHREAD_STACK_DEFAULT=1536
+CONFIG_RAM_SIZE=147456
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=19
+CONFIG_START_MONTH=5
+CONFIG_START_YEAR=2013
+CONFIG_STDIO_DISABLE_BUFFERING=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_USART2=y
+CONFIG_STM32_USB=y
+CONFIG_SYSTEM_CDCACM=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USBDEV_TRACE=y
+CONFIG_USBDEV_TRACE_STRINGS=y

boards/arm/stm32g0/nucleo-g0b1re/configs/usb-clocks/defconfig

@@ -0,0 +1,54 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_NSH_ARGCAT is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-g0b1re"
+CONFIG_ARCH_BOARD_NUCLEO_G0B1RE=y
+CONFIG_ARCH_CHIP="stm32g0"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32G0=y
+CONFIG_ARCH_CHIP_STM32G0B1RE=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=4164
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FEATURES=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DISABLE_ENVIRON=y
+CONFIG_DISABLE_MOUNTPOINT=y
+CONFIG_DISABLE_MQUEUE=y
+CONFIG_DISABLE_POSIX_TIMERS=y
+CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y
+CONFIG_EXAMPLES_HELLO=y
+CONFIG_INIT_ENTRYPOINT="nsh_main"
+CONFIG_INIT_STACKSIZE=1536
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LINE_MAX=64
+CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=64
+CONFIG_NSH_READLINE=y
+CONFIG_NUNGET_CHARS=0
+CONFIG_POSIX_SPAWN_DEFAULT_STACKSIZE=1536
+CONFIG_PTHREAD_MUTEX_UNSAFE=y
+CONFIG_PTHREAD_STACK_DEFAULT=1536
+CONFIG_RAM_SIZE=147456
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_START_DAY=19
+CONFIG_START_MONTH=5
+CONFIG_START_YEAR=2013
+CONFIG_STDIO_DISABLE_BUFFERING=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_USART2=y
+CONFIG_STM32_USB=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART2_SERIAL_CONSOLE=y

boards/arm/stm32g0/nucleo-g0b1re/include/board.h

@@ -53,6 +53,15 @@
 #define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
 #define STM32_LSE_FREQUENCY     32768            /* X2 on board */
 
+/* 48MHz clock configuration.  HSI48 is the only 48MHz source on STM32G0 and
+ * is trimmed by the CRS from the USB start of frame packet.
+ */
+
+#if defined(CONFIG_STM32_USB) || defined(CONFIG_STM32_RNG)
+#  define STM32_USE_CLK48       1
+#  define STM32_HSI48_SYNCSRC   SYNCSRC_USB
+#endif
+
 /* Main PLL Configuration.
  *
  * PLL source is HSI = 16,000,000

boards/arm/stm32g0/nucleo-g0b1re/src/stm32_boot.c

@@ -26,9 +26,16 @@
 
 #include <nuttx/config.h>
 
+#include <stdbool.h>
+
 #include <nuttx/board.h>
+#include <nuttx/irq.h>
+#include <nuttx/usb/usbdev.h>
 #include <arch/board/board.h>
 
+#include "arm_internal.h"
+#include "hardware/stm32_usbdev.h"
+#include "stm32_usbdev.h"
 #include "nucleo-g0b1re.h"
 
 /****************************************************************************
@@ -61,6 +68,54 @@ void stm32_boardinitialize(void)
 #endif
 }
 
+#if defined(CONFIG_STM32_USB) && defined(CONFIG_USBDEV)
+
+/****************************************************************************
+ * Name: stm32_usb_setpullup
+ *
+ * Description:
+ *   Drive the embedded DP pull-up, which connects the device to the host.
+ *
+ ****************************************************************************/
+
+int stm32_usb_setpullup(bool enable)
+{
+  irqstate_t flags;
+  uint32_t regval;
+
+  flags = enter_critical_section();
+  regval = getreg32(STM32_USB_BCDR);
+
+  if (enable)
+    {
+      regval |= USB_BCDR_DPPU;
+    }
+  else
+    {
+      regval &= ~USB_BCDR_DPPU;
+    }
+
+  putreg32(regval, STM32_USB_BCDR);
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+bool stm32_usb_pullup_enabled(void)
+{
+  return (getreg32(STM32_USB_BCDR) & USB_BCDR_DPPU) != 0;
+}
+
+int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
+{
+  return stm32_usb_setpullup(enable);
+}
+
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+}
+#endif
+
 /****************************************************************************
  * Name: board_late_initialize
  *

boards/arm/stm32g0/nucleo-g0b1re/src/stm32_bringup.c

@@ -34,6 +34,7 @@
 #include <nuttx/board.h>
 #include <nuttx/input/buttons.h>
 #include <nuttx/leds/userled.h>
+#include <nuttx/usb/cdcacm.h>
 #include <arch/board/board.h>
 
 #include "nucleo-g0b1re.h"
@@ -73,6 +74,16 @@ int stm32_bringup(void)
 {
   int ret;
 
+#if defined(CONFIG_CDCACM) && !defined(CONFIG_CDCACM_CONSOLE)
+  /* Register the CDC/ACM device at boot. */
+
+  ret = cdcacm_initialize(0, NULL);
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: cdcacm_initialize failed: %d\n", ret);
+    }
+#endif
+
 #ifdef HAVE_LEDS
   /* Register the LED driver */