From 1ea10ddacc0dc656589a982105f100b5b8d5f4ae Mon Sep 17 00:00:00 2001 From: anjiahao Date: Wed, 13 Dec 2023 20:39:39 +0800 Subject: [PATCH] mps3:Support NuttX running on qemu cortex-m55 Signed-off-by: anjiahao --- arch/arm/Kconfig | 9 + arch/arm/include/mps/chip.h | 48 +++ arch/arm/include/mps/irq.h | 69 ++++ arch/arm/src/mps/Kconfig | 26 ++ arch/arm/src/mps/Make.defs | 23 ++ arch/arm/src/mps/chip.h | 37 ++ arch/arm/src/mps/mps_allocateheap.c | 71 ++++ arch/arm/src/mps/mps_irq.c | 340 ++++++++++++++++++ arch/arm/src/mps/mps_irq.h | 72 ++++ arch/arm/src/mps/mps_serial.c | 63 ++++ arch/arm/src/mps/mps_start.c | 97 +++++ arch/arm/src/mps/mps_timer.c | 56 +++ boards/Kconfig | 12 + boards/arm/mps/mps3-an547/Kconfig | 7 + boards/arm/mps/mps3-an547/README.txt | 47 +++ .../arm/mps/mps3-an547/configs/nsh/defconfig | 73 ++++ boards/arm/mps/mps3-an547/include/board.h | 61 ++++ boards/arm/mps/mps3-an547/scripts/Make.defs | 45 +++ boards/arm/mps/mps3-an547/scripts/flash.ld | 119 ++++++ boards/arm/mps/mps3-an547/src/Makefile | 25 ++ boards/arm/mps/mps3-an547/src/mps3_bringup.c | 130 +++++++ 21 files changed, 1430 insertions(+) create mode 100644 arch/arm/include/mps/chip.h create mode 100644 arch/arm/include/mps/irq.h create mode 100644 arch/arm/src/mps/Kconfig create mode 100644 arch/arm/src/mps/Make.defs create mode 100644 arch/arm/src/mps/chip.h create mode 100644 arch/arm/src/mps/mps_allocateheap.c create mode 100644 arch/arm/src/mps/mps_irq.c create mode 100644 arch/arm/src/mps/mps_irq.h create mode 100644 arch/arm/src/mps/mps_serial.c create mode 100644 arch/arm/src/mps/mps_start.c create mode 100644 arch/arm/src/mps/mps_timer.c create mode 100644 boards/arm/mps/mps3-an547/Kconfig create mode 100644 boards/arm/mps/mps3-an547/README.txt create mode 100644 boards/arm/mps/mps3-an547/configs/nsh/defconfig create mode 100644 boards/arm/mps/mps3-an547/include/board.h create mode 100644 boards/arm/mps/mps3-an547/scripts/Make.defs create mode 100644 boards/arm/mps/mps3-an547/scripts/flash.ld create mode 100644 boards/arm/mps/mps3-an547/src/Makefile create mode 100644 boards/arm/mps/mps3-an547/src/mps3_bringup.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d442eb69463..5a11f654ad4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -649,6 +649,11 @@ config ARCH_CHIP_TLSR82 ---help--- Telink tlsr82xx architectures (Customed armv6m) +config ARCH_CHIP_MPS + bool "MPS ARM Series" + ---help--- + MPS platform (MPS2 MPS3) + config ARCH_CHIP_QEMU_ARM bool "QEMU virt platform (ARMv7a)" select ARCH_HAVE_PSCI @@ -1095,6 +1100,7 @@ config ARCH_CHIP default "phy62xx" if ARCH_CHIP_PHY62XX default "tlsr82" if ARCH_CHIP_TLSR82 default "qemu" if ARCH_CHIP_QEMU_ARM + default "mps" if ARCH_CHIP_MPS default "goldfish" if ARCH_CHIP_GOLDFISH_ARM default "at32" if ARCH_CHIP_AT32 @@ -1572,6 +1578,9 @@ endif if ARCH_CHIP_QEMU_ARM source "arch/arm/src/qemu/Kconfig" endif +if ARCH_CHIP_MPS +source "arch/arm/src/mps/Kconfig" +endif if ARCH_CHIP_GOLDFISH_ARM source "arch/arm/src/goldfish/Kconfig" endif diff --git a/arch/arm/include/mps/chip.h b/arch/arm/include/mps/chip.h new file mode 100644 index 00000000000..84d89e5a712 --- /dev/null +++ b/arch/arm/include/mps/chip.h @@ -0,0 +1,48 @@ +/**************************************************************************** + * arch/arm/include/mps/chip.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_INCLUDE_MPS_CHIP_H +#define __ARCH_ARM_INCLUDE_MPS_CHIP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Prototypes + ****************************************************************************/ + +#define NVIC_SYSH_PRIORITY_MIN 0xe0 /* Bits [7:5] set in minimum priority */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + +#endif /* __ARCH_ARM_INCLUDE_MPS_CHIP_H */ diff --git a/arch/arm/include/mps/irq.h b/arch/arm/include/mps/irq.h new file mode 100644 index 00000000000..6d9cdffc61c --- /dev/null +++ b/arch/arm/include/mps/irq.h @@ -0,0 +1,69 @@ +/**************************************************************************** + * arch/arm/include/mps/irq.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* This file should never be included directly but, rather, + * only indirectly through nuttx/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_MPS_IRQ_H +#define __ARCH_ARM_INCLUDE_MPS_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Prototypes + ****************************************************************************/ + +#define NR_IRQS 130 /* Total number of interrupts */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* __ARCH_ARM_INCLUDE_MPS_IRQ_H */ diff --git a/arch/arm/src/mps/Kconfig b/arch/arm/src/mps/Kconfig new file mode 100644 index 00000000000..65ebd3ff892 --- /dev/null +++ b/arch/arm/src/mps/Kconfig @@ -0,0 +1,26 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_CHIP_MPS + +menu "MPS Chip Selection" + +choice + prompt "ARM MPS Configuration" + default ARCH_CHIP_MPS3_AN547 + +config ARCH_CHIP_MPS3_AN547 + bool "MPS3 AN547 Processor Cortexm55" + select ARCH_CORTEXM55 + +config ARCH_CHIP_MPS3_AN524 + bool "MPS3 AN524 Processor Cortexm33" + select ARCH_CORTEXM33 + +endchoice + +endmenu + +endif diff --git a/arch/arm/src/mps/Make.defs b/arch/arm/src/mps/Make.defs new file mode 100644 index 00000000000..8d3eabdc791 --- /dev/null +++ b/arch/arm/src/mps/Make.defs @@ -0,0 +1,23 @@ +############################################################################ +# arch/arm/src/mps/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include armv8-m/Make.defs + +CHIP_CSRCS = mps_start.c mps_serial.c mps_irq.c mps_timer.c mps_allocateheap.c diff --git a/arch/arm/src/mps/chip.h b/arch/arm/src/mps/chip.h new file mode 100644 index 00000000000..c879ffcff83 --- /dev/null +++ b/arch/arm/src/mps/chip.h @@ -0,0 +1,37 @@ +/**************************************************************************** + * arch/arm/src/mps/chip.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_MPS_CHIP_H +#define __ARCH_ARM_SRC_MPS_CHIP_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ARMV8M_PERIPHERAL_INTERRUPTS NR_IRQS + +#endif /* __ARCH_ARM_SRC_MPS_CHIP_H */ diff --git a/arch/arm/src/mps/mps_allocateheap.c b/arch/arm/src/mps/mps_allocateheap.c new file mode 100644 index 00000000000..3fd7bc97fee --- /dev/null +++ b/arch/arm/src/mps/mps_allocateheap.c @@ -0,0 +1,71 @@ +/**************************************************************************** + * arch/arm/src/mps/mps_allocateheap.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include +#include +#include +#include + +#include "chip.h" +#include "arm_internal.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if defined(CONFIG_BUILD_KERNEL) +# define MM_ADDREGION kmm_addregion +#else +# define MM_ADDREGION umm_addregion +#endif + +#define MPS3_DDR_BASE (void *)0x60000000 +#define MPS3_DDR_SIZE (2 * 1024 * 1024 * 1024UL) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_addregion + ****************************************************************************/ + +#if CONFIG_MM_REGIONS > 1 +void arm_addregion(void) +{ + MM_ADDREGION(MPS3_DDR_BASE, MPS3_DDR_SIZE); +} +#endif diff --git a/arch/arm/src/mps/mps_irq.c b/arch/arm/src/mps/mps_irq.c new file mode 100644 index 00000000000..6e9af56347d --- /dev/null +++ b/arch/arm/src/mps/mps_irq.c @@ -0,0 +1,340 @@ +/**************************************************************************** + * arch/arm/src/mps/mps_irq.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include "arm_internal.h" +#include "mps_irq.h" +#include "nvic.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NVIC_ENA_OFFSET (0) +#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE) + +#define DEFPRIORITY32 (NVIC_SYSH_PRIORITY_DEFAULT << 24 | \ + NVIC_SYSH_PRIORITY_DEFAULT << 16 | \ + NVIC_SYSH_PRIORITY_DEFAULT << 8 | \ + NVIC_SYSH_PRIORITY_DEFAULT) + +/* Size of the interrupt stack allocation */ + +#define INTSTACK_ALLOC (CONFIG_SMP_NCPUS * INTSTACK_SIZE) + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +#ifdef CONFIG_DEBUG_FEATURES +static int mps_nmi(int irq, void *context, void *arg) +{ + up_irq_save(); + _err("PANIC!!! NMI received\n"); + PANIC(); + return 0; +} + +static int mps_pendsv(int irq, void *context, void *arg) +{ + up_irq_save(); + _err("PANIC!!! PendSV received\n"); + PANIC(); + return 0; +} + +static int mps_reserved(int irq, void *context, void *arg) +{ + up_irq_save(); + _err("PANIC!!! Reserved interrupt\n"); + PANIC(); + return 0; +} +#endif + +/**************************************************************************** + * Name: mps_prioritize_syscall + * + * Description: + * Set the priority of an exception. This function may be needed + * internally even if support for prioritized interrupts is not enabled. + * + ****************************************************************************/ + +#ifdef CONFIG_ARMV8M_USEBASEPRI +static inline void mps_prioritize_syscall(int priority) +{ + uint32_t regval; + + /* SVCALL is system handler 11 */ + + regval = getreg32(NVIC_SYSH8_11_PRIORITY); + regval &= ~NVIC_SYSH_PRIORITY_PR11_MASK; + regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT); + putreg32(regval, NVIC_SYSH8_11_PRIORITY); +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_irqinitialize + * + * Description: + * This function is called by up_initialize() during the bring-up of the + * system. It is the responsibility of this function to but the interrupt + * subsystem into the working and ready state. + * + ****************************************************************************/ + +void up_irqinitialize(void) +{ + uint32_t regaddr; + int num_priority_registers; + int i; + + /* Disable all interrupts */ + + for (i = 0; i < NR_IRQS - MPS_IRQ_FIRST; i += 32) + { + putreg32(0xffffffff, NVIC_IRQ_CLEAR(i)); + } + + putreg32((uint32_t)_vectors, NVIC_VECTAB); + +#ifdef CONFIG_ARCH_RAMVECTORS + /* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based + * vector table that requires special initialization. + */ + + up_ramvec_initialize(); +#endif + + /* Set all interrupts (and exceptions) to the default priority */ + + putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY); + putreg32(DEFPRIORITY32, NVIC_SYSH8_11_PRIORITY); + putreg32(DEFPRIORITY32, NVIC_SYSH12_15_PRIORITY); + + /* The NVIC ICTR register (bits 0-4) holds the number of of interrupt + * lines that the NVIC supports: + * + * 0 -> 32 interrupt lines, 8 priority registers + * 1 -> 64 " " " ", 16 priority registers + * 2 -> 96 " " " ", 32 priority registers + * ... + */ + + num_priority_registers = (getreg32(NVIC_ICTR) + 1) * 8; + + /* Now set all of the interrupt lines to the default priority */ + + regaddr = NVIC_IRQ0_3_PRIORITY; + while (num_priority_registers--) + { + putreg32(DEFPRIORITY32, regaddr); + regaddr += 4; + } + + /* Attach the SVCall and Hard Fault exception handlers. The SVCall + * exception is used for performing context switches; The Hard Fault + * must also be caught because a SVCall may show up as a Hard Fault + * under certain conditions. + */ + + irq_attach(MPS_IRQ_SVCALL, arm_svcall, NULL); + irq_attach(MPS_IRQ_HARDFAULT, arm_hardfault, NULL); + + /* Set the priority of the SVCall interrupt */ + +#ifdef CONFIG_ARCH_IRQPRIO + + /* up_prioritize_irq(MPS_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */ + +#endif +#ifdef CONFIG_ARMV8M_USEBASEPRI + mps_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY); +#endif + + /* If the MPU is enabled, then attach and enable the Memory Management + * Fault handler. + */ + +#ifdef CONFIG_ARM_MPU + irq_attach(MPS_IRQ_MEMFAULT, arm_memfault, NULL); + up_enable_irq(MPS_IRQ_MEMFAULT); +#endif + + /* Attach all other processor exceptions (except reset and sys tick) */ + +#ifdef CONFIG_DEBUG_FEATURES + irq_attach(MPS_IRQ_NMI, mps_nmi, NULL); +#ifndef CONFIG_ARM_MPU + irq_attach(MPS_IRQ_MEMFAULT, arm_memfault, NULL); +#endif + irq_attach(MPS_IRQ_BUSFAULT, arm_busfault, NULL); + irq_attach(MPS_IRQ_USAGEFAULT, arm_usagefault, NULL); + irq_attach(MPS_IRQ_PENDSV, mps_pendsv, NULL); + arm_enable_dbgmonitor(); + irq_attach(MPS_IRQ_DBGMONITOR, arm_dbgmonitor, NULL); + irq_attach(MPS_IRQ_RESERVED, mps_reserved, NULL); +#endif + +#ifndef CONFIG_SUPPRESS_INTERRUPTS + + /* And finally, enable interrupts */ + + up_irq_enable(); +#endif +} + +static int mps_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, + uintptr_t offset) +{ + int n; + + DEBUGASSERT(irq >= MPS_IRQ_NMI && irq < NR_IRQS); + + /* Check for external interrupt */ + + if (irq >= MPS_IRQ_FIRST) + { + n = irq - MPS_IRQ_FIRST; + *regaddr = NVIC_IRQ_ENABLE(n) + offset; + *bit = (uint32_t)0x1 << (n & 0x1f); + } + + /* Handle processor exceptions. Only a few can be disabled */ + + else + { + *regaddr = NVIC_SYSHCON; + if (irq == MPS_IRQ_MEMFAULT) + { + *bit = NVIC_SYSHCON_MEMFAULTENA; + } + else if (irq == MPS_IRQ_BUSFAULT) + { + *bit = NVIC_SYSHCON_BUSFAULTENA; + } + else if (irq == MPS_IRQ_USAGEFAULT) + { + *bit = NVIC_SYSHCON_USGFAULTENA; + } + else if (irq == MPS_IRQ_SYSTICK) + { + *regaddr = NVIC_SYSTICK_CTRL; + *bit = NVIC_SYSTICK_CTRL_ENABLE; + } + else + { + return -EINVAL; /* Invalid or unsupported exception */ + } + } + + return OK; +} + +/**************************************************************************** + * Name: up_disable_irq + * + * Description: + * Disable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_disable_irq(int irq) +{ + uintptr_t regaddr; + uint32_t regval; + uint32_t bit; + + if (mps_irqinfo(irq, ®addr, &bit, NVIC_CLRENA_OFFSET) == 0) + { + /* Modify the appropriate bit in the register to disable the interrupt. + * For normal interrupts, we need to set the bit in the associated + * Interrupt Clear Enable register. For other exceptions, we need to + * clear the bit in the System Handler Control and State Register. + */ + + if (irq >= MPS_IRQ_FIRST) + { + putreg32(bit, regaddr); + } + else + { + regval = getreg32(regaddr); + regval &= ~bit; + putreg32(regval, regaddr); + } + } +} + +/**************************************************************************** + * Name: up_enable_irq + * + * Description: + * Enable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_enable_irq(int irq) +{ + uintptr_t regaddr; + uint32_t regval; + uint32_t bit; + + if (mps_irqinfo(irq, ®addr, &bit, NVIC_ENA_OFFSET) == 0) + { + /* Modify the appropriate bit in the register to enable the interrupt. + * For normal interrupts, we need to set the bit in the associated + * Interrupt Set Enable register. For other exceptions, we need to + * set the bit in the System Handler Control and State Register. + */ + + if (irq >= MPS_IRQ_FIRST) + { + putreg32(bit, regaddr); + } + else + { + regval = getreg32(regaddr); + regval |= bit; + putreg32(regval, regaddr); + } + } +} + +/**************************************************************************** + * Name: arm_ack_irq + ****************************************************************************/ + +void arm_ack_irq(int irq) +{ +} diff --git a/arch/arm/src/mps/mps_irq.h b/arch/arm/src/mps/mps_irq.h new file mode 100644 index 00000000000..26d5e9c8f76 --- /dev/null +++ b/arch/arm/src/mps/mps_irq.h @@ -0,0 +1,72 @@ +/**************************************************************************** + * arch/arm/src/mps/mps_irq.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_MPS_MPS_IRQ_H +#define __ARCH_ARM_SRC_MPS_MPS_IRQ_H + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/* IRQ numbers. + * The IRQ number corresponds vector number and hence map directly to bits + * in the NVIC. This does, however, waste several words of memory in the + * IRQ to handle mapping tables. + */ + +/* Processor Exceptions (vectors 0-15) */ + +#define MPS_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */ + /* Vector 0: Reset stack pointer value */ + /* Vector 1: Reset (not handler as an IRQ) */ +#define MPS_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */ +#define MPS_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */ +#define MPS_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */ +#define MPS_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */ +#define MPS_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */ + /* Vectors 7-10: Reserved */ +#define MPS_IRQ_SVCALL (11) /* Vector 11: SVC call */ +#define MPS_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */ + /* Vector 13: Reserved */ +#define MPS_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */ +#define MPS_IRQ_SYSTICK (15) /* Vector 15: System tick */ + +#define MPS_IRQ_FIRST (16) /* Vector number of the first external interrupt */ + +#define NVIC_SYSH_PRIORITY_DEFAULT (0x80) /* Midpoint is the default */ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_MPS_MPS_IRQ_H */ diff --git a/arch/arm/src/mps/mps_serial.c b/arch/arm/src/mps/mps_serial.c new file mode 100644 index 00000000000..3df89e3f2cc --- /dev/null +++ b/arch/arm/src/mps/mps_serial.c @@ -0,0 +1,63 @@ +/*************************************************************************** + * arch/arm/src/mps/mps_serial.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ***************************************************************************/ + +/*************************************************************************** + * Included Files + ***************************************************************************/ + +#include + +#include "arm_internal.h" + +/*************************************************************************** + * Public Functions + ***************************************************************************/ + +/*************************************************************************** + * Name: arm_serialinit + * + * Description: + * Register serial console and serial ports. This assumes that + * arm_earlyserialinit was called previously. + * + ***************************************************************************/ + +void arm_serialinit(void) +{ + cmsdk_serialinit(); +} + +#if USE_EARLYSERIALINIT + +/*************************************************************************** + * Name: arm_earlyserialinit + * + * Description: + * Performs the low level UART initialization early in debug so that the + * serial console will be available during bootup. This must be called + * before arm_serialinit. + * + ***************************************************************************/ + +void arm_earlyserialinit(void) +{ + cmsdk_earlyserialinit(); +} +#endif diff --git a/arch/arm/src/mps/mps_start.c b/arch/arm/src/mps/mps_start.c new file mode 100644 index 00000000000..d015f72cdb8 --- /dev/null +++ b/arch/arm/src/mps/mps_start.c @@ -0,0 +1,97 @@ +/**************************************************************************** + * arch/arm/src/mps/mps_start.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "arm_internal.h" +#include "mps_irq.h" +#include "mpu.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#define HEAP_BASE ((uintptr_t)_ebss + CONFIG_IDLETHREAD_STACKSIZE) + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/* g_idle_topstack: _sbss is the start of the BSS region as defined by the + * linker script. _ebss lies at the end of the BSS region. The idle task + * stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE. + * The IDLE thread is the thread that the system boots on and, eventually, + * becomes the IDLE, do nothing task that runs only when there is nothing + * else to run. The heap continues from there until the end of memory. + * g_idle_topstack is a read-only variable the provides this computed + * address. + */ + +const uintptr_t g_idle_topstack = HEAP_BASE; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: __start + * + * Description: + * This is the reset entry point. + * + ****************************************************************************/ + +void __start(void) +{ + const uint32_t *src; + uint32_t *dest; + + /* If enabled reset the MPU */ + + mpu_early_reset(); + arm_fpuconfig(); + + /* Set bss to zero */ + + for (dest = (uint32_t *)_sbss; dest < (uint32_t *)_ebss; ) + { + *dest++ = 0; + } + + /* Copy the program from FLASH to RAM. */ + + for (src = (const uint32_t *)_eronly, + dest = (uint32_t *)_sdata; dest < (uint32_t *)_edata; + ) + { + *dest++ = *src++; + } + +#ifdef USE_EARLYSERIALINIT + arm_earlyserialinit(); +#endif + + nx_start(); +} diff --git a/arch/arm/src/mps/mps_timer.c b/arch/arm/src/mps/mps_timer.c new file mode 100644 index 00000000000..7a01be36ee5 --- /dev/null +++ b/arch/arm/src/mps/mps_timer.c @@ -0,0 +1,56 @@ +/**************************************************************************** + * arch/arm/src/mps/mps_timer.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "arm_internal.h" +#include "systick.h" +#include "mps_irq.h" +#include "nvic.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#define SYSTICK_RELOAD ((MPS_SYSTICK_CLOCK / CLK_TCK) - 1) + +/**************************************************************************** + * Function: up_timer_initialize + * + * Description: + * This function is called during start-up to initialize + * the timer hardware. + * + ****************************************************************************/ + +void up_timer_initialize(void) +{ + /* Set reload register, qemu maybe have a bug, + * if RELOAD is zero, set CTRL is not useful + */ + + putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD); + up_timer_set_lowerhalf(systick_initialize(true, MPS_SYSTICK_CLOCK, -1)); +} diff --git a/boards/Kconfig b/boards/Kconfig index 02da2d0e2a1..22bec1ba002 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -2075,6 +2075,14 @@ config ARCH_BOARD_MR_CANHUBK3 This options selects support for NuttX on the NXP MR-CANHUBK3 board featuring the S32K344 Cortex-M7. +config ARCH_BOARD_MPS3_AN547 + bool "Arm MPS3 AN547" + depends on ARCH_CHIP_MPS3_AN547 + select ARCH_HAVE_IRQBUTTONS + ---help--- + This options selects support for NuttX on the MPS3 AN547 + board featuring the Cortex-M55. + config ARCH_BOARD_SABRE_6QUAD bool "NXP/Freescale i.MX6 Sabre-6Quad board" depends on ARCH_CHIP_IMX6_6QUAD @@ -3342,6 +3350,7 @@ config ARCH_BOARD default "s32k148evb" if ARCH_BOARD_S32K148EVB default "s32k344evb" if ARCH_BOARD_S32K344EVB default "mr-canhubk3" if ARCH_BOARD_MR_CANHUBK3 + default "mps3-an547" if ARCH_BOARD_MPS3_AN547 default "rv32m1-vega" if ARCH_BOARD_RV32M1_VEGA default "rv-virt" if ARCH_BOARD_QEMU_RV_VIRT default "star64" if ARCH_BOARD_JH7110_STAR64 @@ -3555,6 +3564,9 @@ endif if ARCH_BOARD_TC397 source "boards/tricore/tc3xx/tc397/Kconfig" endif +if ARCH_BOARD_MPS3_AN547 +source "boards/arm/mps/mps3-an547/Kconfig" +endif if ARCH_BOARD_QEMU_ARMV7A source "boards/arm/qemu/qemu-armv7a/Kconfig" endif diff --git a/boards/arm/mps/mps3-an547/Kconfig b/boards/arm/mps/mps3-an547/Kconfig new file mode 100644 index 00000000000..5742f7270de --- /dev/null +++ b/boards/arm/mps/mps3-an547/Kconfig @@ -0,0 +1,7 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_MPS3_AN547 +endif diff --git a/boards/arm/mps/mps3-an547/README.txt b/boards/arm/mps/mps3-an547/README.txt new file mode 100644 index 00000000000..6334b5e5753 --- /dev/null +++ b/boards/arm/mps/mps3-an547/README.txt @@ -0,0 +1,47 @@ +README.txt +========== + +This board configuration will use QEMU to emulate generic ARM v8-M series +hardware platform and provides support for these devices: + + - ARM Generic Timer + - CMSDK UART controller + +Contents +======== + - Getting Started + - Status + - Platform Features + - Debugging with QEMU + - FPU Support and Performance + - SMP Support + - References + +Getting Started +=============== + +1. Configuring and running + 1.1 Single Core + Configuring NuttX and compile: + $ ./tools/configure.sh -l mps3-an547:nsh + $ make + Running with qemu + $ qemu-system-arm -M mps3-an547 -nographic -kernel nuttx.bin + +Debugging with QEMU +=================== + +The nuttx ELF image can be debugged with QEMU. + +1. To debug the nuttx (ELF) with symbols, make sure the following change have + applied to defconfig. + ++CONFIG_DEBUG_SYMBOLS=y + +2. Run QEMU(at shell terminal 1) + + $ qemu-system-arm -M mps3-an547 -nographic -kernel nuttx.bin -S -s + +3. Run gdb with TUI, connect to QEMU, load nuttx and continue (at shell terminal 2) + + $ arm-none-eabi-gdb -tui --eval-command='target remote localhost:1234' nuttx diff --git a/boards/arm/mps/mps3-an547/configs/nsh/defconfig b/boards/arm/mps/mps3-an547/configs/nsh/defconfig new file mode 100644 index 00000000000..63f915480bd --- /dev/null +++ b/boards/arm/mps/mps3-an547/configs/nsh/defconfig @@ -0,0 +1,73 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="mps3-an547" +CONFIG_ARCH_BOARD_MPS3_AN547=y +CONFIG_ARCH_CHIP="mps" +CONFIG_ARCH_CHIP_MPS3_AN547=y +CONFIG_ARCH_CHIP_MPS=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARMV8M_SYSTICK=y +CONFIG_BUILTIN=y +CONFIG_CMSDK_UART0=y +CONFIG_CMSDK_UART0_BASE=0x49303000 +CONFIG_CMSDK_UART0_CLOCK=25000000 +CONFIG_CMSDK_UART0_OV_IRQ=59 +CONFIG_CMSDK_UART0_RX_IRQ=50 +CONFIG_CMSDK_UART0_SERIAL_CONSOLE=y +CONFIG_CMSDK_UART0_TX_IRQ=49 +CONFIG_CMSDK_UART=y +CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_SCHED=y +CONFIG_DEBUG_SCHED_ERROR=y +CONFIG_DEBUG_SCHED_INFO=y +CONFIG_DEBUG_SCHED_WARN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEFAULT_TASK_STACKSIZE=4096 +CONFIG_DEV_ZERO=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_FS_ROMFS=y +CONFIG_FS_TMPFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_MEMFD_ERROR=y +CONFIG_MM_REGIONS=2 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAMLOG=y +CONFIG_RAM_SIZE=2097152 +CONFIG_RAM_START=0x01000000 +CONFIG_RAW_BINARY=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SPINLOCK=y +CONFIG_STACK_COLORATION=y +CONFIG_STANDARD_SERIAL=y +CONFIG_START_DAY=25 +CONFIG_START_MONTH=4 +CONFIG_START_YEAR=2023 +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_SYSTEM=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TIMER=y +CONFIG_TIMER_ARCH=y +CONFIG_USEC_PER_TICK=1000 diff --git a/boards/arm/mps/mps3-an547/include/board.h b/boards/arm/mps/mps3-an547/include/board.h new file mode 100644 index 00000000000..3109285a2bb --- /dev/null +++ b/boards/arm/mps/mps3-an547/include/board.h @@ -0,0 +1,61 @@ +/**************************************************************************** + * boards/arm/mps/mps3-an547/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_MPS_MPS3_AN547_INCLUDE_BOARD_H +#define __BOARDS_ARM_MPS_MPS3_AN547_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MPS_SYSTICK_CLOCK (32 * 1000 * 1000) + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_ARM_MPS_MPS3_AN547_INCLUDE_BOARD_H */ diff --git a/boards/arm/mps/mps3-an547/scripts/Make.defs b/boards/arm/mps/mps3-an547/scripts/Make.defs new file mode 100644 index 00000000000..a391bf4768c --- /dev/null +++ b/boards/arm/mps/mps3-an547/scripts/Make.defs @@ -0,0 +1,45 @@ +############################################################################ +# boards/arm/mps/mps3-an547/scripts/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/arch/arm/src/armv8-m/Toolchain.defs + +LDSCRIPT = flash.ld + +ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) + +CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +LDELFFLAGS = -r -e main +LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/binfmt/libelf/gnu-elf.ld) diff --git a/boards/arm/mps/mps3-an547/scripts/flash.ld b/boards/arm/mps/mps3-an547/scripts/flash.ld new file mode 100644 index 00000000000..b41e17a0e2e --- /dev/null +++ b/boards/arm/mps/mps3-an547/scripts/flash.ld @@ -0,0 +1,119 @@ +/**************************************************************************** + * boards/arm/mps/mps3-an547/scripts/flash.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +MEMORY +{ + flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K + sram1 (rwx) : ORIGIN = 0x01000000, LENGTH = 2M + sram2 (rwx) : ORIGIN = 0x22000000, LENGTH = 2M +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(__start) + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : ALIGN(4) { + _sinit = ABSOLUTE(.); + KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP(*(.init_array .ctors)) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : ALIGN(4) { + *(.ARM.extab*) + } > flash + + .ARM.exidx : ALIGN(4) { + __exidx_start = ABSOLUTE(.); + *(.ARM.exidx*) + __exidx_end = ABSOLUTE(.); + } > flash + + .tdata : { + _stdata = ABSOLUTE(.); + *(.tdata .tdata.* .gnu.linkonce.td.*); + _etdata = ABSOLUTE(.); + } > flash + + .tbss : { + _stbss = ABSOLUTE(.); + *(.tbss .tbss.* .gnu.linkonce.tb.* .tcommon); + _etbss = ABSOLUTE(.); + } > flash + + _eronly = ABSOLUTE(.); + + /* The RAM vector table (if present) should lie at the beginning of SRAM */ + + .ram_vectors : { + *(.ram_vectors) + } > sram1 + + .data : ALIGN(4) { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + . = ALIGN(4); + _edata = ABSOLUTE(.); + } > sram1 AT > flash + + .bss : ALIGN(4) { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + _ebss = ABSOLUTE(.); + } > sram1 + + /* Stabs debugging sections. */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/boards/arm/mps/mps3-an547/src/Makefile b/boards/arm/mps/mps3-an547/src/Makefile new file mode 100644 index 00000000000..59ae8876b5d --- /dev/null +++ b/boards/arm/mps/mps3-an547/src/Makefile @@ -0,0 +1,25 @@ +############################################################################ +# boards/arm/mps/mps3-an547/src/Makefile +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +CSRCS = mps3_bringup.c + +include $(TOPDIR)/boards/Board.mk diff --git a/boards/arm/mps/mps3-an547/src/mps3_bringup.c b/boards/arm/mps/mps3-an547/src/mps3_bringup.c new file mode 100644 index 00000000000..95f975c6fb3 --- /dev/null +++ b/boards/arm/mps/mps3-an547/src/mps3_bringup.c @@ -0,0 +1,130 @@ +/**************************************************************************** + * boards/arm/mps/mps3-an547/src/mps3_bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mps3_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +static int mps3_bringup(void) +{ + int ret = 0; + +#ifdef CONFIG_FS_PROCFS + + /* Mount the procfs file system */ + + ret = nx_mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret); + } + +#endif + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will be + * called immediately after up_intitialize() is called and just before the + * initial application is started. This additional initialization phase + * may be used, for example, to initialize board-specific device drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board initialization */ + + mps3_bringup(); +} +#endif /* CONFIG_BOARD_LATE_INITIALIZE */ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initialization logic and the + * matching application logic. The value could be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ + UNUSED(arg); +#ifndef CONFIG_BOARD_LATE_INITIALIZE + + /* Perform board initialization */ + + return mps3_bringup(); +#else + return OK; +#endif +} +