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boards/esp32s3-devkit: Add kernel_n8r2, a kernel build for 2 MB PSRAM.
kernel_oct targets a WROOM-2 N32R8V: octal flash, and 8 MB of PSRAM for the page pool. The defaults size the pool for that part, with 8 pages of 64 KiB for each of the text, data and heap regions, so 1.5 MB per process. fork() duplicates the address environment, so a parent and a child need 3 MB at once and a module with 2 MB of PSRAM cannot do it. kernel_n8r2 sizes the same build for such a module. Each region is 2 pages, so a process takes 384 KiB and a fork() peaks at 768 KiB, inside a 1.5 MB pool placed at 0x80000 to leave the start of the PSRAM alone. The flash is quad and runs in DIO mode, so this configuration also exercises the CONFIG_ESP32S3_FLASH_MODE_OCT guard in kernel-space.ld from the quad side, which kernel_oct cannot. This is tight by construction. ostest has 115 KiB of text against a 128 KiB text region. A larger program needs a module with more PSRAM, not a larger pool. Verified on an ESP32-S3-DevKitC with an N8R2 module, 8 MB flash in DIO mode and 2 MB of embedded quad PSRAM. ostest reports "Parent and child had independent memory" and exits with status 0. Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com> Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ARCH_LEDS is not set
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# CONFIG_NSH_ARGCAT is not set
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# CONFIG_NSH_CMDOPT_HEXDUMP is not set
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CONFIG_ARCH="xtensa"
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CONFIG_ARCH_ADDRENV=y
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CONFIG_ARCH_BOARD="esp32s3-devkit"
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CONFIG_ARCH_BOARD_COMMON=y
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CONFIG_ARCH_BOARD_ESP32S3_DEVKIT=y
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CONFIG_ARCH_CHIP="esp32s3"
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CONFIG_ARCH_CHIP_ESP32S3=y
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CONFIG_ARCH_CHIP_ESP32S3WROOM1N8R2=y
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CONFIG_ARCH_DATA_NPAGES=2
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CONFIG_ARCH_DATA_VBASE=0x3d000000
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CONFIG_ARCH_HEAP_NPAGES=2
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CONFIG_ARCH_HEAP_VBASE=0x3d200000
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CONFIG_ARCH_INTERRUPTSTACK=2048
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CONFIG_ARCH_IRQ_TO_NDX=y
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CONFIG_ARCH_KERNEL_STACKSIZE=8192
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CONFIG_ARCH_KMAP_NPAGES=2
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CONFIG_ARCH_KMAP_VBASE=0x3d400000
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CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y
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CONFIG_ARCH_NUSER_INTERRUPTS=2
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CONFIG_ARCH_PGPOOL_PBASE=0x80000
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CONFIG_ARCH_PGPOOL_SIZE=1572864
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_TEXT_NPAGES=2
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CONFIG_ARCH_TEXT_VBASE=0x42c00000
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CONFIG_ARCH_USE_MMU=y
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CONFIG_ARCH_XTENSA=y
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CONFIG_BINFMT_ELF_EXECUTABLE=y
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CONFIG_BOARD_INITTHREAD_STACKSIZE=2048
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CONFIG_BOARD_LOOPSPERMSEC=16717
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CONFIG_BUILD_KERNEL=y
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CONFIG_DEBUG_BINFMT=y
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CONFIG_DEBUG_BINFMT_ERROR=y
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CONFIG_DEBUG_BINFMT_INFO=y
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CONFIG_DEBUG_BINFMT_WARN=y
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CONFIG_DEBUG_FEATURES=y
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CONFIG_DEBUG_FULLOPT=y
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CONFIG_DEBUG_SCHED=y
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CONFIG_DEBUG_SCHED_ERROR=y
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CONFIG_DEBUG_SYMBOLS=y
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CONFIG_DEFAULT_TASK_STACKSIZE=8192
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CONFIG_ELF=y
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CONFIG_ESP32S3_PAGEFAULT=y
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CONFIG_ESP32S3_PSRAM_8M=y
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CONFIG_ESP32S3_SPIFLASH=y
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CONFIG_ESP32S3_SPIRAM=y
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CONFIG_ESP32S3_UART0=y
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CONFIG_ESP32S3_WCL=y
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CONFIG_FS_PROCFS=y
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CONFIG_FS_ROMFS=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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CONFIG_HOST_MACOS=y
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CONFIG_IDLETHREAD_STACKSIZE=3072
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CONFIG_INIT_FILEPATH="/system/bin/init"
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CONFIG_INIT_MOUNT=y
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CONFIG_INIT_MOUNT_FLAGS=0x1
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CONFIG_INIT_MOUNT_TARGET="/system/bin"
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CONFIG_INTELHEX_BINARY=y
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CONFIG_IRQ_WORK_STACKSIZE=2048
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CONFIG_LIBC_ENVPATH=y
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CONFIG_LIBC_EXECFUNCS=y
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CONFIG_LINE_MAX=64
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CONFIG_MM_PGALLOC=y
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CONFIG_MM_PGSIZE=65536
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CONFIG_NSH_DISABLE_LOSMART=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_FILE_APPS=y
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CONFIG_NSH_READLINE=y
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CONFIG_PATH_INITIAL="/system/bin"
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_PTHREAD_STACK_DEFAULT=2048
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CONFIG_RAM_SIZE=114688
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CONFIG_RAM_START=0x20000000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_HAVE_PARENT=y
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CONFIG_SCHED_LPWORK=y
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CONFIG_SCHED_LPWORKSTACKSIZE=2048
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CONFIG_SCHED_WAITPID=y
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CONFIG_STACK_COLORATION=y
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CONFIG_START_DAY=6
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2011
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CONFIG_SYSLOG_BUFFER=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_SYSTEM_NSH_PROGNAME="init"
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CONFIG_TESTING_GETPRIME=y
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CONFIG_TESTING_OSTEST=y
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CONFIG_TESTING_OSTEST_FPUTESTDISABLE=y
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CONFIG_UART0_SERIAL_CONSOLE=y
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