From 1702fded401677a90e97cc68e98235b308917976 Mon Sep 17 00:00:00 2001 From: patacongo Date: Mon, 30 Jul 2012 16:51:43 +0000 Subject: [PATCH] Add support for testing multiple ADC, PWM, and QE devices git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4993 42af7a65-404d-4744-a932-0658087f49c3 --- arch/arm/src/stm32/stm32_qencoder.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c index 237782c15af..8553296f93e 100644 --- a/arch/arm/src/stm32/stm32_qencoder.c +++ b/arch/arm/src/stm32/stm32_qencoder.c @@ -124,7 +124,7 @@ /* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */ # if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \ -# defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE) + defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE) # define HAVE_16BIT_TIMERS 1 # endif @@ -734,8 +734,10 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower) uint16_t ccmr1; uint16_t ccer; uint16_t cr1; +#ifdef HAVE_16BIT_TIMERS uint16_t regval; int ret; +#endif /* NOTE: Clocking should have been enabled in the low-level RCC logic at boot-up */