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cxd56xx improvements (#48) and various other fixes (#49)

Browse source 
Author: Alan Carvalho de Assis <acassis@gmail.com>

    Verify all .c and .h against nxstyle, fixed the Mixed cases

Author: Alin Jerpelea <alin.jerpelea@sony.com>

    cxd56xx improvements (#48)

    * arch: cxd56xx: Add size limitation for I2C SCU xfer

    This is a fw restriction, unroll loop because it can be transfer
    up to 16 bytes.

    * arch: cxd56xx: Fix lack of leave_critical_section

    add the missing leave_critical_section

    * arch: cxd56xx: Remove unnecessary file

    this header is duplicate and we can remove it

    * arch: cxd56xx: Cosmetic change

    remove space after function

    * arch: cxd56xx: update topreg registers

    the topreg registers are updated to match the cxd5602 HW

    * arch: cxd56xx: Add voltage setting for low battery notification

    Add voltage setting for low battery notification

    * arch: cxd56xx: Improve perfomance of SD card

    Improve a problem that the clock of SD Host Controller is lower than the
    expected value in SDR25 transfer mode.

    * arch: cxd56xx: Cosmetic changes

    cleanup to comply with coding standard

    * boards: cxd56xx: Cosmetic changes

    updates to comply with coding standard

    * boards: cxd56xx: Fix SD card cannot mount issue

    SD card cannot mount when connecting and disconnecting three times
    or more due to wrong state of parameter 'initialized'.

    This change enables to skip swtching initialized state when mount
    failed.
This commit is contained in:
Alin Jerpelea 2020-01-07 18:29:52 -03:00 • committed by Alan Carvalho de Assis
parent 9d5d60fee1
commit 15eddd29c8
42 changed files with 843 additions and 661 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/include/cxd56xx/audio.h
View file

@ -945,7 +945,7 @@ uint32_t cxd56_audio_get_micmap(void);
bool board_audio_tone_generator(bool en, int16_t vol, uint16_t freq);
#ifdef __cplusplus
} /* end of extern "C" */
}
#endif /* __cplusplus */
#endif /* __ARCH_ARM_INCLUDE_CXD56XX_AUDIO_H */

4
arch/arm/include/cxd56xx/gnss.h
View file

@ -38,7 +38,8 @@
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
@ -648,7 +649,6 @@ extern "C" {
struct cxd56_gnss_ope_mode_param_s
{
/* receiver operation mode
* 0: No Change Operation
* 1: Normal(default)

3
arch/arm/include/cxd56xx/gnss_type.h
View file

@ -46,7 +46,8 @@
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif

2
arch/arm/src/cxd56xx/cxd56_cisif.c
View file

@ -216,6 +216,7 @@ static uint64_t cisif_get_msec_time(void)
{
return 0;
}
return (((uint64_t)tp.tv_sec) * 1000 + tp.tv_nsec / 1000000);
}
@ -318,6 +319,7 @@ static void cisif_callback_for_intlev(uint8_t code)
/****************************************************************************
* cisif_ycc_axi_trdn_int
****************************************************************************/
static void cisif_ycc_axi_trdn_int(uint8_t code)
{
uint32_t size;

8
arch/arm/src/cxd56xx/cxd56_cpufifo.c
View file

@ -104,6 +104,7 @@ static int cpufifo_txhandler(int irq, FAR void *context, FAR void *arg)
cpufifo_trypush(pd->data);
sq_addlast(&pd->entry, &g_emptyqueue);
}
if (sq_empty(&g_pushqueue))
{
up_disable_irq(CXD56_IRQ_FIFO_TO);
@ -114,7 +115,11 @@ static int cpufifo_txhandler(int irq, FAR void *context, FAR void *arg)
static int cpufifo_rxhandler(int irq, FAR void *context, FAR void *arg)
{
uint32_t word[2] = {0};
uint32_t word[2] =
{
0
};
int cpuid;
/* Drain from PULL FIFO. But not all data because this handler
@ -226,6 +231,7 @@ int cxd56_cfregrxhandler(cpufifo_handler_t handler)
{
g_cfrxhandler = handler;
}
leave_critical_section(flags);
return ret;
}

8
arch/arm/src/cxd56xx/cxd56_farapistub.S
View file

@ -177,9 +177,9 @@ PM_LoadImage:
nop
nop
.global PM_PmicControl
.global pm_pmic_control
.thumb_func
PM_PmicControl:
pm_pmic_control:
mov r12, pc
b 1b
@ -563,9 +563,9 @@ _modulelist_gnss_pwr:
.align 2
3:
.global AS_AcaControl
.global as_aca_control
.thumb_func
AS_AcaControl:
as_aca_control:
mov r12, pc
b 1b

32
arch/arm/src/cxd56xx/cxd56_i2c.c
View file

@ -32,6 +32,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
@ -93,7 +94,7 @@ struct cxd56_i2cdev_s
unsigned int base; /* Base address of registers */
uint16_t irqid; /* IRQ for this device */
int8_t port; /* Port number */
uint32_t baseFreq; /* branch frequency */
uint32_t base_freq; /* branch frequency */
sem_t mutex; /* Only one thread can access at a time */
sem_t wait; /* Place to wait for transfer completion */
@ -266,37 +267,37 @@ static void cxd56_i2c_setfrequency(struct cxd56_i2cdev_s *priv,
uint64_t lcnt64;
uint64_t hcnt64;
uint64_t speed;
uint64_t tLow;
uint64_t tHigh;
uint64_t t_low;
uint64_t t_high;
uint32_t base = cxd56_get_i2c_baseclock(priv->port);
uint32_t spklen;
ASSERT(base);
if ((priv->frequency == frequency) && (priv->baseFreq == base))
if ((priv->frequency == frequency) && (priv->base_freq == base))
{
return;
}
priv->frequency = frequency;
priv->baseFreq = base;
priv->base_freq = base;
base /= 1000;
if (frequency <= 100000)
{
tLow = 4700000;
tHigh = 4000000;
t_low = 4700000;
t_high = 4000000;
}
else if (frequency <= 400000)
{
tLow = 1300000;
tHigh = 600000;
t_low = 1300000;
t_high = 600000;
}
else
{
tLow = 500000;
tHigh = 260000;
t_low = 500000;
t_high = 260000;
}
if (frequency > 100000)
@ -319,11 +320,11 @@ static void cxd56_i2c_setfrequency(struct cxd56_i2cdev_s *priv,
spklen = 1;
}
lcnt64 = (tLow + 6500ull / 20000ull) * base;
lcnt64 = (t_low + 6500ull / 20000ull) * base;
lcnt = ((lcnt64 + 999999999ull) / 1000000000ull) - 1; /* ceil */
lcnt = lcnt < 8 ? 8 : lcnt;
hcnt64 = (tHigh - 6500ull) * base;
hcnt64 = (t_high - 6500ull) * base;
hcnt = ((hcnt64 + 999999999ull) / 1000000000ull) - 6 - spklen; /* ceil */
hcnt = hcnt < 6 ? 6 : hcnt;
@ -541,7 +542,7 @@ static int cxd56_i2c_receive(struct cxd56_i2cdev_s *priv, int last)
{
break;
}
}
}
return 0;
}
@ -738,6 +739,7 @@ static int cxd56_i2c_scurecv(int port, int addr, uint8_t *buf, ssize_t buflen)
{
return OK;
}
if (buflen > 16)
{
return -EINVAL;
@ -997,7 +999,7 @@ struct i2c_master_s *cxd56_i2cbus_initialize(int port)
priv->frequency = 0;
cxd56_i2c_clock_enable(priv->port);
priv->baseFreq = cxd56_get_i2c_baseclock(priv->port);
priv->base_freq = cxd56_get_i2c_baseclock(priv->port);
cxd56_i2c_disable(priv);

16
arch/arm/src/cxd56xx/cxd56_irq.c
View file

@ -364,7 +364,9 @@ void up_irqinitialize(void)
/* Set the priority of the SVCall interrupt */
#ifdef CONFIG_ARCH_IRQPRIO
/* up_prioritize_irq(CXD56_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
/* up_prioritize_irq(CXD56_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN);
*/
#endif
#ifdef CONFIG_ARMV7M_USEBASEPRI
@ -402,13 +404,13 @@ void up_irqinitialize(void)
*/
#if defined(CONFIG_DEBUG_FEATURES) && !defined(CONFIG_ARMV7M_USEBASEPRI)
{
uint32_t regval;
{
uint32_t regval;
regval = getreg32(NVIC_DEMCR);
regval &= ~NVIC_DEMCR_VCHARDERR;
putreg32(regval, NVIC_DEMCR);
}
regval = getreg32(NVIC_DEMCR);
regval &= ~NVIC_DEMCR_VCHARDERR;
putreg32(regval, NVIC_DEMCR);
}
#endif
/* And finally, enable interrupts */

114
arch/arm/src/cxd56xx/cxd56_pmic.c
View file

@ -163,7 +163,7 @@ struct pmic_temp_mode_s
int high;
};
extern int PM_PmicControl(int cmd, void *arg);
extern int pm_pmic_control(int cmd, void *arg);
/****************************************************************************
* Private Data
@ -198,6 +198,7 @@ static bool is_notify_registerd(void)
return true;
}
}
return false;
}
@ -298,7 +299,7 @@ static int pmic_int_handler(int irq, void *context, void *arg)
int cxd56_pmic_get_interrupt_status(uint8_t *status)
{
return PM_PmicControl(PMIC_CMD_INTSTATUS, status);
return pm_pmic_control(PMIC_CMD_INTSTATUS, status);
}
/****************************************************************************
@ -337,6 +338,7 @@ int cxd56_pmic_set_gpo_reg(uint8_t *setbit0, uint8_t *clrbit0,
uint8_t *setbit1;
uint8_t *clrbit1;
}
arg =
{
.setbit0 = setbit0,
@ -345,7 +347,7 @@ int cxd56_pmic_set_gpo_reg(uint8_t *setbit0, uint8_t *clrbit0,
.clrbit1 = clrbit1,
};
return PM_PmicControl(PMIC_CMD_GPO, &arg);
return pm_pmic_control(PMIC_CMD_GPO, &arg);
}
/****************************************************************************
@ -479,6 +481,7 @@ bool cxd56_pmic_get_gpo(uint8_t chset)
{
return true;
}
return false;
}
@ -512,13 +515,14 @@ int cxd56_pmic_set_loadswitch_reg(uint8_t *setbit, uint8_t *clrbit)
uint8_t *setbit;
uint8_t *clrbit;
}
arg =
{
.setbit = setbit,
.clrbit = clrbit,
};
return PM_PmicControl(PMIC_CMD_LOADSW, &arg);
return pm_pmic_control(PMIC_CMD_LOADSW, &arg);
}
/****************************************************************************
@ -549,6 +553,7 @@ int cxd56_pmic_set_loadswitch(uint8_t chset, bool value)
{
clrbit = chset;
}
return cxd56_pmic_set_loadswitch_reg(&setbit, &clrbit);
}
@ -607,13 +612,14 @@ int cxd56_pmic_set_ddc_ldo_reg(uint8_t *setbit, uint8_t *clrbit)
uint8_t *setbit;
uint8_t *clrbit;
}
arg =
{
.setbit = setbit,
.clrbit = clrbit,
};
return PM_PmicControl(PMIC_CMD_DDCLDO, &arg);
return pm_pmic_control(PMIC_CMD_DDCLDO, &arg);
}
/****************************************************************************
@ -644,6 +650,7 @@ int cxd56_pmic_set_ddc_ldo(uint8_t chset, bool value)
{
clrbit = chset;
}
return cxd56_pmic_set_ddc_ldo_reg(&setbit, &clrbit);
}
@ -698,10 +705,10 @@ int cxd56_pmic_get_rtc(uint64_t *count)
if (ret) goto error;
do
{
ret = cxd56_pmic_read(PMIC_REG_RRQ_LRQ_STATUS, &data, sizeof(data));
if (ret) goto error;
}
{
ret = cxd56_pmic_read(PMIC_REG_RRQ_LRQ_STATUS, &data, sizeof(data));
if (ret) goto error;
}
while (!(RRQ_TIME_STATE & data));
ret = cxd56_pmic_read(PMIC_REG_RTC, rtc, sizeof(rtc));
@ -731,7 +738,7 @@ error:
int cxd56_pmic_get_gauge(FAR struct pmic_gauge_s *gauge)
{
return PM_PmicControl(PMIC_CMD_AFE, gauge);
return pm_pmic_control(PMIC_CMD_AFE, gauge);
}
/****************************************************************************
@ -741,7 +748,7 @@ int cxd56_pmic_get_gauge(FAR struct pmic_gauge_s *gauge)
* Get lower limit of voltage for system to be running.
*
* Input Parameter:
* voltage - Lower limit voltage (mV)
* voltage - Lower limit voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@ -750,7 +757,7 @@ int cxd56_pmic_get_gauge(FAR struct pmic_gauge_s *gauge)
int cxd56_pmic_getlowervol(FAR int *voltage)
{
return PM_PmicControl(PMIC_CMD_GETVSYS, voltage);
return pm_pmic_control(PMIC_CMD_GETVSYS, voltage);
}
/****************************************************************************
@ -760,7 +767,7 @@ int cxd56_pmic_getlowervol(FAR int *voltage)
* Set lower limit of voltage for system to be running.
*
* Input Parameter:
* voltage - Lower limit voltage (mV)
* voltage - Lower limit voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@ -769,7 +776,7 @@ int cxd56_pmic_getlowervol(FAR int *voltage)
int cxd56_pmic_setlowervol(int voltage)
{
return PM_PmicControl(PMIC_CMD_SETVSYS, (void *)voltage);
return pm_pmic_control(PMIC_CMD_SETVSYS, (void *)voltage);
}
/****************************************************************************
@ -779,7 +786,7 @@ int cxd56_pmic_setlowervol(int voltage)
* Get voltage for the low battery notification
*
* Input Parameter:
* voltage - Low battery voltage (mV)
* voltage - Low battery voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@ -788,7 +795,7 @@ int cxd56_pmic_setlowervol(int voltage)
int cxd56_pmic_getnotifyvol(FAR int *voltage)
{
return PM_PmicControl(PMIC_CMD_GETPREVSYS, voltage);
return pm_pmic_control(PMIC_CMD_GETPREVSYS, voltage);
}
/****************************************************************************
@ -798,7 +805,7 @@ int cxd56_pmic_getnotifyvol(FAR int *voltage)
* Set voltage for the low battery notification
*
* Input Parameter:
* voltage - Low battery voltage (mV)
* voltage - Low battery voltage (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@ -807,7 +814,7 @@ int cxd56_pmic_getnotifyvol(FAR int *voltage)
int cxd56_pmic_setnotifyvol(int voltage)
{
return PM_PmicControl(PMIC_CMD_SETPREVSYS, (void *)voltage);
return pm_pmic_control(PMIC_CMD_SETPREVSYS, (void *)voltage);
}
/****************************************************************************
@ -817,7 +824,7 @@ int cxd56_pmic_setnotifyvol(int voltage)
* Get charge voltage
*
* Input Parameter:
* voltage - Possible values are every 50 between 4000 to 4400 (mV)
* voltage - Possible values are every 50 between 4000 to 4400 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@ -829,7 +836,7 @@ int cxd56_pmic_getchargevol(FAR int *voltage)
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_VOLTAGE, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_VOLTAGE, &val);
if (ret)
{
return -EIO;
@ -837,7 +844,7 @@ int cxd56_pmic_getchargevol(FAR int *voltage)
val &= 0xf;
/* Convert register value to actual voltage (mV) */
/* Convert register value to actual voltage (mv) */
if (val <= 8)
{
@ -858,7 +865,7 @@ int cxd56_pmic_getchargevol(FAR int *voltage)
* Set charge voltage
*
* Input Parameter:
* voltage - Avalable values are every 50 between 4000 to 4400 (mV)
* voltage - Avalable values are every 50 between 4000 to 4400 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
@ -875,16 +882,17 @@ int cxd56_pmic_setchargevol(int voltage)
{
return -EINVAL;
}
if (voltage % 50)
{
return -EINVAL;
}
/* Register setting values are every 50mV between 4.0V to 4.4V */
/* Register setting values are every 50mv between 4.0V to 4.4V */
val = (voltage - 4000) / 50;
return PM_PmicControl(PMIC_CMD_SET_CHG_VOLTAGE, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_CHG_VOLTAGE, (void *)val);
}
/****************************************************************************
@ -907,7 +915,7 @@ int cxd56_pmic_getchargecurrent(FAR int *current)
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_CURRENT, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_CURRENT, &val);
if (ret)
{
return ret;
@ -975,7 +983,7 @@ int cxd56_pmic_setchargecurrent(int current)
return -EFAULT;
}
return PM_PmicControl(PMIC_CMD_SET_CHG_CURRENT, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_CHG_CURRENT, (void *)val);
}
/****************************************************************************
@ -994,7 +1002,7 @@ int cxd56_pmic_setchargecurrent(int current)
int cxd56_pmic_getporttype(FAR int *porttype)
{
return PM_PmicControl(PMIC_CMD_GET_USB_PORT_TYPE, porttype);
return pm_pmic_control(PMIC_CMD_GET_USB_PORT_TYPE, porttype);
}
/****************************************************************************
@ -1019,7 +1027,7 @@ int cxd56_pmic_getchargestate(uint8_t *state)
/* Update charge state */
ret = PM_PmicControl(PMIC_CMD_AFE, &arg);
ret = pm_pmic_control(PMIC_CMD_AFE, &arg);
if (ret)
{
return ret;
@ -1027,7 +1035,7 @@ int cxd56_pmic_getchargestate(uint8_t *state)
/* Get actual charging state (CNT_USB1) */
ret = PM_PmicControl(PMIC_CMD_GET_CHG_STATE, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_STATE, &val);
*state = val & 0xff;
return ret;
@ -1040,20 +1048,20 @@ int cxd56_pmic_getchargestate(uint8_t *state)
* Set threshold voltage against full charge for automatic restart charging.
*
* Input Parameter:
* mV - Available values are -400, -350, -300 and -250 (mV)
* mv - Available values are -400, -350, -300 and -250 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
*
****************************************************************************/
int cxd56_pmic_setrechargevol(int mV)
int cxd56_pmic_setrechargevol(int mv)
{
int val;
/* Convert voltage to register value */
switch (mV)
switch (mv)
{
case -400:
val = PMIC_CHG_DET_MINUS400;
@ -1075,7 +1083,7 @@ int cxd56_pmic_setrechargevol(int mV)
return -EINVAL;
}
return PM_PmicControl(PMIC_CMD_SET_RECHG_VOLTAGE, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_RECHG_VOLTAGE, (void *)val);
}
/****************************************************************************
@ -1085,19 +1093,19 @@ int cxd56_pmic_setrechargevol(int mV)
* Get threshold voltage against full charge for automatic restart charging.
*
* Input Parameter:
* mV - Possible values are -400, -350, -300 and -250 (mV)
* mv - Possible values are -400, -350, -300 and -250 (mv)
*
* Returned Value:
* Return 0 on success. Otherwise, return a negated errno.
*
****************************************************************************/
int cxd56_pmic_getrechargevol(FAR int *mV)
int cxd56_pmic_getrechargevol(FAR int *mv)
{
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_RECHG_VOLTAGE, &val);
ret = pm_pmic_control(PMIC_CMD_GET_RECHG_VOLTAGE, &val);
if (ret)
{
return ret;
@ -1108,19 +1116,19 @@ int cxd56_pmic_getrechargevol(FAR int *mV)
switch (val)
{
case PMIC_CHG_DET_MINUS400:
*mV = -400;
*mv = -400;
break;
case PMIC_CHG_DET_MINUS350:
*mV = -350;
*mv = -350;
break;
case PMIC_CHG_DET_MINUS300:
*mV = -300;
*mv = -300;
break;
case PMIC_CHG_DET_MINUS250:
*mV = -250;
*mv = -250;
break;
default:
@ -1177,7 +1185,7 @@ int cxd56_pmic_setchargecompcurrent(int current)
break;
}
return PM_PmicControl(PMIC_CMD_SET_CHG_IFIN, (void *)val);
return pm_pmic_control(PMIC_CMD_SET_CHG_IFIN, (void *)val);
}
/****************************************************************************
@ -1199,7 +1207,7 @@ int cxd56_pmic_getchargecompcurrent(FAR int *current)
int val;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_IFIN, &val);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_IFIN, &val);
if (ret)
{
return ret;
@ -1257,7 +1265,7 @@ int cxd56_pmic_gettemptable(FAR struct pmic_temp_table_s *table)
{
/* SET_T60 (70h) - SET_T0_2 (78h) */
return PM_PmicControl(PMIC_CMD_GET_CHG_TEMPERATURE_TABLE, table);
return pm_pmic_control(PMIC_CMD_GET_CHG_TEMPERATURE_TABLE, table);
}
/****************************************************************************
@ -1277,7 +1285,7 @@ int cxd56_pmic_gettemptable(FAR struct pmic_temp_table_s *table)
int cxd56_pmic_settemptable(FAR struct pmic_temp_table_s *table)
{
return PM_PmicControl(PMIC_CMD_SET_CHG_TEMPERATURE_TABLE, table);
return pm_pmic_control(PMIC_CMD_SET_CHG_TEMPERATURE_TABLE, table);
}
/****************************************************************************
@ -1330,7 +1338,7 @@ int cxd56_pmic_setchargemode(int low, int high)
return -EINVAL;
}
return PM_PmicControl(PMIC_CMD_SET_CHG_TEMPERATURE_MODE, &arg);
return pm_pmic_control(PMIC_CMD_SET_CHG_TEMPERATURE_MODE, &arg);
}
/****************************************************************************
@ -1357,7 +1365,7 @@ int cxd56_pmic_getchargemode(FAR int *low, FAR int *high)
struct pmic_temp_mode_s arg;
int ret;
ret = PM_PmicControl(PMIC_CMD_GET_CHG_TEMPERATURE_MODE, &arg);
ret = pm_pmic_control(PMIC_CMD_GET_CHG_TEMPERATURE_MODE, &arg);
if (ret)
{
return ret;
@ -1376,22 +1384,22 @@ int cxd56_pmic_getchargemode(FAR int *low, FAR int *high)
int cxd56_pmic_monitor_enable(FAR struct pmic_mon_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_ENABLE, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_ENABLE, ptr);
}
int cxd56_pmic_monitor_status(FAR struct pmic_mon_status_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_STATUS, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_STATUS, ptr);
}
int cxd56_pmic_monitor_set(FAR struct pmic_mon_set_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_SET, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_SET, ptr);
}
int cxd56_pmic_monitor_get(FAR struct pmic_mon_log_s *ptr)
{
return PM_PmicControl(PMIC_CMD_POWER_MONITOR_GET, ptr);
return pm_pmic_control(PMIC_CMD_POWER_MONITOR_GET, ptr);
}
#endif
@ -1485,6 +1493,7 @@ int cxd56_pmic_read(uint8_t addr, void *buf, uint32_t size)
void *buf;
uint32_t size;
}
arg =
{
.addr = addr,
@ -1492,7 +1501,7 @@ int cxd56_pmic_read(uint8_t addr, void *buf, uint32_t size)
.size = size,
};
return PM_PmicControl(PMIC_CMD_READ, &arg);
return pm_pmic_control(PMIC_CMD_READ, &arg);
}
/****************************************************************************
@ -1519,6 +1528,7 @@ int cxd56_pmic_write(uint8_t addr, void *buf, uint32_t size)
void *buf;
uint32_t size;
}
arg =
{
.addr = addr,
@ -1526,7 +1536,7 @@ int cxd56_pmic_write(uint8_t addr, void *buf, uint32_t size)
.size = size,
};
return PM_PmicControl(PMIC_CMD_WRITE, &arg);
return pm_pmic_control(PMIC_CMD_WRITE, &arg);
}
#endif /* CONFIG_CXD56_PMIC */

109
arch/arm/src/cxd56xx/cxd56_sdhci.c
View file

@ -501,13 +501,13 @@ struct cxd56_sdiodev_s g_sdhcdev =
.sendsetup = cxd56_sdio_sendsetup,
.cancel = cxd56_sdio_cancel,
.waitresponse = cxd56_sdio_waitresponse,
.recvR1 = cxd56_sdio_recvshortcrc,
.recvR2 = cxd56_sdio_recvlong,
.recvR3 = cxd56_sdio_recvshort,
.recvR4 = cxd56_sdio_recvshort,
.recvR5 = cxd56_sdio_recvshort,
.recvR6 = cxd56_sdio_recvshortcrc,
.recvR7 = cxd56_sdio_recvshort,
.recv_r1 = cxd56_sdio_recvshortcrc,
.recv_r2 = cxd56_sdio_recvlong,
.recv_r3 = cxd56_sdio_recvshort,
.recv_r4 = cxd56_sdio_recvshort,
.recv_r5 = cxd56_sdio_recvshort,
.recv_r5 = cxd56_sdio_recvshortcrc,
.recv_r7 = cxd56_sdio_recvshort,
.waitenable = cxd56_sdio_waitenable,
.eventwait = cxd56_sdio_eventwait,
.callbackenable = cxd56_sdio_callbackenable,
@ -548,6 +548,7 @@ static FAR uint32_t cxd56_sdhci_adma_dscr[CXD56_SDIO_MAX_LEN_ADMA_DSCR * 2];
/****************************************************************************
* Low-level Helpers
****************************************************************************/
/****************************************************************************
* Name: cxd56_takesem
*
@ -1137,6 +1138,7 @@ static void cxd56_endtransfer(struct cxd56_sdiodev_s *priv,
{
priv->remaining = 0;
}
priv->buffer = 0;
/* Debug instrumentation */
@ -1395,6 +1397,7 @@ static void cxd56_sdio_sdhci_reset(FAR struct sdio_dev_s *dev)
{
break;
}
up_mdelay(30);
}
@ -1413,6 +1416,7 @@ static void cxd56_sdio_sdhci_reset(FAR struct sdio_dev_s *dev)
getreg32(CXD56_SDHCI_IRQSTATEN));
/* Initialize the SDHC slot structure data structure */
/* Initialize semaphores */
nxsem_init(&priv->waitsem, 0, 0);
@ -1541,6 +1545,7 @@ static void cxd56_sdio_widebus(FAR struct sdio_dev_s *dev, bool wide)
{
regval |= SDHCI_PROCTL_DTW_1BIT;
}
putreg32(regval, CXD56_SDHCI_PROCTL);
}
@ -1580,6 +1585,7 @@ static void cxd56_sdio_frequency(uint32_t frequency)
break;
}
}
divisor = i;
}
@ -1652,6 +1658,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
/* Clear the prescaler and divisor settings and other clock
* enables as well.
*/
regval &= ~(SDHCI_SYSCTL_SDCLKFS_MASK | SDHCI_SYSCTL_SDCLKFSUP_MASK);
putreg32(regval, CXD56_SDHCI_SYSCTL);
cxd56_sdio_frequency(CONFIG_CXD56_IDMODE_FREQ);
@ -1691,6 +1698,7 @@ static void cxd56_sdio_clock(FAR struct sdio_dev_s *dev,
break;
}
}
do
{
putreg32(regval | SDHCI_SYSCTL_SDCLKEN, CXD56_SDHCI_SYSCTL);
@ -2334,6 +2342,7 @@ static int cxd56_sdio_recvshortcrc(FAR struct sdio_dev_s *dev, uint32_t cmd,
{
return OK;
}
#endif
#ifdef CONFIG_DEBUG_FEATURES
if (!rshort)
@ -2401,6 +2410,7 @@ static int cxd56_sdio_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
rlong[2] = 0;
rlong[3] = 0;
}
#ifdef CONFIG_DEBUG_FEATURES
/* Check that R1 is the correct response to this command */
@ -2436,6 +2446,7 @@ static int cxd56_sdio_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
rlong[2] = getreg32(CXD56_SDHCI_CMDRSP1);
rlong[3] = getreg32(CXD56_SDHCI_CMDRSP0);
}
if (1)
{
rlong[0] = ((rlong[0] << 8) & 0xffffff00) |
@ -2446,6 +2457,7 @@ static int cxd56_sdio_recvlong(FAR struct sdio_dev_s *dev, uint32_t cmd,
((rlong[3] >> 24) & 0x000000ff);
rlong[3] = (rlong[3] << 8) & 0xffffff00;
}
return ret;
}
@ -2679,6 +2691,7 @@ static sdio_eventset_t cxd56_sdio_eventwait(FAR struct sdio_dev_s *dev,
priv->remaining = 0;
}
}
if (wkupevent & (SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR))
{
cxd56_sdio_cancel(&(priv->dev));
@ -2832,6 +2845,7 @@ static int cxd56_sdio_admasetup(FAR const uint8_t *buffer, size_t buflen)
len = SDHCI_MAX_ADMA_TRANS_SIZE;
data_addr += len;
}
cxd56_sdhci_adma_dscr[i * 2] = dscr_l;
remaining -= len;
if (remaining < 1)
@ -2840,6 +2854,7 @@ static int cxd56_sdio_admasetup(FAR const uint8_t *buffer, size_t buflen)
break;
}
}
if (remaining > 0)
{
return -EIO;
@ -2938,6 +2953,7 @@ static int cxd56_sdio_dmarecvsetup(FAR struct sdio_dev_s *dev,
goto error;
}
}
cxd56_dataconfig(priv, false, blocksize, buflen / blocksize,
SDHCI_DTOCV_DATATIMEOUT);
@ -3048,6 +3064,7 @@ static int cxd56_sdio_dmasendsetup(FAR struct sdio_dev_s *dev,
goto error;
}
}
cxd56_dataconfig(priv, true, blocksize, buflen / blocksize,
SDHCI_DTOCV_DATATIMEOUT);
@ -3342,11 +3359,13 @@ static uint32_t cxd56_sdio_readb_internal(FAR struct sdio_function_s * sf,
mcerr("ERROR: Send cmd52 addr:0x%x error\n", addr);
goto READB_ERR;
}
if ((!CMD52_RESP_OK(response)) || (response == 0xffffffff))
{
mcerr("ERROR: Fail resp %u\n", response);
goto READB_ERR;
}
if (rdata)
{
*rdata = response & 0xff;
@ -3392,11 +3411,13 @@ static uint32_t cxd56_sdio_writeb_internal(FAR struct sdio_function_s * sf,
mcerr("ERROR: Send cmd52 addr:0x%x error\n", addr);
goto WRITEB_ERR;
}
if ((!CMD52_RESP_OK(response)) || (response == 0xffffffff))
{
mcerr("ERROR: Fail resp %u\n", response);
goto WRITEB_ERR;
}
if (rdata)
{
*rdata = response & 0xff;
@ -3430,7 +3451,8 @@ static int cxd56_sdio_changeclock(FAR struct cxd56_sdiodev_s *priv)
mcerr("ERROR: Send cmd52, getclock error\n");
return ret;
}
if ((response & 0x40) != 0)
if ((response & 0x40) != 0)
{
mcinfo("Set clock to 400KHz\n");
cxd56_sdio_clock(&priv->dev, CLOCK_IDMODE);
@ -3440,6 +3462,7 @@ static int cxd56_sdio_changeclock(FAR struct cxd56_sdiodev_s *priv)
mcinfo("Set clock to 25MHz\n");
cxd56_sdio_clock(&priv->dev, CLOCK_SD_TRANSFER_4BIT);
}
return ret;
}
@ -3451,7 +3474,8 @@ static int cxd56_sdio_changeclock(FAR struct cxd56_sdiodev_s *priv)
*
****************************************************************************/
static FAR struct sdio_function_s *cxd56_sdio_function_alloc(FAR struct sdio_softc_s *sc)
static FAR struct sdio_function_s
*cxd56_sdio_function_alloc(FAR struct sdio_softc_s *sc)
{
FAR struct sdio_function_s *sf;
@ -3462,6 +3486,7 @@ static FAR struct sdio_function_s *cxd56_sdio_function_alloc(FAR struct sdio_sof
mcerr("ERROR: Failed\n");
return NULL;
}
memset(sf, 0, sizeof(struct sdio_function_s));
sf->sc = sc;
sf->number = -1;
@ -3498,18 +3523,20 @@ static uint32_t cxd56_sdio_read_cis(FAR struct sdio_function_s * sf,
sf0 = sf->sc->fn[0];
addr = SDIO_CCCR_CCP + (sf->number * SDIO_CCCR_SIZE);
for (i = 0; i < 3; i++)
{
ret = cxd56_sdio_readb_internal(sf0, (addr + i), &response);
if (ret == 0)
{
cisptr |= (response << (8 * i));
ret = cxd56_sdio_readb_internal(sf0, (addr + i), &response);
if (ret == 0)
{
cisptr |= (response << (8 * i));
}
}
}
if ((cisptr < SDIO_CIS_START) || (cisptr >= SDIO_CIS_END))
{
mcerr("ERROR: Bad cis ptr %#x\n", cisptr);
return 1;
}
for (; ; )
{
ret = cxd56_sdio_readb_internal(sf0, cisptr++, &tplcode);
@ -3517,6 +3544,7 @@ static uint32_t cxd56_sdio_read_cis(FAR struct sdio_function_s * sf,
{
return ret;
}
if (tplcode == SDIO_CISTPL_END)
{
break;
@ -3525,11 +3553,13 @@ static uint32_t cxd56_sdio_read_cis(FAR struct sdio_function_s * sf,
{
continue;
}
ret = cxd56_sdio_readb_internal(sf0, cisptr++, &tpllen);
if (ret != 0)
{
return ret;
}
if (tpllen == 0)
{
mcerr("ERROR: Cis error reg %d tpl %#x len %d\n",
@ -3546,11 +3576,13 @@ static uint32_t cxd56_sdio_read_cis(FAR struct sdio_function_s * sf,
cisptr += tpllen;
break;
}
ret = cxd56_sdio_readb_internal(sf0, cisptr++, &response);
if (ret != 0)
{
return ret;
}
cis->function = response;
cisptr += tpllen;
mcinfo("get funcid 0x%x, len %d\n", cis->function, tpllen);
@ -3562,29 +3594,34 @@ static uint32_t cxd56_sdio_read_cis(FAR struct sdio_function_s * sf,
cisptr += tpllen;
break;
}
ret = cxd56_sdio_readb_internal(sf0, cisptr++, &response);
if (ret != 0)
{
return ret;
}
cis->manufacturer = response;
ret = cxd56_sdio_readb_internal(sf0, cisptr++, &response);
if (ret != 0)
{
return ret;
}
cis->manufacturer |= response << 8;
ret = cxd56_sdio_readb_internal(sf0, cisptr++, &response);
if (ret != 0)
{
return ret;
}
cis->product = response;
ret = cxd56_sdio_readb_internal(sf0, cisptr++, &response);
if (ret != 0)
{
return ret;
}
cis->product = response << 8;
mcinfo("manufacturer/product ID: %x:%x, len %d\n",
cis->manufacturer,
@ -3597,6 +3634,7 @@ static uint32_t cxd56_sdio_read_cis(FAR struct sdio_function_s * sf,
break;
}
}
return OK;
}
@ -3652,6 +3690,7 @@ static int cxd56_sdhci_irq_handler(FAR struct sdio_dev_s *dev)
}
}
}
cxd56_sdio_enable_cardint();
return ret;
@ -3691,6 +3730,7 @@ static int cxd56_sdio_register_irq(FAR struct sdio_dev_s *dev, int func_num,
sf->number);
return -EBUSY;
}
cxd56_sdio_takesem(priv);
/* enable irq in device side */
@ -3712,6 +3752,7 @@ static int cxd56_sdio_register_irq(FAR struct sdio_dev_s *dev, int func_num,
cxd56_sdio_writeb_internal(sf0, SDIO_CCCR_INTEN, regorg, NULL);
goto REG_IRQ_FAIL;
}
nxsem_post(&priv->sc.sem);
return ret;
@ -3767,9 +3808,9 @@ static int cxd56_sdio_func_ready(FAR struct sdio_function_s * sf)
DEBUGASSERT(NULL != sf);
if (sf->number == 0)
{
return 1; /* FN0 is always ready */
}
{
return 1; /* FN0 is always ready */
}
sc = sf->sc;
sf0 = sc->fn[0];
@ -3778,6 +3819,7 @@ static int cxd56_sdio_func_ready(FAR struct sdio_function_s * sf)
{
return (rv & (1 << sf->number)) != 0;
}
return 0;
}
@ -3819,6 +3861,7 @@ static int cxd56_sdio_function_disable(FAR struct sdio_dev_s *dev,
{
goto FUNC_DIS_ERR;
}
nxsem_post(&priv->sc.sem);
return 0;
FUNC_DIS_ERR:
@ -3856,12 +3899,14 @@ static int cxd56_sdio_function_enable(FAR struct sdio_dev_s *dev,
{
return 0;
}
cxd56_sdio_takesem(priv);
ret = cxd56_sdio_readb_internal(sf0, SDIO_CCCR_IOEN, &rv);
if (ret)
{
goto FUNC_EN_ERR;
}
rv |= (1 << sf->number);
/* according to sdio_rw_direct(), set NULL to rdata */
@ -3879,6 +3924,7 @@ static int cxd56_sdio_function_enable(FAR struct sdio_dev_s *dev,
{
up_udelay(5 * 1000);
}
ret = (retry >= 0) ? 0 : -ETIMEDOUT;
if (0 == ret)
@ -3886,6 +3932,7 @@ static int cxd56_sdio_function_enable(FAR struct sdio_dev_s *dev,
nxsem_post(&priv->sc.sem);
return 0;
}
FUNC_EN_ERR:
mcerr("ERROR: Io fail ret %u\n", ret);
nxsem_post(&priv->sc.sem);
@ -4005,6 +4052,7 @@ static int cxd56_sdio_write(FAR struct sdio_dev_s *dev, int func_num,
{
cxd56_sdio_sendsetup(&priv->dev, data, size);
}
cmd53arg = cxd56_sdio_make_cmd53arg(1, sf->number, addr, 1, blocks,
priv->blocksize);
ret = cxd56_sdio_sendcmdpoll(priv, SDIO_ACMD53 | MMCSD_MULTIBLOCK |
@ -4014,6 +4062,7 @@ static int cxd56_sdio_write(FAR struct sdio_dev_s *dev, int func_num,
mcerr("ERROR: Send cmd53 error\n");
goto WRITE_ERR;
}
wkupevent = cxd56_sdio_eventwait(&priv->dev,
SDIO_BLOCK_TIMEOUT * blocks);
if ((wkupevent & (SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR)) != 0)
@ -4021,6 +4070,7 @@ static int cxd56_sdio_write(FAR struct sdio_dev_s *dev, int func_num,
mcerr("ERROR: Sdio write time out %x\n", wkupevent);
goto WRITE_TIME_OUT;
}
remainder -= size;
data += size;
addr += size;
@ -4050,6 +4100,7 @@ static int cxd56_sdio_write(FAR struct sdio_dev_s *dev, int func_num,
{
cxd56_sdio_sendsetup(&priv->dev, data, size);
}
cmd53arg = cxd56_sdio_make_cmd53arg(1, sf->number, addr, 1, 0, size);
ret = cxd56_sdio_sendcmdpoll(priv, SDIO_ACMD53 | MMCSD_WRDATAXFR,
cmd53arg);
@ -4058,16 +4109,19 @@ static int cxd56_sdio_write(FAR struct sdio_dev_s *dev, int func_num,
mcerr("ERROR: Send cmd53 error\n");
goto WRITE_ERR;
}
wkupevent = cxd56_sdio_eventwait(&priv->dev, SDIO_BLOCK_TIMEOUT);
if ((wkupevent & (SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR)) != 0)
{
mcerr("ERROR: Sdio write time out %x\n", wkupevent);
goto WRITE_TIME_OUT;
}
remainder -= size;
data += size;
addr += size;
}
nxsem_post(&priv->sc.sem);
return 0;
WRITE_TIME_OUT:
@ -4135,6 +4189,7 @@ static int cxd56_sdio_read(FAR struct sdio_dev_s *dev, int func_num,
{
cxd56_sdio_recvsetup(&priv->dev, data, size);
}
cmd53arg = cxd56_sdio_make_cmd53arg(0, sf->number, addr, 1,
blocks, priv->blocksize);
ret = cxd56_sdio_sendcmdpoll(priv, SDIO_ACMD53 | MMCSD_MULTIBLOCK |
@ -4144,6 +4199,7 @@ static int cxd56_sdio_read(FAR struct sdio_dev_s *dev, int func_num,
mcerr("ERROR: Send cmd53 error\n");
goto READ_ERR;
}
wkupevent = cxd56_sdio_eventwait(&priv->dev,
SDIO_BLOCK_TIMEOUT * blocks);
if ((wkupevent & (SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR)) != 0)
@ -4151,6 +4207,7 @@ static int cxd56_sdio_read(FAR struct sdio_dev_s *dev, int func_num,
mcerr("ERROR: Sdio read time out %x\n", wkupevent);
goto READ_TIME_OUT;
}
remainder -= size;
data += size;
addr += size;
@ -4180,6 +4237,7 @@ static int cxd56_sdio_read(FAR struct sdio_dev_s *dev, int func_num,
{
cxd56_sdio_recvsetup(&priv->dev, data, size);
}
cmd53arg = cxd56_sdio_make_cmd53arg(0, sf->number, addr, 1, 0, size);
ret = cxd56_sdio_sendcmdpoll(priv, SDIO_ACMD53 |
MMCSD_RDDATAXFR, cmd53arg);
@ -4188,16 +4246,19 @@ static int cxd56_sdio_read(FAR struct sdio_dev_s *dev, int func_num,
mcerr("ERROR: Send cmd53 error\n");
goto READ_ERR;
}
wkupevent = cxd56_sdio_eventwait(&priv->dev, SDIO_BLOCK_TIMEOUT);
if ((wkupevent & (SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR)) != 0)
{
mcerr("ERROR: Sdio read time out %x\n", wkupevent);
goto READ_TIME_OUT;
}
remainder -= size;
data += size;
addr += size;
}
nxsem_post(&priv->sc.sem);
return 0;
READ_TIME_OUT:
@ -4225,6 +4286,7 @@ static int cxd56_sdio_get_cis(FAR struct sdio_dev_s *dev,
{
*cis = priv->sc.fn[func_num]->cis;
}
return OK;
}
@ -4269,6 +4331,7 @@ static int cxd56_sdio_initialize(struct cxd56_sdiodev_s *priv)
mcerr("ERROR: Send cmd5 error\n");
return ret;
}
mcinfo("response = 0x%x, card has %d function\n",
response, (response >> 28) & 7);
mcinfo("send cmd5 again to set card ready\n");
@ -4290,6 +4353,7 @@ static int cxd56_sdio_initialize(struct cxd56_sdiodev_s *priv)
mcinfo("response = 0x%x, card is ready(MSB=1)\n", response);
priv->sc.func_num = SDIO_OCR_NUM_FUNCTIONS(response) + 1;
}
mcinfo("send CMD3 to enter standby state\n");
cxd56_sdio_sendcmdpoll(priv, SD_CMD3, 0);
ret = cxd56_sdio_recvshortcrc(&priv->dev, SD_CMD3, &response);
@ -4312,7 +4376,7 @@ static int cxd56_sdio_initialize(struct cxd56_sdiodev_s *priv)
ret = cxd56_sdio_recvshortcrc(&priv->dev, MMCSD_CMD7S, &response);
if (ret != OK)
{
mcerr("ERROR: mmcsd_recvR1 for CMD7 failed: %d\n", ret);
mcerr("ERROR: mmcsd_recv_r1 for CMD7 failed: %d\n", ret);
return ret;
}
@ -4327,6 +4391,7 @@ static int cxd56_sdio_initialize(struct cxd56_sdiodev_s *priv)
mcerr("ERROR: Addr:0x7, recv R5 error\n");
return ret;
}
mcinfo("Bus interface ctrl (@0x7):0x%x\n", response);
cxd56_sdio_sendcmdpoll(priv, SDIO_ACMD52, 0x7 << 9 |
@ -4348,6 +4413,7 @@ static int cxd56_sdio_initialize(struct cxd56_sdiodev_s *priv)
mcerr("ERROR: Addr:0x8, recv R5 error\n");
return ret;
}
mcinfo("Card capability(@0x8):0x%x\n", response);
mcinfo("It's a %s card\n",
@ -4371,6 +4437,7 @@ static int cxd56_sdio_initialize(struct cxd56_sdiodev_s *priv)
{
goto SDIO_INIT_ERR;
}
fn->number = i;
priv->sc.fn[i] = fn;
@ -4496,10 +4563,12 @@ FAR struct sdio_dev_s *cxd56_sdhci_initialize(int slotno)
#endif
#ifdef CONFIG_SDIO_DMA
for (i = 0; i < sizeof(cxd56_sdhci_adma_dscr) / sizeof(cxd56_sdhci_adma_dscr[0]); i++)
for (i = 0; i < sizeof(cxd56_sdhci_adma_dscr) /
sizeof(cxd56_sdhci_adma_dscr[0]); i++)
{
cxd56_sdhci_adma_dscr[i] = 0;
}
putreg32((uint32_t)cxd56_sdhci_adma_dscr, CXD56_SDHCI_ADSADDR);
putreg32(0, CXD56_SDHCI_ADSADDR_H);
putreg32(SDHCI_PROCTL_DMAS_ADMA2 |
@ -4648,8 +4717,10 @@ void cxd56_sdhci_mediachange(FAR struct sdio_dev_s *dev)
{
priv->cbevents &= SDIOMEDIA_INSERTED;
}
mediachange = 1;
}
leave_critical_section(flags);
if (mediachange)
{

27
arch/arm/src/cxd56xx/hardware/cxd5602_backupmem.h
View file

@ -39,22 +39,23 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H
/********************************************************************************************
/***************************************************************************
* Included Files
********************************************************************************************/
***************************************************************************/
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
#define CXD56_BKUP_SRAM_BASE (0x04400000)
#define BKUP ((backup_info_t*)CXD56_BKUP_SRAM_BASE)
/********************************************************************************************
/****************************************************************************
* Public Types
********************************************************************************************/
****************************************************************************/
typedef struct {
typedef struct
{
uint32_t rcosc_clock; /* 0x04400000 ~ 0x04400003 */
uint32_t chip_revision; /* 0x04400004 ~ 0x04400007 */
uint32_t sbl_version; /* 0x04400008 ~ 0x0440000b */
@ -71,17 +72,17 @@ typedef struct {
uint8_t power_monitor_data[0x420]; /* 0x04400100 ~ 0x0440051f */
uint8_t reserved1[2 * 1024 - 0x520]; /* 0x04400520 ~ 0x044007ff (2KB-0x520)*/
uint8_t gnss_backup_data[24 * 1024]; /* 0x04400800 ~ 0x044067ff (24KB) */
uint8_t gnss_pvtlog_data[ 4 * 1024]; /* 0x04406800 ~ 0x044077ff (4KB) */
uint8_t reserved_romcode[ 2 * 1024]; /* 0x04407800 ~ 0x04407fff (2KB) */
uint8_t gnss_pvtlog_data[4 * 1024]; /* 0x04406800 ~ 0x044077ff (4KB) */
uint8_t reserved_romcode[2 * 1024]; /* 0x04407800 ~ 0x04407fff (2KB) */
uint8_t log[32 * 1024]; /* 0x04408000 ~ 0x0440ffff (32KB) */
} backup_info_t;
/********************************************************************************************
/****************************************************************************
* Public Data
********************************************************************************************/
****************************************************************************/
/********************************************************************************************
/****************************************************************************
* Public Functions
********************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H */

10
arch/arm/src/cxd56xx/hardware/cxd5602_pinconfig.h
View file

@ -39,15 +39,15 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_PINCONFIG_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_PINCONFIG_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
/* Set the standard pinconf macro Definitions
* - If it's used as input pin, then set 1. Otherwise set 0 (default).
@ -201,6 +201,7 @@
* i d Z m l
* n e I A l
*/
#define PINCONF_I2C4_BCK_GPIO PINCONF(PIN_I2C4_BCK, 0, 0, 0, 0)
#define PINCONF_I2C4_BCK PINCONF(PIN_I2C4_BCK, 1, 1, 0, 0)
#define PINCONF_I2C4_BDT_GPIO PINCONF(PIN_I2C4_BDT, 0, 0, 0, 0)
@ -491,6 +492,7 @@
/* Reference set of multiple pinconfigs
*
*/
#define PINCONFS_I2C4_GPIO { PINCONF_I2C4_BCK_GPIO, PINCONF_I2C4_BDT_GPIO }
#define PINCONFS_I2C4 { PINCONF_I2C4_BCK, PINCONF_I2C4_BDT }
#define PINCONFS_PMIC_INT_GPIO { PINCONF_PMIC_INT_GPIO }

9
arch/arm/src/cxd56xx/hardware/cxd5602_topreg.h
View file

@ -39,15 +39,15 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_TOPREG_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_TOPREG_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
#define CXD56_TOPREG_PWD_CTL (CXD56_TOPREG_BASE + 0x0000)
#define CXD56_TOPREG_ANA_PW_CTL (CXD56_TOPREG_BASE + 0x0004)
@ -377,6 +377,7 @@
#define CXD56_TOPREG_GP_USB_VBUSINT (CXD56_TOPREG_BASE + 0x2188)
/* Topreg sub */
#define CXD56_TOPREG_PSW_CHECK (CXD56_TOPREG_SUB_BASE + 0x0000)
#define CXD56_TOPREG_UNEXP_PSW_DIG (CXD56_TOPREG_SUB_BASE + 0x0004)
#define CXD56_TOPREG_UNEXP_PSW_ANA (CXD56_TOPREG_SUB_BASE + 0x0008)

8
arch/arm/src/cxd56xx/hardware/cxd56_crg.h
View file

@ -39,16 +39,16 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_CRG_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_CRG_H
/********************************************************************************************
/****************************************************************************
* Included Files
********************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
/****************************************************************************
* Pre-processor Definitions
********************************************************************************************/
****************************************************************************/
#define CXD56_CRG_GEAR_AHB (CXD56_CRG_BASE + 0x0000)
#define CXD56_CRG_GEAR_IMG_UART (CXD56_CRG_BASE + 0x0004)

11
arch/arm/src/cxd56xx/hardware/cxd56_rtc.h
View file

@ -36,17 +36,17 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_RTC_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_RTC_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include "hardware/cxd5602_memorymap.h"
/****************************************************************************************
/****************************************************************************
* Pre-processor Definitions
****************************************************************************************/
****************************************************************************/
/* Register offsets *********************************************************************/
/* Register offsets *********************************************************/
#define RTC_WRREGPOSTCNT (0x0)
#define RTC_WRREGPRECNT (0x4)
@ -136,5 +136,4 @@
#define RTCREG_ALM_ERREN_MASK (1u << 16)
#define RTCREG_ALM_ERRDBG_MASK (1u << 31)
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_RTC_H */

24
arch/arm/src/cxd56xx/hardware/cxd56_timer.h
View file

@ -36,20 +36,20 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_TIMER_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_TIMER_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/cxd56xx/chip.h>
#include "hardware/cxd5602_memorymap.h"
/****************************************************************************************
/****************************************************************************
* Pre-processor Definitions
****************************************************************************************/
****************************************************************************/
/* Register addresses *******************************************************************/
/* Register addresses *******************************************************/
#define CXD56_TIMER0_BASE (CXD56_TIMER_BASE)
#define CXD56_TIMER1_BASE (CXD56_TIMER_BASE + 0x0020)
@ -71,7 +71,7 @@
#define CXD56_TIMER_PCELLID2 (0x0FF8) /* PrimeCell ID2 register [RO] */
#define CXD56_TIMER_PCELLID3 (0x0FFC) /* PrimeCell ID3 register [RO] */
/* Register bit definitions *************************************************************/
/* Register bit definitions *************************************************/
/* Control Register */
@ -102,16 +102,16 @@
#define TIMERITOP_TIMINT1 (0x1u << 0)
#define TIMERITOP_TIMINT2 (0x1u << 1)
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Functions
****************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_TIMER_H */

3
arch/arm/src/cxd56xx/hardware/cxd56_udmac.h
View file

@ -148,7 +148,8 @@
* Public Types
****************************************************************************/
struct dma_descriptor_s {
struct dma_descriptor_s
{
volatile void * volatile srcend;
volatile void * volatile dstend;
volatile uint32_t ctrl;

24
arch/arm/src/cxd56xx/hardware/cxd56_wdt.h
View file

@ -36,19 +36,19 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_WDT_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_WDT_H
/****************************************************************************************
/****************************************************************************
* Included Files
****************************************************************************************/
****************************************************************************/
#include <arch/cxd56xx/chip.h>
#include "hardware/cxd5602_memorymap.h"
/****************************************************************************************
/****************************************************************************
* Pre-processor Definitions
****************************************************************************************/
****************************************************************************/
/* WDT register addresses ***************************************************************/
/* WDT register addresses ***************************************************/
#define CXD56_WDT_WDOGLOAD (CXD56_WDOG_BASE + 0x0000) /* Load register */
#define CXD56_WDT_WDOGVALUE (CXD56_WDOG_BASE + 0x0004) /* Value register [RO] */
@ -68,7 +68,7 @@
#define CXD56_WDT_WDOGPCELLID2 (CXD56_WDOG_BASE + 0x0FF8) /* PrimeCell ID2 register [RO] */
#define CXD56_WDT_WDOGPCELLID3 (CXD56_WDOG_BASE + 0x0FFC) /* PrimeCell ID3 register [RO] */
/* WDT register bit definitions *********************************************************/
/* WDT register bit definitions *********************************************/
/* Control Register */
@ -93,16 +93,16 @@
#define WDOGITOP_WDOGINT (0x1 << 1) /* output interrupt */
#define WDOGITOP_WDOGRES (0x1 << 0) /* output reset */
/****************************************************************************************
/****************************************************************************
* Public Types
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Data
****************************************************************************************/
****************************************************************************/
/****************************************************************************************
/****************************************************************************
* Public Functions
****************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_WDT_H */

8
boards/arm/cxd56xx/common/src/cxd56_ak09912_i2c.c
View file

@ -49,6 +49,14 @@
#include "cxd56_i2c.h"
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
#if defined(CONFIG_I2C) && defined(CONFIG_SENSORS_AK09912)
int board_ak09912_initialize(FAR const char *devpath, int bus)

8
boards/arm/cxd56xx/common/src/cxd56_ak09912_scu.c
View file

@ -56,6 +56,14 @@
# define MAG_NR_SEQS 1
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
#ifdef CONFIG_SENSORS_AK09912_SCU
int board_ak09912_initialize(FAR const char *devpath, int bus)

3
boards/arm/cxd56xx/drivers/audio/cxd56_audio.c
View file

@ -505,6 +505,7 @@ CXD56_AUDIO_ECODE cxd56_audio_en_deq(FAR cxd56_audio_deq_coef_t *coef)
{
g_pwon_param.deq.coef = coef;
}
if (g_status == CXD56_AUDIO_POWER_STATE_OFF)
{
return ret;
@ -673,6 +674,7 @@ CXD56_AUDIO_ECODE cxd56_audio_dis_output(void)
return ret;
}
}
#endif
return ret;
}
@ -989,6 +991,7 @@ CXD56_AUDIO_ECODE cxd56_audio_set_datapath(cxd56_audio_signal_t sig,
return ret;
}
}
return ret;
}

12
boards/arm/cxd56xx/drivers/audio/cxd56_audio_ac_reg.c
View file

@ -891,6 +891,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_checkid(void)
{
return CXD56_AUDIO_ECODE_REG_AC_REVID;
}
if (read_ac_reg(RI_DEVICEID) != AC_DEVICEID)
{
return CXD56_AUDIO_ECODE_REG_AC_DEVID;
@ -944,7 +945,7 @@ void cxd56_audio_ac_reg_poweron_sdes(void)
CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_micmode(uint8_t mic_mode)
{
switch(mic_mode)
switch (mic_mode)
{
case CXD56_AUDIO_CFG_MIC_MODE_128FS:
write_ac_reg(RI_FS_FS, 0);
@ -1066,6 +1067,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_alcspc(void)
{
return ret;
}
write_ac_reg(RI_ALC_EN, 1);
}
else if (CXD56_AUDIO_CFG_ALCSPC == CXD56_AUDIO_CFG_ALCSPC_SPC)
@ -1077,6 +1079,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_set_alcspc(void)
{
return ret;
}
write_ac_reg(RI_SPC_EN, 1);
}
@ -1196,15 +1199,18 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_cic(uint8_t mic_in,
write_ac_reg(RI_CIC4IN_SEL, 0);
write_ac_reg(RI_HPF4_MODE, 1);
}
if (cic_num > 2)
{
if (read_ac_reg(RI_PDN_AMICEXT) == 1)
{
write_ac_reg(RI_PDN_AMICEXT, 0);
}
write_ac_reg(RI_CIC3IN_SEL, 0);
write_ac_reg(RI_HPF3_MODE, 1);
}
if (cic_num > 1)
{
write_ac_reg(RI_PDN_AMIC2, 0);
@ -1212,6 +1218,7 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_cic(uint8_t mic_in,
write_ac_reg(RI_HPF2_MODE, 1);
write_ac_reg(RI_CIC2_GAIN_MODE, 1);
}
if (cic_num > 0)
{
write_ac_reg(RI_PDN_AMIC1, 0);
@ -1232,17 +1239,20 @@ CXD56_AUDIO_ECODE cxd56_audio_ac_reg_poweron_cic(uint8_t mic_in,
write_ac_reg(RI_CIC4IN_SEL, 1);
write_ac_reg(RI_HPF4_MODE, 1);
}
if (cic_num > 2)
{
write_ac_reg(RI_CIC3IN_SEL, 1);
write_ac_reg(RI_HPF3_MODE, 1);
}
if (cic_num > 1)
{
write_ac_reg(RI_CIC2IN_SEL, 1);
write_ac_reg(RI_HPF2_MODE, 1);
write_ac_reg(RI_CIC2_GAIN_MODE, 1);
}
if (cic_num > 0)
{
write_ac_reg(RI_CIC1IN_SEL, 1);

282
boards/arm/cxd56xx/drivers/audio/cxd56_audio_aca.c
View file

@ -55,14 +55,14 @@
#define MIC_CH_BITNUM 4
#define MIC_CH_BITMAP 0xf
#define MIC_GAIN_MAX 150
#define MIC_GAIN_MIN 0
#define MIC_GAIN_MAX 150
#define MIC_GAIN_MIN 0
#define PGA_GAIN_MAX 60
#define PGA_GAIN_MIN 0
#define PGA_GAIN_MAX 60
#define PGA_GAIN_MIN 0
#define AS_VGAIN_MAX 60
#define AS_VGAIN_MIN -95
#define AS_VGAIN_MAX 60
#define AS_VGAIN_MIN -95
typedef enum
{
@ -72,7 +72,7 @@ typedef enum
AS_ACA_OSC_49_152MHZ, /* 49.152MHz */
AS_ACA_OSC_49_152MHZ_HIRES, /* 49.152MHz,Hi-Res */
AS_ACA_OSC_MAX_ENTRY
} asAcaPulcoOscModeId;
} as_aca_pulco_osc_mode_id_t;
typedef enum
{
@ -81,7 +81,7 @@ typedef enum
AS_ACA_MIC_DMIC, /* Digital MIC */
AS_ACA_MIC_BOTH, /* Analog MIC and Digital MIC */
AS_ACA_MIC_MAX_ENTRY
} asAcaPulcoMicDeviceId;
} as_aca_pulco_mic_device_id_t;
typedef enum
{
@ -89,7 +89,7 @@ typedef enum
AS_ACA_MICBIAS_SEL_2_0V, /* 2.0V */
AS_ACA_MICBIAS_SEL_2_8V, /* 2.8V */
AS_ACA_MICBIAS_SEL_MAX_ENTRY
} asAcaPulcoMicBiasSelId;
} as_aca_pulco_mic_bias_sel_id_t;
typedef enum
{
@ -99,7 +99,7 @@ typedef enum
AS_ACA_IO_DS_STRONGER, /* Stronger */
AS_ACA_IO_DS_STRONGEST, /* Strongest */
AS_ACA_IO_DS_MAX_ENTRY
} asAcaPulcoIoDsId;
} as_aca_pulco_io_ds_id_t;
typedef enum
{
@ -107,7 +107,7 @@ typedef enum
AS_SMSTR_MODE_FS_16, /* 16fs */
AS_SMSTR_MODE_FS_32, /* 32fs */
AS_SMSTR_MODE_FS_MAX_ENTRY
} asSmstrModeId;
} as_smstr_mode_id_t;
typedef enum
{
@ -115,7 +115,7 @@ typedef enum
AS_SMSTR_MCK_FS_512, /* 512fs */
AS_SMSTR_MCK_FS_1024, /* 1024fs */
AS_SMSTR_MCK_FS_MAX_ENTRY
} asSmstrMckId;
} as_smaster_mck_id_t;
typedef enum
{
@ -125,7 +125,7 @@ typedef enum
AS_SMSTR_PWMMD_SINGLE_ALTER, /* Single side alternating */
AS_SMSTR_PWMMD_BOTH_ALTER, /* Both side alternating */
AS_SMSTR_PWMMD_MAX_ENTRY
} asSmstrPwmModeId;
} as_smaster_pwm_mode_id_t;
typedef enum
{
@ -133,7 +133,7 @@ typedef enum
AS_SMSTR_CHSEL_NORMAL, /* Normal */
AS_SMSTR_CHSEL_EXCHANGE, /* Exchange L and R */
AS_SMSTR_CHSEL_MAX_ENTRY
} asSmstrChSelId;
} as_smaster_ch_sel_id_t;
typedef enum
{
@ -145,7 +145,7 @@ typedef enum
AS_ACA_OUT_EP_PWM, /* Ear Speaker and PWM output */
AS_ACA_OUT_OFF, /* Disable output */
AS_ACA_OUT_MAX_ENTRY
} asAcaPulcoOutDeviceId;
} as_aca_pulco_out_dev_id_t;
typedef enum
{
@ -156,7 +156,7 @@ typedef enum
AS_ACA_PWMOUT_RN, /* RN */
AS_ACA_PWMOUT_RP, /* RP */
AS_ACA_PWMOUT_MAX_ENTRY
} asAcaPulcoPwmOutId;
} as_aca_pulco_pwm_out_id_t;
typedef enum
{
@ -164,7 +164,7 @@ typedef enum
AS_ACA_SP_LOOP_MODE_ENABLE,
AS_ACA_SP_LOOP_MODE_DISABLE,
AS_ACA_SP_LOOP_MODE_MAX_ENTRY
} asAcaSpLoopModeId;
} as_aca_sp_loop_mode_id_t;
typedef enum
{
@ -174,7 +174,7 @@ typedef enum
AS_ACA_SP_DELAY_SEL_MIDDLE,
AS_ACA_SP_DELAY_SEL_LONG,
AS_ACA_SP_DELAY_SEL_MAX_ENTRY
} asAcaSpDelaySelId;
} as_aca_sp_delay_sel_id_t;
typedef enum
{
@ -182,7 +182,7 @@ typedef enum
AS_ACA_SP_DLY_FREE_OFF,
AS_ACA_SP_DLY_FREE_ON,
AS_ACA_SP_DLY_FREE_MAX_ENTRY
} asAcaSpDlyFreeId;
} as_aca_sp_dly_free_id_t;
typedef enum
{
@ -192,7 +192,7 @@ typedef enum
AS_ACA_SP_SPLITON_SEL_LONG,
AS_ACA_SP_SPLITON_SEL_LONGEST,
AS_ACA_SP_SPLITON_SEL_MAX_ENTRY
} asAcaSpSplitonSelId;
} as_aca_sp_spliton_sel_id_t;
typedef enum
{
@ -202,7 +202,7 @@ typedef enum
AS_ACA_SP_DRV_SEL_1DRIVER,
AS_ACA_SP_DRV_SEL_LINEOUT,
AS_ACA_SP_DRV_SEL_MAX_ENTRY
} asAcaSpDrvSelId;
} as_aca_sp_drv_sel_id_t;
typedef enum
{
@ -210,7 +210,7 @@ typedef enum
AS_ACA_SER_MODE_8CH, /* 8ch */
AS_ACA_SER_MODE_4CH, /* 4ch */
AS_ACA_SER_MODE_MAX_ENTRY
} asAcaPulcoSerModeId;
} as_aca_pulco_ser_mode_id_t;
typedef enum
{
@ -218,7 +218,7 @@ typedef enum
AS_ACA_SER_FS_128, /* 128fs */
AS_ACA_SER_FS_64, /* 64fs */
AS_ACA_SER_FS_MAX_ENTRY
} asAcaPulcoSerFsId;
} as_aca_pulco_ser_fs_id_t;
typedef enum
{
@ -237,7 +237,7 @@ typedef enum
AS_ACA_SER_SEL_DMIC8 = 12,
AS_ACA_SER_SEL_UNKNOWN = 15,
AS_ACA_SER_SEL_MAX_ENTRY = 16
} asAcaPulcoSerSelChId;
} as_aca_pulco_ser_sel_ch_id_t;
typedef enum
{
@ -251,7 +251,7 @@ typedef enum
AS_SDES_DES_SEL_CH7,
AS_SDES_DES_SEL_CH8,
AS_SDES_DES_SEL_MAX_ENTRY
} asSdesDesSelOutId;
} as_sdes_des_sel_out_id_t;
typedef enum
{
@ -272,65 +272,65 @@ typedef enum
AS_ACA_GET_REGISTER,
AS_ACA_SET_REGISTER,
AS_ACA_CONTROL_TYPE_NUM
} AsAcaControlType;
} as_aca_control_t;
typedef struct
{
asAcaPulcoOscModeId oscMode;
asAcaPulcoMicDeviceId micDev;
asAcaPulcoIoDsId gpoDs;
asAcaPulcoIoDsId adDataDs;
asAcaPulcoIoDsId dmicClkDs;
asAcaPulcoIoDsId mclkDs;
} asAcaPulcoParam;
as_aca_pulco_osc_mode_id_t osc_mode;
as_aca_pulco_mic_device_id_t mic_dev;
as_aca_pulco_io_ds_id_t gpo_ds;
as_aca_pulco_io_ds_id_t ad_data_ds;
as_aca_pulco_io_ds_id_t dmic_clk_ds;
as_aca_pulco_io_ds_id_t mclk_ds;
} as_aca_pulco_param_t;
typedef struct
{
asAcaPulcoMicDeviceId micDev;
asAcaPulcoMicBiasSelId micBiasSel;
uint32_t micGain[4];
uint32_t pgaGain[4];
int32_t vgain[4];
} asAcaPulcoInParam;
as_aca_pulco_mic_device_id_t mic_dev;
as_aca_pulco_mic_bias_sel_id_t mic_bias_sel;
uint32_t mic_gain[4];
uint32_t pga_gain[4];
int32_t vgain[4];
} as_aca_pulco_in_param_t;
typedef struct
{
asSmstrModeId mode;
asSmstrMckId mckFs;
asSmstrPwmModeId pwmMode;
asSmstrChSelId chSel;
uint8_t out2Dly;
} asAcaPulcoSmstrParam;
as_smstr_mode_id_t mode;
as_smaster_mck_id_t mck_fs;
as_smaster_pwm_mode_id_t pwm_mode;
as_smaster_ch_sel_id_t ch_sel;
uint8_t out2dly;
} as_aca_pulco_smaster_param_t;
typedef struct
{
asAcaPulcoOutDeviceId outDev;
asAcaPulcoPwmOutId pwmOut[2];
asAcaSpDelaySelId spDelay;
asAcaSpLoopModeId loopMode;
asSmstrModeId mode;
asAcaSpDlyFreeId spDlyFree;
asAcaSpSplitonSelId spSpliton;
asAcaSpDrvSelId spDrv;
} asAcaPulcoOutParam;
as_aca_pulco_out_dev_id_t out_dev;
as_aca_pulco_pwm_out_id_t pwm_out[2];
as_aca_sp_delay_sel_id_t sp_delay;
as_aca_sp_loop_mode_id_t loop_mode;
as_smstr_mode_id_t mode;
as_aca_sp_dly_free_id_t sp_dly_free;
as_aca_sp_spliton_sel_id_t sp_spliton;
as_aca_sp_drv_sel_id_t sp_drv;
} as_aca_pulco_out_param_t;
typedef struct
{
uint32_t bank;
uint32_t addr;
uint32_t value;
} asAcaPulcoRegParam;
} as_aca_pulco_reg_param_t;
typedef struct
{
asAcaPulcoSerModeId serMode;
asAcaPulcoSerFsId serFs;
as_aca_pulco_ser_mode_id_t ser_mode;
as_aca_pulco_ser_fs_id_t ser_fs;
union
{
asAcaPulcoSerSelChId in[CXD56_AUDIO_MIC_CH_MAX];
asSdesDesSelOutId out[CXD56_AUDIO_MIC_CH_MAX];
} selCh;
} asSerDesParam;
as_aca_pulco_ser_sel_ch_id_t in[CXD56_AUDIO_MIC_CH_MAX];
as_sdes_des_sel_out_id_t out[CXD56_AUDIO_MIC_CH_MAX];
} sel_ch;
} as_ser_des_param_t;
/* Select output device ID */
@ -348,13 +348,13 @@ typedef enum
AS_OUT_DEV_I2S,
AS_OUT_DEV_NUM
} asOutDeviceId;
} as_out_dev_id_t;
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
extern uint32_t AS_AcaControl(uint8_t type, uint32_t param);
extern uint32_t as_aca_control(uint8_t type, uint32_t param);
/****************************************************************************
* Private Data
@ -368,7 +368,8 @@ extern uint32_t AS_AcaControl(uint8_t type, uint32_t param);
* Private Functions
****************************************************************************/
static void get_osc_mode(uint8_t cfg_mclk, asAcaPulcoOscModeId *osc)
static void get_osc_mode(uint8_t cfg_mclk,
as_aca_pulco_osc_mode_id_t *osc)
{
cxd56_audio_clkmode_t clk_mode = cxd56_audio_config_get_clkmode();
@ -396,7 +397,8 @@ static void get_osc_mode(uint8_t cfg_mclk, asAcaPulcoOscModeId *osc)
}
}
static void get_mic_dev(uint32_t cfg_mic, FAR asAcaPulcoMicDeviceId *dev)
static void get_mic_dev(uint32_t cfg_mic,
FAR as_aca_pulco_mic_device_id_t *dev)
{
bool is_amic = false;
bool is_dmic = false;
@ -430,9 +432,10 @@ static void get_mic_dev(uint32_t cfg_mic, FAR asAcaPulcoMicDeviceId *dev)
}
}
static void get_drv_str(uint8_t cfg_ds, FAR asAcaPulcoIoDsId *ds)
static void get_drv_str(uint8_t cfg_ds,
FAR as_aca_pulco_io_ds_id_t *ds)
{
switch (cfg_ds)
switch (cfg_ds)
{
case CXD56_AUDIO_CFG_DS_WEAKEST:
*ds = AS_ACA_IO_DS_WEAKEST;
@ -456,9 +459,10 @@ static void get_drv_str(uint8_t cfg_ds, FAR asAcaPulcoIoDsId *ds)
}
}
static void get_mic_bias(uint8_t cfg_bsel, FAR asAcaPulcoMicBiasSelId *bsel)
static void get_mic_bias(uint8_t cfg_bsel,
FAR as_aca_pulco_mic_bias_sel_id_t *bsel)
{
switch (cfg_bsel)
switch (cfg_bsel)
{
case CXD56_AUDIO_CFG_MIC_BIAS_20V:
*bsel = AS_ACA_MICBIAS_SEL_2_0V;
@ -474,63 +478,64 @@ static void get_mic_bias(uint8_t cfg_bsel, FAR asAcaPulcoMicBiasSelId *bsel)
}
}
static void get_sp_split_on(uint8_t cf_sp_spliton, FAR asAcaSpSplitonSelId *spSpliton)
static void get_sp_split_on(uint8_t cf_sp_spliton,
FAR as_aca_sp_spliton_sel_id_t *sp_spliton)
{
switch (cf_sp_spliton)
{
case CXD56_AUDIO_CFG_SP_SPLITON_LONGEST:
*spSpliton = AS_ACA_SP_SPLITON_SEL_LONGEST;
*sp_spliton = AS_ACA_SP_SPLITON_SEL_LONGEST;
break;
case CXD56_AUDIO_CFG_SP_SPLITON_LONG:
*spSpliton = AS_ACA_SP_SPLITON_SEL_LONG;
*sp_spliton = AS_ACA_SP_SPLITON_SEL_LONG;
break;
case CXD56_AUDIO_CFG_SP_SPLITON_SHORT:
*spSpliton = AS_ACA_SP_SPLITON_SEL_SHORT;
*sp_spliton = AS_ACA_SP_SPLITON_SEL_SHORT;
break;
default:
*spSpliton = AS_ACA_SP_SPLITON_SEL_SHORTEST;
*sp_spliton = AS_ACA_SP_SPLITON_SEL_SHORTEST;
break;
}
}
static void get_sp_driver(uint8_t cfg_sp_drv, FAR asAcaSpDrvSelId *spDrv)
static void get_sp_driver(uint8_t cfg_sp_drv, FAR as_aca_sp_drv_sel_id_t *sp_drv)
{
switch (cfg_sp_drv)
{
case CXD56_AUDIO_SP_DRV_LINEOUT:
*spDrv = AS_ACA_SP_DRV_SEL_LINEOUT;
*sp_drv = AS_ACA_SP_DRV_SEL_LINEOUT;
break;
case CXD56_AUDIO_SP_DRV_1DRIVER:
*spDrv = AS_ACA_SP_DRV_SEL_1DRIVER;
*sp_drv = AS_ACA_SP_DRV_SEL_1DRIVER;
break;
case CXD56_AUDIO_SP_DRV_2DRIVER:
*spDrv = AS_ACA_SP_DRV_SEL_2DRIVER;
*sp_drv = AS_ACA_SP_DRV_SEL_2DRIVER;
break;
default:
*spDrv = AS_ACA_SP_DRV_SEL_4DRIVER;
*sp_drv = AS_ACA_SP_DRV_SEL_4DRIVER;
break;
}
}
void get_pwon_param(asAcaPulcoParam *param)
void get_pwon_param(as_aca_pulco_param_t *param)
{
uint32_t mic_map = cxd56_audio_config_get_micmap();
get_osc_mode((uint8_t)CXD56_AUDIO_CFG_MCLK, &param->oscMode);
get_mic_dev(mic_map, &param->micDev);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_GPO_A_DS, &param->gpoDs);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_DA_DS, &param->adDataDs);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_DMIC_CLK_DS, &param->dmicClkDs);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_MCLKOUT_DS, &param->mclkDs);
get_osc_mode((uint8_t)CXD56_AUDIO_CFG_MCLK, &param->osc_mode);
get_mic_dev(mic_map, &param->mic_dev);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_GPO_A_DS, &param->gpo_ds);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_DA_DS, &param->ad_data_ds);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_DMIC_CLK_DS, &param->dmic_clk_ds);
get_drv_str((uint8_t)CXD56_AUDIO_CFG_MCLKOUT_DS, &param->mclk_ds);
}
void get_serial_param(asSerDesParam *param)
void get_serial_param(as_ser_des_param_t *param)
{
uint8_t mic_mode = cxd56_audio_config_get_micmode();
uint32_t mic_map = cxd56_audio_config_get_micmap();
@ -539,23 +544,23 @@ void get_serial_param(asSerDesParam *param)
if (CXD56_AUDIO_CFG_MIC_MODE_128FS == mic_mode)
{
param->serMode = AS_ACA_SER_MODE_4CH;
param->serFs = AS_ACA_SER_FS_128;
param->ser_mode = AS_ACA_SER_MODE_4CH;
param->ser_fs = AS_ACA_SER_FS_128;
}
else
{
param->serMode = AS_ACA_SER_MODE_8CH;
param->serFs = AS_ACA_SER_FS_64;
param->ser_mode = AS_ACA_SER_MODE_8CH;
param->ser_fs = AS_ACA_SER_FS_64;
}
for (i = 0; i < CXD56_AUDIO_MIC_CH_MAX; i++)
{
mic_sel = (mic_map >> (i * MIC_CH_BITNUM)) & MIC_CH_BITMAP;
param->selCh.in[i] = (asAcaPulcoSerSelChId)mic_sel;
param->sel_ch.in[i] = (as_aca_pulco_ser_sel_ch_id_t)mic_sel;
}
}
void get_input_param(asAcaPulcoInParam *param,
void get_input_param(as_aca_pulco_in_param_t *param,
FAR cxd56_audio_mic_gain_t *gain)
{
uint8_t mic_sel;
@ -564,11 +569,11 @@ void get_input_param(asAcaPulcoInParam *param,
uint32_t pga_gain;
uint8_t i;
memset((void *)param, 0, sizeof(asAcaPulcoInParam));
memset((void *)param, 0, sizeof(as_aca_pulco_in_param_t));
get_mic_dev(mic_map, &param->micDev);
get_mic_dev(mic_map, &param->mic_dev);
get_mic_bias((uint8_t)CXD56_AUDIO_CFG_MIC_BIAS, &param->micBiasSel);
get_mic_bias((uint8_t)CXD56_AUDIO_CFG_MIC_BIAS, &param->mic_bias_sel);
for (i = 0; i < CXD56_AUDIO_MIC_CH_MAX; i++)
{
@ -576,39 +581,38 @@ void get_input_param(asAcaPulcoInParam *param,
if ((mic_sel >= 1) && (mic_sel <= 4))
{
mic_id = mic_sel - 1;
param->micGain[mic_id] = (gain->gain[i] >= MIC_GAIN_MAX) ?
param->mic_gain[mic_id] = (gain->gain[i] >= MIC_GAIN_MAX) ?
MIC_GAIN_MAX : (gain->gain[i] / 30) * 30;
pga_gain = gain->gain[i] - param->micGain[mic_id];
param->pgaGain[mic_id] = (pga_gain >= PGA_GAIN_MAX) ?
pga_gain = gain->gain[i] - param->mic_gain[mic_id];
param->pga_gain[mic_id] = (pga_gain >= PGA_GAIN_MAX) ?
PGA_GAIN_MAX : pga_gain;
}
}
}
void get_smaster_param(asAcaPulcoSmstrParam *param)
void get_smaster_param(as_aca_pulco_smaster_param_t *param)
{
cxd56_audio_clkmode_t clk_mode = cxd56_audio_config_get_clkmode();
if (clk_mode == CXD56_AUDIO_CLKMODE_HIRES)
{
param->mode = AS_SMSTR_MODE_FS_32;
param->mckFs = AS_SMSTR_MCK_FS_1024;
param->mck_fs = AS_SMSTR_MCK_FS_1024;
}
else
{
param->mode = AS_SMSTR_MODE_FS_16;
param->mckFs = AS_SMSTR_MCK_FS_512;
param->mck_fs = AS_SMSTR_MCK_FS_512;
}
param->chSel = AS_SMSTR_CHSEL_NORMAL;
param->out2Dly = 0x00;
param->ch_sel = AS_SMSTR_CHSEL_NORMAL;
param->out2dly = 0x00;
param->pwmMode = AS_SMSTR_PWMMD_BOTH;
param->pwm_mode = AS_SMSTR_PWMMD_BOTH;
}
void get_pwon_out_param(asAcaPulcoOutParam *param)
void get_pwon_out_param(as_aca_pulco_out_param_t *param)
{
cxd56_audio_clkmode_t clk_mode = cxd56_audio_config_get_clkmode();
@ -621,15 +625,15 @@ void get_pwon_out_param(asAcaPulcoOutParam *param)
param->mode = AS_SMSTR_MODE_FS_16;
}
param->outDev = AS_ACA_OUT_OFF;
param->pwmOut[0] = AS_ACA_PWMOUT_UNKNOWN;
param->pwmOut[1] = AS_ACA_PWMOUT_UNKNOWN;
param->spDelay = AS_ACA_SP_DELAY_SEL_UNKNOWN;
param->loopMode = AS_ACA_SP_LOOP_MODE_UNKNOWN;
param->spDlyFree = AS_ACA_SP_DLY_FREE_UNKNOWN;
param->out_dev = AS_ACA_OUT_OFF;
param->pwm_out[0] = AS_ACA_PWMOUT_UNKNOWN;
param->pwm_out[1] = AS_ACA_PWMOUT_UNKNOWN;
param->sp_delay = AS_ACA_SP_DELAY_SEL_UNKNOWN;
param->loop_mode = AS_ACA_SP_LOOP_MODE_UNKNOWN;
param->sp_dly_free = AS_ACA_SP_DLY_FREE_UNKNOWN;
get_sp_split_on((uint8_t)CXD56_AUDIO_CFG_SP_SPLIT_ON, &param->spSpliton);
get_sp_driver((uint8_t)cxd56_audio_config_get_spdriver(), &param->spDrv);
get_sp_split_on((uint8_t)CXD56_AUDIO_CFG_SP_SPLIT_ON, &param->sp_spliton);
get_sp_driver((uint8_t)cxd56_audio_config_get_spdriver(), &param->sp_drv);
}
/***************************************************************************
@ -638,23 +642,23 @@ void get_pwon_out_param(asAcaPulcoOutParam *param)
CXD56_AUDIO_ECODE cxd56_audio_aca_poweron(void)
{
if (AS_AcaControl(AS_ACA_CHECK_ID, (uint32_t)NULL) != 0)
if (as_aca_control(AS_ACA_CHECK_ID, (uint32_t)NULL) != 0)
{
return CXD56_AUDIO_ECODE_ANA_CHKID;
}
asAcaPulcoParam pwon_param;
as_aca_pulco_param_t pwon_param;
get_pwon_param(&pwon_param);
if (AS_AcaControl(AS_ACA_POWER_ON_COMMON, (uint32_t)&pwon_param) != 0)
if (as_aca_control(AS_ACA_POWER_ON_COMMON, (uint32_t)&pwon_param) != 0)
{
return CXD56_AUDIO_ECODE_ANA_PWON;
}
asSerDesParam serial_param;
as_ser_des_param_t serial_param;
get_serial_param(&serial_param);
if (AS_AcaControl(AS_ACA_SET_SERDES, (uint32_t)&serial_param) != 0)
if (as_aca_control(AS_ACA_SET_SERDES, (uint32_t)&serial_param) != 0)
{
return CXD56_AUDIO_ECODE_ANA_SERIAL;
}
@ -664,7 +668,7 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_poweron(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_poweroff(void)
{
if (AS_AcaControl(AS_ACA_POWER_OFF_COMMON, (uint32_t)NULL) != 0)
if (as_aca_control(AS_ACA_POWER_OFF_COMMON, (uint32_t)NULL) != 0)
{
return CXD56_AUDIO_ECODE_ANA_PWOFF;
}
@ -674,7 +678,7 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_poweroff(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_poweron_micbias(void)
{
if (AS_AcaControl(AS_ACA_POWER_ON_MICBIAS, (uint32_t)NULL) != 0)
if (as_aca_control(AS_ACA_POWER_ON_MICBIAS, (uint32_t)NULL) != 0)
{
return CXD56_AUDIO_ECODE_ANA_PWON_MBIAS;
}
@ -684,11 +688,11 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_poweron_micbias(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_poweron_input(FAR cxd56_audio_mic_gain_t *gain)
{
asAcaPulcoInParam pwon_input_param;
as_aca_pulco_in_param_t pwon_input_param;
get_input_param(&pwon_input_param, gain);
if (AS_AcaControl(AS_ACA_POWER_ON_INPUT, (uint32_t)&pwon_input_param) != 0)
if (as_aca_control(AS_ACA_POWER_ON_INPUT, (uint32_t)&pwon_input_param) != 0)
{
return CXD56_AUDIO_ECODE_ANA_PWON_INPUT;
}
@ -698,11 +702,11 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_poweron_input(FAR cxd56_audio_mic_gain_t *gain
CXD56_AUDIO_ECODE cxd56_audio_aca_set_smaster(void)
{
asAcaPulcoSmstrParam smaster_param;
as_aca_pulco_smaster_param_t smaster_param;
get_smaster_param(&smaster_param);
if (AS_AcaControl(AS_ACA_SET_SMASTER, (uint32_t)&smaster_param) != 0)
if (as_aca_control(AS_ACA_SET_SMASTER, (uint32_t)&smaster_param) != 0)
{
return CXD56_AUDIO_ECODE_ANA_SET_SMASTER;
}
@ -712,11 +716,11 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_set_smaster(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_poweron_output(void)
{
asAcaPulcoOutParam pwon_output_param;
as_aca_pulco_out_param_t pwon_output_param;
get_pwon_out_param(&pwon_output_param);
if (AS_AcaControl(AS_ACA_POWER_ON_OUTPUT, (uint32_t)&pwon_output_param) != 0)
if (as_aca_control(AS_ACA_POWER_ON_OUTPUT, (uint32_t)&pwon_output_param) != 0)
{
return CXD56_AUDIO_ECODE_ANA_PWON_OUTPUT;
}
@ -726,7 +730,7 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_poweron_output(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_poweroff_input(void)
{
if (AS_AcaControl(AS_ACA_POWER_OFF_INPUT, (uint32_t)NULL) != 0)
if (as_aca_control(AS_ACA_POWER_OFF_INPUT, (uint32_t)NULL) != 0)
{
return CXD56_AUDIO_ECODE_ANA_PWOFF_INPUT;
}
@ -736,7 +740,7 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_poweroff_input(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_poweroff_output(void)
{
if (AS_AcaControl(AS_ACA_POWER_OFF_OUTPUT, (uint32_t)NULL) != 0)
if (as_aca_control(AS_ACA_POWER_OFF_OUTPUT, (uint32_t)NULL) != 0)
{
return CXD56_AUDIO_ECODE_ANA_PWOFF_OUTPUT;
}
@ -746,7 +750,7 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_poweroff_output(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_enable_output(void)
{
if (AS_AcaControl(AS_ACA_SET_OUTPUT_DEVICE, (uint32_t)AS_OUT_DEV_SP) != 0)
if (as_aca_control(AS_ACA_SET_OUTPUT_DEVICE, (uint32_t)AS_OUT_DEV_SP) != 0)
{
return CXD56_AUDIO_ECODE_ANA_ENABLE_OUTPUT;
}
@ -756,7 +760,7 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_enable_output(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_disable_output(void)
{
if (AS_AcaControl(AS_ACA_SET_OUTPUT_DEVICE, (uint32_t)AS_OUT_DEV_OFF) != 0)
if (as_aca_control(AS_ACA_SET_OUTPUT_DEVICE, (uint32_t)AS_OUT_DEV_OFF) != 0)
{
return CXD56_AUDIO_ECODE_ANA_DISABLE_OUTPUT;
}
@ -766,11 +770,11 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_disable_output(void)
CXD56_AUDIO_ECODE cxd56_audio_aca_set_micgain(FAR cxd56_audio_mic_gain_t *gain)
{
asAcaPulcoInParam mic_gain_param;
as_aca_pulco_in_param_t mic_gain_param;
get_input_param(&mic_gain_param, gain);
if (AS_AcaControl(AS_ACA_INIT_AMIC, (uint32_t)&mic_gain_param) != 0)
if (as_aca_control(AS_ACA_INIT_AMIC, (uint32_t)&mic_gain_param) != 0)
{
return CXD56_AUDIO_ECODE_ANA_SET_MICGAIN;
}
@ -780,7 +784,7 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_set_micgain(FAR cxd56_audio_mic_gain_t *gain)
CXD56_AUDIO_ECODE cxd56_audio_aca_notify_micbootdone(void)
{
if (AS_AcaControl(AS_ACA_SET_AMIC_BOOT_DONE, (uint32_t)NULL) != 0)
if (as_aca_control(AS_ACA_SET_AMIC_BOOT_DONE, (uint32_t)NULL) != 0)
{
return CXD56_AUDIO_ECODE_ANA_NOTIFY_MICBOOT;
}
@ -788,14 +792,14 @@ CXD56_AUDIO_ECODE cxd56_audio_aca_notify_micbootdone(void)
return CXD56_AUDIO_ECODE_OK;
}
CXD56_AUDIO_ECODE cxd56_audio_aca_read_reg(asAcaPulcoRegParam *param)
CXD56_AUDIO_ECODE cxd56_audio_aca_read_reg(as_aca_pulco_reg_param_t *param)
{
AS_AcaControl(AS_ACA_GET_REGISTER, (uint32_t)param);
as_aca_control(AS_ACA_GET_REGISTER, (uint32_t)param);
return CXD56_AUDIO_ECODE_OK;
}
CXD56_AUDIO_ECODE cxd56_audio_aca_write_reg(asAcaPulcoRegParam *param)
CXD56_AUDIO_ECODE cxd56_audio_aca_write_reg(as_aca_pulco_reg_param_t *param)
{
AS_AcaControl(AS_ACA_SET_REGISTER, (uint32_t)param);
as_aca_control(AS_ACA_SET_REGISTER, (uint32_t)param);
return CXD56_AUDIO_ECODE_OK;
}

2
boards/arm/cxd56xx/drivers/audio/cxd56_audio_analog.c
View file

@ -105,6 +105,7 @@ static void wait_mic_boot_finish(void)
{
return;
}
uint64_t time = (uint64_t)end.tv_sec * 1000 +
(uint64_t)end.tv_nsec / 1000000 -
g_mic_boot_start_time;
@ -231,6 +232,7 @@ CXD56_AUDIO_ECODE cxd56_audio_analog_poweroff_input(void)
{
return ret;
}
clear_mic_boot_time();
#endif

323
boards/arm/cxd56xx/drivers/audio/cxd56_audio_bca_reg.c
View file

@ -249,7 +249,7 @@ const struct audio_bca_reg_s g_bca_reg[BCA_REG_MAX_ENTRY] =
{0x11fc, 0, 8, 0x00000064}, /* Mclk_Mon_thresh (0x64) */
{0x1730, 0, 32, 0x00000000}, /* AHB MASTER MIC MASK (0x00) */
{0x1f30, 0, 32, 0x00000000}, /* AHB MASTER I2S1 MASK (0x00) */
{0x2730, 0, 32, 0x00000000} /* AHB MASTER I2S2 MASK (0x00) */
{0x2730, 0, 32, 0x00000000}, /* AHB MASTER I2S2 MASK (0x00) */
};
/***************************************************************************
@ -323,19 +323,19 @@ void enable_mic_in_fmt24(uint8_t mic_num)
BCA_REG_ID mic_ch_sell[TRANS_CH_NUM_MAX] =
{
BCA_Mic_In_ch1_sel,
BCA_Mic_In_ch2_sel,
BCA_Mic_In_ch3_sel,
BCA_Mic_In_ch4_sel,
BCA_Mic_In_ch5_sel,
BCA_Mic_In_ch6_sel,
BCA_Mic_In_ch7_sel,
BCA_Mic_In_ch8_sel
BCA_MIC_IN_CH1_SEL,
BCA_MIC_IN_CH2_SEL,
BCA_MIC_IN_CH3_SEL,
BCA_MIC_IN_CH4_SEL,
BCA_MIC_IN_CH5_SEL,
BCA_MIC_IN_CH6_SEL,
BCA_MIC_IN_CH7_SEL,
BCA_MIC_IN_CH8_SEL
};
mic_num = (mic_num > TRANS_CH_NUM_24BIT) ? TRANS_CH_NUM_24BIT : mic_num;
write_bca_reg(BCA_Mic_In_bitwt, 0);
write_bca_reg(BCA_MIC_IN_BITWT, 0);
for (i = 0; i < mic_num; i++)
{
@ -347,9 +347,9 @@ void enable_mic_in_fmt24(uint8_t mic_num)
write_bca_reg(mic_ch_sell[i], TRANS_CH_NO_SELECT);
}
write_bca_reg(BCA_Clk_En_ahbmstr_mic_en, 1);
write_bca_reg(BCA_Mic_In_start_adr, 0x00000000);
write_bca_reg(BCA_Mic_In_sample_no, 0);
write_bca_reg(BCA_CLK_EN_AHBMSTR_MIC_EN, 1);
write_bca_reg(BCA_MIC_IN_START_ADR, 0x00000000);
write_bca_reg(BCA_MIC_IN_SAMPLE_NO, 0);
}
void enable_mic_in_fmt16(uint8_t mic_num)
@ -358,20 +358,20 @@ void enable_mic_in_fmt16(uint8_t mic_num)
BCA_REG_ID mic_ch_sell[TRANS_CH_NUM_MAX] =
{
BCA_Mic_In_ch1_sel,
BCA_Mic_In_ch2_sel,
BCA_Mic_In_ch3_sel,
BCA_Mic_In_ch4_sel,
BCA_Mic_In_ch5_sel,
BCA_Mic_In_ch6_sel,
BCA_Mic_In_ch7_sel,
BCA_Mic_In_ch8_sel
BCA_MIC_IN_CH1_SEL,
BCA_MIC_IN_CH2_SEL,
BCA_MIC_IN_CH3_SEL,
BCA_MIC_IN_CH4_SEL,
BCA_MIC_IN_CH5_SEL,
BCA_MIC_IN_CH6_SEL,
BCA_MIC_IN_CH7_SEL,
BCA_MIC_IN_CH8_SEL
};
mic_num = (mic_num > (TRANS_CH_NUM_16BIT * 2)) ?
TRANS_CH_NUM_16BIT : (mic_num + 1) / 2;
write_bca_reg(BCA_Mic_In_bitwt, 1);
write_bca_reg(BCA_MIC_IN_BITWT, 1);
for (i = 0; i < mic_num; i++)
{
@ -383,49 +383,49 @@ void enable_mic_in_fmt16(uint8_t mic_num)
write_bca_reg(mic_ch_sell[i], TRANS_CH_NO_SELECT);
}
write_bca_reg(BCA_Clk_En_ahbmstr_mic_en, 1);
write_bca_reg(BCA_Mic_In_start_adr, 0x00000000);
write_bca_reg(BCA_Mic_In_sample_no, 0);
write_bca_reg(BCA_CLK_EN_AHBMSTR_MIC_EN, 1);
write_bca_reg(BCA_MIC_IN_START_ADR, 0x00000000);
write_bca_reg(BCA_MIC_IN_SAMPLE_NO, 0);
}
void enable_i2s1_out_fmt24(void)
{
write_bca_reg(BCA_I2s1_Out_sd1_l_sel, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2s1_Out_sd1_r_sel, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2s1_Out_bitwt, 0);
write_bca_reg(BCA_Clk_En_ahbmstr_I2s1_en, 1);
write_bca_reg(BCA_I2s1_Out_start_adr, 0x00000000);
write_bca_reg(BCA_I2s1_Out_sample_no, 0);
write_bca_reg(BCA_I2S1_OUT_SD1_L_SEL, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2S1_OUT_SD1_R_SEL, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2S1_OUT_BITWT, 0);
write_bca_reg(BCA_CLK_EN_AHBMSTR_I2S1_EN, 1);
write_bca_reg(BCA_I2S1_OUT_START_ADR, 0x00000000);
write_bca_reg(BCA_I2S2_OUT_SAMPLE_NO, 0);
}
void enable_i2s1_out_fmt16(void)
{
write_bca_reg(BCA_I2s1_Out_sd1_l_sel, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2s1_Out_sd1_r_sel, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2s1_Out_bitwt, 1);
write_bca_reg(BCA_Clk_En_ahbmstr_I2s1_en, 1);
write_bca_reg(BCA_I2s1_Out_start_adr, 0x00000000);
write_bca_reg(BCA_I2s1_Out_sample_no, 0);
write_bca_reg(BCA_I2S1_OUT_SD1_L_SEL, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2S1_OUT_SD1_R_SEL, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2S1_OUT_BITWT, 1);
write_bca_reg(BCA_CLK_EN_AHBMSTR_I2S1_EN, 1);
write_bca_reg(BCA_I2S1_OUT_START_ADR, 0x00000000);
write_bca_reg(BCA_I2S2_OUT_SAMPLE_NO, 0);
}
void enable_i2s2_out_fmt24(void)
{
write_bca_reg(BCA_I2s2_Out_sd1_l_sel, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2s2_Out_sd1_r_sel, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2s2_Out_bitwt, 0);
write_bca_reg(BCA_Clk_En_ahbmstr_I2s2_en, 1);
write_bca_reg(BCA_I2s2_Out_start_adr, 0x00000000);
write_bca_reg(BCA_I2s2_Out_sample_no, 0);
write_bca_reg(BCA_I2S2_OUT_SD1_L_SEL, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2S2_OUT_SD1_R_SEL, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2S2_OUT_BITWT, 0);
write_bca_reg(BCA_CLK_EN_AHBMSTR_I2S2_EN, 1);
write_bca_reg(BCA_I2S2_OUT_START_ADR, 0x00000000);
write_bca_reg(BCA_I2S2_OUT_SAMPLE_NO, 0);
}
void enable_i2s2_out_fmt16(void)
{
write_bca_reg(BCA_I2s2_Out_sd1_l_sel, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2s2_Out_sd1_r_sel, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2s2_Out_bitwt, 1);
write_bca_reg(BCA_Clk_En_ahbmstr_I2s2_en, 1);
write_bca_reg(BCA_I2s2_Out_start_adr, 0x00000000);
write_bca_reg(BCA_I2s2_Out_sample_no, 0);
write_bca_reg(BCA_I2S2_OUT_SD1_L_SEL, I2S_OUT_SEL_SD1L);
write_bca_reg(BCA_I2S2_OUT_SD1_R_SEL, I2S_OUT_SEL_SD1R);
write_bca_reg(BCA_I2S2_OUT_BITWT, 1);
write_bca_reg(BCA_CLK_EN_AHBMSTR_I2S2_EN, 1);
write_bca_reg(BCA_I2S2_OUT_START_ADR, 0x00000000);
write_bca_reg(BCA_I2S2_OUT_SAMPLE_NO, 0);
}
/***************************************************************************
@ -434,14 +434,14 @@ void enable_i2s2_out_fmt16(void)
void cxd56_audio_bca_reg_clear_bck_err_int(void)
{
write_bca_reg(BCA_Int_m_i2s1_bck_err1, 0);
write_bca_reg(BCA_Int_m_i2s1_bck_err2, 0);
write_bca_reg(BCA_INT_M_I2S1_BCK_ERR1, 0);
write_bca_reg(BCA_INT_M_I2S1_BCK_ERR2, 0);
}
void cxd56_audio_bca_reg_set_smaster(void)
{
write_bca_reg(BCA_Int_m_ovf_smasl, 0);
write_bca_reg(BCA_Int_m_ovf_smasr, 0);
write_bca_reg(BCA_INT_M_OVF_SMASL, 0);
write_bca_reg(BCA_INT_M_OVF_SMASR, 0);
}
void cxd56_audio_bca_reg_set_datarate(uint8_t clk_mode)
@ -450,13 +450,13 @@ void cxd56_audio_bca_reg_set_datarate(uint8_t clk_mode)
{
/* Set 4fs. */
write_bca_reg(BCA_I2s_ensel, 1);
write_bca_reg(BCA_I2S_ENSEL, 1);
}
else
{
/* Set 1fs. */
write_bca_reg(BCA_I2s_ensel, 0);
write_bca_reg(BCA_I2S_ENSEL, 0);
}
}
@ -502,21 +502,22 @@ void cxd56_audio_bca_reg_get_dma_mstate(cxd56_audio_dma_t handle,
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id_start = BCA_Mic_In_start;
reg_id_error = BCA_Mic_In_error_setting;
reg_id_monbuf = BCA_Mic_In_monbuf;
reg_id_start = BCA_MIC_IN_START;
reg_id_error = BCA_MIC_IN_ERROR_SETTING;
reg_id_monbuf = BCA_MIC_IN_MONBUF;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id_start = BCA_I2s1_Out_Mon_start;
reg_id_error = BCA_I2s1_Out_Mon_error_setting;
reg_id_monbuf = BCA_I2s1_Out_Mon_monbuf;
reg_id_start = BCA_I2S1_OUT_MON_START;
reg_id_error = BCA_I2S1_OUT_MON_ERROR_SETTING;
reg_id_monbuf = BCA_I2S1_OUT_MON_MONBUF;
break;
default:
reg_id_start = BCA_I2s2_Out_Mon_start;
reg_id_error = BCA_I2s2_Out_Mon_error_setting;
reg_id_monbuf = BCA_I2s2_Out_Mon_monbuf;
reg_id_start = BCA_I2S2_OUT_MON_START;
reg_id_error = BCA_I2S2_OUT_MON_ERROR_SETTING;
reg_id_monbuf = BCA_I2S2_OUT_MON_MONBUF;
break;
}
state->start = (uint8_t)read_bca_reg(reg_id_start);
state->err_setting = (uint8_t)read_bca_reg(reg_id_error);
state->buf_state = (uint8_t)read_bca_reg(reg_id_monbuf);
@ -524,19 +525,19 @@ void cxd56_audio_bca_reg_get_dma_mstate(cxd56_audio_dma_t handle,
void cxd56_audio_bca_reg_en_bus_err_int(void)
{
write_bca_reg(BCA_Int_m_hresp_err, 0);
write_bca_reg(BCA_INT_M_HRESP_ERR, 0);
}
void cxd56_audio_bca_reg_dis_bus_err_int(void)
{
write_bca_reg(BCA_Int_m_hresp_err, 1);
write_bca_reg(BCA_INT_M_HRESP_ERR, 1);
}
uint32_t cxd56_audio_bca_reg_get_dma_done_state_mic(void)
{
uint32_t int_ac =
read32_bca_reg(g_bca_reg[BCA_Mic_Int_Ctrl_done_mic].addr)
& ~(read32_bca_reg(g_bca_reg[BCA_Mic_Int_Mask_done_mic].addr))
read32_bca_reg(g_bca_reg[BCA_MIC_INT_CTRL_DONE_MIC].addr)
& ~(read32_bca_reg(g_bca_reg[BCA_MIC_INT_MASK_DONE_MIC].addr))
& 0x0f;
return int_ac;
@ -545,8 +546,8 @@ uint32_t cxd56_audio_bca_reg_get_dma_done_state_mic(void)
uint32_t cxd56_audio_bca_reg_get_dma_done_state_i2s1(void)
{
uint32_t int_i2s =
read32_bca_reg(g_bca_reg[BCA_I2s1_Int_Ctrl_done_i2so].addr)
& ~(read32_bca_reg(g_bca_reg[BCA_I2s1_Int_Mask_done_i2so].addr))
read32_bca_reg(g_bca_reg[BCA_I2S1_INT_CTRL_DONE_I2SO].addr)
& ~(read32_bca_reg(g_bca_reg[BCA_I2S1_INT_MASK_DONE_I2SO].addr))
& 0x3f;
return int_i2s;
@ -555,8 +556,8 @@ uint32_t cxd56_audio_bca_reg_get_dma_done_state_i2s1(void)
uint32_t cxd56_audio_bca_reg_get_dma_done_state_i2s2(void)
{
uint32_t int_i2s2 =
read32_bca_reg(g_bca_reg[BCA_I2s2_Int_Ctrl_done_i2so].addr)
& ~(read32_bca_reg(g_bca_reg[BCA_I2s2_Int_Mask_done_i2so].addr))
read32_bca_reg(g_bca_reg[BCA_I2S2_INT_CTRL_DONE_I2SO].addr)
& ~(read32_bca_reg(g_bca_reg[BCA_I2S2_INT_MASK_DONE_I2SO].addr))
& 0x3f;
return int_i2s2;
@ -564,17 +565,17 @@ uint32_t cxd56_audio_bca_reg_get_dma_done_state_i2s2(void)
void cxd56_audio_bca_reg_clear_dma_done_state_mic(uint32_t value)
{
write32_bca_reg(g_bca_reg[BCA_Mic_Int_Ctrl_done_mic].addr, value);
write32_bca_reg(g_bca_reg[BCA_MIC_INT_CTRL_DONE_MIC].addr, value);
}
void cxd56_audio_bca_reg_clear_dma_done_state_i2s1(uint32_t value)
{
write32_bca_reg(g_bca_reg[BCA_I2s1_Int_Ctrl_done_i2so].addr, value);
write32_bca_reg(g_bca_reg[BCA_I2S1_INT_CTRL_DONE_I2SO].addr, value);
}
void cxd56_audio_bca_reg_clear_dma_done_state_i2s2(uint32_t value)
{
write32_bca_reg(g_bca_reg[BCA_I2s2_Int_Ctrl_done_i2so].addr, value);
write32_bca_reg(g_bca_reg[BCA_I2S2_INT_CTRL_DONE_I2SO].addr, value);
}
void cxd56_audio_bca_reg_mask_done_int(cxd56_audio_dma_t handle)
@ -584,15 +585,15 @@ void cxd56_audio_bca_reg_mask_done_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_done_mic;
reg_id = BCA_MIC_INT_MASK_DONE_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_done_i2so;
reg_id = BCA_I2S1_INT_MASK_DONE_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Mask_done_i2so;
reg_id = BCA_I2S2_INT_MASK_DONE_I2SO;
break;
}
@ -606,15 +607,15 @@ void cxd56_audio_bca_reg_unmask_done_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_done_mic;
reg_id = BCA_MIC_INT_MASK_DONE_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_done_i2so;
reg_id = BCA_I2S1_INT_MASK_DONE_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Mask_done_i2so;
reg_id = BCA_I2S2_INT_MASK_DONE_I2SO;
break;
}
@ -627,15 +628,15 @@ void cxd56_audio_bca_reg_clear_done_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Ctrl_done_mic;
reg_id = BCA_MIC_INT_CTRL_DONE_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Ctrl_done_i2so;
reg_id = BCA_I2S1_INT_CTRL_DONE_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Ctrl_done_i2so;
reg_id = BCA_I2S2_INT_CTRL_DONE_I2SO;
break;
}
@ -648,22 +649,23 @@ bool cxd56_audio_bca_reg_is_dma_fifo_empty(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_I2s1_In_rtd_trg;
reg_id = BCA_I2S1_IN_RTD_TRG;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_In_rtd_trg;
reg_id = BCA_I2S1_IN_RTD_TRG;
break;
default:
reg_id = BCA_I2s2_Out_rtd_trg;
reg_id = BCA_I2S2_OUT_RTD_TRG;
break;
}
if(1 == read_bca_reg(reg_id))
if (1 == read_bca_reg(reg_id))
{
return true;
}
return false;
}
@ -673,15 +675,15 @@ void cxd56_audio_bca_reg_mask_err_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_err_mic;
reg_id = BCA_MIC_INT_MASK_ERR_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_err_i2so;
reg_id = BCA_I2S1_INT_MASK_ERR_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Mask_err_i2so;
reg_id = BCA_I2S2_INT_MASK_ERR_I2SO;
break;
}
@ -694,15 +696,15 @@ void cxd56_audio_bca_reg_unmask_err_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_err_mic;
reg_id = BCA_MIC_INT_MASK_ERR_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_err_i2so;
reg_id = BCA_I2S1_INT_MASK_ERR_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Mask_err_i2so;
reg_id = BCA_I2S2_INT_MASK_ERR_I2SO;
break;
}
@ -715,15 +717,15 @@ void cxd56_audio_bca_reg_clear_err_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Ctrl_err_mic;
reg_id = BCA_MIC_INT_CTRL_ERR_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Ctrl_err_i2so;
reg_id = BCA_I2S1_INT_CTRL_ERR_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Mask_err_i2so;
reg_id = BCA_I2S2_INT_MASK_ERR_I2SO;
break;
}
@ -736,15 +738,15 @@ void cxd56_audio_bca_reg_mask_cmb_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_cmb_mic;
reg_id = BCA_MIC_INT_MASK_CMB_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_cmb_i2s;
reg_id = BCA_I2S1_INT_MASK_CMB_I2S;
break;
default:
reg_id = BCA_I2s2_Int_Mask_cmb_i2s;
reg_id = BCA_I2S2_INT_MASK_CMB_I2S;
break;
}
@ -757,15 +759,15 @@ void cxd56_audio_bca_reg_unmask_cmb_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_cmb_mic;
reg_id = BCA_MIC_INT_MASK_CMB_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_cmb_i2s;
reg_id = BCA_I2S1_INT_MASK_CMB_I2S;
break;
default:
reg_id = BCA_I2s2_Int_Mask_cmb_i2s;
reg_id = BCA_I2S2_INT_MASK_CMB_I2S;
break;
}
@ -778,15 +780,15 @@ void cxd56_audio_bca_reg_clear_cmb_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Ctrl_cmb_mic;
reg_id = BCA_MIC_INT_CTRL_CMB_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Ctrl_cmb_i2s;
reg_id = BCA_I2S1_INT_CTRL_CMB_I2S;
break;
default:
reg_id = BCA_I2s2_Int_Ctrl_cmb_i2s;
reg_id = BCA_I2S2_INT_CTRL_CMB_I2S;
break;
}
@ -795,12 +797,12 @@ void cxd56_audio_bca_reg_clear_cmb_int(cxd56_audio_dma_t handle)
uint32_t cxd56_audio_bca_reg_get_int_status(void)
{
return read32_bca_reg(g_bca_reg[BCA_Int_hresp_err].addr);
return read32_bca_reg(g_bca_reg[BCA_INT_HRESP_ERR].addr);
}
void cxd56_audio_bca_reg_clear_int_status(uint32_t int_au)
{
write32_bca_reg(g_bca_reg[BCA_Int_clr_hresp_err].addr, int_au);
write32_bca_reg(g_bca_reg[BCA_INT_CLR_HRESP_ERR].addr, int_au);
}
void cxd56_audio_bca_reg_mask_bus_int(cxd56_audio_dma_t handle)
@ -809,17 +811,18 @@ void cxd56_audio_bca_reg_mask_bus_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = AHB_Master_Mic_Mask;
reg_id = AHB_MASTER_MIC_MASK;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = AHB_Master_I2s1_Mask;
reg_id = AHB_MASTER_I2S1_MASK;
break;
default:
reg_id = AHB_Master_I2s2_Mask;
reg_id = AHB_MASTER_I2S2_MASK;
break;
}
write_bca_reg(reg_id, 0);
}
@ -830,20 +833,21 @@ void cxd56_audio_bca_reg_unmask_bus_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = AHB_Master_Mic_Mask;
reg_id = AHB_MASTER_MIC_MASK;
val = 0x00000303;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = AHB_Master_I2s1_Mask;
reg_id = AHB_MASTER_I2S1_MASK;
val = 0x00000202;
break;
default:
reg_id = AHB_Master_I2s2_Mask;
reg_id = AHB_MASTER_I2S2_MASK;
val = 0x00000202;
break;
}
write_bca_reg(reg_id, val);
}
@ -855,15 +859,15 @@ void cxd56_audio_bca_reg_set_start_addr(cxd56_audio_dma_t handle,
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_start_adr;
reg_id = BCA_MIC_IN_START_ADR;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_start_adr;
reg_id = BCA_I2S1_OUT_START_ADR;
break;
default:
reg_id = BCA_I2s2_Out_start_adr;
reg_id = BCA_I2S2_OUT_START_ADR;
break;
}
@ -878,15 +882,15 @@ void cxd56_audio_bca_reg_set_sample_no(cxd56_audio_dma_t handle,
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_sample_no;
reg_id = BCA_MIC_IN_SAMPLE_NO;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_sample_no;
reg_id = BCA_I2S2_OUT_SAMPLE_NO;
break;
default:
reg_id = BCA_I2s2_Out_sample_no;
reg_id = BCA_I2S2_OUT_SAMPLE_NO;
break;
}
@ -902,15 +906,15 @@ void cxd56_audio_bca_reg_start_dma(cxd56_audio_dma_t handle,
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_rtd_trg;
reg_id = BCA_MIC_IN_RTD_TRG;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_rtd_trg;
reg_id = BCA_I2S1_OUT_RTD_TRG;
break;
default:
reg_id = BCA_I2s2_Out_rtd_trg;
reg_id = BCA_I2S2_OUT_RTD_TRG;
break;
}
@ -924,15 +928,15 @@ void cxd56_audio_bca_reg_stop_dma(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_rtd_trg;
reg_id = BCA_MIC_IN_RTD_TRG;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_rtd_trg;
reg_id = BCA_I2S1_OUT_RTD_TRG;
break;
default:
reg_id = BCA_I2s2_Out_rtd_trg;
reg_id = BCA_I2S2_OUT_RTD_TRG;
break;
}
@ -946,15 +950,15 @@ bool cxd56_audio_bca_reg_is_done_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Ctrl_done_mic;
reg_id = BCA_MIC_INT_CTRL_DONE_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Ctrl_done_i2so;
reg_id = BCA_I2S1_INT_CTRL_DONE_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Ctrl_done_i2so;
reg_id = BCA_I2S2_INT_CTRL_DONE_I2SO;
break;
}
@ -973,15 +977,15 @@ bool cxd56_audio_bca_reg_is_err_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Ctrl_err_mic;
reg_id = BCA_MIC_INT_CTRL_ERR_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Ctrl_err_i2so;
reg_id = BCA_I2S1_INT_CTRL_ERR_I2SO;
break;
default:
reg_id = BCA_I2s2_Int_Ctrl_err_i2so;
reg_id = BCA_I2S2_INT_CTRL_ERR_I2SO;
break;
}
@ -1000,15 +1004,15 @@ bool cxd56_audio_bca_reg_is_smp_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Ctrl_smp_mic;
reg_id = BCA_MIC_INT_CTRL_SMP_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Ctrl_smp_i2s;
reg_id = BCA_I2S1_INT_CTRL_SMP_I2S;
break;
default:
reg_id = BCA_I2s2_Int_Ctrl_smp_i2s;
reg_id = BCA_I2S2_INT_CTRL_SMP_I2S;
break;
}
@ -1026,17 +1030,18 @@ void cxd56_audio_bca_reg_mask_smp_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_smp_mic;
reg_id = BCA_MIC_INT_MASK_SMP_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_smp_i2s;
reg_id = BCA_I2S1_INT_MASK_SMP_I2S;
break;
default:
reg_id = BCA_I2s1_Int_Mask_smp_i2s;
reg_id = BCA_I2S1_INT_MASK_SMP_I2S;
break;
}
write_bca_reg(reg_id, 1);
}
@ -1046,15 +1051,15 @@ void cxd56_audio_bca_reg_unmask_smp_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Mask_smp_mic;
reg_id = BCA_MIC_INT_MASK_SMP_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Mask_smp_i2s;
reg_id = BCA_I2S1_INT_MASK_SMP_I2S;
break;
default:
reg_id = BCA_I2s1_Int_Mask_smp_i2s;
reg_id = BCA_I2S1_INT_MASK_SMP_I2S;
break;
}
@ -1067,15 +1072,15 @@ void cxd56_audio_bca_reg_clear_smp_int(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_Int_Ctrl_smp_mic;
reg_id = BCA_MIC_INT_CTRL_SMP_MIC;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Int_Ctrl_smp_i2s;
reg_id = BCA_I2S1_INT_CTRL_SMP_I2S;
break;
default:
reg_id = BCA_I2s2_Int_Ctrl_smp_i2s;
reg_id = BCA_I2S2_INT_CTRL_SMP_I2S;
break;
}
@ -1088,15 +1093,15 @@ uint32_t cxd56_audio_bca_reg_get_mon_state_err(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_error_setting;
reg_id = BCA_MIC_IN_ERROR_SETTING;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_Mon_error_setting;
reg_id = BCA_I2S1_OUT_MON_ERROR_SETTING;
break;
default:
reg_id = BCA_I2s2_Out_Mon_error_setting;
reg_id = BCA_I2S2_OUT_MON_ERROR_SETTING;
break;
}
@ -1109,15 +1114,15 @@ uint32_t cxd56_audio_bca_reg_get_mon_state_start(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_start;
reg_id = BCA_MIC_IN_START;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_Mon_start;
reg_id = BCA_I2S1_OUT_MON_START;
break;
default:
reg_id = BCA_I2s2_Out_Mon_start;
reg_id = BCA_I2S2_OUT_MON_START;
break;
}
@ -1130,15 +1135,15 @@ uint32_t cxd56_audio_bca_reg_get_mon_state_buf(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_monbuf;
reg_id = BCA_MIC_IN_MONBUF;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_Mon_monbuf;
reg_id = BCA_I2S1_OUT_MON_MONBUF;
break;
default:
reg_id = BCA_I2s2_Out_Mon_monbuf;
reg_id = BCA_I2S2_OUT_MON_MONBUF;
break;
}
@ -1151,15 +1156,15 @@ uint32_t cxd56_audio_bca_reg_get_dma_state(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_rtd_trg;
reg_id = BCA_MIC_IN_RTD_TRG;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_rtd_trg;
reg_id = BCA_I2S1_OUT_RTD_TRG;
break;
default:
reg_id = BCA_I2s2_Out_rtd_trg;
reg_id = BCA_I2S2_OUT_RTD_TRG;
break;
}
@ -1173,15 +1178,15 @@ void cxd56_audio_bca_reg_reset_chsel(cxd56_audio_dma_t handle)
switch (handle)
{
case CXD56_AUDIO_DMAC_MIC:
reg_id = BCA_Mic_In_ch8_sel;
reg_id = BCA_MIC_IN_CH8_SEL;
break;
case CXD56_AUDIO_DMAC_I2S0_DOWN:
reg_id = BCA_I2s1_Out_sd1_r_sel;
reg_id = BCA_I2S1_OUT_SD1_R_SEL;
break;
default:
reg_id = BCA_I2s2_Out_sd1_r_sel;
reg_id = BCA_I2S2_OUT_SD1_R_SEL;
break;
}

316
boards/arm/cxd56xx/drivers/audio/cxd56_audio_bca_reg.h
View file

@ -48,164 +48,164 @@
typedef enum
{
BCA_Mic_In_start_adr,
BCA_Mic_In_sample_no,
BCA_Mic_In_rtd_trg,
BCA_Mic_In_nointr,
BCA_Mic_In_bitwt,
BCA_Mic_In_ch8_sel,
BCA_Mic_In_ch7_sel,
BCA_Mic_In_ch6_sel,
BCA_Mic_In_ch5_sel,
BCA_Mic_In_ch4_sel,
BCA_Mic_In_ch3_sel,
BCA_Mic_In_ch2_sel,
BCA_Mic_In_ch1_sel,
BCA_Mic_In_start,
BCA_Mic_In_error_setting,
BCA_Mic_In_monbuf,
BCA_I2s1_In_start_adr,
BCA_I2s1_In_sample_no,
BCA_I2s1_In_rtd_trg,
BCA_I2s1_In_nointr,
BCA_I2s1_In_bitwt,
BCA_I2s1_In_ch2_sel,
BCA_I2s1_In_ch1_sel,
BCA_I2s1_In_Mon_start,
BCA_I2s1_In_Mon_error_setting,
BCA_I2s1_In_Mon_monbuf,
BCA_I2s2_In_start_adr,
BCA_I2s2_In_sample_no,
BCA_I2s2_In_rtd_trg,
BCA_I2s2_In_nointr,
BCA_I2s2_In_bitwt,
BCA_I2s2_In_ch2_sel,
BCA_I2s2_In_ch1_sel,
BCA_I2s2_In_Mon_start,
BCA_I2s2_In_Mon_error_setting,
BCA_I2s2_In_Mon_monbuf,
BCA_I2s1_Out_start_adr,
BCA_I2s1_Out_sample_no,
BCA_I2s1_Out_rtd_trg,
BCA_I2s1_Out_nointr,
BCA_I2s1_Out_bitwt,
BCA_I2s1_Out_sd1_r_sel,
BCA_I2s1_Out_sd1_l_sel,
BCA_I2s1_Out_Mon_start,
BCA_I2s1_Out_Mon_error_setting,
BCA_I2s1_Out_Mon_monbuf,
BCA_I2s2_Out_start_adr,
BCA_I2s2_Out_sample_no,
BCA_I2s2_Out_rtd_trg,
BCA_I2s2_Out_nointr,
BCA_I2s2_Out_bitwt,
BCA_I2s2_Out_sd1_r_sel,
BCA_I2s2_Out_sd1_l_sel,
BCA_I2s2_Out_Mon_start,
BCA_I2s2_Out_Mon_error_setting,
BCA_I2s2_Out_Mon_monbuf,
BCA_I2s_ensel,
BCA_Mic_In_prdat_u,
BCA_I2s1_In_prdat_u,
BCA_I2s2_In_prdat_u,
BCA_I2s1_Out_prdat_d,
BCA_I2s2_Out_prdat_d,
BCA_Mic_Int_Ctrl_done_mic,
BCA_Mic_Int_Ctrl_err_mic,
BCA_Mic_Int_Ctrl_smp_mic,
BCA_Mic_Int_Ctrl_cmb_mic,
BCA_I2s1_Int_Ctrl_done_i2so,
BCA_I2s1_Int_Ctrl_err_i2so,
BCA_I2s1_Int_Ctrl_done_i2si,
BCA_I2s1_Int_Ctrl_err_i2si,
BCA_I2s1_Int_Ctrl_smp_i2s,
BCA_I2s1_Int_Ctrl_cmb_i2s,
BCA_I2s2_Int_Ctrl_done_i2so,
BCA_I2s2_Int_Ctrl_err_i2so,
BCA_I2s2_Int_Ctrl_done_i2si,
BCA_I2s2_Int_Ctrl_err_i2si,
BCA_I2s2_Int_Ctrl_smp_i2s,
BCA_I2s2_Int_Ctrl_cmb_i2s,
BCA_Mic_Int_Mask_done_mic,
BCA_Mic_Int_Mask_err_mic,
BCA_Mic_Int_Mask_smp_mic,
BCA_Mic_Int_Mask_cmb_mic,
BCA_Mic_Int_Mask_nostpmsk,
BCA_Mic_Int_Mask_srst_mic,
BCA_I2s1_Int_Mask_done_i2so,
BCA_I2s1_Int_Mask_err_i2so,
BCA_I2s1_Int_Mask_done_i2si,
BCA_I2s1_Int_Mask_err_i2si,
BCA_I2s1_Int_Mask_smp_i2s,
BCA_I2s1_Int_Mask_cmb_i2s,
BCA_I2s1_Int_Mask_nostpmsk,
BCA_I2s1_Int_Mask_srst_i2s,
BCA_I2s2_Int_Mask_done_i2so,
BCA_I2s2_Int_Mask_err_i2so,
BCA_I2s2_Int_Mask_done_i2si,
BCA_I2s2_Int_Mask_err_i2si,
BCA_I2s2_Int_Mask_smp_i2s,
BCA_I2s2_Int_Mask_cmb_i2s,
BCA_I2s2_Int_Mask_nostpmsk,
BCA_I2s2_Int_Mask_srst_i2s,
BCA_Int_m_hresp_err,
BCA_Int_m_i2s1_bck_err1,
BCA_Int_m_i2s1_bck_err2,
BCA_Int_m_anc_faint,
BCA_Int_m_ovf_smasl,
BCA_Int_m_ovf_smasr,
BCA_Int_m_ovf_dnc1l,
BCA_Int_m_ovf_dnc1r,
BCA_Int_m_ovf_dnc2l,
BCA_Int_m_ovf_dnc2r,
BCA_Int_clr_hresp_err,
BCA_Int_clr_i2s1_bck_err1,
BCA_Int_clr_i2S1_bck_err2,
BCA_Int_clr_anc_faint,
BCA_Int_clr_ovf_smasl,
BCA_Int_clr_ovf_smasr,
BCA_Int_clr_ovf_dnc1l,
BCA_Int_clr_ovf_dnc1r,
BCA_Int_clr_ovf_dnc2l,
BCA_Int_clr_ovf_dnc2r,
BCA_Int_hresp_err,
BCA_Int_i2s_bck_err1,
BCA_Int_i2s_bck_err2,
BCA_Int_anc_faint,
BCA_Int_ovf_smasl,
BCA_Int_ovf_smasr,
BCA_Int_ovf_dnc1l,
BCA_Int_ovf_dnc1r,
BCA_Int_ovf_dnc2l,
BCA_Int_ovf_dnc2r,
BCA_Dbg_Mic_ch1_data,
BCA_Dbg_Mic_ch2_data,
BCA_Dbg_Mic_ch3_data,
BCA_Dbg_Mic_ch4_data,
BCA_Dbg_Mic_ch5_data,
BCA_Dbg_Mic_ch6_data,
BCA_Dbg_Mic_ch7_data,
BCA_Dbg_Mic_ch8_data,
BCA_Dbg_I2s1_u_ch1_data,
BCA_Dbg_I2s1_u_ch2_data,
BCA_Dbg_I2s1_d_ch1_data,
BCA_Dbg_I2s1_d_ch2_data,
BCA_Dbg_I2s2_u_ch1_data,
BCA_Dbg_I2s2_u_ch2_data,
BCA_Dbg_I2s2_d_ch1_data,
BCA_Dbg_I2s2_d_ch2_data,
BCA_Dbg_Ctrl_mic_dbg_en,
BCA_Dbg_Ctrl_I2s1_dbg_u_en,
BCA_Dbg_Ctrl_I2s1_dbg_d_en,
BCA_Dbg_Ctrl_I2s2_dbg_u_en,
BCA_Dbg_Ctrl_I2s2_dbg_d_en,
BCA_Clk_En_ahbmstr_mic_en,
BCA_Clk_En_ahbmstr_I2s1_en,
BCA_Clk_En_ahbmstr_I2s2_en,
BCA_Mclk_Mon_thresh,
AHB_Master_Mic_Mask,
AHB_Master_I2s1_Mask,
AHB_Master_I2s2_Mask,
BCA_MIC_IN_START_ADR,
BCA_MIC_IN_SAMPLE_NO,
BCA_MIC_IN_RTD_TRG,
BCA_MIC_IN_NOINTR,
BCA_MIC_IN_BITWT,
BCA_MIC_IN_CH8_SEL,
BCA_MIC_IN_CH7_SEL,
BCA_MIC_IN_CH6_SEL,
BCA_MIC_IN_CH5_SEL,
BCA_MIC_IN_CH4_SEL,
BCA_MIC_IN_CH3_SEL,
BCA_MIC_IN_CH2_SEL,
BCA_MIC_IN_CH1_SEL,
BCA_MIC_IN_START,
BCA_MIC_IN_ERROR_SETTING,
BCA_MIC_IN_MONBUF,
BCA_I2S1_IN_START_ADR,
BCA_I2S1_IN_SAMPLE_NO,
BCA_I2S1_IN_RTD_TRG,
BCA_I2S1_IN_NOINTR,
BCA_I2S1_IN_BITWT,
BCA_I2S1_IN_CH2_SEL,
BCA_I2S1_IN_CH1_SEL,
BCA_I2S1_IN_MON_START,
BCA_I2S1_IN_MON_ERROR_SETTING,
BCA_I2S1_IN_MON_MONBUF,
BCA_I2S2_IN_START_ADR,
BCA_I2S2_IN_SAMPLE_NO,
BCA_I2S2_IN_RTD_TRG,
BCA_I2S2_IN_NOINTR,
BCA_I2S2_IN_BITWT,
BCA_I2S2_IN_CH2_SEL,
BCA_I2S2_IN_CH1_SEL,
BCA_I2S2_IN_MON_START,
BCA_I2S2_IN_MON_ERROR_SETTING,
BCA_I2S2_IN_MON_MONBUF,
BCA_I2S1_OUT_START_ADR,
BCA_I2S1_OUT_SAMPLE_NO,
BCA_I2S1_OUT_RTF_TRG,
BCA_I2S1_OUT_NOINTR,
BCA_I2S1_OUT_BITWT,
BCA_I2S1_OUT_SD1_R_SEL,
BCA_I2S1_OUT_SD1_L_SEL,
BCA_I2S1_OUT_MON_START,
BCA_I2S1_OUT_MON_ERROR_SETTING,
BCA_I2S1_OUT_MON_MONBUF,
BCA_I2S2_OUT_START_ADR,
BCA_I2S2_OUT_SAMPLE_NO,
BCA_I2S2_OUT_RTF_TRG,
BCA_I2S2_OUT_NOINTR,
BCA_I2S2_OUT_BITWT,
BCA_I2S2_OUT_SD1_R_SEL,
BCA_I2S2_OUT_SD1_L_SEL,
BCA_I2S2_OUT_MON_START,
BCA_I2S2_OUT_MON_ERROR_SETTING,
BCA_I2S2_OUT_MON_MONBUF,
BCA_I2S_ENSEL,
BCA_MIC_IN_PRDAT_U,
BCA_I2S1_IN_PRDAT_U,
BCA_I2S2_IN_PRDAT_U,
BCA_I2S1_OUT_PRDAT_D,
BCA_I2S2_OUT_PRDAT_D,
BCA_MIC_INT_CTRL_DONE_MIC,
BCA_MIC_INT_CTRL_ERR_MIC,
BCA_MIC_INT_CTRL_SMP_MIC,
BCA_MIC_INT_CTRL_CMB_MIC,
BCA_I2S1_INT_CTRL_DONE_I2SO,
BCA_I2S1_INT_CTRL_ERR_I2SO,
BCA_I2S1_INT_CTRL_DONE_I2SI,
BCA_I2S1_INT_CTRL_ERR_I2SI,
BCA_I2S1_INT_CTRL_SMP_I2S
BCA_I2S1_INT_CTRL_CMB_I2S,
BCA_I2S2_INT_CTRL_DONE_I2SO,
BCA_I2S2_INT_CTRL_ERR_I2SO,
BCA_I2S2_INT_CTRL_DONE_I2SI,
BCA_I2S2_INT_CTRL_ERR_I2SI,
BCA_I2S2_INT_CTRL_SMP_I2S
BCA_I2S2_INT_CTRL_CMB_I2S,
BCA_MIC_INT_MASK_DONE_MIC,
BCA_MIC_INT_MASK_ERR_MIC,
BCA_MIC_INT_MASK_SMP_MIC,
BCA_MIC_INT_MASK_CMB_MIC,
BCA_MIC_INT_MASK_NOSTPMSK,
BCA_MIC_INT_MASK_SRST_MIC,
BCA_I2S1_INT_MASK_DONE_I2SO,
BCA_I2S1_INT_MASK_ERR_I2SO,
BCA_I2S1_INT_MASK_DONE_I2SI,
BCA_I2S1_INT_MASK_ERR_I2SI,
BCA_I2S1_INT_MASK_SMP_I2S
BCA_I2S1_INT_MASK_CMB_I2S,
BCA_I2S1_INT_MASK_NOSTPMSK,
BCA_I2S1_INT_MASK_SRST_I2S,
BCA_I2S2_INT_MASK_DONE_I2SO,
BCA_I2S2_INT_MASK_ERR_I2SO,
BCA_I2S2_INT_MASK_DONE_I2SI,
BCA_I2S2_INT_MASK_ERR_I2SI,
BCA_I2S2_INT_MASK_SMP_I2S
BCA_I2S2_INT_MASK_CMB_I2S,
BCA_I2S2_INT_MASK_NOSTPMSK,
BCA_I2S2_INT_MASK_SRST_I2S,
BCA_INT_M_HRESP_ERR,
BCA_INT_M_I2S1_BCL_ERR1,
BCA_INT_M_I2S1_BCL_ERR2,
BCA_INT_M_ANC_FAINT,
BCA_INT_M_OVF_SMASL,
BCA_INT_M_OVF_SMASR,
BCA_INT_M_OVF_DNC1L,
BCA_INT_M_OVF_DNC1R,
BCA_INT_M_OVF_DNC2L,
BCA_INT_M_OVF_DNC2R,
BCA_INT_CLR_HRESP_ERR,
BCA_INT_CLR_I2S1_BCK_ERR1,
BCA_INT_CLR_I2S1_BCK_ERR2,
BCA_INT_CLR_ANC_FAINT,
BCA_INT_CLR_OVF_SMASL,
BCA_INT_CLR_OVF_SMASR,
BCA_INT_CLR_OVF_DNC1L,
BCA_INT_CLR_OVF_DNC1R,
BCA_INT_CLR_OVF_DNC2L,
BCA_INT_CLR_OVF_DNC2R,
BCA_INT_HRESP_ERR,
BCA_INT_I2S_BCK_ERR1,
BCA_INT_I2S_BCK_ERR2,
BCA_INT_ANC_FAINT,
BCA_INT_OVF_SMASL,
BCA_INT_OVF_SMASR,
BCA_INT_OVF_DNC1L,
BCA_INT_OVF_DNC1R,
BCA_INT_OVF_DNC2L,
BCA_INT_OVF_DNC2R,
BCA_DBG_MIC_CH1_DATA,
BCA_DBG_MIC_CH2_DATA,
BCA_DBG_MIC_CH3_DATA,
BCA_DBG_MIC_CH4_DATA,
BCA_DBG_MIC_CH5_DATA,
BCA_DBG_MIC_CH6_DATA,
BCA_DBG_MIC_CH7_DATA,
BCA_DBG_MIC_CH8_DATA,
BCA_DBG_I2S1_U_CH1_DATA,
BCA_DBG_I2S1_U_CH2_DATA,
BCA_DBG_I2S1_D_CH1_DATA,
BCA_DBG_I2S1_D_CH2_DATA,
BCA_DBG_I2S2_U_CH1_DATA,
BCA_DBG_I2S2_U_CH2_DATA,
BCA_DBG_I2S2_D_CH1_DATA,
BCA_DBG_I2S2_D_CH2_DATA,
BCA_DBG_CTRL_MIC_DBG_EN,
BCA_DBG_CTRL_I2S1_DBG_U_EN,
BCA_DBG_CTRL_I2S1_DBG_D_EN,
BCA_DBG_CTRL_I2S2_DBG_U_EN,
BCA_DBG_CTRL_I2S2_DBG_D_EN,
BCA_CLK_EN_AHBMASTER_MIC_EN,
BCA_CLK_EN_AHBMASTER_I2S1_EN,
BCA_CLK_EN_AHBMASTER_I2S2_EN,
BCA_MCLK_MON_THRESH,
AHB_MASTER_MIC_MASK,
AHB_MASTER_I2S1_MASK,
AHB_MASTER_I2S2_MASK,
BCA_REG_MAX_ENTRY
} BCA_REG_ID;

4
boards/arm/cxd56xx/drivers/audio/cxd56_audio_config.c
View file

@ -114,7 +114,7 @@ static void set_miccfg(void)
if (is_amic)
{
if(is_dmic)
if (is_dmic)
{
g_audio_cfg.mic_dev = CXD56_AUDIO_CFG_MIC_DEV_ANADIG;
g_audio_cfg.mic_mode = CXD56_AUDIO_CFG_MIC_MODE_64FS;
@ -127,7 +127,7 @@ static void set_miccfg(void)
}
else
{
if(is_dmic)
if (is_dmic)
{
g_audio_cfg.mic_dev = CXD56_AUDIO_CFG_MIC_DEV_DIGITAL;
g_audio_cfg.mic_mode = CXD56_AUDIO_CFG_MIC_MODE_64FS;

7
boards/arm/cxd56xx/drivers/audio/cxd56_audio_dma.c
View file

@ -61,6 +61,7 @@ enum audio_irq_reg_type_e
};
/* INT_EN1 */
#define CXD56_INTC_BASE 0xe0045000
#define INT_EN1_REG_ADDR (CXD56_INTC_BASE + 0x10 + 3 * 4)
#define INT_EN1_BIT_AU0 6
@ -181,6 +182,7 @@ static CXD56_AUDIO_ECODE get_dma_handle(cxd56_audio_dma_path_t path,
default:
return CXD56_AUDIO_ECODE_DMA_PATH_INV;
}
return CXD56_AUDIO_ECODE_OK;
}
@ -204,6 +206,7 @@ static CXD56_AUDIO_ECODE get_dma_path(cxd56_audio_dma_t handle,
default:
return CXD56_AUDIO_ECODE_DMA_HANDLE_INV;
}
return CXD56_AUDIO_ECODE_OK;
}
@ -256,6 +259,7 @@ static CXD56_AUDIO_ECODE exec_dma_ch_sync_workaround(
break;
}
}
if (timeout_cnt == DMA_TIMEOUT_CNT)
{
return CXD56_AUDIO_ECODE_DMA_SMP_TIMEOUT;
@ -507,7 +511,6 @@ CXD56_AUDIO_ECODE cxd56_audio_dma_en_dmaint(void)
cxd56_audio_bca_reg_en_bus_err_int();
return CXD56_AUDIO_ECODE_OK;
}
CXD56_AUDIO_ECODE cxd56_audio_dma_dis_dmaint(void)
@ -565,7 +568,7 @@ CXD56_AUDIO_ECODE cxd56_audio_dma_stop(cxd56_audio_dma_t handle)
return CXD56_AUDIO_ECODE_OK;
}
void CXD56_audio_dma_int_handler(void)
void cxd56_audio_dma_int_handler(void)
{
uint32_t int_irq = read_int_reg(INT_IRQ1_REG);
uint32_t int_ac = cxd56_audio_bca_reg_get_dma_done_state_mic();

10
boards/arm/cxd56xx/drivers/audio/cxd56_audio_irq.c
View file

@ -51,7 +51,7 @@
* Public Function Prototypes
****************************************************************************/
extern void CXD56_audio_dma_int_handler(void);
extern void cxd56_audio_dma_int_handler(void);
/***************************************************************************
* Private Data
@ -71,10 +71,10 @@ extern void CXD56_audio_dma_int_handler(void);
void cxd56_audio_irq_attach(void)
{
irq_attach(CXD56_IRQ_AUDIO_0, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_1, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_2, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_3, (xcpt_t)CXD56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_0, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_1, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_2, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
irq_attach(CXD56_IRQ_AUDIO_3, (xcpt_t)cxd56_audio_dma_int_handler, NULL);
}
void cxd56_audio_irq_detach(void)

1
boards/arm/cxd56xx/drivers/audio/cxd56_audio_volume.c
View file

@ -228,6 +228,7 @@ CXD56_AUDIO_ECODE cxd56_audio_volume_set(cxd56_audio_volid_t id,
return CXD56_AUDIO_ECODE_VOL_MIN;
}
}
if (VOLUME_MAX < vol)
{
return CXD56_AUDIO_ECODE_VOL_MAX;

7
boards/arm/cxd56xx/drivers/sensors/ak09912_scu.c
View file

@ -146,6 +146,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for ak09912 device
*/
@ -271,7 +272,7 @@ static void ak09912_putreg8(FAR struct ak09912_dev_s *priv, uint8_t regaddr,
****************************************************************************/
static int ak09912_getreg(FAR struct ak09912_dev_s *priv, uint8_t regaddr,
uint8_t* buffer, uint32_t cnt)
uint8_t *buffer, uint32_t cnt)
{
uint16_t inst[2];
@ -325,6 +326,7 @@ static int ak09912_seqinit(FAR struct ak09912_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@ -489,7 +491,8 @@ static int ak09912_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
int ak09912_init(FAR struct i2c_master_s *i2c, int port)
{
FAR struct ak09912_dev_s tmp, *priv = &tmp;
struct ak09912_dev_s tmp;
struct ak09912_dev_s *priv = &tmp;
uint8_t val;
int ret;

6
boards/arm/cxd56xx/drivers/sensors/apds9930_scu.c
View file

@ -149,6 +149,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for apds9930 device
*/
@ -471,6 +472,7 @@ static void apds9930_setenable(FAR struct apds9930_dev_s *priv,
val = APDS9930_ENABLE_STANDBY;
}
}
apds9930_putreg8(priv, APDS9930_ENABLE, val);
leave_critical_section(flags);
@ -495,6 +497,7 @@ static int apds9930als_seqinit(FAR struct apds9930_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_als_seq;
seq_setaddress(priv->seq, priv->addr);
@ -528,6 +531,7 @@ static int apds9930ps_seqinit(FAR struct apds9930_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_ps_seq;
seq_setaddress(priv->seq, priv->addr);
@ -602,6 +606,7 @@ static int apds9930_open_ps(FAR struct file *filep)
{
return ret;
}
apds9930_setenable(priv, SETENABLE_TYPE_PS, true);
}
else
@ -925,6 +930,7 @@ int apds9930_init(FAR struct i2c_master_s *i2c, int port)
apds9930_putreg8(priv, APDS9930_PPULSE, val);
/* Control */
val = APDS9930_CONTROL_PDRIVE_100MA | APDS9930_CONTROL_PDIODE_CH1 |
APDS9930_CONTROL_PGAIN_X1 | APDS9930_CONTROL_AGAIN_X1;
apds9930_putreg8(priv, APDS9930_CONTROL, val);

3
boards/arm/cxd56xx/drivers/sensors/bh1721fvc_scu.c
View file

@ -76,6 +76,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for bh1721fvc device
*/
@ -177,6 +178,7 @@ static int bh1721fvc_seqinit(FAR struct bh1721fvc_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@ -216,6 +218,7 @@ static int bh1721fvc_open(FAR struct file *filep)
bh1721fvc_writeopecode(priv, BH1721FVC_POWERON);
bh1721fvc_writeopecode(priv, BH1721FVC_AUTORESOLUTION);
}
g_refcnt++;
return OK;

1
boards/arm/cxd56xx/drivers/sensors/bh1745nuc_scu.c
View file

@ -270,6 +270,7 @@ static int bh1745nuc_seqinit(FAR struct bh1745nuc_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);

2
boards/arm/cxd56xx/drivers/sensors/bm1383glv_scu.c
View file

@ -280,6 +280,7 @@ static int bm1383glv_seqinit(FAR struct bm1383glv_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@ -351,6 +352,7 @@ static int bm1383glv_open(FAR struct file *filep)
BM1383AGLV_MODE_CONTROL_RESERVED |
BM1383AGLV_MODE_CONTROL_CONTINUOUS;
}
bm1383glv_putreg8(priv, BM1383GLV_MODE_CONTROL, val);
}
else

2
boards/arm/cxd56xx/drivers/sensors/bm1422gmv_scu.c
View file

@ -294,6 +294,7 @@ static int bm1422gmv_seqinit(FAR struct bm1422gmv_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);
@ -377,7 +378,6 @@ static int bm1422gmv_close(FAR struct file *filep)
if (g_refcnt == 0)
{
/* goto power-down mode */
bm1422gmv_putreg8(priv, BM1422GMV_CNTL1, BM1422GMV_CNTL1_RST_LV);

22
boards/arm/cxd56xx/drivers/sensors/bmi160_scu.c
View file

@ -279,16 +279,22 @@ static int bmi160_close_gyro(FAR struct file *filep);
static int bmi160_close_accel(FAR struct file *filep);
static ssize_t bmi160_read(FAR struct file *filep, FAR char *buffer,
size_t len);
static int bmi160_ioctl(FAR struct file *filep,int cmd,unsigned long arg);
static int bmi160_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
static int bmi160_checkid(FAR struct bmi160_dev_s *priv);
#ifdef CONFIG_SENSORS_BMI160_I2C
static int bmi160_devregister(FAR const char *devpath, FAR struct i2c_master_s *dev,
int minor, const struct file_operations *fops, int port);
static int bmi160_devregister(FAR const char *devpath,
FAR struct i2c_master_s *dev,
int minor,
const struct file_operations *fops,
int port);
#else /* CONFIG_SENSORS_BMI160_SPI */
static int bmi160_devregister(FAR const char *devpath, FAR struct spi_dev_s *dev,
int minor, const struct file_operations *fops);
static int bmi160_devregister(FAR const char *devpath,
FAR struct spi_dev_s *dev,
int minor,
const struct file_operations *fops);
#endif
static int bmi160_set_accel_pm(FAR struct bmi160_dev_s *priv, int pm);
@ -474,6 +480,7 @@ static int bmi160_seqinit_gyro(FAR struct bmi160_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_gyro;
#ifdef CONFIG_SENSORS_BMI160_I2C
@ -506,6 +513,7 @@ static int bmi160_seqinit_accel(FAR struct bmi160_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_accel;
#ifdef CONFIG_SENSORS_BMI160_I2C
@ -800,6 +808,7 @@ static int bmi160_devregister(FAR const char *devpath, FAR struct spi_dev_s *dev
snerr("Failed to allocate instance\n");
return -ENOMEM;
}
#ifdef CONFIG_SENSORS_BMI160_I2C
priv->i2c = dev;
priv->seq = NULL;
@ -978,7 +987,8 @@ int bmi160_init(FAR struct i2c_master_s *dev, int port)
int bmi160_init(FAR struct spi_dev_s *dev)
#endif
{
FAR struct bmi160_dev_s tmp, *priv = &tmp;
struct bmi160_dev_s tmp;
struct bmi160_dev_s *priv = &tmp;
int ret;
#ifdef CONFIG_SENSORS_BMI160_I2C

57
boards/arm/cxd56xx/drivers/sensors/bmp280_scu.c
View file

@ -322,31 +322,31 @@ static int bmp280_get_calib_param_press(FAR struct bmp280_dev_s *priv)
{
/* Read calibration values */
g_press_adj.dig_P1 =
g_press_adj.dig_p1 =
((uint16_t)bmp280_getreg8(priv, BMP280_DIG_P1_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P1_LSB);
g_press_adj.dig_P2 =
g_press_adj.dig_p2 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P2_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P2_LSB);
g_press_adj.dig_P3 =
g_press_adj.dig_p3 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P3_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P3_LSB);
g_press_adj.dig_P4 =
g_press_adj.dig_p4 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P4_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P4_LSB);
g_press_adj.dig_P5 =
g_press_adj.dig_p5 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P5_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P5_LSB);
g_press_adj.dig_P6 =
g_press_adj.dig_p6 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P6_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P6_LSB);
g_press_adj.dig_P7 =
g_press_adj.dig_p7 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P7_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P7_LSB);
g_press_adj.dig_P8 =
g_press_adj.dig_p8 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P8_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P8_LSB);
g_press_adj.dig_P9 =
g_press_adj.dig_p9 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_P9_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_P9_LSB);
@ -365,18 +365,19 @@ static int bmp280_get_calib_param_temp(FAR struct bmp280_dev_s *priv)
{
/* Read calibration values */
g_temp_adj.dig_T1 =
g_temp_adj.dig_t1 =
((uint16_t)bmp280_getreg8(priv, BMP280_DIG_T1_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_T1_LSB);
g_temp_adj.dig_T2 =
g_temp_adj.dig_t2 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_T2_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_T2_LSB);
g_temp_adj.dig_T3 =
g_temp_adj.dig_t3 =
((int16_t)bmp280_getreg8(priv, BMP280_DIG_T3_MSB) << 8) |
bmp280_getreg8(priv, BMP280_DIG_T3_LSB);
return OK;
}
/****************************************************************************
* Name: bmp280_set_power_mode
*
@ -496,6 +497,7 @@ static int bmp280_seqinit_press(FAR struct bmp280_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_press;
seq_setaddress(priv->seq, priv->addr);
@ -521,6 +523,7 @@ static int bmp280_seqinit_temp(FAR struct bmp280_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq_temp;
seq_setaddress(priv->seq, priv->addr);
@ -764,17 +767,18 @@ static int bmp280_ioctl_press(FAR struct file *filep, int cmd,
case SNIOC_GETADJ:
{
struct bmp280_press_adj_s *user = (struct bmp280_press_adj_s *)(uintptr_t)arg;
struct bmp280_press_adj_s *user = (struct bmp280_press_adj_s *)
(uintptr_t)arg;
user->dig_P1 = g_press_adj.dig_P1;
user->dig_P2 = g_press_adj.dig_P2;
user->dig_P3 = g_press_adj.dig_P3;
user->dig_P4 = g_press_adj.dig_P4;
user->dig_P5 = g_press_adj.dig_P5;
user->dig_P6 = g_press_adj.dig_P6;
user->dig_P7 = g_press_adj.dig_P7;
user->dig_P8 = g_press_adj.dig_P8;
user->dig_P9 = g_press_adj.dig_P9;
user->dig_p1 = g_press_adj.dig_p1;
user->dig_p2 = g_press_adj.dig_p2;
user->dig_p3 = g_press_adj.dig_p3;
user->dig_p4 = g_press_adj.dig_p4;
user->dig_p5 = g_press_adj.dig_p5;
user->dig_p6 = g_press_adj.dig_p6;
user->dig_p7 = g_press_adj.dig_p7;
user->dig_p8 = g_press_adj.dig_p8;
user->dig_p9 = g_press_adj.dig_p9;
}
break;
@ -825,9 +829,9 @@ static int bmp280_ioctl_temp(FAR struct file *filep, int cmd,
{
struct bmp280_temp_adj_s *user = (struct bmp280_temp_adj_s *)(uintptr_t)arg;
user->dig_T1 = g_temp_adj.dig_T1;
user->dig_T2 = g_temp_adj.dig_T2;
user->dig_T3 = g_temp_adj.dig_T3;
user->dig_t1 = g_temp_adj.dig_t1;
user->dig_t2 = g_temp_adj.dig_t2;
user->dig_t3 = g_temp_adj.dig_t3;
}
break;
@ -873,7 +877,8 @@ static int bmp280_ioctl_temp(FAR struct file *filep, int cmd,
int bmp280_init(FAR struct i2c_master_s *i2c, int port)
{
FAR struct bmp280_dev_s tmp, *priv = &tmp;
struct bmp280_dev_s tmp;
struct *priv = &tmp;
int ret;
/* Setup temporary device structure for initialization */

1
boards/arm/cxd56xx/drivers/sensors/kx022_scu.c
View file

@ -278,6 +278,7 @@ static int kx022_seqinit(FAR struct kx022_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_seq;
seq_setaddress(priv->seq, priv->addr);

3
boards/arm/cxd56xx/drivers/sensors/lt1pa01_scu.c
View file

@ -144,6 +144,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for lt1pa01 device
*/
@ -349,6 +350,7 @@ static int lt1pa01als_seqinit(FAR struct lt1pa01_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_als_seq;
seq_setaddress(priv->seq, priv->addr);
@ -382,6 +384,7 @@ static int lt1pa01prox_seqinit(FAR struct lt1pa01_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_prox_seq;
seq_setaddress(priv->seq, priv->addr);

8
boards/arm/cxd56xx/drivers/sensors/rpr0521rs_scu.c
View file

@ -127,6 +127,7 @@
/****************************************************************************
* Private Type Definitions
****************************************************************************/
/**
* @brief Structure for rpr0521rs device
*/
@ -237,6 +238,7 @@ static uint8_t g_ps_persistence = RPR0521RS_PS_CONTROL_PS_PERSISTENCE_2;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: rpr0521rs_getreg8
*
@ -358,7 +360,7 @@ static int rpr0521rs_checkid(FAR struct rpr0521rs_dev_s *priv)
id = rpr0521rs_getreg8(priv, RPR0521RS_SYSTEM_CONTROL);
if ((id & 0x3F) != RPR0521RS_PARTID)
if ((id & 0x3f) != RPR0521RS_PARTID)
{
/* Part ID is not Correct */
@ -422,6 +424,7 @@ static void rpr0521rs_setmodecontrol(FAR struct rpr0521rs_dev_s *priv,
val = RPR0521RS_MODE_CONTROL_MEASTIME_STANDBY;
}
}
rpr0521rs_putreg8(priv, RPR0521RS_MODE_CONTROL, val);
leave_critical_section(flags);
@ -446,6 +449,7 @@ static int rpr0521rsals_seqinit(FAR struct rpr0521rs_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_als_seq;
seq_setaddress(priv->seq, priv->addr);
@ -479,6 +483,7 @@ static int rpr0521rsps_seqinit(FAR struct rpr0521rs_dev_s *priv)
{
return -ENOENT;
}
priv->seq = g_ps_seq;
seq_setaddress(priv->seq, priv->addr);
@ -553,6 +558,7 @@ static int rpr0521rs_open_ps(FAR struct file *filep)
{
return ret;
}
rpr0521rs_setmodecontrol(priv, SETMODECONTROL_TYPE_PS, true);
}
else

2
boards/arm/cxd56xx/spresense/src/cxd56_sdcard.c
View file

@ -317,7 +317,7 @@ static int board_sdcard_detect_int(int irq, FAR void *context, FAR void *arg)
NULL);
}
return OK;
return OK;
}
#endif