diff --git a/arch/arm/src/stm32wl5/hardware/stm32wl5_flash.h b/arch/arm/src/stm32wl5/hardware/stm32wl5_flash.h
index cc11030bdd3..808f6fb5a3c 100644
--- a/arch/arm/src/stm32wl5/hardware/stm32wl5_flash.h
+++ b/arch/arm/src/stm32wl5/hardware/stm32wl5_flash.h
@@ -36,9 +36,9 @@
 /* Flash size is known from the chip selection:
  *
  *  When CONFIG_STM32_FLASH_OVERRIDE_DEFAULT is set the
- *  CONFIG_STM32WL5_FLASH_CONFIG_x selects the default FLASH size based
+ *  CONFIG_STM32_FLASH_CONFIG_x selects the default FLASH size based
  *  on the chip part number. This value can be overridden with
- *  CONFIG_STM32WL5_FLASH_OVERRIDE_x. For example:
+ *  CONFIG_STM32_FLASH_OVERRIDE_x. For example:
  *
  *  Parts STM32WL5xx8 have 64KiB of FLASH
  *  Parts STM32WL5xxB have 128KiB of FLASH
diff --git a/arch/arm/src/stm32wl5/stm32wl5_rcc.c b/arch/arm/src/stm32wl5/stm32wl5_rcc.c
index 4bd2376b79e..a4dc6f83fe3 100644
--- a/arch/arm/src/stm32wl5/stm32wl5_rcc.c
+++ b/arch/arm/src/stm32wl5/stm32wl5_rcc.c
@@ -289,7 +289,7 @@ static inline void stm32_rcc_enableahb3(void)
   regval |= RCC_AHB2ENR_RNGEN;
 #endif
 
-#ifdef CONFIG_STM32WL5_FLASHEN
+#ifdef CONFIG_STM32_FLASH
   /* Flash memory interface clock enable */
 
   regval |= RCC_AHB3ENR_FLASHEN;
diff --git a/arch/arm/src/stm32wl5/stm32wl5_tim.c b/arch/arm/src/stm32wl5/stm32wl5_tim.c
index 3f3c958a1c5..47278a507bf 100644
--- a/arch/arm/src/stm32wl5/stm32wl5_tim.c
+++ b/arch/arm/src/stm32wl5/stm32wl5_tim.c
@@ -55,20 +55,20 @@
  * include:
  *
  * - To generate modulated outputs for such things as motor control.  If
- *   CONFIG_STM32WL5_TIMn is defined then the CONFIG_STM32WL5_TIMn_PWM may
+ *   CONFIG_STM32_TIMn is defined then the CONFIG_STM32_TIMn_PWM may
  *   also be defined to indicate that the timer is intended to be used for
  *   pulsed output modulation.
  *
- * - To control periodic ADC input sampling.  If CONFIG_STM32WL5_TIMn is
- *   defined then CONFIG_STM32WL5_TIMn_ADC may also be defined to indicate
+ * - To control periodic ADC input sampling.  If CONFIG_STM32_TIMn is
+ *   defined then CONFIG_STM32_TIMn_ADC may also be defined to indicate
  *   that timer "n" is intended to be used for that purpose.
  *
- * - To control periodic DAC outputs.  If CONFIG_STM32WL5_TIMn is defined
- *   then CONFIG_STM32WL5_TIMn_DAC may also be defined to indicate that
+ * - To control periodic DAC outputs.  If CONFIG_STM32_TIMn is defined
+ *   then CONFIG_STM32_TIMn_DAC may also be defined to indicate that
  *   timer "n" is intended to be used for that purpose.
  *
- * - To use a Quadrature Encoder.  If CONFIG_STM32WL5_TIMn is defined then
- *   CONFIG_STM32WL5_TIMn_QE may also be defined to indicate that timer "n"
+ * - To use a Quadrature Encoder.  If CONFIG_STM32_TIMn is defined then
+ *   CONFIG_STM32_TIMn_QE may also be defined to indicate that timer "n"
  *   is intended to be used for that purpose.
  *
  * In any of these cases, the timer will not be used by this timer module.
@@ -99,13 +99,13 @@
 #  undef CONFIG_STM32_TIM5
 #endif
 
-#if defined(CONFIG_STM32WL5_TIM6_PWM) || defined (CONFIG_STM32_TIM6_ADC) || \
-    defined(CONFIG_STM32_TIM6_DAC) || defined(CONFIG_STM32WL5_TIM6_QE)
+#if defined(CONFIG_STM32_TIM6_PWM) || defined (CONFIG_STM32_TIM6_ADC) || \
+    defined(CONFIG_STM32_TIM6_DAC) || defined(CONFIG_STM32_TIM6_QE)
 #  undef CONFIG_STM32_TIM6
 #endif
 
-#if defined(CONFIG_STM32WL5_TIM7_PWM) || defined (CONFIG_STM32WL5_TIM7_ADC) || \
-    defined(CONFIG_STM32_TIM7_DAC) || defined(CONFIG_STM32WL5_TIM7_QE)
+#if defined(CONFIG_STM32_TIM7_PWM) || defined (CONFIG_STM32_TIM7_ADC) || \
+    defined(CONFIG_STM32_TIM7_DAC) || defined(CONFIG_STM32_TIM7_QE)
 #  undef CONFIG_STM32_TIM7
 #endif
 
@@ -115,17 +115,17 @@
 #endif
 
 #if defined(CONFIG_STM32_TIM15_PWM) || defined (CONFIG_STM32_TIM15_ADC) || \
-    defined(CONFIG_STM32WL5_TIM15_DAC) || defined(CONFIG_STM32WL5_TIM15_QE)
+    defined(CONFIG_STM32_TIM15_DAC) || defined(CONFIG_STM32_TIM15_QE)
 #  undef CONFIG_STM32_TIM15
 #endif
 
-#if defined(CONFIG_STM32_TIM16_PWM) || defined (CONFIG_STM32WL5_TIM16_ADC) || \
-    defined(CONFIG_STM32WL5_TIM16_DAC) || defined(CONFIG_STM32WL5_TIM16_QE)
+#if defined(CONFIG_STM32_TIM16_PWM) || defined (CONFIG_STM32_TIM16_ADC) || \
+    defined(CONFIG_STM32_TIM16_DAC) || defined(CONFIG_STM32_TIM16_QE)
 #  undef CONFIG_STM32_TIM16
 #endif
 
-#if defined(CONFIG_STM32_TIM17_PWM) || defined (CONFIG_STM32WL5_TIM17_ADC) || \
-    defined(CONFIG_STM32WL5_TIM17_DAC) || defined(CONFIG_STM32WL5_TIM17_QE)
+#if defined(CONFIG_STM32_TIM17_PWM) || defined (CONFIG_STM32_TIM17_ADC) || \
+    defined(CONFIG_STM32_TIM17_DAC) || defined(CONFIG_STM32_TIM17_QE)
 #  undef CONFIG_STM32_TIM17
 #endif