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Merged in masayuki2009/nuttx.nuttx/fe310_with_pll (pull request #1094)
fe310 with pll * arch: fe310: Introduce CONFIG_ARCH_CHIP_FE310_QEMU * boards: hifive1-revb: Introduce CONFIG_ARCH_CHIP_FE310_QEMU * arch: fe310: Add support for PLL * boards: hifive1-revb: Increase uart0 tx buff size and add getprime app Approved-by: Gregory Nutt <gnutt@nuttx.org>
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parent
813902cf87
commit
0eb9bfa49d
16 changed files with 486 additions and 44 deletions
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@ -10,19 +10,20 @@
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$ make
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$ sudo make install
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3. Modify flash origin address
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3. Modify defconfig
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index 559c1813b8..a67c37b576 100644
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--- a/boards/risc-v/fe310/hifive1-revb/scripts/ld.script
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+++ b/boards/risc-v/fe310/hifive1-revb/scripts/ld.script
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@@ -35,7 +35,7 @@
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MEMORY
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{
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- flash (rx) : ORIGIN = 0x20010000, LENGTH = 4096K
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+ flash (rx) : ORIGIN = 0x20400000, LENGTH = 4096K
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sram (rwx) : ORIGIN = 0x80000000, LENGTH = 16K
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}
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index c449421741..5a76600785 100644
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--- a/boards/risc-v/fe310/hifive1-revb/configs/nsh/defconfig
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+++ b/boards/risc-v/fe310/hifive1-revb/configs/nsh/defconfig
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@@ -14,7 +14,7 @@ CONFIG_ARCH_BOARD="hifive1-revb"
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CONFIG_ARCH_BOARD_HIFIVE1_REVB=y
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CONFIG_ARCH_CHIP="fe310"
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CONFIG_ARCH_CHIP_FE310=y
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-CONFIG_ARCH_CHIP_FE310_G002=y
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+CONFIG_ARCH_CHIP_FE310_QEMU=y
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CONFIG_ARCH_INTERRUPTSTACK=1536
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CONFIG_ARCH_RISCV=y
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CONFIG_ARCH_STACKDUMP=y
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4. Configure and build NuttX
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@ -31,6 +31,5 @@
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5. TODO
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Configure PLL
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Support GPIO/SPI/I2C/RTC/WDT/PWM
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Support RISC-V User mode
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@ -65,8 +65,10 @@ CONFIG_STDIO_DISABLE_BUFFERING=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_TASK_NAME_SIZE=12
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CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=1536
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CONFIG_TESTING_GETPRIME=y
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CONFIG_TESTING_GETPRIME_STACKSIZE=2048
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CONFIG_UART0_RXBUFSIZE=8
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_UART0_TXBUFSIZE=4
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CONFIG_UART0_TXBUFSIZE=32
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CONFIG_USER_ENTRYPOINT="nsh_main"
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CONFIG_WDOG_INTRESERVE=0
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@ -37,7 +37,11 @@ include ${TOPDIR}/.config
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include ${TOPDIR}/tools/Config.mk
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include ${TOPDIR}/arch/risc-v/src/rv32im/Toolchain.defs
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LDSCRIPT = ld.script
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ifeq ($(CONFIG_ARCH_CHIP_FE310_QEMU),y)
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LDSCRIPT = ld-qemu.script
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else
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LDSCRIPT = ld.script
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endif
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ifeq ($(WINTOOL),y)
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# Windows-native toolchains
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118
boards/risc-v/fe310/hifive1-revb/scripts/ld-qemu.script
Normal file
118
boards/risc-v/fe310/hifive1-revb/scripts/ld-qemu.script
Normal file
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@ -0,0 +1,118 @@
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/****************************************************************************
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* boards/risc-v/fe310/hifive1-revb/scripts/ld-qemu.script
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*
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* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
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* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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MEMORY
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{
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flash (rx) : ORIGIN = 0x20400000, LENGTH = 4096K
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sram (rwx) : ORIGIN = 0x80000000, LENGTH = 16K
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}
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OUTPUT_ARCH("riscv")
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ENTRY(_stext)
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EXTERN(_vectors)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > flash
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.init_section : ALIGN(4) {
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_sinit = ABSOLUTE(.);
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KEEP(*(.init_array .init_array.*))
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_einit = ABSOLUTE(.);
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} > flash
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.ARM.extab : ALIGN(4) {
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*(.ARM.extab*)
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} > flash
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.ARM.exidx : ALIGN(4) {
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__exidx_start = ABSOLUTE(.);
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*(.ARM.exidx*)
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__exidx_end = ABSOLUTE(.);
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} > flash
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_eronly = ABSOLUTE(.);
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.data : ALIGN(4) {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.sdata .sdata.*)
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*(.gnu.linkonce.d.*)
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*(.gnu.linkonce.s.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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.bss : ALIGN(4) {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.sbss .sbss.*)
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*(.gnu.linkonce.b.*)
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*(.gnu.linkonce.sb.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > sram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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