From 081335730866ea7bfc16e785cd64138dcec95802 Mon Sep 17 00:00:00 2001
From: wangchengdong <wangchengdong@lixiang.com>
Date: Sun, 11 Jan 2026 15:45:37 +0800
Subject: [PATCH] arch/risc-v: Add support to disable signals actions related
 data struct

    Add support to disable signals actions related struct

Co-authored-by: guoshichao <guoshichao@xiaomi.com>
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
---
 arch/risc-v/include/irq.h                       |  2 ++
 arch/risc-v/src/common/CMakeLists.txt           | 13 +++++++++----
 arch/risc-v/src/common/Make.defs                | 11 ++++++++---
 arch/risc-v/src/common/riscv_exception_common.S |  4 ++++
 arch/risc-v/src/common/riscv_signal_dispatch.c  |  4 ++--
 5 files changed, 25 insertions(+), 9 deletions(-)

diff --git a/arch/risc-v/include/irq.h b/arch/risc-v/include/irq.h
index d25089b5da1..3dd83618d03 100644
--- a/arch/risc-v/include/irq.h
+++ b/arch/risc-v/include/irq.h
@@ -569,6 +569,7 @@
 
 struct xcptcontext
 {
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* These additional register save locations are used to implement the
    * signal delivery trampoline.
    *
@@ -587,6 +588,7 @@ struct xcptcontext
 
   uintptr_t sigreturn;
 #endif
+#endif /* CONFIG_ENABLE_ALL_SIGNALS */
 
 #ifdef CONFIG_ARCH_ADDRENV
 #ifdef CONFIG_ARCH_KERNEL_STACK
diff --git a/arch/risc-v/src/common/CMakeLists.txt b/arch/risc-v/src/common/CMakeLists.txt
index cb765c81fa8..84a1d43fb47 100644
--- a/arch/risc-v/src/common/CMakeLists.txt
+++ b/arch/risc-v/src/common/CMakeLists.txt
@@ -30,11 +30,14 @@ list(APPEND SRCS riscv_cpuinfo.c riscv_createstack.c riscv_doirq.c
 list(APPEND SRCS riscv_exit.c riscv_getintstack.c riscv_getnewintctx.c)
 list(APPEND SRCS riscv_initialize.c riscv_initialstate.c riscv_modifyreg32.c)
 list(APPEND SRCS riscv_nputs.c riscv_registerdump.c)
-list(APPEND SRCS riscv_releasestack.c riscv_schedulesigaction.c
-     riscv_sigdeliver.c)
+list(APPEND SRCS riscv_releasestack.c)
 list(APPEND SRCS riscv_stackframe.c riscv_tcbinfo.c riscv_swint.c)
 list(APPEND SRCS riscv_switchcontext.c riscv_usestack.c)
 
+if(CONFIG_ENABLE_ALL_SIGNALS)
+  list(APPEND SRCS riscv_schedulesigaction.c riscv_sigdeliver.c)
+endif()
+
 if(CONFIG_ONESHOT)
   list(APPEND SRCS riscv_mtimer.c)
 endif()
@@ -66,8 +69,10 @@ if(CONFIG_ARCH_HAVE_DEBUG)
 endif()
 
 if(NOT CONFIG_BUILD_FLAT)
-  list(APPEND SRCS riscv_task_start.c riscv_pthread_start.c
-       riscv_signal_dispatch.c)
+  list(APPEND SRCS riscv_task_start.c riscv_pthread_start.c)
+  if(CONFIG_ENABLE_ALL_SIGNALS)
+    list(APPEND SRCS riscv_signal_dispatch.c)
+  endif()
   if(CONFIG_BUILD_PROTECTED)
     target_sources(arch_interface PRIVATE riscv_signal_handler.S)
   endif()
diff --git a/arch/risc-v/src/common/Make.defs b/arch/risc-v/src/common/Make.defs
index d39d6a7a3c9..d98a828c508 100644
--- a/arch/risc-v/src/common/Make.defs
+++ b/arch/risc-v/src/common/Make.defs
@@ -32,10 +32,13 @@ CMN_CSRCS += riscv_allocateheap.c riscv_createstack.c riscv_cpuinfo.c
 CMN_CSRCS += riscv_cpuidlestack.c riscv_doirq.c riscv_exit.c riscv_exception.c
 CMN_CSRCS += riscv_getnewintctx.c riscv_getintstack.c riscv_initialstate.c
 CMN_CSRCS += riscv_modifyreg32.c riscv_nputs.c riscv_releasestack.c
-CMN_CSRCS += riscv_registerdump.c riscv_stackframe.c riscv_schedulesigaction.c
-CMN_CSRCS += riscv_sigdeliver.c riscv_switchcontext.c
+CMN_CSRCS += riscv_registerdump.c riscv_stackframe.c riscv_switchcontext.c
 CMN_CSRCS += riscv_usestack.c riscv_tcbinfo.c
 
+ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
+CMN_CSRCS += riscv_schedulesigaction.c riscv_sigdeliver.c
+endif
+
 ifeq ($(CONFIG_ONESHOT),y)
   CMN_CSRCS += riscv_mtimer.c
 endif
@@ -69,7 +72,9 @@ endif
 ifneq ($(CONFIG_BUILD_FLAT),y)
 CMN_CSRCS  += riscv_task_start.c
 CMN_CSRCS  += riscv_pthread_start.c
-CMN_CSRCS  += riscv_signal_dispatch.c
+ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
+  CMN_CSRCS += riscv_signal_dispatch.c
+endif
 CMN_UASRCS += riscv_signal_handler.S
 endif
 
diff --git a/arch/risc-v/src/common/riscv_exception_common.S b/arch/risc-v/src/common/riscv_exception_common.S
index cae7250be2e..7bcc4a5de16 100644
--- a/arch/risc-v/src/common/riscv_exception_common.S
+++ b/arch/risc-v/src/common/riscv_exception_common.S
@@ -239,7 +239,9 @@ handle_irq:
   REGSTORE   s0, 0(sp)
   add        s0, sp, (INT_REG_SIZE * 2)
 
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   addi       sp, sp, -XCPTCONTEXT_SIZE
+#endif
 
   /* Call interrupt handler in C */
 
@@ -249,10 +251,12 @@ handle_irq:
   REGLOAD    s0, 0(sp)
   add        sp, sp, (INT_REG_SIZE * 2)
 
+#ifdef CONFIG_ENABLE_ALL_SIGNALS
   /* Restore sp */
 
   addi       sp, sp, XCPTCONTEXT_SIZE
 #endif
+#endif
 
 return_from_exception:
 
diff --git a/arch/risc-v/src/common/riscv_signal_dispatch.c b/arch/risc-v/src/common/riscv_signal_dispatch.c
index 80416c06940..85e6d7ae950 100644
--- a/arch/risc-v/src/common/riscv_signal_dispatch.c
+++ b/arch/risc-v/src/common/riscv_signal_dispatch.c
@@ -31,7 +31,7 @@
 
 #include "riscv_internal.h"
 
-#if !defined(CONFIG_BUILD_FLAT) && defined(__KERNEL__)
+#ifdef __KERNEL__
 
 /****************************************************************************
  * Public Functions
@@ -75,4 +75,4 @@ void up_signal_dispatch(_sa_sigaction_t sighand, int signo,
             (uintptr_t)info, (uintptr_t)ucontext);
 }
 
-#endif /* !CONFIG_BUILD_FLAT && __KERNEL__ */
+#endif /* __KERNEL__ */