diff --git a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst index f95147757b3..761e69dc315 100644 --- a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst +++ b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-devkit/index.rst @@ -10,6 +10,11 @@ Most of the I/O pins are broken out to the pin headers on both sides for easy interfacing. Developers can either connect peripherals with jumper wires or mount ESP32-C3 DevKit on a breadboard. +.. note:: + This page documents Espressif's ESP32-C3-DevKitC-02 and ESP32-C3-DevKitM-1. + For the compact third-party ESP32-C3 SuperMini, see + :doc:`../esp32c3-supermini/index`. + .. list-table:: :align: center diff --git a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/ESP32-C3-SuperMini-headers.jpg b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/ESP32-C3-SuperMini-headers.jpg new file mode 100644 index 00000000000..146d81cf9a0 Binary files /dev/null and b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/ESP32-C3-SuperMini-headers.jpg differ diff --git a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/ESP32-C3-SuperMini-usb.jpg b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/ESP32-C3-SuperMini-usb.jpg new file mode 100644 index 00000000000..fc9e5e791bf Binary files /dev/null and b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/ESP32-C3-SuperMini-usb.jpg differ diff --git a/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/index.rst b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/index.rst new file mode 100644 index 00000000000..6b23fee2371 --- /dev/null +++ b/Documentation/platforms/risc-v/esp32c3/boards/esp32c3-supermini/index.rst @@ -0,0 +1,220 @@ +================== +ESP32-C3 SuperMini +================== + +.. tags:: chip:ESP32-C3 + +The ESP32-C3 SuperMini is a compact third-party board based on the +Espressif ESP32-C3 RISC-V SoC. + +Typical boards include native USB-C (USB Serial/JTAG), 4 MB flash, +2.4 GHz Wi-Fi, Bluetooth 5 (LE), an onboard user LED, and BOOT/RESET +buttons. + +.. list-table:: + :align: center + + * - .. figure:: ESP32-C3-SuperMini-headers.jpg + :align: center + + Header silkscreen (V1601) + + - .. figure:: ESP32-C3-SuperMini-usb.jpg + :align: center + + USB-C, BOOT, RESET, and status LED + +.. note:: + SuperMini is not an official Espressif board. Pin labels, LED color, + flash size, and antenna layout can vary between vendors. Confirm GPIO8 + (LED) and GPIO9 (BOOT) against the silkscreen on your module. + +This page documents SuperMini-specific pins and NuttX configurations. +Toolchain install, flashing, debugging, and peripheral support are in +the main :doc:`ESP32-C3 documentation <../../index>`. + +Espressif's larger DevKit boards are documented at +:doc:`../esp32c3-devkit/index`. + +Features +======== + +* 32-bit RISC-V single-core processor, up to 160 MHz +* 400 KB SRAM and typically 4 MB on-board flash +* USB Type-C with the ESP32-C3 USB Serial/JTAG controller +* 2.4 GHz Wi-Fi (802.11 b/g/n) and Bluetooth 5 (LE) +* Header GPIOs: GPIO0 to GPIO10, GPIO20, GPIO21 +* 1 RESET button, 1 BOOT button, 1 onboard user LED + +Buttons and LEDs +================ + +Board Buttons +------------- + +There are two buttons labeled BOOT and RESET. The RESET button is not +available to software. It pulls the chip enable line that doubles as a +reset line. + +The BOOT button is connected to GPIO9. On reset it is used as a strapping +pin to determine whether the chip boots normally or into the serial +bootloader. After reset, the BOOT button can be used as a software input. + +To enter download mode: hold BOOT, tap RESET, then release BOOT. + +Board LEDs +---------- + +Typical SuperMini boards have a user LED on GPIO8. The LED is **active-low** +(drive the pin low to turn it on). GPIO8 is also a strapping pin and must +remain high during reset, so do not attach external circuitry that pulls it +low at boot. + +Pin Mapping +=========== + +The V1601 silkscreen uses two rows of eight pads. USB-C is at the end +next to 5V/GND. USB D-/D+ (GPIO18/GPIO19) stay on the USB-C connector +and are not broken out. + +Header row next to 5V (USB toward GPIO0):: + + 5V G 3.3 4 3 2 1 0 + +Header row next to GPIO5 (USB toward GPIO21):: + + 5 6 7 8 9 10 20 21 + +GPIO functions: + +====== ========== ======================================================== +Pin Signal Notes +====== ========== ======================================================== +GPIO0 ADC1_CH0; preferred general-purpose I/O +GPIO1 ADC1_CH1; preferred general-purpose I/O +GPIO2 ADC1_CH2; strapping pin (keep high at boot) +GPIO3 ADC1_CH3 +GPIO4 ADC1_CH4; JTAG MTMS +GPIO5 ADC2_CH0; JTAG MTDI (ADC2 is limited while Wi-Fi is on) +GPIO6 SPI2 CLK; JTAG MTCK +GPIO7 SPI2 MOSI; JTAG MTDO +GPIO8 Onboard LED (active-low); strapping pin +GPIO9 BOOT button; strapping pin +GPIO10 SPI2 CS +GPIO18 USB_D- USB-C only +GPIO19 USB_D+ USB-C only +GPIO20 U0RXD UART0 RX (nsh serial console) +GPIO21 U0TXD UART0 TX (nsh serial console) +5V USB 5 V / external 5 V (do not combine with USB 5 V) +3V3 3.3 V rail +GND Ground +====== ========== ======================================================== + +Do not apply more than 3.3 V to GPIO pins. + +I2C is routed through the GPIO matrix and has no fixed SuperMini pins. +GPIO8/GPIO9 are a poor I2C choice because they are strapping pins and +share the LED and BOOT button. Prefer GPIO0/GPIO1 or GPIO1/GPIO3. + +NSH Console +=========== + +``usbnsh`` exposes NuttShell over the USB-C CDC/ACM port. This is the +usual way to use SuperMini without an external USB-UART adapter. + +``nsh`` uses UART0 on GPIO20 (RX) and GPIO21 (TX) at 115200 8N1. Connect +an external 3.3 V USB-UART adapter if you use that configuration. + +Installation +============ + +1. Configure and build NuttX (USB console): + +.. code-block:: console + + $ git clone https://github.com/apache/nuttx.git nuttx + $ git clone https://github.com/apache/nuttx-apps.git apps + $ cd nuttx + $ make distclean + $ ./tools/configure.sh esp32c3-supermini:usbnsh + $ make V=1 + +2. Put the board in download mode if needed, then flash with ``esptool``: + +.. code-block:: bash + + make flash ESPTOOL_PORT=/dev/ttyACM0 ESPTOOL_BINDIR=./ + +The USB Serial/JTAG device is typically ``/dev/ttyACM0``. External USB-UART +adapters are typically ``/dev/ttyUSB0``. + +Configurations +============== + +All configurations listed below can be selected with: + +.. code-block:: console + + $ ./tools/configure.sh esp32c3-supermini: + +nsh +--- + +Basic NuttShell configuration using UART0 (GPIO21 TX / GPIO20 RX) at +115200 bps. + +usbnsh +------ + +Basic NuttShell configuration using CDC/ACM serial over the USB-C port +at 115200 bps. + +.. code-block:: console + + NuttShell (NSH) NuttX-12.8.0 + nsh> uname -a + NuttX 12.8.0 ... risc-v esp32c3-supermini + +gpio +---- + +NuttShell over USB, plus the GPIO example. The onboard LED is registered +as an output and GPIO0 as an interrupt input: + +======== ========== ============================ +PIN/GPIO Mode Device +======== ========== ============================ +GPIO8 Output /dev/gpio0 (LED, active-low) +GPIO0 Interrupt /dev/gpio1 +======== ========== ============================ + +Writing ``0`` to ``/dev/gpio0`` turns the LED **on**; writing ``1`` turns +it **off**. + +.. code-block:: console + + nsh> gpio -o 0 /dev/gpio0 + Driver: /dev/gpio0 + Output pin: Value=1 + Writing: Value=0 + Verify: Value=0 + nsh> gpio -o 1 /dev/gpio0 + Driver: /dev/gpio0 + Output pin: Value=0 + Writing: Value=1 + Verify: Value=1 + +wifi +---- + +This configuration enables a wlan network interface that can be configured +and initialized using:: + + nsh> ifup wlan0 + nsh> wapi psk wlan0 mypasswd 3 + nsh> wapi essid wlan0 myssid 1 + nsh> renew wlan0 + +That associates with SSID ``myssid`` using password ``mypasswd``. The IP +address is obtained via DHCP with ``renew``. Check the result with +``ifconfig``. diff --git a/boards/Kconfig b/boards/Kconfig index 07dd1583209..640e56c916d 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -474,6 +474,17 @@ config ARCH_BOARD_ESP32C3_XIAO The XIAO-ESP32C3 from Seeed Studio features the ESP32-C3 CPU with a RISC-V core, supporting IEEE 802.11 b/g/n WiFi, and Bluetooth 5 (BLE) protocols. +config ARCH_BOARD_ESP32C3_SUPERMINI + bool "ESP32-C3 SuperMini" + depends on ARCH_CHIP_ESP32C3 + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + The ESP32-C3 SuperMini is a compact third-party development board based + on the ESP32-C3 RISC-V SoC. Typical boards in this form factor include + native USB-C, 4 MB flash, IEEE 802.11 b/g/n Wi-Fi, Bluetooth 5 (BLE), + an onboard LED on GPIO8, and a BOOT button on GPIO9. + config ARCH_BOARD_ESP32_C3_ZERO bool "Waveshare ESP32-C3-Zero" depends on ARCH_CHIP_ESP32C3 @@ -3910,6 +3921,7 @@ config ARCH_BOARD default "esp32c3-legacy-devkit-rust-1" if ARCH_BOARD_ESP32C3_LEGACY_DEVKIT_RUST1 default "esp32c3-legacy-devkit" if ARCH_BOARD_ESP32C3_LEGACY_DEVKIT default "esp32c3-xiao" if ARCH_BOARD_ESP32C3_XIAO + default "esp32c3-supermini" if ARCH_BOARD_ESP32C3_SUPERMINI default "esp32-c3-zero" if ARCH_BOARD_ESP32_C3_ZERO default "esp32s2-kaluga-1" if ARCH_BOARD_ESP32S2_KALUGA_1 default "esp32s2-saola-1" if ARCH_BOARD_ESP32S2_SAOLA_1 @@ -5270,6 +5282,9 @@ endif if ARCH_BOARD_ESP32C3_XIAO source "boards/risc-v/esp32c3/esp32c3-xiao/Kconfig" endif +if ARCH_BOARD_ESP32C3_SUPERMINI +source "boards/risc-v/esp32c3/esp32c3-supermini/Kconfig" +endif if ARCH_BOARD_ESP32_C3_ZERO source "boards/risc-v/esp32c3/esp32-c3-zero/Kconfig" endif diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/CMakeLists.txt b/boards/risc-v/esp32c3/esp32c3-supermini/CMakeLists.txt new file mode 100644 index 00000000000..6a2df2bad9e --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/CMakeLists.txt @@ -0,0 +1,23 @@ +# ############################################################################## +# boards/risc-v/esp32c3/esp32c3-supermini/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +add_subdirectory(src) diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/Kconfig b/boards/risc-v/esp32c3/esp32c3-supermini/Kconfig new file mode 100644 index 00000000000..7804a3b8d5f --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_BOARD_ESP32C3_SUPERMINI + +endif # ARCH_BOARD_ESP32C3_SUPERMINI diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/configs/gpio/defconfig b/boards/risc-v/esp32c3/esp32c3-supermini/configs/gpio/defconfig new file mode 100644 index 00000000000..bad274c1bb7 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/configs/gpio/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ESPRESSIF_UART0 is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32c3-supermini" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP32C3_SUPERMINI=y +CONFIG_ARCH_CHIP="esp32c3" +CONFIG_ARCH_CHIP_ESP32C3=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_DEV_GPIO=y +CONFIG_ESPRESSIF_GPIO_IRQ=y +CONFIG_ESPRESSIF_USBSERIAL=y +CONFIG_EXAMPLES_GPIO=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/configs/nsh/defconfig b/boards/risc-v/esp32c3/esp32c3-supermini/configs/nsh/defconfig new file mode 100644 index 00000000000..a2d1cafcca3 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/configs/nsh/defconfig @@ -0,0 +1,47 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32c3-supermini" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP32C3_SUPERMINI=y +CONFIG_ARCH_CHIP="esp32c3" +CONFIG_ARCH_CHIP_ESP32C3=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/configs/usbnsh/defconfig b/boards/risc-v/esp32c3/esp32c3-supermini/configs/usbnsh/defconfig new file mode 100644 index 00000000000..2d5c46472a7 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/configs/usbnsh/defconfig @@ -0,0 +1,47 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ESPRESSIF_UART0 is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32c3-supermini" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP32C3_SUPERMINI=y +CONFIG_ARCH_CHIP="esp32c3" +CONFIG_ARCH_CHIP_ESP32C3=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_ESPRESSIF_USBSERIAL=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_WAITPID=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/configs/wifi/defconfig b/boards/risc-v/esp32c3/esp32c3-supermini/configs/wifi/defconfig new file mode 100644 index 00000000000..cad5b405e3c --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/configs/wifi/defconfig @@ -0,0 +1,78 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ESPRESSIF_UART0 is not set +# CONFIG_NDEBUG is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ALLOW_BSD_COMPONENTS=y +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32c3-supermini" +CONFIG_ARCH_BOARD_COMMON=y +CONFIG_ARCH_BOARD_ESP32C3_SUPERMINI=y +CONFIG_ARCH_CHIP="esp32c3" +CONFIG_ARCH_CHIP_ESP32C3=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_IRQ_TO_NDX=y +CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y +CONFIG_ARCH_NUSER_INTERRUPTS=17 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_DRIVERS_IEEE80211=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ESPRESSIF_SPIFLASH=y +CONFIG_ESPRESSIF_SPIFLASH_SPIFFS=y +CONFIG_ESPRESSIF_USBSERIAL=y +CONFIG_ESPRESSIF_WIFI=y +CONFIG_EXAMPLES_RANDOM=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INIT_STACKSIZE=8192 +CONFIG_INTELHEX_BINARY=y +CONFIG_IOB_THROTTLE=24 +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETUTILS_CJSON=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_TCP=y +CONFIG_NET_TCP_DELAYED_ACK=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=0 +CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_BACKTRACE=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SIG_DEFAULT=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_DUMPSTACK=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TLS_TASK_NELEM=4 +CONFIG_WIRELESS=y +CONFIG_WIRELESS_WAPI=y +CONFIG_WIRELESS_WAPI_CMDTOOL=y +CONFIG_WIRELESS_WAPI_INITCONF=y diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/include/board.h b/boards/risc-v/esp32c3/esp32c3-supermini/include/board.h new file mode 100644 index 00000000000..1357b86b172 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/include/board.h @@ -0,0 +1,44 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-supermini/include/board.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C3_ESP32C3_SUPERMINI_INCLUDE_BOARD_H +#define __BOARDS_RISCV_ESP32C3_ESP32C3_SUPERMINI_INCLUDE_BOARD_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* GPIO pins used by the GPIO Subsystem */ + +#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */ +#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ + +/* BOOT button (strapping pin GPIO9) */ + +#define BUTTON_BOOT 9 + +/* Onboard user LED (GPIO8, active-low) */ + +#define LED_BUILTIN 8 + +#endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_SUPERMINI_INCLUDE_BOARD_H */ + diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/scripts/Make.defs b/boards/risc-v/esp32c3/esp32c3-supermini/scripts/Make.defs new file mode 100644 index 00000000000..48299c66787 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/scripts/Make.defs @@ -0,0 +1,60 @@ +############################################################################ +# boards/risc-v/esp32c3/esp32c3-supermini/scripts/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +########################################################################### + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/tools/espressif/Config.mk +include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs + +# Remove quotes from CONFIG_ESPRESSIF_CHIP_SERIES configuration + +CHIP_SERIES = $(patsubst "%",%,$(CONFIG_ESPRESSIF_CHIP_SERIES)) + +# Pick the linker scripts from the board level if they exist, if not +# pick the common linker scripts. + +ARCHSCRIPT += $(BOARD_COMMON_DIR)/scripts/$(CHIP_SERIES)_aliases.ld +ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_flat_memory.ld) + +ifeq ($(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT),y) + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld) +else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y) + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_sections.ld) +else + ARCHSCRIPT += $(call FINDSCRIPT,$(CHIP_SERIES)_legacy_sections.ld) +endif + + +CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -Werror=return-type +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +# Loadable module definitions + +LDMODULEFLAGS += -melf32lriscv + +# ELF module definitions + +LDELFFLAGS += -melf32lriscv diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/src/CMakeLists.txt b/boards/risc-v/esp32c3/esp32c3-supermini/src/CMakeLists.txt new file mode 100644 index 00000000000..3b8f69d9955 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/src/CMakeLists.txt @@ -0,0 +1,60 @@ +# ############################################################################## +# boards/risc-v/esp32c3/esp32c3-supermini/src/CMakeLists.txt +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more contributor +# license agreements. See the NOTICE file distributed with this work for +# additional information regarding copyright ownership. The ASF licenses this +# file to you under the Apache License, Version 2.0 (the "License"); you may not +# use this file except in compliance with the License. You may obtain a copy of +# the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations under +# the License. +# +# ############################################################################## + +set(SRCS esp32c3_boot.c esp32c3_bringup.c) + +if(CONFIG_BOARDCTL) + if(CONFIG_BOARDCTL_RESET) + list(APPEND SRCS esp32c3_reset.c) + endif() +endif() + +if(CONFIG_DEV_GPIO) + list(APPEND SRCS esp32c3_gpio.c) +endif() + +target_sources(board PRIVATE ${SRCS}) + +# ############################################################################## +# Linker scripts +# ############################################################################## + +# Get the chip series (remove quotes) +string(REPLACE "\"" "" CHIP_SERIES "${CONFIG_ESPRESSIF_CHIP_SERIES}") + +# Board common scripts directory +set(BOARD_COMMON_DIR "${NUTTX_BOARD_DIR}/../common") + +# Always include aliases and flat memory linker scripts +set(LDSCRIPTS "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_aliases.ld" + "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_flat_memory.ld") + +# Select sections linker script based on boot configuration +if(CONFIG_ESPRESSIF_BOOTLOADER_MCUBOOT OR CONFIG_ESPRESSIF_SIMPLE_BOOT) + list(APPEND LDSCRIPTS + "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_sections.ld") +else() + list(APPEND LDSCRIPTS + "${BOARD_COMMON_DIR}/scripts/${CHIP_SERIES}_legacy_sections.ld") +endif() + +set_property(GLOBAL APPEND PROPERTY LD_SCRIPT ${LDSCRIPTS}) diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/src/Make.defs b/boards/risc-v/esp32c3/esp32c3-supermini/src/Make.defs new file mode 100644 index 00000000000..12d7c0666fe --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/src/Make.defs @@ -0,0 +1,37 @@ +############################################################################# +# boards/risc-v/esp32c3/esp32c3-supermini/src/Make.defs +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################# + +include $(TOPDIR)/Make.defs + +CSRCS = esp32c3_boot.c esp32c3_bringup.c + +ifeq ($(CONFIG_BOARDCTL_RESET),y) + CSRCS += esp32c3_reset.c +endif + +ifeq ($(CONFIG_DEV_GPIO),y) + CSRCS += esp32c3_gpio.c +endif + +DEPPATH += --dep-path board +VPATH += :board +CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3-supermini.h b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3-supermini.h new file mode 100644 index 00000000000..b485fe0796b --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3-supermini.h @@ -0,0 +1,118 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3-supermini.h + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_RISCV_ESP32C3_ESP32C3_SUPERMINI_SRC_ESP32C3_SUPERMINI_H +#define __BOARDS_RISCV_ESP32C3_ESP32C3_SUPERMINI_SRC_ESP32C3_SUPERMINI_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* RMT gpio */ + +#define RMT_RXCHANNEL 2 +#define RMT_TXCHANNEL 0 + +#ifdef CONFIG_RMT_LOOP_TEST_MODE +# define RMT_INPUT_PIN 0 +# define RMT_OUTPUT_PIN 0 +#else +# define RMT_INPUT_PIN 3 +# define RMT_OUTPUT_PIN 10 +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_bringup + * + * Description: + * Perform architecture-specific initialization. + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp_bringup(void); + +/**************************************************************************** + * Name: board_twai_setup + * + * Description: + * Initialize TWAI and register the TWAI device + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESPRESSIF_TWAI +int board_twai_setup(void); +#endif + +/**************************************************************************** + * Name: esp_gpio_init + * + * Description: + * Configure the GPIO driver. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_GPIO +int esp_gpio_init(void); +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_RISCV_ESP32C3_ESP32C3_SUPERMINI_SRC_ESP32C3_SUPERMINI_H */ diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_boot.c b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_boot.c new file mode 100644 index 00000000000..88d51c4917b --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_boot.c @@ -0,0 +1,91 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_boot.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "esp32c3-supermini.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_board_initialize + * + * Description: + * All Espressif boards must provide the following entry point. + * This entry point is called early in the initialization -- after all + * memory has been configured and mapped but before any devices have been + * initialized. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void esp_board_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will + * be called immediately after up_initialize() is called and just before + * the initial application is started. This additional initialization + * phase may be used, for example, to initialize board-specific device + * drivers. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board-specific initialization */ + + esp_bringup(); +} +#endif diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_bringup.c b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_bringup.c new file mode 100644 index 00000000000..4b0f86f6345 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_bringup.c @@ -0,0 +1,394 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_bringup.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "esp_board_ledc.h" +#include "esp_board_spiflash.h" +#include "esp_board_i2c.h" +#include "esp_board_bmp180.h" + +#include "espressif/esp_start.h" + +#ifdef CONFIG_WATCHDOG +# include "espressif/esp_wdt.h" +#endif + +#ifdef CONFIG_TIMER +# include "espressif/esp_gptimer.h" +#endif + +#ifdef CONFIG_ONESHOT +# include "espressif/esp_oneshot.h" +#endif + +#ifdef CONFIG_RTC_DRIVER +# include "espressif/esp_rtc.h" +#endif + +#ifdef CONFIG_DEV_GPIO +# include "espressif/esp_gpio.h" +#endif + +#ifdef CONFIG_ESPRESSIF_EFUSE +# include "espressif/esp_efuse.h" +#endif + +#ifdef CONFIG_ESP_RMT +# include "esp_board_rmt.h" +#endif + +#ifdef CONFIG_ESPRESSIF_I2S +# include "esp_board_i2s.h" +#endif + +#ifdef CONFIG_ESPRESSIF_SPI +# include "espressif/esp_spi.h" +# include "esp_board_spidev.h" +# ifdef CONFIG_ESPRESSIF_SPI_BITBANG +# include "espressif/esp_spi_bitbang.h" +# endif +#endif + +#ifdef CONFIG_ESPRESSIF_TEMP +# include "espressif/esp_temperature_sensor.h" +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST +# include "private/esp_coexist_internal.h" +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI +# include "esp_board_wlan.h" +#endif + +#ifdef CONFIG_ESPRESSIF_BLE +# include "esp_ble.h" +#endif + +#ifdef CONFIG_SPI_SLAVE_DRIVER +# include "espressif/esp_spi.h" +# include "esp_board_spislavedev.h" +#endif + +#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL +# include "espressif/esp_nxdiag.h" +#endif + +#include "esp32c3-supermini.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_bringup + * + * Description: + * Perform architecture-specific initialization. + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * Input Parameters: + * None. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp_bringup(void) +{ + int ret = OK; + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = nx_mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + _err("Failed to mount procfs at /proc: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_TMPFS + /* Mount the tmpfs file system */ + + ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL); + if (ret < 0) + { + _err("Failed to mount tmpfs at %s: %d\n", CONFIG_LIBC_TMPDIR, ret); + } +#endif + +#if defined(CONFIG_ESPRESSIF_EFUSE) + ret = esp_efuse_initialize("/dev/efuse"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_MWDT0 + ret = esp_wdt_initialize("/dev/watchdog0", ESP_WDT_MWDT0); + if (ret < 0) + { + _err("Failed to initialize WDT: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_MWDT1 + ret = esp_wdt_initialize("/dev/watchdog1", ESP_WDT_MWDT1); + if (ret < 0) + { + _err("Failed to initialize WDT: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_RWDT + ret = esp_wdt_initialize("/dev/watchdog2", ESP_WDT_RWDT); + if (ret < 0) + { + _err("Failed to initialize WDT: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_XTWDT + ret = esp_wdt_initialize("/dev/watchdog3", ESP_WDT_XTAL32K); + if (ret < 0) + { + _err("Failed to initialize WDT: %d\n", ret); + } +#endif + +#ifdef CONFIG_TIMER + ret = esp_timer_initialize(0); + if (ret < 0) + { + _err("Failed to initialize Timer 0: %d\n", ret); + } + +#ifndef CONFIG_ONESHOT + ret = esp_timer_initialize(1); + if (ret < 0) + { + _err("Failed to initialize Timer 1: %d\n", ret); + } +#endif +#endif + +#if defined(CONFIG_ESPRESSIF_SPI) && defined(CONFIG_SPI_DRIVER) +# ifdef CONFIG_ESPRESSIF_SPI2 + ret = board_spidev_initialize(ESPRESSIF_SPI2); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to init spidev 2: %d\n", ret); + } +# endif /* CONFIG_ESPRESSIF_SPI2 */ + +# ifdef CONFIG_ESPRESSIF_SPI_BITBANG + ret = board_spidev_initialize(ESPRESSIF_SPI_BITBANG); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to init spidev 3: %d\n", ret); + } +# endif /* CONFIG_ESPRESSIF_SPI_BITBANG */ +#endif /* CONFIG_ESPRESSIF_SPI && CONFIG_SPI_DRIVER*/ + +#ifdef CONFIG_ESPRESSIF_SPIFLASH + ret = board_spiflash_init(); + if (ret) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); + } +#endif + +#ifdef CONFIG_ESPRESSIF_TEMP + struct esp_temp_sensor_config_t cfg = TEMPERATURE_SENSOR_CONFIG(10, 50); + + ret = esp_temperature_sensor_initialize(cfg); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize temperature sensor driver: %d\n", + ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI_BT_COEXIST + esp_coex_adapter_register(&g_coex_adapter_funcs); + coex_pre_init(); +#endif + +#ifdef CONFIG_ESPRESSIF_WIFI + ret = board_wlan_init(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n", + ret); + } +#endif + +#ifdef CONFIG_RTC_DRIVER + /* Initialize the RTC driver */ + + ret = esp_rtc_driverinit(); + if (ret < 0) + { + _err("Failed to initialize the RTC driver: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_BLE + ret = esp_ble_initialize(); + if (ret) + { + syslog(LOG_ERR, "ERROR: Failed to initialize BLE\n"); + return ret; + } +#endif + +#if defined(CONFIG_SPI_SLAVE_DRIVER) && defined(CONFIG_ESPRESSIF_SPI2) + ret = board_spislavedev_initialize(ESPRESSIF_SPI2); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize SPI%d Slave driver: %d\n", + ESPRESSIF_SPI2, ret); + } +#endif + +#ifdef CONFIG_ONESHOT + ret = esp_oneshot_initialize(); + if (ret < 0) + { + _err("Failed to initialize Oneshot Timer: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESP_RMT + ret = board_rmt_txinitialize(RMT_OUTPUT_PIN); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_rmt_txinitialize() failed: %d\n", ret); + } + + ret = board_rmt_rxinitialize(RMT_INPUT_PIN); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_rmt_txinitialize() failed: %d\n", ret); + } +#endif + +#if defined(CONFIG_ESPRESSIF_I2S) + /* Configure I2S peripheral interfaces */ + + ret = board_i2s_init(); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize I2S driver: %d\n", ret); + } +#endif + +#if defined(CONFIG_I2C_DRIVER) + /* Configure I2C peripheral interfaces */ + + ret = board_i2c_init(); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize I2C driver: %d\n", ret); + } +#endif + +#ifdef CONFIG_SENSORS_BMP180 + /* Try to register BMP180 device in I2C0 */ + + ret = board_bmp180_initialize(0); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize BMP180 " + "Driver for I2C0: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_TWAI + + /* Initialize TWAI and register the TWAI driver. */ + + ret = board_twai_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_twai_setup failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_DEV_GPIO + ret = esp_gpio_init(); + if (ret < 0) + { + ierr("Failed to initialize GPIO Driver: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESPRESSIF_LEDC + ret = board_ledc_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_ledc_setup() failed: %d\n", ret); + } +#endif /* CONFIG_ESPRESSIF_LEDC */ + +#ifdef CONFIG_SYSTEM_NXDIAG_ESPRESSIF_CHIP_WO_TOOL + ret = esp_nxdiag_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: esp_nxdiag_initialize failed: %d\n", ret); + } +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + return ret; +} diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_gpio.c b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_gpio.c new file mode 100644 index 00000000000..08c7223d824 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_gpio.c @@ -0,0 +1,522 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_gpio.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/* Config */ + +#include + +/* Libc */ + +#include +#include +#include +#include + +/* NuttX */ + +#include +#include +#include + +/* Arch */ + +#include "espressif/esp_gpio.h" + +/* Board */ + +#include "esp32c3-supermini.h" +#include + +/* HAL */ + +#include + +#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Onboard user LED (GPIO8, active-low) is used as the GPIO output. */ + +#define GPIO_OUT1 LED_BUILTIN + +#if !defined(CONFIG_ESPRESSIF_GPIO_IRQ) && BOARD_NGPIOINT > 0 +# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled" +#endif + +/* GPIO0 is used as an interrupt input example. GPIO2/8/9 are strapping + * pins and should be avoided for this purpose. + */ + +#define GPIO_IRQPIN 0 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct espgpio_dev_s +{ + struct gpio_dev_s gpio; + uint8_t id; +}; + +struct espgpint_dev_s +{ + struct espgpio_dev_s espgpio; + pin_interrupt_t callback; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(struct gpio_dev_s *dev, bool *value); +static int gpout_write(struct gpio_dev_s *dev, bool value); +static int gpout_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype); +#endif + +#if BOARD_NGPIOINT > 0 +static int gpint_read(struct gpio_dev_s *dev, bool *value); +static int gpint_attach(struct gpio_dev_s *dev, + pin_interrupt_t callback); +static int gpint_enable(struct gpio_dev_s *dev, bool enable); +static int gpint_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static const struct gpio_operations_s gpout_ops = +{ + .go_read = gpout_read, + .go_write = gpout_write, + .go_attach = NULL, + .go_enable = NULL, + .go_setpintype = gpout_setpintype, +}; + +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] = +{ + GPIO_OUT1 +}; + +static struct espgpio_dev_s g_gpout[BOARD_NGPIOOUT]; +#endif + +#if BOARD_NGPIOINT > 0 +static const struct gpio_operations_s gpint_ops = +{ + .go_read = gpint_read, + .go_write = NULL, + .go_attach = gpint_attach, + .go_enable = gpint_enable, + .go_setpintype = gpint_setpintype, +}; + +/* This array maps the GPIO pins used as INTERRUPT INPUTS */ + +static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] = +{ + GPIO_IRQPIN, +}; + +static struct espgpint_dev_s g_gpint[BOARD_NGPIOINT]; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gpout_read + * + * Description: + * Read a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(struct gpio_dev_s *dev, bool *value) +{ + struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev; + + DEBUGASSERT(espgpio != NULL && value != NULL); + DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT); + gpioinfo("Reading...\n"); + + *value = esp_gpioread(g_gpiooutputs[espgpio->id]); + return OK; +} + +/**************************************************************************** + * Name: gpout_write + * + * Description: + * Write to a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - The value to be written. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpout_write(struct gpio_dev_s *dev, bool value) +{ + struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev; + + DEBUGASSERT(espgpio != NULL); + DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT); + gpioinfo("Writing %d\n", (int)value); + + esp_gpiowrite(g_gpiooutputs[espgpio->id], value); + return OK; +} + +/**************************************************************************** + * Name: gpout_setpintype + * + * Description: + * Set digital output pin type. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * pintype - The pin type. See nuttx/ioexpander/gpio.h. + * + * Returned Value: + * Zero (OK) on success; -1 (ERROR) otherwise. + * + ****************************************************************************/ + +static int gpout_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype) +{ + struct espgpio_dev_s *espgpio = (struct espgpio_dev_s *)dev; + + DEBUGASSERT(espgpio != NULL); + DEBUGASSERT(espgpio->id < BOARD_NGPIOOUT); + gpioinfo("Setting pintype: %d\n", (int)pintype); + + esp_gpio_matrix_out(g_gpiooutputs[espgpio->id], + SIG_GPIO_OUT_IDX, 0, 0); + + switch (pintype) + { + case GPIO_INPUT_PIN: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT); + break; + case GPIO_INPUT_PIN_PULLUP: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLUP); + break; + case GPIO_INPUT_PIN_PULLDOWN: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT_PULLDOWN); + break; + case GPIO_OUTPUT_PIN: + esp_configgpio(g_gpiooutputs[espgpio->id], INPUT | OUTPUT); + break; + case GPIO_OUTPUT_PIN_OPENDRAIN: + esp_configgpio(g_gpiooutputs[espgpio->id], + INPUT | OUTPUT_OPEN_DRAIN); + break; + default: + return ERROR; + break; + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: espgpio_interrupt + * + * Description: + * Digital input interrupt handler. + * + * Input Parameters: + * irq - Identifier of the interrupt request. + * context - Context data from the ISR. + * arg - Opaque pointer to the internal driver state structure. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +#if BOARD_NGPIOINT > 0 +static int espgpio_interrupt(int irq, void *context, void *arg) +{ + struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)arg; + + DEBUGASSERT(espgpint != NULL && espgpint->callback != NULL); + gpioinfo("Interrupt! callback=%p\n", espgpint->callback); + + espgpint->callback(&espgpint->espgpio.gpio, espgpint->espgpio.id); + return OK; +} + +/**************************************************************************** + * Name: gpint_read + * + * Description: + * Read a digital input pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_read(struct gpio_dev_s *dev, bool *value) +{ + struct espgpint_dev_s *espgpint = + (struct espgpint_dev_s *)dev; + + DEBUGASSERT(espgpint != NULL && value != NULL); + DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT); + gpioinfo("Reading int pin...\n"); + + *value = esp_gpioread(g_gpiointinputs[espgpint->espgpio.id]); + return OK; +} + +/**************************************************************************** + * Name: gpint_attach + * + * Description: + * Attach the ISR to IRQ and register the callback. But it still doesn't + * enable interrupt yet. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * callback - User callback function. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +static int gpint_attach(struct gpio_dev_s *dev, + pin_interrupt_t callback) +{ + struct espgpint_dev_s *espgpint = + (struct espgpint_dev_s *)dev; + int ret; + + gpioinfo("Attaching the callback\n"); + + /* Make sure the interrupt is disabled */ + + esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]); + + ret = esp_gpio_irq(g_gpiointinputs[espgpint->espgpio.id], + espgpio_interrupt, + &g_gpint[espgpint->espgpio.id]); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret); + return ret; + } + + /* Make sure the interrupt is disabled */ + + esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]); + + gpioinfo("Attach %p\n", callback); + espgpint->callback = callback; + return OK; +} + +/**************************************************************************** + * Name: gpint_enable + * + * Description: + * Enable/Disable interrupt. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * enable - True to enable, false to disable. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_enable(struct gpio_dev_s *dev, bool enable) +{ + struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev; + + if (enable) + { + if (espgpint->callback != NULL) + { + gpioinfo("Enabling the interrupt\n"); + + /* Configure the interrupt for rising edge */ + + esp_gpioirqenable(g_gpiointinputs[espgpint->espgpio.id]); + } + } + else + { + gpioinfo("Disable the interrupt\n"); + esp_gpioirqdisable(g_gpiointinputs[espgpint->espgpio.id]); + } + + return OK; +} + +/**************************************************************************** + * Name: gpint_setpintype + * + * Description: + * Set digital interrupt pin type. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * pintype - The pin type. See nuttx/ioexpander/gpio.h. + * + * Returned Value: + * Zero (OK) on success; -1 (ERROR) otherwise. + * + ****************************************************************************/ + +static int gpint_setpintype(struct gpio_dev_s *dev, + enum gpio_pintype_e pintype) +{ + struct espgpint_dev_s *espgpint = (struct espgpint_dev_s *)dev; + + DEBUGASSERT(espgpint != NULL); + DEBUGASSERT(espgpint->espgpio.id < BOARD_NGPIOINT); + gpioinfo("Setting pintype: %d\n", (int)pintype); + switch (pintype) + { + case GPIO_INTERRUPT_HIGH_PIN: + esp_configgpio(g_gpiointinputs[espgpint->espgpio.id], + INPUT_PULLUP | FALLING); + break; + case GPIO_INTERRUPT_LOW_PIN: + esp_configgpio(g_gpiointinputs[espgpint->espgpio.id], + INPUT_PULLDOWN | RISING); + break; + default: + return ERROR; + break; + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp_gpio_init + * + * Description: + * Configure the GPIO driver. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +int esp_gpio_init(void) +{ + int pincount = 0; + int i; + +#if BOARD_NGPIOOUT > 0 + for (i = 0; i < BOARD_NGPIOOUT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; + g_gpout[i].gpio.gp_ops = &gpout_ops; + g_gpout[i].id = i; + gpio_pin_register(&g_gpout[i].gpio, pincount); + + /* Configure the pins that will be used as output */ + + esp_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); + esp_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_2 | INPUT_FUNCTION_2); + + /* GPIO8 LED is active-low; drive high so the LED starts off. */ + + esp_gpiowrite(g_gpiooutputs[i], 1); + + pincount++; + } +#endif + +#if BOARD_NGPIOINT > 0 + for (i = 0; i < BOARD_NGPIOINT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpint[i].espgpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; + g_gpint[i].espgpio.gpio.gp_ops = &gpint_ops; + g_gpint[i].espgpio.id = i; + gpio_pin_register(&g_gpint[i].espgpio.gpio, pincount); + + /* Configure the pins that will be used as interrupt input with + * falling edge. + */ + + esp_configgpio(g_gpiointinputs[i], + INPUT_FUNCTION_2 | PULLUP | FALLING); + + pincount++; + } +#endif + + return OK; +} +#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */ diff --git a/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_reset.c b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_reset.c new file mode 100644 index 00000000000..adb00a80b75 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_reset.c @@ -0,0 +1,83 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-supermini/src/esp32c3_reset.c + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "espressif/esp_systemreset.h" + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value in this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + syslog(LOG_INFO, "reboot status=%d\n", status); + + switch (status) + { + case EXIT_SUCCESS: + up_shutdown_handler(); + break; + case CONFIG_BOARD_ASSERT_RESET_VALUE: + default: + break; + } + + up_systemreset(); + + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */ diff --git a/tools/ci/testlist/risc-v-02.dat b/tools/ci/testlist/risc-v-02.dat index ac60ce2788f..a6666f43851 100644 --- a/tools/ci/testlist/risc-v-02.dat +++ b/tools/ci/testlist/risc-v-02.dat @@ -5,6 +5,9 @@ CMake,esp32c3-xiao:nimble CMake,esp32c3-xiao:gpio CMake,esp32c3-xiao:wifi CMake,esp32c3-xiao:usbnsh +CMake,esp32c3-supermini:gpio +CMake,esp32c3-supermini:wifi +CMake,esp32c3-supermini:usbnsh CMake,esp32-c3-zero:wifi CMake,esp32-c3-zero:jumbo CMake,esp32-c3-zero:sta_softap