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arch/arm/include/max326xx: Add missing MAX32660 interrupt vectors. arch/arm/src/max326xx: Add missing MAX32660 GPIO interrupt handler.
This commit is contained in:
Gregory Nutt
parent
7854a18ece
commit
03cd52a5a2
4 changed files with 68 additions and 39 deletions
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@ -52,7 +52,7 @@
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#define MAX326_IRQ_CRYPTO (MAX326_IRQ_EXTINT + 0) /* 0 Crypto Oscillator Stable */
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#define MAX326_IRQ_SUPPLY (MAX326_IRQ_EXTINT + 1) /* 1 Power Supply Reset */
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#define MAX326_IRQ_FLASHC (MAX326_IRQ_EXTINT + 2) /* 2 SRAM/FLASH Controller */
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#define MAX326_IRQ_FLC (MAX326_IRQ_EXTINT + 2) /* 2 SRAM/FLASH Controller (FLC) */
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#define MAX326_IRQ_ALARM0 (MAX326_IRQ_EXTINT + 3) /* 3 RTC Time-of-Day Alarm 0 */
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#define MAX326_IRQ_ALARM1 (MAX326_IRQ_EXTINT + 4) /* 4 RTC Time-of-Day Alarm 1 */
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#define MAX326_IRQ_INTERVAL (MAX326_IRQ_EXTINT + 5) /* 5 RTC Interval Alarm */
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@ -49,46 +49,37 @@
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************************************************************************************************/
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/* External interrupts (vectors >= 16) */
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/* REVISIT: Interrupt Vectors are not documented in the User Manual. Here I am just assuming
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* that the vectors are the same for the other family members, but with unsupported options
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* removed.
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*/
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/* 0 Reserved */
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#define MAX326_IRQ_SUPPLY (MAX326_IRQ_EXTINT + 1) /* 1 Power Supply Reset */
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#define MAX326_IRQ_FLASHC (MAX326_IRQ_EXTINT + 2) /* 2 SRAM/FLASH Controller */
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#define MAX326_IRQ_ALARM0 (MAX326_IRQ_EXTINT + 3) /* 3 RTC Time-of-Day Alarm 0 */
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#define MAX326_IRQ_ALARM1 (MAX326_IRQ_EXTINT + 4) /* 4 RTC Time-of-Day Alarm 1 */
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#define MAX326_IRQ_INTERVAL (MAX326_IRQ_EXTINT + 5) /* 5 RTC Interval Alarm */
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#define MAX326_IRQ_RTCOVF (MAX326_IRQ_EXTINT + 6) /* 6 RTC Counter Overflow */
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#define MAX326_IRQ_PMU (MAX326_IRQ_EXTINT + 7) /* 7 PMU */
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/* 8-9 Reserved */
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#define MAX326_IRQ_MMA (MAX326_IRQ_EXTINT + 10) /* 10 MMA */
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#define MAX326_IRQ_WDT0 (MAX326_IRQ_EXTINT + 11) /* 11 Watchdog 0 Timeout Interrupt */
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/* 12-14 Watchdog 0 Pre-window Interrupt */
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#define MAX326_IRQ_GPIO0 (MAX326_IRQ_EXTINT + 15) /* 15 GPIO P0.1-7 External Interrupts */
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/* 16-21 Reserved */
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#define MAX326_IRQ_TMR0_0 (MAX326_IRQ_EXTINT + 22) /* 22 Timer 0 Interrupt 0 */
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#define MAX326_IRQ_TMR0_1 (MAX326_IRQ_EXTINT + 23) /* 23 Timer 0 Interrupt 1 */
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#define MAX326_IRQ_TMR1_0 (MAX326_IRQ_EXTINT + 24) /* 24 Timer 1 Interrupt 0 */
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#define MAX326_IRQ_TMR1_1 (MAX326_IRQ_EXTINT + 25) /* 25 Timer 1 Interrupt 1 */
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#define MAX326_IRQ_TMR2_0 (MAX326_IRQ_EXTINT + 26) /* 26 Timer 2 Interrupt 0 */
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#define MAX326_IRQ_TMR2_1 (MAX326_IRQ_EXTINT + 27) /* 27 Timer 2 Interrupt 1 */
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/* 28-33 Reserved */
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#define MAX326_IRQ_UART0 (MAX326_IRQ_EXTINT + 34) /* 34 UART 0 */
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#define MAX326_IRQ_UART1 (MAX326_IRQ_EXTINT + 35) /* 35 UART 1 */
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/* 36-38 Reserved */
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#define MAX326_IRQ_I2CM0 (MAX326_IRQ_EXTINT + 39) /* 39 I2C0 Master */
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#define MAX326_IRQ_I2CM1 (MAX326_IRQ_EXTINT + 40) /* 40 I2C1 Master */
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/* 41-42 Reserved */
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#define MAX326_IRQ_SPIM0 (MAX326_IRQ_EXTINT + 43) /* 43-44 SPI Master 0 */
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#define MAX326_IRQ_SPIM1 (MAX326_IRQ_EXTINT + 44) /* 44 SPI Master 1 */
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#define MAX326_IRQ_SPIM2 (MAX326_IRQ_EXTINT + 45) /* 45 SPI Master 2 */
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/* 46-48 Reserved */
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#define MAX326_IRQ_SPIS (MAX326_IRQ_EXTINT + 49) /* 49 SPI Slave */
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#define MAX326_IRQ_PF (MAX326_IRQ_EXTINT + 0) /* 0 Power Fail */
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#define MAX326_IRQ_WDT0 (MAX326_IRQ_EXTINT + 1) /* 1 Watchdog 0 Interrupt */
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/* 2 Reserved */
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#define MAX326_IRQ_RTC (MAX326_IRQ_EXTINT + 3) /* 3 RTC Interrupt */
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/* 4 Reserved */
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#define MAX326_IRQ_TMR0 (MAX326_IRQ_EXTINT + 5) /* 5 Timer 0 Interrupt */
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#define MAX326_IRQ_TMR1 (MAX326_IRQ_EXTINT + 6) /* 6 Timer 1 Interrupt */
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#define MAX326_IRQ_TMR2 (MAX326_IRQ_EXTINT + 7) /* 7 Timer 2 Interrupt */
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/* 8-12 Reserved */
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#define MAX326_IRQ_I2C0 (MAX326_IRQ_EXTINT + 13) /* 13 I2C0 */
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#define MAX326_IRQ_UART0 (MAX326_IRQ_EXTINT + 14) /* 14 UART 0 */
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#define MAX326_IRQ_UART1 (MAX326_IRQ_EXTINT + 15) /* 15 UART 1 */
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#define MAX326_IRQ_SPI (MAX326_IRQ_EXTINT + 16) /* 16 SPI17Y */
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#define MAX326_IRQ_SPIMSS (MAX326_IRQ_EXTINT + 17) /* 17 SPIMSS/I2S */
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/* 18-22 Reserved */
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#define MAX326_IRQ_FLC (MAX326_IRQ_EXTINT + 23) /* 23 Flash Controller (FLC) */
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#define MAX326_IRQ_GPIO0 (MAX326_IRQ_EXTINT + 24) /* 24 GPIO P0.1-7 External Interrupts */
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/* 25-27 Reserved */
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#define MAX326_IRQ_DMA0 (MAX326_IRQ_EXTINT + 28) /* 28 DMA0 */
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#define MAX326_IRQ_DMA1 (MAX326_IRQ_EXTINT + 29) /* 29 DMA1 */
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#define MAX326_IRQ_DMA2 (MAX326_IRQ_EXTINT + 30) /* 30 DMA2 */
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#define MAX326_IRQ_DMA3 (MAX326_IRQ_EXTINT + 31) /* 31 DMA3 */
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/* 32-35 Reserved */
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#define MAX326_IRQ_I2C1 (MAX326_IRQ_EXTINT + 36) /* 36 I2C1 */
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/* 37-53 Reserved */
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#define MAX326_IRQ_WAKEUP (MAX326_IRQ_EXTINT + 54) /* 54 GPIO Wakeup */
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/* Number of external interrupts and number of true interrupt vectors */
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#define MAX326_IRQ_NEXTINT 50
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#define MAX326_IRQ_NEXTINT 55
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#define MAX326_IRQ_NVECTORS (MAX326_IRQ_EXTINT + MAX326_IRQ_NEXTINT)
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/* If GPIO pin interrupts are used then there is a second level of interrupt decode */
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@ -47,6 +47,9 @@
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* Pre-processor Definitions
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************************************************************************************/
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#define MAX326_GPIO0_NPINS 14 /* Pins 0-13 (max) */
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#define MAX326_GPIO0_ALLPINS 0x3fff /* Set of all pins */
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/* Register Offsets *****************************************************************/
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#define MAX326_GPIO_AF0SEL_OFFSET 0x0000 /* I/O and Alternate Function 1
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@ -53,6 +53,41 @@
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: max326_gpio_irqinitialize
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*
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* Description:
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* Initialize logic to support interrupting GPIO pins. This function is
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* called by the OS initialization logic and is not a user interface.
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*
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* Assumptions:
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* Called early in the boot-up sequence
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*
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****************************************************************************/
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static int max326_gpio0_interrupt(int irq, FAR void *context, FAR void *arg)
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{
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uint32_t pending;
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int 0;
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/* Get the pending interrupt set */
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pending = getreg32(MAX326_GPIO0_INTFL) & getreg32(MAX326_GPIO0_INTEN) &
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MAX326_GPIO0_ALLPINS;
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for (i = 0; pending != 0 && i < MAX326_GPIO0_NPINS; i++)
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{
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uint32_t pinmask = GPIO_INTEN(i);
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if ((pending & pinmask) != 0)
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{
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/* Dispatch the GPIO interrupt */
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pending &= ~pinmask;
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irq_dispatch(MAX326_IRQ_GPIO1ST + i, context);
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}
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}
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -73,7 +108,7 @@ void max326_gpio_irqinitialize(void);
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{
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/* Attach the GPIO0 interrupt handler and enable interrupts */
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DEBUGVERIFY(irq_attach, MAX326_IRQ_GPIO0, NULL);
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DEBUGVERIFY(irq_attach(MAX326_IRQ_GPIO0, max326_gpio0_interrupt, NULL));
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up_enable_irq(MAX326_IRQ_GPIO0);
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}
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