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SAMA5 serial: Restore logic to minimize TX interrupts. Oddly, seems to improve ADC stability

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This commit is contained in:
Gregory Nutt 2013-10-26 16:02:07 -06:00
parent f090583cb2
commit 017d23cdb8
2 changed files with 2 additions and 3 deletions
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2
arch/arm/src/sama5/Make.defs
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@ -58,7 +58,7 @@ CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.
CMN_CSRCS = up_initialize.c up_idle.c up_interruptcontext.c up_exit.c
CMN_CSRCS += up_createstack.c up_releasestack.c up_usestack.c up_vfork.c
CMN_CSRCS += up_mdelay.c up_udelay.c
CMN_CSRCS += up_puts.c up_mdelay.c up_udelay.c
CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c

3
arch/arm/src/sama5/sam_serial.c
View file

@ -1059,13 +1059,12 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
up_serialout(priv, SAM_UART_IER_OFFSET, UART_INT_TXRDY);
# if 0 /* Seems to be unnecessary */
/* Fake a TX interrupt here by just calling uart_xmitchars() with
* interrupts disabled (note this may recurse).
*/
uart_xmitchars(dev);
# endif
#endif
}
else