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arch/renesas: Add support to disable signals actions related data struct

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Add support to disable signals actions related struct

Co-authored-by: guoshichao <guoshichao@xiaomi.com>
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
This commit is contained in:
wangchengdong 2026-01-13 09:47:54 +08:00 • committed by Alan C. Assis
parent ec2684c885
commit 00c1946e35
6 changed files with 20 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/renesas/include/m16c/irq.h
View file

@ -230,6 +230,7 @@
#ifndef __ASSEMBLY__
struct xcptcontext
{
#ifdef CONFIG_ENABLE_ALL_SIGNALS
/* These are saved copies of LR and SR used during signal processing.
*
* REVISIT: Because there is only one copy of these save areas,
@ -240,6 +241,7 @@ struct xcptcontext
uint8_t saved_pc[2];
uint8_t saved_flg;
#endif /* CONFIG_ENABLE_ALL_SIGNALS */
/* Register save area */

2
arch/renesas/include/rx65n/irq.h
View file

@ -988,10 +988,12 @@
#ifndef __ASSEMBLY__
struct xcptcontext
{
#ifdef CONFIG_ENABLE_ALL_SIGNALS
/* These are saved copies of LR and SR used during signal processing. */
uint32_t saved_pc;
uint32_t saved_sr;
#endif
/* Register save area */

2
arch/renesas/include/sh1/irq.h
View file

@ -451,6 +451,7 @@
#ifndef __ASSEMBLY__
struct xcptcontext
{
#ifdef CONFIG_ENABLE_ALL_SIGNALS
/* These are saved copies of LR and SR used during signal processing.
*
* REVISIT: Because there is only one copy of these save areas,
@ -461,6 +462,7 @@ struct xcptcontext
uint32_t saved_pc;
uint32_t saved_sr;
#endif
/* Register save area */

5
arch/renesas/src/m16c/Make.defs
View file

@ -30,9 +30,12 @@ CMN_CSRCS += renesas_switchcontext.c renesas_usestack.c
CHIP_ASRCS = m16c_vectors.S
CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c m16c_lowputc.c m16c_irq.c
CHIP_CSRCS += m16c_schedulesigaction.c m16c_sigdeliver.c
CHIP_CSRCS += m16c_serial.c m16c_registerdump.c
ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
CHIP_CSRCS += m16c_schedulesigaction.c m16c_sigdeliver.c
endif
ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += m16c_timerisr.c
endif

6
arch/renesas/src/rx65n/Make.defs
View file

@ -30,11 +30,15 @@ CMN_CSRCS += renesas_usestack.c
CHIP_ASRCS = rx65n_vector.S
CHIP_CSRCS = rx65n_lowputc.c rx65n_serial.c rx65n_copystate.c rx65n_irq.c
CHIP_CSRCS += rx65n_schedulesigaction.c rx65n_sigdeliver.c rx65n_initialstate.c
CHIP_CSRCS += rx65n_initialstate.c
CHIP_CSRCS += rx65n_hardware_setup.c rx65n_port.c rx65n_sci.c
CHIP_CSRCS += rx65n_cgc.c rx65n_registerdump.c rx65n_vector_table.c
CHIP_CSRCS += rx65n_timerisr.c rx65n_sbram.c
ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
CHIP_CSRCS += rx65n_schedulesigaction.c rx65n_sigdeliver.c
endif
ifeq ($(CONFIG_RX65N_EMAC),y)
CHIP_CSRCS += rx65n_eth.c rx65n_cmtw0.c
endif

6
arch/renesas/src/sh1/Make.defs
View file

@ -27,12 +27,16 @@ CMN_CSRCS += renesas_exit.c renesas_getintstack.c renesas_initialize.c
CMN_CSRCS += renesas_idle.c renesas_initialstate.c renesas_lowputs.c
CMN_CSRCS += renesas_nputs.c renesas_releasestack.c
CMN_CSRCS += renesas_stackframe.c renesas_switchcontext.c
CMN_CSRCS += renesas_usestack.c sh1_schedulesigaction.c sh1_sigdeliver.c
CMN_CSRCS += renesas_usestack.c
CHIP_ASRCS = sh1_vector.S sh1_saveusercontext.S
CHIP_CSRCS = sh1_lowputc.c sh1_irq.c sh1_serial.c sh1_initialstate.c
CHIP_CSRCS += sh1_copystate.c sh1_registerdump.c
ifeq ($(CONFIG_ENABLE_ALL_SIGNALS),y)
CMN_CSRCS += sh1_schedulesigaction.c sh1_sigdeliver.c
endif
ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += sh1_timerisr.c
endif