From a2f01f5e6465b80efb046918bf7a13c3f0f2374f Mon Sep 17 00:00:00 2001 From: Xiang Xiao Date: Thu, 22 Jun 2023 23:50:01 +0800 Subject: [PATCH] build: Replace "$(shell $(DEFINE) $(CC) ...)" with $(DEFINE_PREFIX) to unify the way to define macros in Makefile Signed-off-by: Xiang Xiao --- Application.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Application.mk b/Application.mk index 121532cdb..6bf6e6667 100644 --- a/Application.mk +++ b/Application.mk @@ -205,8 +205,8 @@ MAINNAME := $(addsuffix _main,$(PROGNAME)) $(MAINCXXOBJ): %$(CXXEXT)$(SUFFIX)$(OBJEXT): %$(CXXEXT) $(eval MAIN=$(word $(call GETINDEX,$<,$(MAINCXXSRCS)),$(MAINNAME))) - $(eval $<_CXXFLAGS += ${shell $(DEFINE) "$(CXX)" main=$(MAIN)}) - $(eval $<_CXXELFFLAGS += ${shell $(DEFINE) "$(CXX)" main=$(MAIN)}) + $(eval $<_CXXFLAGS += ${DEFINE_PREFIX}main=$(MAIN)) + $(eval $<_CXXELFFLAGS += ${DEFINE_PREFIX}main=$(MAIN)) $(if $(and $(CONFIG_BUILD_LOADABLE),$(CXXELFFLAGS)), \ $(call ELFCOMPILEXX, $<, $@), $(call COMPILEXX, $<, $@))