testing/drivertest: Fix timing issues on QEMU and sims.

Since sim and qemu are not cycle accurate simulators, if the vCPU thread is preempted by other high priority tasks, it may cause timing issues. This is easy to happen when the test machine is busy. This commit modifies the condition of timing error and prints out the latency as a warning.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit is contained in:
ouyangxiangzhen 2025-04-22 16:14:10 +08:00 committed by Xiang Xiao
parent 8aa48c4fb6
commit 0faaed99a5

View file

@ -41,7 +41,7 @@
* Pre-processor Definitions
****************************************************************************/
#define RTC_DEFAULT_DEVIATION 10
#define RTC_DEFAULT_DEVIATION 100
#define DEFAULT_TIME_OUT 2
#define SLEEPSECONDS 10
@ -159,6 +159,8 @@ static void posix_timer_callback(union sigval arg)
(FAR struct posix_timer_state_s *)arg.sival_ptr;
int range = get_timestamp() - (*sigev_para).tim;
syslog(0, "range: %d ms\n", range);
assert_in_range(range,
sigev_para->it.it_interval.tv_sec * 1000 - sigev_para->deviation,
sigev_para->it.it_interval.tv_sec * 1000 + sigev_para->deviation);